1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_lptim.h 4 * @author MCD Application Team 5 * @brief Header file of LPTIM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_LPTIM_H 21 #define STM32WBAxx_HAL_LPTIM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32wbaxx_ll_lptim.h" 32 33 /** @addtogroup STM32WBAxx_HAL_Driver 34 * @{ 35 */ 36 37 #if defined (LPTIM1) || defined (LPTIM2) 38 39 /** @addtogroup LPTIM 40 * @{ 41 */ 42 43 /* Exported types ------------------------------------------------------------*/ 44 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types 45 * @{ 46 */ 47 48 /** 49 * @brief LPTIM Clock configuration definition 50 */ 51 typedef struct 52 { 53 uint32_t Source; /*!< Selects the clock source. 54 This parameter can be a value of @ref LPTIM_Clock_Source */ 55 56 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. 57 This parameter can be a value of @ref LPTIM_Clock_Prescaler */ 58 59 } LPTIM_ClockConfigTypeDef; 60 61 /** 62 * @brief LPTIM Clock configuration definition 63 */ 64 typedef struct 65 { 66 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit 67 if the ULPTIM input is selected. 68 Note: This parameter is used only when Ultra low power clock source is used. 69 Note: If the polarity is configured on 'both edges', an auxiliary clock 70 (one of the Low power oscillator) must be active. 71 This parameter can be a value of @ref LPTIM_Clock_Polarity */ 72 73 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. 74 Note: This parameter is used only when Ultra low power clock source is used. 75 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ 76 77 } LPTIM_ULPClockConfigTypeDef; 78 79 /** 80 * @brief LPTIM Trigger configuration definition 81 */ 82 typedef struct 83 { 84 uint32_t Source; /*!< Selects the Trigger source. 85 This parameter can be a value of @ref LPTIM_Trigger_Source */ 86 87 uint32_t ActiveEdge; /*!< Selects the Trigger active edge. 88 Note: This parameter is used only when an external trigger is used. 89 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ 90 91 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. 92 Note: This parameter is used only when an external trigger is used. 93 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ 94 } LPTIM_TriggerConfigTypeDef; 95 96 /** 97 * @brief LPTIM Initialization Structure definition 98 */ 99 typedef struct 100 { 101 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ 102 103 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ 104 105 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ 106 107 uint32_t Period; /*!< Specifies the period value to be loaded into the active 108 Auto-Reload Register at the next update event. 109 This parameter can be a number between 110 Min_Data = 0x0001 and Max_Data = 0xFFFF. */ 111 112 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare 113 values is done immediately or after the end of current period. 114 This parameter can be a value of @ref LPTIM_Updating_Mode */ 115 116 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event 117 or each external event. 118 This parameter can be a value of @ref LPTIM_Counter_Source */ 119 120 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). 121 This parameter can be a value of @ref LPTIM_Input1_Source */ 122 123 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). 124 Note: This parameter is used only for encoder feature so is used only 125 for LPTIM1 instance. 126 This parameter can be a value of @ref LPTIM_Input2_Source */ 127 128 uint32_t RepetitionCounter;/*!< Specifies the repetition counter value. 129 Each time the RCR downcounter reaches zero, an update event is 130 generated and counting restarts from the RCR value (N). 131 Note: When using repetition counter the UpdateMode field must be 132 set to LPTIM_UPDATE_ENDOFPERIOD otherwise unpredictable 133 behavior may occur. 134 This parameter must be a number between Min_Data = 0x00 and 135 Max_Data = 0xFF. */ 136 } LPTIM_InitTypeDef; 137 138 /** 139 * @brief LPTIM Output Compare Configuration Structure definition 140 */ 141 typedef struct 142 { 143 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 144 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 145 uint32_t OCPolarity; /*!< Specifies the output polarity. 146 This parameter can be a value of @ref LPTIM_Output_Compare_Polarity */ 147 } LPTIM_OC_ConfigTypeDef; 148 149 /** 150 * @brief LPTIM Input Capture Configuration Structure definition 151 */ 152 typedef struct 153 { 154 uint32_t ICInputSource; /*!< Specifies source selected for IC channel. 155 This parameter can be a value of @ref LPTIM_Input_Capture_Source */ 156 157 uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. 158 This parameter can be a value of @ref LPTIM_Input_Capture_Prescaler */ 159 160 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. 161 This parameter can be a value of @ref LPTIM_Input_Capture_Polarity */ 162 163 uint32_t ICFilter; /*!< Specifies the input capture filter. 164 This parameter can be a value of @ref LPTIM_Input_Capture_Filter */ 165 } LPTIM_IC_ConfigTypeDef; 166 167 /** 168 * @brief HAL LPTIM State structure definition 169 */ 170 typedef enum 171 { 172 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ 173 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 174 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ 175 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 176 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ 177 } HAL_LPTIM_StateTypeDef; 178 179 /** 180 * @brief HAL Active channel structures definition 181 */ 182 typedef enum 183 { 184 HAL_LPTIM_ACTIVE_CHANNEL_1 = 0x01U, /*!< The active channel is 1 */ 185 HAL_LPTIM_ACTIVE_CHANNEL_2 = 0x02U, /*!< The active channel is 2 */ 186 HAL_LPTIM_ACTIVE_CHANNEL_CLEARED = 0x00U /*!< All active channels cleared */ 187 } HAL_LPTIM_ActiveChannel; 188 189 /** 190 * @brief LPTIM Channel States definition 191 */ 192 typedef enum 193 { 194 HAL_LPTIM_CHANNEL_STATE_RESET = 0x00U, /*!< LPTIM Channel initial state */ 195 HAL_LPTIM_CHANNEL_STATE_READY = 0x01U, /*!< LPTIM Channel ready for use */ 196 HAL_LPTIM_CHANNEL_STATE_BUSY = 0x02U, /*!< An internal process is ongoing on the LPTIM channel */ 197 } HAL_LPTIM_ChannelStateTypeDef; 198 199 /** 200 * @brief LPTIM handle Structure definition 201 */ 202 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 203 typedef struct __LPTIM_HandleTypeDef 204 #else 205 typedef struct 206 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 207 { 208 LPTIM_TypeDef *Instance; /*!< Register base address */ 209 210 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ 211 212 HAL_LPTIM_ActiveChannel Channel; /*!< Active channel */ 213 214 DMA_HandleTypeDef *hdma[3]; /*!< DMA Handlers array, This array is accessed by a @ref LPTIM_DMA_Handle_index */ 215 216 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ 217 218 HAL_LockTypeDef Lock; /*!< LPTIM locking object */ 219 220 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ 221 222 __IO HAL_LPTIM_ChannelStateTypeDef ChannelState[2]; /*!< LPTIM channel operation state */ 223 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 224 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ 225 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ 226 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ 227 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ 228 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ 229 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ 230 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ 231 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ 232 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ 233 void (* UpdateEventCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Update event detection Callback */ 234 void (* RepCounterWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Repetition counter register write complete Callback */ 235 void (* UpdateEventHalfCpltCallback)(struct __LPTIM_HandleTypeDef *hlptim);/*!< Update event half complete detection Callback */ 236 void (* ErrorCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Error Callback */ 237 void (* IC_CaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Input capture Callback */ 238 void (* IC_CaptureHalfCpltCallback)(struct __LPTIM_HandleTypeDef *htim); /*!< Input Capture half complete Callback */ 239 void (* IC_OverCaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Over capture Callback */ 240 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 241 } LPTIM_HandleTypeDef; 242 243 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 244 /** 245 * @brief HAL LPTIM Callback ID enumeration definition 246 */ 247 typedef enum 248 { 249 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ 250 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ 251 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ 252 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ 253 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ 254 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ 255 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ 256 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ 257 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ 258 HAL_LPTIM_UPDATE_EVENT_CB_ID = 0x09U, /*!< Update event detection Callback ID */ 259 HAL_LPTIM_REP_COUNTER_WRITE_CB_ID = 0x0AU, /*!< Repetition counter register write complete Callback ID */ 260 HAL_LPTIM_UPDATE_EVENT_HALF_CB_ID = 0x0BU, /*!< Update event half complete detection Callback ID */ 261 HAL_LPTIM_ERROR_CB_ID = 0x0CU, /*!< LPTIM Error Callback ID */ 262 HAL_LPTIM_IC_CAPTURE_CB_ID = 0x0DU, /*!< Input capture Callback ID */ 263 HAL_LPTIM_IC_CAPTURE_HALF_CB_ID = 0x0EU, /*!< Input capture half complete Callback ID */ 264 HAL_LPTIM_OVER_CAPTURE_CB_ID = 0x0FU, /*!< Over capture Callback ID */ 265 } HAL_LPTIM_CallbackIDTypeDef; 266 267 /** 268 * @brief HAL TIM Callback pointer definition 269 */ 270 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ 271 272 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 273 /** 274 * @} 275 */ 276 277 /* Exported constants --------------------------------------------------------*/ 278 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants 279 * @{ 280 */ 281 282 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source 283 * @{ 284 */ 285 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U 286 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL 287 /** 288 * @} 289 */ 290 291 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler 292 * @{ 293 */ 294 #define LPTIM_PRESCALER_DIV1 0x00000000U 295 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 296 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 297 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) 298 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 299 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) 300 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) 301 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC 302 /** 303 * @} 304 */ 305 306 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time 307 * @{ 308 */ 309 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U 310 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 311 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 312 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT 313 /** 314 * @} 315 */ 316 317 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity 318 * @{ 319 */ 320 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U 321 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 322 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 323 /** 324 * @} 325 */ 326 327 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source 328 * @{ 329 */ 330 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU 331 #define LPTIM_TRIGSOURCE_0 0x00000000U 332 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 333 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 334 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) 335 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 336 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) 337 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) 338 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL 339 /** 340 * @} 341 */ 342 343 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity 344 * @{ 345 */ 346 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 347 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 348 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN 349 /** 350 * @} 351 */ 352 353 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time 354 * @{ 355 */ 356 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U 357 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 358 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 359 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT 360 /** 361 * @} 362 */ 363 364 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode 365 * @{ 366 */ 367 368 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U 369 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD 370 /** 371 * @} 372 */ 373 374 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source 375 * @{ 376 */ 377 378 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U 379 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE 380 /** 381 * @} 382 */ 383 384 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source 385 * @{ 386 */ 387 388 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 389 #if defined(COMP1) 390 #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1 and LPTIM2 */ 391 #endif /* COMP1 */ 392 /** 393 * @} 394 */ 395 396 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source 397 * @{ 398 */ 399 400 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 401 #if defined(COMP2) 402 #define LPTIM_INPUT2SOURCE_COMP2 LPTIM_CFGR2_IN2SEL_0 /*!< For LPTIM1 and LPTIM2 */ 403 #endif /* COMP2 */ 404 /** 405 * @} 406 */ 407 408 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition 409 * @{ 410 */ 411 412 #define LPTIM_FLAG_CC1O LPTIM_ISR_CC1OF 413 #define LPTIM_FLAG_CC2O LPTIM_ISR_CC2OF 414 #define LPTIM_FLAG_CC1 LPTIM_ISR_CC1IF 415 #define LPTIM_FLAG_CC2 LPTIM_ISR_CC2IF 416 #define LPTIM_FLAG_CMP1OK LPTIM_ISR_CMP1OK 417 #define LPTIM_FLAG_CMP2OK LPTIM_ISR_CMP2OK 418 #define LPTIM_FLAG_DIEROK LPTIM_ISR_DIEROK 419 #define LPTIM_FLAG_REPOK LPTIM_ISR_REPOK 420 #define LPTIM_FLAG_UPDATE LPTIM_ISR_UE 421 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN 422 #define LPTIM_FLAG_UP LPTIM_ISR_UP 423 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK 424 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG 425 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM 426 /** 427 * @} 428 */ 429 430 /** @defgroup LPTIM_DMA_sources LPTIM DMA Sources 431 * @{ 432 */ 433 #define LPTIM_DMA_UPDATE LPTIM_DIER_UEDE /*!< DMA request is triggered by the update event */ 434 #define LPTIM_DMA_CC1 LPTIM_DIER_CC1DE /*!< DMA request is triggered by the capture 1 event */ 435 #define LPTIM_DMA_CC2 LPTIM_DIER_CC2DE /*!< DMA request is triggered by the capture 2 event */ 436 437 /** 438 * @} 439 */ 440 441 /** @defgroup LPTIM_DMA_Handle_index LPTIM DMA Handle Index 442 * @{ 443 */ 444 #define LPTIM_DMA_ID_UPDATE ((uint16_t) 0x0000) /*!< Index of the DMA handle used for Update DMA requests */ 445 #define LPTIM_DMA_ID_CC1 ((uint16_t) 0x0001) /*!< Index of the DMA handle used for Capture/Update event 1 DMA request */ 446 #define LPTIM_DMA_ID_CC2 ((uint16_t) 0x0002) /*!< Index of the DMA handle used for Capture/Update event 2 DMA request */ 447 /** 448 * @} 449 */ 450 451 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition 452 * @{ 453 */ 454 #define LPTIM_IT_CC1O LPTIM_DIER_CC1OIE 455 #define LPTIM_IT_CC2O LPTIM_DIER_CC2OIE 456 #define LPTIM_IT_CC1 LPTIM_DIER_CC1IE 457 #define LPTIM_IT_CC2 LPTIM_DIER_CC2IE 458 #define LPTIM_IT_CMP1OK LPTIM_DIER_CMP1OKIE 459 #define LPTIM_IT_CMP2OK LPTIM_DIER_CMP2OKIE 460 #define LPTIM_IT_REPOK LPTIM_DIER_REPOKIE 461 #define LPTIM_IT_UPDATE LPTIM_DIER_UEIE 462 #define LPTIM_IT_DOWN LPTIM_DIER_DOWNIE 463 #define LPTIM_IT_UP LPTIM_DIER_UPIE 464 #define LPTIM_IT_ARROK LPTIM_DIER_ARROKIE 465 #define LPTIM_IT_EXTTRIG LPTIM_DIER_EXTTRIGIE 466 #define LPTIM_IT_ARRM LPTIM_DIER_ARRMIE 467 /** 468 * @} 469 */ 470 471 /** @defgroup LPTIM_Channel LPTIM Channel 472 * @{ 473 */ 474 #define LPTIM_CHANNEL_1 LL_LPTIM_CHANNEL_CH1 /*!< Capture/compare channel 1 identifier */ 475 #define LPTIM_CHANNEL_2 LL_LPTIM_CHANNEL_CH2 /*!< Capture/compare channel 2 identifier */ 476 /** 477 * @} 478 */ 479 480 /** @defgroup LPTIM_Output_Compare_Polarity LPTIM Output Compare Polarity 481 * @{ 482 */ 483 #define LPTIM_OCPOLARITY_HIGH 0x00000000U /*!< Capture/Compare output polarity */ 484 #define LPTIM_OCPOLARITY_LOW 0x00000001U /*!< Capture/Compare output polarity */ 485 /** 486 * @} 487 */ 488 489 /** @defgroup LPTIM_Input_Capture_Prescaler LPTIM Input Capture Prescaler 490 * @{ 491 */ 492 #define LPTIM_ICPSC_DIV1 0x00000000UL /*!< Capture performed each time an edge is detected on the capture input */ 493 #define LPTIM_ICPSC_DIV2 LPTIM_CCMR1_IC1PSC_0 /*!< Capture performed once every 2 events */ 494 #define LPTIM_ICPSC_DIV4 LPTIM_CCMR1_IC1PSC_1 /*!< Capture performed once every 4 events */ 495 #define LPTIM_ICPSC_DIV8 (LPTIM_CCMR1_IC1PSC_0|LPTIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 8 events */ 496 /** 497 * @} 498 */ 499 500 /** @defgroup LPTIM_Input_Capture_Polarity LPTIM Input Capture Polarity 501 * @{ 502 */ 503 #define LPTIM_ICPOLARITY_RISING 0x00000000UL /*!< Capture/Compare input rising polarity */ 504 #define LPTIM_ICPOLARITY_FALLING LPTIM_CCMR1_CC1P_0 /*!< Capture/Compare input falling polarity */ 505 #define LPTIM_ICPOLARITY_RISING_FALLING (LPTIM_CCMR1_CC1P_0|LPTIM_CCMR1_CC1P_1) /*!< Capture/Compare input rising and falling polarities */ 506 /** 507 * @} 508 */ 509 510 /** @defgroup LPTIM_Input_Capture_Filter LPTIM Input Capture Filter 511 * @{ 512 */ 513 #define LPTIM_ICFLT_CLOCK_DIV1 0x00000000UL /*!< any external input capture signal level change is considered as a valid transition */ 514 #define LPTIM_ICFLT_CLOCK_DIV2 LPTIM_CCMR1_IC1F_0 /*!< external input capture signal level change must be stable for at least 2 clock periods before it is considered as valid transition */ 515 #define LPTIM_ICFLT_CLOCK_DIV4 LPTIM_CCMR1_IC1F_1 /*!< external input capture signal level change must be stable for at least 4 clock periods before it is considered as valid transition */ 516 #define LPTIM_ICFLT_CLOCK_DIV8 (LPTIM_CCMR1_IC1F_0|LPTIM_CCMR1_IC1F_1) /*!< external input capture signal level change must be stable for at least 8 clock periods before it is considered as valid transition */ 517 /** 518 * @} 519 */ 520 521 /** @defgroup LPTIM_Input_Capture_Source LPTIM Input Capture Source 522 * @{ 523 */ 524 #define LPTIM_IC1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 525 #if defined(COMP1) && defined(COMP2) 526 #define LPTIM_IC1SOURCE_COMP1 LPTIM_CFGR2_IC1SEL_0 /*!< For LPTIM1 and LPTIM2 */ 527 #define LPTIM_IC1SOURCE_COMP2 LPTIM_CFGR2_IC1SEL_1 /*!< For LPTIM1 and LPTIM2 */ 528 #endif /* COMP1 && COMP2 */ 529 #define LPTIM_IC2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 530 #define LPTIM_IC2SOURCE_LSI LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM1 */ 531 #define LPTIM_IC2SOURCE_LSE LPTIM_CFGR2_IC2SEL_1 /*!< For LPTIM1 */ 532 #define LPTIM_IC2SOURCE_HSI_256 LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM2 */ 533 /** 534 * @} 535 */ 536 /** 537 * @} 538 */ 539 540 /* Exported macros -----------------------------------------------------------*/ 541 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros 542 * @{ 543 */ 544 545 /** @brief Reset LPTIM handle state. 546 * @param __HANDLE__ LPTIM handle 547 * @retval None 548 */ 549 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 550 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 551 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 552 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 553 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 554 (__HANDLE__)->MspInitCallback = NULL; \ 555 (__HANDLE__)->MspDeInitCallback = NULL; \ 556 } while(0) 557 #else 558 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 559 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 560 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 561 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 562 } while(0) 563 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 564 565 /** 566 * @brief Enable the LPTIM peripheral. 567 * @param __HANDLE__ LPTIM handle 568 * @retval None 569 */ 570 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) 571 572 /** 573 * @brief Disable the LPTIM peripheral. 574 * @param __HANDLE__ LPTIM handle 575 * @retval None 576 */ 577 #define __HAL_LPTIM_DISABLE(__HANDLE__) \ 578 do { \ 579 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC1E) == 0UL) \ 580 { \ 581 if(((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC2E) == 0UL) \ 582 { \ 583 (__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE); \ 584 } \ 585 } \ 586 } while(0) 587 588 /** 589 * @brief Start the LPTIM peripheral in Continuous mode. 590 * @param __HANDLE__ LPTIM handle 591 * @retval None 592 */ 593 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) 594 /** 595 * @brief Start the LPTIM peripheral in single mode. 596 * @param __HANDLE__ LPTIM handle 597 * @retval None 598 */ 599 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) 600 601 /** 602 * @brief Reset the LPTIM Counter register in synchronous mode. 603 * @param __HANDLE__ LPTIM handle 604 * @retval None 605 */ 606 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST) 607 608 /** 609 * @brief Reset after read of the LPTIM Counter register in asynchronous mode. 610 * @param __HANDLE__ LPTIM handle 611 * @retval None 612 */ 613 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE) 614 615 /** 616 * @brief Write the passed parameter in the Autoreload register. 617 * @param __HANDLE__ LPTIM handle 618 * @param __VALUE__ Autoreload value 619 * @retval None 620 * @note The ARR register can only be modified when the LPTIM instance is enabled. 621 */ 622 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) 623 624 /** 625 * @brief Write the passed parameter in the Compare register. 626 * @param __HANDLE__ LPTIM handle 627 * @param __VALUE__ Compare value 628 * @param __CHANNEL__ TIM Channel to be configured 629 * @retval None 630 * @note The CCRx registers can only be modified when the LPTIM instance is enabled. 631 */ 632 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __CHANNEL__, __VALUE__) \ 633 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__VALUE__)) :\ 634 ((__CHANNEL__) == LPTIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__VALUE__)) : 0U) 635 636 /** 637 * @brief Write the passed parameter in the Repetition register. 638 * @param __HANDLE__ LPTIM handle 639 * @param __VALUE__ Repetition value 640 * @retval None 641 */ 642 #define __HAL_LPTIM_REPETITIONCOUNTER_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->RCR = (__VALUE__)) 643 644 /** 645 * @brief Return the current Repetition value. 646 * @param __HANDLE__ LPTIM handle 647 * @retval Repetition register value 648 * @note The RCR register can only be modified when the LPTIM instance is enabled. 649 */ 650 #define __HAL_LPTIM_REPETITIONCOUNTER_GET(__HANDLE__) ((__HANDLE__)->Instance->RCR) 651 652 /** 653 * @brief Enable the LPTIM signal input/output on the corresponding pin. 654 * @param __HANDLE__ LPTIM handle 655 * @param __CHANNEL__ LPTIM Channels to be enabled. 656 * This parameter can be one of the following values: 657 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 658 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 659 * @retval None 660 */ 661 #define __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(__HANDLE__, __CHANNEL__) \ 662 do { \ 663 switch (__CHANNEL__) \ 664 { \ 665 case LPTIM_CHANNEL_1: \ 666 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC1E); \ 667 break; \ 668 case LPTIM_CHANNEL_2: \ 669 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC2E); \ 670 break; \ 671 default: \ 672 break; \ 673 } \ 674 } \ 675 while(0) 676 677 /** 678 * @brief Disable the LPTIM signal input/output on the corresponding pin. 679 * @param __HANDLE__ LPTIM handle 680 * @param __CHANNEL__ LPTIM Channels to be disabled. 681 * This parameter can be one of the following values: 682 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 683 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 684 * @retval None 685 */ 686 #define __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(__HANDLE__, __CHANNEL__) \ 687 do { \ 688 switch (__CHANNEL__) \ 689 { \ 690 case LPTIM_CHANNEL_1: \ 691 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC1E); \ 692 break; \ 693 case LPTIM_CHANNEL_2: \ 694 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC2E); \ 695 break; \ 696 default: \ 697 break; \ 698 } \ 699 } \ 700 while(0) 701 702 /** 703 * @brief Check whether the specified LPTIM flag is set or not. 704 * @param __HANDLE__ LPTIM handle 705 * @param __FLAG__ LPTIM flag to check 706 * This parameter can be a value of: 707 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 708 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 709 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 710 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 711 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 712 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 713 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 714 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 715 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 716 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 717 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 718 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 719 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 720 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 721 * @retval The state of the specified flag (SET or RESET). 722 */ 723 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) 724 725 /** 726 * @brief Clear the specified LPTIM flag. 727 * @param __HANDLE__ LPTIM handle. 728 * @param __FLAG__ LPTIM flag to clear. 729 * This parameter can be a value of: 730 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 731 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 732 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 733 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 734 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 735 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 736 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 737 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 738 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 739 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 740 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 741 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 742 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 743 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 744 * @retval None. 745 */ 746 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 747 748 /** 749 * @brief Enable the specified LPTIM interrupt. 750 * @param __HANDLE__ LPTIM handle. 751 * @param __INTERRUPT__ LPTIM interrupt to set. 752 * This parameter can be a value of: 753 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 754 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 755 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 756 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 757 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 758 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 759 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 760 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 761 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 762 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 763 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 764 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 765 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 766 * @retval None. 767 * @note The LPTIM interrupts can only be enabled when the LPTIM instance is enabled. 768 */ 769 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) 770 771 /** 772 * @brief Disable the specified LPTIM interrupt. 773 * @param __HANDLE__ LPTIM handle. 774 * @param __INTERRUPT__ LPTIM interrupt to set. 775 * This parameter can be a value of: 776 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 777 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 778 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 779 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 780 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 781 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 782 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 783 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 784 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 785 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 786 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 787 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 788 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 789 * @retval None. 790 * @note The LPTIM interrupts can only be disabled when the LPTIM instance is enabled. 791 */ 792 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= (~(__INTERRUPT__))) 793 794 /** @brief Enable the specified DMA request. 795 * @param __HANDLE__ specifies the TIM Handle. 796 * @param __DMA__ specifies the LPTIM DMA request to enable. 797 * This parameter can be one of the following values: 798 * @arg LPTIM_DMA_UPDATE: Update DMA request 799 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 800 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 801 * @retval None 802 */ 803 #define __HAL_LPTIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) 804 805 /** @brief Disable the specified DMA request. 806 * @param __HANDLE__ specifies the LPTIM Handle. 807 * @param __DMA__ specifies the LPTIM DMA request to disable. 808 * This parameter can be one of the following values: 809 * @arg LPTIM_DMA_UPDATE: Update DMA request 810 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 811 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 812 * @retval None 813 */ 814 #define __HAL_LPTIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) 815 816 /** 817 * @brief Check whether the specified LPTIM interrupt source is enabled or not. 818 * @param __HANDLE__ LPTIM handle. 819 * @param __INTERRUPT__ LPTIM interrupt to check. 820 * This parameter can be a value of: 821 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 822 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 823 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 824 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 825 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 826 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 827 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 828 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 829 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 830 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 831 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 832 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 833 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 834 * @retval Interrupt status. 835 */ 836 837 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER\ 838 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 839 840 /** 841 * @} 842 */ 843 844 /* Exported functions --------------------------------------------------------*/ 845 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions 846 * @{ 847 */ 848 849 /** @addtogroup LPTIM_Exported_Functions_Group1 850 * @brief Initialization and Configuration functions. 851 * @{ 852 */ 853 /* Initialization/de-initialization functions ********************************/ 854 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); 855 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); 856 857 /* MSP functions *************************************************************/ 858 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); 859 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); 860 /** 861 * @} 862 */ 863 864 /** @addtogroup LPTIM_Exported_Functions_Group2 865 * @brief Start-Stop operation functions. 866 * @{ 867 */ 868 /* Config functions **********************************************************/ 869 HAL_StatusTypeDef HAL_LPTIM_OC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_OC_ConfigTypeDef *sConfig, 870 uint32_t Channel); 871 872 /* Start/Stop operation functions *********************************************/ 873 /* ################################# PWM Mode ################################*/ 874 /* Blocking mode: Polling */ 875 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 876 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 877 /* Non-Blocking mode: Interrupt */ 878 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 879 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 880 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, const uint32_t *pData, 881 uint32_t Length); 882 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 883 884 /* ############################# One Pulse Mode ##############################*/ 885 /* Blocking mode: Polling */ 886 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 887 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 888 /* Non-Blocking mode: Interrupt */ 889 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 890 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 891 892 /* ############################## Set once Mode ##############################*/ 893 /* Blocking mode: Polling */ 894 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 895 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 896 /* Non-Blocking mode: Interrupt */ 897 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 898 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 899 900 /* ############################### Encoder Mode ##############################*/ 901 /* Blocking mode: Polling */ 902 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim); 903 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); 904 /* Non-Blocking mode: Interrupt */ 905 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim); 906 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); 907 908 /* ############################# Time out Mode ##############################*/ 909 /* Blocking mode: Polling */ 910 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 911 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); 912 /* Non-Blocking mode: Interrupt */ 913 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 914 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); 915 916 /* ############################## Counter Mode ###############################*/ 917 /* Blocking mode: Polling */ 918 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim); 919 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); 920 /* Non-Blocking mode: Interrupt */ 921 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim); 922 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); 923 924 /* ############################## Input Capture Mode ###############################*/ 925 /* Blocking mode: Polling */ 926 HAL_StatusTypeDef HAL_LPTIM_IC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_IC_ConfigTypeDef *sConfig, 927 uint32_t Channel); 928 HAL_StatusTypeDef HAL_LPTIM_IC_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 929 HAL_StatusTypeDef HAL_LPTIM_IC_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 930 /* Non-Blocking mode: Interrupt */ 931 HAL_StatusTypeDef HAL_LPTIM_IC_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 932 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 933 HAL_StatusTypeDef HAL_LPTIM_IC_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, uint32_t *pData, 934 uint32_t Length); 935 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 936 /** 937 * @} 938 */ 939 940 /** @addtogroup LPTIM_Exported_Functions_Group3 941 * @brief Read operation functions. 942 * @{ 943 */ 944 /* Reading operation functions ************************************************/ 945 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim); 946 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim); 947 uint32_t HAL_LPTIM_ReadCapturedValue(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 948 uint8_t HAL_LPTIM_IC_GetOffset(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 949 /** 950 * @} 951 */ 952 953 /** @addtogroup LPTIM_Exported_Functions_Group4 954 * @brief LPTIM IRQ handler and callback functions. 955 * @{ 956 */ 957 /* LPTIM IRQ functions *******************************************************/ 958 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); 959 960 /* CallBack functions ********************************************************/ 961 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); 962 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); 963 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); 964 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); 965 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); 966 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); 967 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); 968 void HAL_LPTIM_ErrorCallback(LPTIM_HandleTypeDef *hlptim); 969 void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim); 970 void HAL_LPTIM_UpdateEventHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 971 void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim); 972 void HAL_LPTIM_IC_CaptureCallback(LPTIM_HandleTypeDef *hlptim); 973 void HAL_LPTIM_IC_CaptureHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 974 void HAL_LPTIM_IC_OverCaptureCallback(LPTIM_HandleTypeDef *hlptim); 975 976 /* Callbacks Register/UnRegister functions ***********************************/ 977 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 978 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, 979 pLPTIM_CallbackTypeDef pCallback); 980 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); 981 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 982 /** 983 * @} 984 */ 985 986 /** @addtogroup LPTIM_Group5 987 * @brief Peripheral State functions. 988 * @{ 989 */ 990 /* Peripheral State functions ************************************************/ 991 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); 992 /** 993 * @} 994 */ 995 996 /** 997 * @} 998 */ 999 1000 /* Private types -------------------------------------------------------------*/ 1001 /** @defgroup LPTIM_Private_Types LPTIM Private Types 1002 * @{ 1003 */ 1004 1005 /** 1006 * @} 1007 */ 1008 1009 /* Private variables ---------------------------------------------------------*/ 1010 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables 1011 * @{ 1012 */ 1013 1014 /** 1015 * @} 1016 */ 1017 1018 /* Private constants ---------------------------------------------------------*/ 1019 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants 1020 * @{ 1021 */ 1022 1023 /** 1024 * @} 1025 */ 1026 1027 /* Private macros ------------------------------------------------------------*/ 1028 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros 1029 * @{ 1030 */ 1031 1032 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ 1033 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) 1034 1035 1036 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ 1037 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ 1038 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ 1039 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ 1040 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ 1041 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ 1042 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ 1043 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) 1044 1045 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) 1046 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ 1047 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ 1048 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ 1049 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) 1050 1051 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ 1052 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ 1053 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) 1054 1055 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ 1056 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ 1057 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ 1058 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ 1059 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ 1060 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ 1061 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ 1062 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ 1063 ((__TRIG__) == LPTIM_TRIGSOURCE_7)) 1064 1065 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ 1066 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ 1067 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) 1068 1069 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ 1070 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ 1071 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ 1072 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) 1073 1074 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ 1075 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) 1076 1077 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ 1078 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) 1079 1080 #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((0x00000001UL <= (__AUTORELOAD__)) &&\ 1081 ((__AUTORELOAD__) <= 0x0000FFFFUL)) 1082 1083 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) 1084 1085 #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ 1086 ((__PERIOD__) <= 0x0000FFFFUL)) 1087 1088 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) 1089 1090 #define IS_LPTIM_OC_POLARITY(__OCPOLARITY__) (((__OCPOLARITY__) == LPTIM_OCPOLARITY_LOW) || \ 1091 ((__OCPOLARITY__) == LPTIM_OCPOLARITY_HIGH)) 1092 #define IS_LPTIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_ICPSC_DIV1) ||\ 1093 ((__PRESCALER__) == LPTIM_ICPSC_DIV2) ||\ 1094 ((__PRESCALER__) == LPTIM_ICPSC_DIV4) ||\ 1095 ((__PRESCALER__) == LPTIM_ICPSC_DIV8)) 1096 1097 #define IS_LPTIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ICPOLARITY_RISING) || \ 1098 ((__POLARITY__) == LPTIM_ICPOLARITY_FALLING) ||\ 1099 ((__POLARITY__) == LPTIM_ICPOLARITY_RISING_FALLING)) 1100 1101 #define IS_LPTIM_IC_FILTER(__FILTER__) (((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV1) ||\ 1102 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV2) ||\ 1103 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV4) ||\ 1104 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV8)) 1105 1106 #define IS_LPTIM_REPETITION(__REPETITION__) ((__REPETITION__) <= 0x000000FFUL) 1107 1108 #if defined(LPTIM2) 1109 #if defined(COMP1) 1110 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1111 ((((__INSTANCE__) == LPTIM1) || \ 1112 ((__INSTANCE__) == LPTIM2)) && \ 1113 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1114 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) 1115 #else 1116 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1117 ((((__INSTANCE__) == LPTIM1) || \ 1118 ((__INSTANCE__) == LPTIM2)) && \ 1119 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO))) 1120 #endif /* COMP1 */ 1121 #else 1122 #if defined(COMP1) 1123 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1124 (((__INSTANCE__) == LPTIM1) && \ 1125 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1126 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) 1127 #else 1128 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1129 (((__INSTANCE__) == LPTIM1) && \ 1130 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO))) 1131 #endif /* COMP1*/ 1132 #endif /* LPTIM2 */ 1133 1134 #if defined(LPTIM2) 1135 #if defined(COMP2) 1136 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1137 ((((__INSTANCE__) == LPTIM1) || \ 1138 ((__INSTANCE__) == LPTIM2)) && \ 1139 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ 1140 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) 1141 #else 1142 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1143 ((((__INSTANCE__) == LPTIM1) || \ 1144 ((__INSTANCE__) == LPTIM2)) && \ 1145 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO))) 1146 #endif /* COMP2 */ 1147 #else 1148 #if defined(COMP2) 1149 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1150 (((__INSTANCE__) == LPTIM1) && \ 1151 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ 1152 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) 1153 #else 1154 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1155 (((__INSTANCE__) == LPTIM1) && \ 1156 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO))) 1157 #endif /* COMP2 */ 1158 #endif /* LPTIM2 */ 1159 1160 #if defined(LPTIM2) 1161 #if defined(COMP1) && defined(COMP2) 1162 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1163 ((((__INSTANCE__) == LPTIM1) || \ 1164 ((__INSTANCE__) == LPTIM2)) && \ 1165 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1166 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1) || \ 1167 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP2))) 1168 #else 1169 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1170 ((((__INSTANCE__) == LPTIM1) || \ 1171 ((__INSTANCE__) == LPTIM2)) && \ 1172 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO))) 1173 #endif /* COMP1 && COMP2 */ 1174 1175 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1176 ((((__INSTANCE__) == LPTIM1) && \ 1177 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1178 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1179 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE))) \ 1180 || \ 1181 (((__INSTANCE__) == LPTIM2) && \ 1182 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1183 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_256)))) 1184 #else 1185 #if defined(COMP1) && defined(COMP2) 1186 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1187 (((__INSTANCE__) == LPTIM1) && \ 1188 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1189 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1) || \ 1190 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP2))) 1191 #else 1192 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1193 (((__INSTANCE__) == LPTIM1) && \ 1194 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO))) 1195 #endif /* COMP1 && COMP2 */ 1196 1197 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1198 (((__INSTANCE__) == LPTIM1) && \ 1199 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1200 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1201 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE))) 1202 #endif /* LPTIM2 */ 1203 1204 #define LPTIM_CHANNEL_STATE_GET(__INSTANCE__, __CHANNEL__)\ 1205 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? (__INSTANCE__)->ChannelState[0] :\ 1206 (__INSTANCE__)->ChannelState[1]) 1207 1208 #define LPTIM_CHANNEL_STATE_SET(__INSTANCE__, __CHANNEL__, __CHANNEL_STATE__) \ 1209 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__INSTANCE__)->ChannelState[0] = (__CHANNEL_STATE__)) :\ 1210 ((__INSTANCE__)->ChannelState[1] = (__CHANNEL_STATE__))) 1211 1212 #define LPTIM_CHANNEL_STATE_SET_ALL(__INSTANCE__, __CHANNEL_STATE__) do { \ 1213 (__INSTANCE__)->ChannelState[0] =\ 1214 (__CHANNEL_STATE__); \ 1215 (__INSTANCE__)->ChannelState[1] =\ 1216 (__CHANNEL_STATE__); \ 1217 } while(0) 1218 1219 #if defined(LPTIM2) 1220 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1221 ((((__INSTANCE__) == LPTIM1) && \ 1222 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1223 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1224 || \ 1225 (((__INSTANCE__) == LPTIM2) && \ 1226 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1227 ((__CHANNEL__) == LPTIM_CHANNEL_2)))) 1228 #else 1229 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1230 (((__INSTANCE__) == LPTIM1) && \ 1231 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1232 ((__CHANNEL__) == LPTIM_CHANNEL_2))) 1233 #endif /* LPTIM2 */ 1234 /** 1235 * @} 1236 */ 1237 1238 /* Private functions ---------------------------------------------------------*/ 1239 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 1240 * @{ 1241 */ 1242 /** 1243 * @} 1244 */ 1245 1246 /** 1247 * @} 1248 */ 1249 1250 #endif /* LPTIM1 || LPTIM2 */ 1251 /** 1252 * @} 1253 */ 1254 1255 #ifdef __cplusplus 1256 } 1257 #endif 1258 1259 #endif /* STM32WBAxx_HAL_LPTIM_H */ 1260
