1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_flash.h 4 * @author MCD Application Team 5 * @brief Header file of FLASH HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_FLASH_H 21 #define STM32WBAxx_HAL_FLASH_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /** @addtogroup STM32WBAxx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup FLASH 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup FLASH_Exported_Types FLASH Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief FLASH Erase structure definition 45 */ 46 typedef struct 47 { 48 uint32_t TypeErase; /*!< Mass erase or page erase. 49 This parameter can be a value of @ref FLASH_Type_Erase */ 50 uint32_t Page; /*!< Initial Flash page to erase when page erase is enabled 51 This parameter must be a value between 0 and (max number of pages - 1) */ 52 uint32_t NbPages; /*!< Number of pages to be erased. 53 This parameter must be a value between 1 and (max number of pages - value of initial page)*/ 54 } FLASH_EraseInitTypeDef; 55 56 /** 57 * @brief FLASH Option Bytes Program structure definition 58 */ 59 typedef struct 60 { 61 uint32_t OptionType; /*!< Option byte to be configured. 62 This parameter can be a combination of the values of @ref FLASH_OB_Type */ 63 uint32_t WRPArea; /*!< Write protection area to be programmed (used for OPTIONBYTE_WRP). 64 Only one WRP area could be programmed at the same time. 65 This parameter can be value of @ref FLASH_OB_WRP_Area */ 66 uint32_t WRPStartOffset; /*!< Write protection start offset (used for OPTIONBYTE_WRP). 67 This parameter must be a value between 0 and (max number of pages - 1) */ 68 uint32_t WRPEndOffset; /*!< Write protection end offset (used for OPTIONBYTE_WRP). 69 This parameter must be a value between WRPStartOffset and (max number of pages - 1) */ 70 FunctionalState WRPLock; /*!< Write protection lock (used for OPTIONBYTE_WRP). 71 This parameter can be set to ENABLE or DISABLE */ 72 uint32_t RDPLevel; /*!< Set the read protection level (used for OPTIONBYTE_RDP). 73 This parameter can be a value of @ref FLASH_OB_Read_Protection */ 74 uint32_t USERType; /*!< User option byte(s) to be configured (used for OPTIONBYTE_USER). 75 This parameter can be a combination of @ref FLASH_OB_USER_Type */ 76 uint32_t USERConfig; /*!< Value of the user option byte (used for OPTIONBYTE_USER). 77 This parameter can be a combination of @ref FLASH_OB_USER_BOR_LEVEL, 78 @ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY, 79 @ref FLASH_OB_USER_SRAM1_RST, @ref FLASH_OB_USER_IWDG_SW, 80 @ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY, 81 @ref FLASH_OB_USER_WWDG_SW, @ref FLASH_OB_USER_SRAM2_PAR, 82 @ref FLASH_OB_USER_SRAM2_RST, @ref FLASH_OB_USER_nSWBOOT0, 83 @ref FLASH_OB_USER_nBOOT0 and @ref FLASH_OB_USER_TZEN */ 84 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 85 uint32_t WMSecConfig; /*!< Configuration of the Watermark-based Secure Area (used for OPTIONBYTE_WMSEC). 86 This parameter must be a value of @ref FLASH_OB_WMSEC */ 87 uint32_t WMSecStartPage; /*!< Start page of secure area (used for OPTIONBYTE_WMSEC). 88 This parameter must be a value between 0 and (max number of pages in the bank - 1) */ 89 uint32_t WMSecEndPage; /*!< End page of secure area (used for OPTIONBYTE_WMSEC). 90 This parameter must be a value between WMSecStartPage and (max number of pages in the bank - 1) */ 91 uint32_t WMHDPEndPage; /*!< End page of the secure hide protection (used for OPTIONBYTE_WMSEC). 92 This parameter must be a value between WMSecStartPage and WMSecEndPage */ 93 uint32_t BootLock; /*!< Configuration of the boot lock (used for OPTIONBYTE_BOOT_LOCK). 94 This parameter must be a value of @ref FLASH_OB_BOOT_LOCK */ 95 #endif /* __ARM_FEATURE_CMSE */ 96 uint32_t BootAddrConfig; /*!< Configuration of the Boot address (used for OPTIONBYTE_BOOTADDR). 97 This parameter must be a value of @ref FLASH_OB_BOOTADDR */ 98 uint32_t BootAddr; /*!< Boot address (used for OPTIONBYTE_BOOTADDR). 99 This parameter must be a value between 0x0 and 0xFFFFFF00 */ 100 uint32_t RDPKeyType; /*!< Configuration of the RDP OEM keys (used for OPTIONBYTE_RDPKEY). 101 This parameter can be a value of @ref FLASH_OB_RDP_Key_Type */ 102 uint32_t RDPKey1; /*!< Value of the RDP OEM key 1 (used for OPTIONBYTE_RDPKEY) */ 103 uint32_t RDPKey2; /*!< Value of the RDP OEM key 2 (used for OPTIONBYTE_RDPKEY) */ 104 } FLASH_OBProgramInitTypeDef; 105 106 /** 107 * @brief FLASH handle Structure definition 108 */ 109 typedef struct 110 { 111 HAL_LockTypeDef Lock; /*!< FLASH locking object */ 112 uint32_t ErrorCode; /*!< FLASH error code */ 113 uint32_t ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */ 114 uint32_t Address; /*!< Internal variable to save address selected for program in IT context */ 115 uint32_t Page; /*!< Internal variable to define the current page which is erasing in IT context */ 116 uint32_t NbPagesToErase; /*!< Internal variable to save the remaining pages to erase in IT context */ 117 } FLASH_ProcessTypeDef; 118 119 /** 120 * @} 121 */ 122 123 /* Exported constants --------------------------------------------------------*/ 124 /** @defgroup FLASH_Exported_Constants FLASH Exported Constants 125 * @{ 126 */ 127 128 /** @defgroup FLASH_Flags FLASH Flags Definition 129 * @{ 130 */ 131 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 132 #define FLASH_FLAG_EOP FLASH_SECSR_EOP /*!< FLASH End of operation flag */ 133 #define FLASH_FLAG_OPERR FLASH_SECSR_OPERR /*!< FLASH Operation error flag */ 134 #define FLASH_FLAG_PROGERR FLASH_SECSR_PROGERR /*!< FLASH Programming error flag */ 135 #define FLASH_FLAG_WRPERR FLASH_SECSR_WRPERR /*!< FLASH Write protection error flag */ 136 #define FLASH_FLAG_PGAERR FLASH_SECSR_PGAERR /*!< FLASH Programming alignment error flag */ 137 #define FLASH_FLAG_SIZERR FLASH_SECSR_SIZERR /*!< FLASH Size error flag */ 138 #define FLASH_FLAG_PGSERR FLASH_SECSR_PGSERR /*!< FLASH Programming sequence error flag */ 139 #define FLASH_FLAG_OPTWERR FLASH_NSSR_OPTWERR /*!< FLASH Option modification error flag */ 140 #define FLASH_FLAG_BSY FLASH_SECSR_BSY /*!< FLASH Busy flag */ 141 #define FLASH_FLAG_WDW FLASH_SECSR_WDW /*!< FLASH Wait Data to Write flag */ 142 #define FLASH_FLAG_ECCC FLASH_ECCR_ECCC /*!< FLASH ECC correction */ 143 #define FLASH_FLAG_ECCD FLASH_ECCR_ECCD /*!< FLASH ECC detection */ 144 145 #define FLASH_FLAG_SR_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_PROGERR | FLASH_FLAG_WRPERR | \ 146 FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | FLASH_FLAG_PGSERR) /*!< Flash all flags from Status Register */ 147 #define FLASH_FLAG_ECCR_ERRORS (FLASH_FLAG_ECCD | FLASH_FLAG_ECCC) /*!< Flash all flags from ECC Register */ 148 #define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_SR_ERRORS | FLASH_FLAG_OPTWERR | FLASH_FLAG_ECCR_ERRORS) /*!< Flash all flags */ 149 #else 150 #define FLASH_FLAG_EOP FLASH_NSSR_EOP /*!< FLASH End of operation flag */ 151 #define FLASH_FLAG_OPERR FLASH_NSSR_OPERR /*!< FLASH Operation error flag */ 152 #define FLASH_FLAG_PROGERR FLASH_NSSR_PROGERR /*!< FLASH Programming error flag */ 153 #define FLASH_FLAG_WRPERR FLASH_NSSR_WRPERR /*!< FLASH Write protection error flag */ 154 #define FLASH_FLAG_PGAERR FLASH_NSSR_PGAERR /*!< FLASH Programming alignment error flag */ 155 #define FLASH_FLAG_SIZERR FLASH_NSSR_SIZERR /*!< FLASH Size error flag */ 156 #define FLASH_FLAG_PGSERR FLASH_NSSR_PGSERR /*!< FLASH Programming sequence error flag */ 157 #define FLASH_FLAG_OPTWERR FLASH_NSSR_OPTWERR /*!< FLASH Option modification error flag */ 158 #define FLASH_FLAG_BSY FLASH_NSSR_BSY /*!< FLASH Busy flag */ 159 #define FLASH_FLAG_WDW FLASH_NSSR_WDW /*!< FLASH Wait Data to Write flag */ 160 #define FLASH_FLAG_OEM1LOCK FLASH_NSSR_OEM1LOCK /*!< FLASH OEM1 key RDP lock flag */ 161 #define FLASH_FLAG_OEM2LOCK FLASH_NSSR_OEM2LOCK /*!< FLASH OEM2 key RDP lock flag */ 162 #define FLASH_FLAG_PD FLASH_NSSR_PD /*!< FLASH in power-down lock flag */ 163 #define FLASH_FLAG_ECCC FLASH_ECCR_ECCC /*!< FLASH ECC correction */ 164 #define FLASH_FLAG_ECCD FLASH_ECCR_ECCD /*!< FLASH ECC detection */ 165 166 #define FLASH_FLAG_SR_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_PROGERR | FLASH_FLAG_WRPERR | \ 167 FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | FLASH_FLAG_PGSERR | \ 168 FLASH_FLAG_OPTWERR) /*!< Flash all flags from Status Register */ 169 #define FLASH_FLAG_ECCR_ERRORS (FLASH_FLAG_ECCD | FLASH_FLAG_ECCC) /*!< Flash all flags from ECC Register */ 170 #define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_SR_ERRORS | FLASH_FLAG_ECCR_ERRORS) /*!< Flash all flags */ 171 #endif /* __ARM_FEATURE_CMSE */ 172 /** 173 * @} 174 */ 175 176 /** @defgroup FLASH_Interrupt_definition FLASH Interrupts Definition 177 * @brief FLASH Interrupt definition 178 * @{ 179 */ 180 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 181 #define FLASH_IT_EOP FLASH_SECCR1_EOPIE /*!< End of FLASH Operation Interrupt source */ 182 #define FLASH_IT_OPERR FLASH_SECCR1_ERRIE /*!< Error Interrupt source */ 183 #define FLASH_IT_ECCC (FLASH_ECCR_ECCIE >> FLASH_ECCR_ECCIE_Pos) /*!< ECC Correction Interrupt source */ 184 #else 185 #define FLASH_IT_EOP FLASH_NSCR1_EOPIE /*!< End of FLASH Operation Interrupt source */ 186 #define FLASH_IT_OPERR FLASH_NSCR1_ERRIE /*!< Error Interrupt source */ 187 #define FLASH_IT_ECCC (FLASH_ECCR_ECCIE >> FLASH_ECCR_ECCIE_Pos) /*!< ECC Correction Interrupt source */ 188 #endif /* __ARM_FEATURE_CMSE */ 189 /** 190 * @} 191 */ 192 193 /** @defgroup FLASH_Error FLASH Error 194 * @{ 195 */ 196 #define HAL_FLASH_ERROR_NONE 0x00000000U /*!< Flash no error */ 197 #define HAL_FLASH_ERROR_OP FLASH_FLAG_OPERR /*!< Flash operation error */ 198 #define HAL_FLASH_ERROR_PROG FLASH_FLAG_PROGERR /*!< Flash programming error */ 199 #define HAL_FLASH_ERROR_WRP FLASH_FLAG_WRPERR /*!< Flash write protection error */ 200 #define HAL_FLASH_ERROR_PGA FLASH_FLAG_PGAERR /*!< Flash programming alignment error */ 201 #define HAL_FLASH_ERROR_SIZ FLASH_FLAG_SIZERR /*!< Flash size error */ 202 #define HAL_FLASH_ERROR_PGS FLASH_FLAG_PGSERR /*!< Flash programming sequence error */ 203 #define HAL_FLASH_ERROR_OPTW FLASH_FLAG_OPTWERR /*!< Flash option modification error */ 204 #define HAL_FLASH_ERROR_ECCC FLASH_FLAG_ECCC /*!< Flash ECC correction error */ 205 #define HAL_FLASH_ERROR_ECCD FLASH_FLAG_ECCD /*!< Flash ECC detection error */ 206 /** 207 * @} 208 */ 209 210 /** @defgroup FLASH_Type_Erase FLASH Erase Type 211 * @{ 212 */ 213 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 214 #define FLASH_TYPEERASE_PAGES FLASH_SECCR1_PER /*!< Secure pages erase activation */ 215 #define FLASH_TYPEERASE_PAGES_NS (FLASH_NSCR1_PER | FLASH_NON_SECURE_MASK) /*!< Non-secure pages erase activation */ 216 #define FLASH_TYPEERASE_MASSERASE FLASH_SECCR1_MER /*!< Secure flash mass erase activation */ 217 #define FLASH_TYPEERASE_MASSERASE_NS (FLASH_NSCR1_MER | FLASH_NON_SECURE_MASK) /*!< Non-secure flash mass erase activation */ 218 #else 219 #define FLASH_TYPEERASE_PAGES FLASH_NSCR1_PER /*!< Pages erase activation */ 220 #define FLASH_TYPEERASE_MASSERASE FLASH_NSCR1_MER /*!< Flash mass erase activation */ 221 #endif /* __ARM_FEATURE_CMSE */ 222 /** 223 * @} 224 */ 225 226 /** @defgroup FLASH_Banks FLASH Banks 227 * @{ 228 */ 229 #define FLASH_BANK_1 0x00000001U /*!< Bank 1 */ 230 /** 231 * @} 232 */ 233 234 /** @defgroup FLASH_TYPE_PROGRAM FLASH Program Type 235 * @{ 236 */ 237 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 238 #define FLASH_TYPEPROGRAM_QUADWORD FLASH_SECCR1_PG /*!< Program a quad-word (128-bit) at a specified secure address */ 239 #define FLASH_TYPEPROGRAM_QUADWORD_NS (FLASH_NSCR1_PG | FLASH_NON_SECURE_MASK) /*!< Program a quad-word (128-bit) at a specified non-secure address */ 240 #define FLASH_TYPEPROGRAM_BURST (FLASH_SECCR1_PG | FLASH_SECCR1_BWR) /*!< Program a burst (8xquad-word) at a specified secure address */ 241 #define FLASH_TYPEPROGRAM_BURST_NS (FLASH_NSCR1_PG | FLASH_NSCR1_BWR | FLASH_NON_SECURE_MASK) /*!< Program a burst (8xquad-word) at a specified non-secure address */ 242 #else 243 #define FLASH_TYPEPROGRAM_QUADWORD FLASH_NSCR1_PG /*!<Program a quad-word (128-bit) at a specified address */ 244 #define FLASH_TYPEPROGRAM_BURST (FLASH_NSCR1_PG | FLASH_NSCR1_BWR) /*!<Program a burst (8xquad-word) at a specified address */ 245 #endif /* __ARM_FEATURE_CMSE */ 246 /** 247 * @} 248 */ 249 250 /** @defgroup FLASH_OB_Type FLASH Option Bytes Type 251 * @{ 252 */ 253 #define OPTIONBYTE_WRP 0x00000001U /*!< WRP option byte configuration */ 254 #define OPTIONBYTE_RDP 0x00000002U /*!< RDP option byte configuration */ 255 #define OPTIONBYTE_USER 0x00000004U /*!< USER option byte configuration */ 256 #define OPTIONBYTE_BOOTADDR 0x00000008U /*!< Boot address option byte configuration */ 257 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 258 #define OPTIONBYTE_WMSEC 0x00000010U /*!< Watermark-based secure area option byte configuration */ 259 #define OPTIONBYTE_BOOT_LOCK 0x00000020U /*!< Boot lock option byte configuration */ 260 #endif /* __ARM_FEATURE_CMSE */ 261 #define OPTIONBYTE_RDPKEY 0x00000040U /*!< RDP Key option byte configuration */ 262 /** 263 * @} 264 */ 265 266 /** @defgroup FLASH_OB_WRP_Area FLASH WRP Area 267 * @{ 268 */ 269 #define OB_WRPAREA_BANK1_AREAA 0x00000001U /*!< Flash Area A */ 270 #define OB_WRPAREA_BANK1_AREAB 0x00000002U /*!< Flash Area B */ 271 /** 272 * @} 273 */ 274 275 /** @defgroup FLASH_OB_Read_Protection FLASH Option Bytes Read Protection 276 * @{ 277 */ 278 #define OB_RDP_LEVEL_0 0xAAU /*!< RDP level 0 code */ 279 #define OB_RDP_LEVEL_0_5 0x55U /*!< RDP level 0.5 code */ 280 #define OB_RDP_LEVEL_1 0xBBU /*!< RDP level 1 code */ 281 #define OB_RDP_LEVEL_2 0xCCU /*!< RDP level 2 code. 282 Warning: When enabling read protection level 2 283 it's no more possible to go back to level 1 or 0. */ 284 /** 285 * @} 286 */ 287 288 /** @defgroup FLASH_OB_RDP_Key_Type FLASH Option Bytes Read Protection Key Type 289 * @{ 290 */ 291 #define OB_RDP_KEY_OEM1 0x01U /*!< OEM1 key */ 292 #define OB_RDP_KEY_OEM2 0x02U /*!< OEM2 key */ 293 /** 294 * @} 295 */ 296 297 /** @defgroup FLASH_OB_USER_Type FLASH Option Bytes User Type 298 * @{ 299 */ 300 #define OB_USER_BOR_LEV FLASH_OPTR_BOR_LEV /*!< BOR reset Level */ 301 #define OB_USER_nRST_STOP FLASH_OPTR_nRST_STOP /*!< Reset generated when entering the stop mode */ 302 #define OB_USER_nRST_STDBY FLASH_OPTR_nRST_STDBY /*!< Reset generated when entering the standby mode */ 303 #define OB_USER_SRAM1_RST FLASH_OPTR_SRAM1_RST /*!< SRAM1 erase upon system reset */ 304 #define OB_USER_IWDG_SW FLASH_OPTR_IWDG_SW /*!< Independent watchdog selection */ 305 #define OB_USER_IWDG_STOP FLASH_OPTR_IWDG_STOP /*!< Independent watchdog counter freeze in stop mode */ 306 #define OB_USER_IWDG_STDBY FLASH_OPTR_IWDG_STDBY /*!< Independent watchdog counter freeze in standby mode */ 307 #define OB_USER_WWDG_SW FLASH_OPTR_WWDG_SW /*!< Window watchdog selection */ 308 #define OB_USER_SRAM2_PE FLASH_OPTR_SRAM2_PE /*!< SRAM2 parity error enable */ 309 #define OB_USER_SRAM2_RST FLASH_OPTR_SRAM2_RST /*!< SRAM2 Erase when system reset */ 310 #define OB_USER_nSWBOOT0 FLASH_OPTR_nSWBOOT0 /*!< Software BOOT0 */ 311 #define OB_USER_nBOOT0 FLASH_OPTR_nBOOT0 /*!< nBOOT0 option bit */ 312 #if defined(FLASH_OPTR_TZEN) 313 #define OB_USER_TZEN FLASH_OPTR_TZEN /*!< Global TrustZone enable */ 314 #endif /* FLASH_OPTR_TZEN */ 315 316 #if defined(FLASH_OPTR_TZEN) 317 #define OB_USER_ALL (OB_USER_BOR_LEV | OB_USER_nRST_STOP | OB_USER_nRST_STDBY | \ 318 OB_USER_SRAM1_RST | OB_USER_IWDG_SW | OB_USER_IWDG_STOP | \ 319 OB_USER_IWDG_STDBY | OB_USER_WWDG_SW | OB_USER_SRAM2_PE | \ 320 OB_USER_SRAM2_RST | OB_USER_nSWBOOT0 | OB_USER_nBOOT0 | \ 321 OB_USER_TZEN) /*!< All User option bits */ 322 #else 323 #define OB_USER_ALL (OB_USER_BOR_LEV | OB_USER_nRST_STOP | OB_USER_nRST_STDBY | \ 324 OB_USER_SRAM1_RST | OB_USER_IWDG_SW | OB_USER_IWDG_STOP | \ 325 OB_USER_IWDG_STDBY | OB_USER_WWDG_SW | OB_USER_SRAM2_PE | \ 326 OB_USER_SRAM2_RST | OB_USER_nSWBOOT0 | OB_USER_nBOOT0) /*!< All User option bits */ 327 #endif /* FLASH_OPTR_TZEN */ 328 /** 329 * @} 330 */ 331 332 /** @defgroup FLASH_OB_USER_BOR_LEVEL FLASH Option Bytes User BOR Level 333 * @{ 334 */ 335 #define OB_BOR_LEVEL_0 0x00000000U /*!< Reset level threshold is around 1.7V */ 336 #define OB_BOR_LEVEL_1 FLASH_OPTR_BOR_LEV_0 /*!< Reset level threshold is around 2.0V */ 337 #define OB_BOR_LEVEL_2 FLASH_OPTR_BOR_LEV_1 /*!< Reset level threshold is around 2.2V */ 338 #define OB_BOR_LEVEL_3 (FLASH_OPTR_BOR_LEV_0 | FLASH_OPTR_BOR_LEV_1) /*!< Reset level threshold is around 2.5V */ 339 #define OB_BOR_LEVEL_4 FLASH_OPTR_BOR_LEV_2 /*!< Reset level threshold is around 2.8V */ 340 /** 341 * @} 342 */ 343 344 /** @defgroup FLASH_OB_USER_nRST_STOP FLASH Option Bytes User Reset On Stop 345 * @{ 346 */ 347 #define OB_STOP_RST 0x00000000U /*!< Reset generated when entering the stop mode */ 348 #define OB_STOP_NORST FLASH_OPTR_nRST_STOP /*!< No reset generated when entering the stop mode */ 349 /** 350 * @} 351 */ 352 353 /** @defgroup FLASH_OB_USER_nRST_STANDBY FLASH Option Bytes User Reset On Standby 354 * @{ 355 */ 356 #define OB_STANDBY_RST 0x00000000U /*!< Reset generated when entering the standby mode */ 357 #define OB_STANDBY_NORST FLASH_OPTR_nRST_STDBY /*!< No reset generated when entering the standby mode */ 358 /** 359 * @} 360 */ 361 362 /** @defgroup FLASH_OB_USER_SRAM1_RST FLASH Option Bytes User SRAM1 Erase On Reset Type 363 * @{ 364 */ 365 #define OB_SRAM1_RST_ERASE 0x00000000U /*!< SRAM1 erased when a system reset occurs */ 366 #define OB_SRAM1_RST_NOT_ERASE FLASH_OPTR_SRAM1_RST /*!< SRAM1 is not erased when a system reset occurs */ 367 /** 368 * @} 369 */ 370 371 /** @defgroup FLASH_OB_USER_IWDG_SW FLASH Option Bytes User IWDG Type 372 * @{ 373 */ 374 #define OB_IWDG_HW 0x00000000U /*!< Hardware independent watchdog */ 375 #define OB_IWDG_SW FLASH_OPTR_IWDG_SW /*!< Software independent watchdog */ 376 /** 377 * @} 378 */ 379 380 /** @defgroup FLASH_OB_USER_IWDG_STOP FLASH Option Bytes User IWDG Mode On Stop 381 * @{ 382 */ 383 #define OB_IWDG_STOP_FREEZE 0x00000000U /*!< Independent watchdog counter is frozen in Stop mode */ 384 #define OB_IWDG_STOP_RUN FLASH_OPTR_IWDG_STOP /*!< Independent watchdog counter is running in Stop mode */ 385 /** 386 * @} 387 */ 388 389 /** @defgroup FLASH_OB_USER_IWDG_STANDBY FLASH Option Bytes User IWDG Mode On Standby 390 * @{ 391 */ 392 #define OB_IWDG_STDBY_FREEZE 0x00000000U /*!< Independent watchdog counter is frozen in Standby mode */ 393 #define OB_IWDG_STDBY_RUN FLASH_OPTR_IWDG_STDBY /*!< Independent watchdog counter is running in Standby mode */ 394 /** 395 * @} 396 */ 397 398 /** @defgroup FLASH_OB_USER_WWDG_SW FLASH Option Bytes User WWDG Type 399 * @{ 400 */ 401 #define OB_WWDG_HW 0x00000000U /*!< Hardware window watchdog */ 402 #define OB_WWDG_SW FLASH_OPTR_WWDG_SW /*!< Software window watchdog */ 403 /** 404 * @} 405 */ 406 407 /** @defgroup FLASH_OB_USER_SRAM2_PAR FLASH Option Bytes User SRAM2 Parity error enable 408 * @{ 409 */ 410 #define OB_SRAM2_PARITY_ENABLE 0x00000000U /*!< SRAM2 parity check enable */ 411 #define OB_SRAM2_PARITY_DISABLE FLASH_OPTR_SRAM2_PE /*!< SRAM2 parity check disable */ 412 /** 413 * @} 414 */ 415 416 /** @defgroup FLASH_OB_USER_SRAM2_RST FLASH Option Bytes User SRAM2 Erase On Reset Type 417 * @{ 418 */ 419 #define OB_SRAM2_RST_ERASE 0x00000000U /*!< SRAM2 erased when a system reset occurs */ 420 #define OB_SRAM2_RST_NOT_ERASE FLASH_OPTR_SRAM2_RST /*!< SRAM2 is not erased when a system reset occurs */ 421 /** 422 * @} 423 */ 424 425 /** @defgroup FLASH_OB_USER_nSWBOOT0 FLASH Option Bytes User Software BOOT0 426 * @{ 427 */ 428 #define OB_BOOT0_FROM_OB 0x00000000U /*!< BOOT0 taken from the option bit nBOOT0 */ 429 #define OB_BOOT0_FROM_PIN FLASH_OPTR_nSWBOOT0 /*!< BOOT0 taken from BOOT0 pin */ 430 /** 431 * @} 432 */ 433 434 /** @defgroup FLASH_OB_USER_nBOOT0 FLASH Option Bytes User nBOOT0 option bit 435 * @{ 436 */ 437 #define OB_nBOOT0_RESET 0x00000000U /*!< nBOOT0 = 0 */ 438 #define OB_nBOOT0_SET FLASH_OPTR_nBOOT0 /*!< nBOOT0 = 1 */ 439 /** 440 * @} 441 */ 442 443 #if defined(FLASH_OPTR_TZEN) 444 /** @defgroup FLASH_OB_USER_TZEN FLASH Option Bytes User Global TrustZone 445 * @{ 446 */ 447 #define OB_TZEN_DISABLE 0x00000000U /*!< Global TrustZone security disabled */ 448 #define OB_TZEN_ENABLE FLASH_OPTR_TZEN /*!< Global TrustZone security enabled */ 449 /** 450 * @} 451 */ 452 #endif /* FLASH_OPTR_TZEN */ 453 454 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 455 /** @defgroup FLASH_OB_BOOT_LOCK FLASH Option Bytes Boot Lock 456 * @{ 457 */ 458 #define OB_BOOT_LOCK_DISABLE 0x00000000U /*!< Boot lock disable */ 459 #define OB_BOOT_LOCK_ENABLE FLASH_SECBOOTADD0R_BOOT_LOCK /*!< Boot lock enable */ 460 /** 461 * @} 462 */ 463 464 /** @defgroup FLASH_OB_WMSEC FLASH Option Bytes Watermarked-based security configuration 465 * @{ 466 */ 467 #define OB_WMSEC_AREA1 FLASH_BANK_1 /*!< Watermarked-based security area for bank 1 */ 468 469 #define OB_WMSEC_SECURE_AREA_CONFIG 0x00000010U /*!< Configure Watermarked-based security area */ 470 #define OB_WMSEC_HDP_AREA_CONFIG 0x00000020U /*!< Configure Watermarked-based secure hide area */ 471 #define OB_WMSEC_HDP_AREA_ENABLE 0x00000080U /*!< Enable Watermarked-based secure hide area */ 472 #define OB_WMSEC_HDP_AREA_DISABLE 0x00000100U /*!< Disable Watermarked-based secure hide area */ 473 /** 474 * @} 475 */ 476 #endif /* __ARM_FEATURE_CMSE */ 477 478 /** @defgroup FLASH_OB_BOOTADDR FLASH Option Bytes Boot address 479 * @{ 480 */ 481 #define OB_BOOTADDR_NS0 0x00000001U /*!< Non-secure boot address 0 */ 482 #define OB_BOOTADDR_NS1 0x00000002U /*!< Non-secure boot address 1 */ 483 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 484 #define OB_BOOTADDR_SEC0 0x00000004U /*!< Secure boot address 0 */ 485 #endif /* __ARM_FEATURE_CMSE */ 486 /** 487 * @} 488 */ 489 490 /** @defgroup FLASH_Latency FLASH Latency 491 * @{ 492 */ 493 #define FLASH_LATENCY_0 0U /*!< FLASH Zero wait state */ 494 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_0 /*!< FLASH One wait state */ 495 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two wait states */ 496 #define FLASH_LATENCY_3 (FLASH_ACR_LATENCY_1 | FLASH_ACR_LATENCY_0) /*!< FLASH Three wait states */ 497 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_2 /*!< FLASH Four wait states */ 498 #define FLASH_LATENCY_5 (FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_0) /*!< FLASH Five wait state */ 499 #define FLASH_LATENCY_6 (FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_1) /*!< FLASH Six wait state */ 500 #define FLASH_LATENCY_7 (FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_1 | FLASH_ACR_LATENCY_0) /*!< FLASH Seven wait states */ 501 #define FLASH_LATENCY_8 FLASH_ACR_LATENCY_3 /*!< FLASH Eight wait states */ 502 #define FLASH_LATENCY_9 (FLASH_ACR_LATENCY_3 | FLASH_ACR_LATENCY_0) /*!< FLASH Nine wait states */ 503 #define FLASH_LATENCY_10 (FLASH_ACR_LATENCY_3 | FLASH_ACR_LATENCY_1) /*!< FLASH Ten wait state */ 504 #define FLASH_LATENCY_11 (FLASH_ACR_LATENCY_3 | FLASH_ACR_LATENCY_1 | FLASH_ACR_LATENCY_0) /*!< FLASH Eleven wait state */ 505 #define FLASH_LATENCY_12 (FLASH_ACR_LATENCY_3 | FLASH_ACR_LATENCY_2) /*!< FLASH Twelve wait states */ 506 #define FLASH_LATENCY_13 (FLASH_ACR_LATENCY_3 | FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_0) /*!< FLASH Thirteen wait states */ 507 #define FLASH_LATENCY_14 (FLASH_ACR_LATENCY_3 | FLASH_ACR_LATENCY_2 | FLASH_ACR_LATENCY_1) /*!< FLASH Fourteen wait states */ 508 #define FLASH_LATENCY_15 FLASH_ACR_LATENCY /*!< FLASH Fifteen wait states */ 509 /** 510 * @} 511 */ 512 513 /** @defgroup FLASH_Keys FLASH Keys 514 * @{ 515 */ 516 #define FLASH_KEY1 0x45670123U /*!< Flash key1 */ 517 #define FLASH_KEY2 0xCDEF89ABU /*!< Flash key2: used with FLASH_KEY1 518 to unlock the FLASH registers access */ 519 520 #define FLASH_PDKEY1 0x04152637U /*!< Flash power down key1 */ 521 #define FLASH_PDKEY2 0xFAFBFCFDU /*!< Flash power down key2: used with FLASH_PDKEY1 522 to unlock the PDREQ bit in FLASH_ACR */ 523 524 #define FLASH_OPTKEY1 0x08192A3BU /*!< Flash option byte key1 */ 525 #define FLASH_OPTKEY2 0x4C5D6E7FU /*!< Flash option byte key2: used with FLASH_OPTKEY1 526 to allow option bytes operations */ 527 /** 528 * @} 529 */ 530 531 /** 532 * @} 533 */ 534 535 /* Exported macros -----------------------------------------------------------*/ 536 /** @defgroup FLASH_Exported_Macros FLASH Exported Macros 537 * @brief macros to control FLASH features 538 * @{ 539 */ 540 541 /** 542 * @brief Set the FLASH Latency. 543 * @param __LATENCY__ FLASH Latency. 544 * This parameter can be one of the following values : 545 * @arg @ref FLASH_LATENCY_0 FLASH Zero wait state 546 * @arg @ref FLASH_LATENCY_1 FLASH One wait state 547 * @arg @ref FLASH_LATENCY_2 FLASH Two wait states 548 * @arg @ref FLASH_LATENCY_3 FLASH Three wait states 549 * @arg @ref FLASH_LATENCY_4 FLASH Four wait states 550 * @arg @ref FLASH_LATENCY_5 FLASH Five wait states 551 * @arg @ref FLASH_LATENCY_6 FLASH Six wait states 552 * @arg @ref FLASH_LATENCY_7 FLASH Seven wait states 553 * @arg @ref FLASH_LATENCY_8 FLASH Eight wait states 554 * @arg @ref FLASH_LATENCY_9 FLASH Nine wait states 555 * @arg @ref FLASH_LATENCY_10 FLASH Ten wait states 556 * @arg @ref FLASH_LATENCY_11 FLASH Eleven wait states 557 * @arg @ref FLASH_LATENCY_12 FLASH Twelve wait states 558 * @arg @ref FLASH_LATENCY_13 FLASH Thirteen wait states 559 * @arg @ref FLASH_LATENCY_14 FLASH Fourteen wait states 560 * @arg @ref FLASH_LATENCY_15 FLASH Fifteen wait states 561 * @retval None 562 */ 563 #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (__LATENCY__))) 564 565 /** 566 * @brief Get the FLASH Latency. 567 * @retval FLASH Latency 568 * Returned value can be one of the following values : 569 * @arg @ref FLASH_LATENCY_0 FLASH Zero wait state 570 * @arg @ref FLASH_LATENCY_1 FLASH One wait state 571 * @arg @ref FLASH_LATENCY_2 FLASH Two wait states 572 * @arg @ref FLASH_LATENCY_3 FLASH Three wait states 573 * @arg @ref FLASH_LATENCY_4 FLASH Four wait states 574 * @arg @ref FLASH_LATENCY_5 FLASH Five wait states 575 * @arg @ref FLASH_LATENCY_6 FLASH Six wait states 576 * @arg @ref FLASH_LATENCY_7 FLASH Seven wait states 577 * @arg @ref FLASH_LATENCY_8 FLASH Eight wait states 578 * @arg @ref FLASH_LATENCY_9 FLASH Nine wait states 579 * @arg @ref FLASH_LATENCY_10 FLASH Ten wait states 580 * @arg @ref FLASH_LATENCY_11 FLASH Eleven wait states 581 * @arg @ref FLASH_LATENCY_12 FLASH Twelve wait states 582 * @arg @ref FLASH_LATENCY_13 FLASH Thirteen wait states 583 * @arg @ref FLASH_LATENCY_14 FLASH Fourteen wait states 584 * @arg @ref FLASH_LATENCY_15 FLASH Fifteen wait states 585 */ 586 #define __HAL_FLASH_GET_LATENCY() READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY) 587 588 /** 589 * @brief Enable the FLASH prefetch buffer. 590 * @retval None 591 */ 592 #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) 593 594 /** 595 * @brief Disable the FLASH prefetch buffer. 596 * @retval None 597 */ 598 #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) 599 600 /** 601 * @brief Enable the FLASH power down during Low-Power sleep mode 602 * @retval None 603 */ 604 #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) 605 606 /** 607 * @brief Disable the FLASH power down during Low-Power sleep mode 608 * @retval None 609 */ 610 #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) 611 612 /** 613 * @} 614 */ 615 616 /** @defgroup FLASH_Interrupt FLASH Interrupts Macros 617 * @brief macros to handle FLASH interrupts 618 * @{ 619 */ 620 621 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 622 /** 623 * @brief Enable secure FLASH interrupts from the secure world. 624 * @param __INTERRUPT__ FLASH interrupt 625 * This parameter can be any combination of the following values: 626 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 627 * @arg @ref FLASH_IT_OPERR Error Interrupt 628 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt 629 * @retval None 630 */ 631 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ 632 if(((__INTERRUPT__) & (~FLASH_IT_ECCC)) != 0U) { SET_BIT(FLASH->SECCR1, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ 633 } while(0) 634 /** 635 * @brief Enable non-secure FLASH interrupts from the secure world. 636 * @param __INTERRUPT__ FLASH interrupt. 637 * This parameter can be any combination of the following values: 638 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 639 * @arg @ref FLASH_IT_OPERR Error Interrupt 640 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt 641 * @retval None 642 */ 643 #define __HAL_FLASH_ENABLE_IT_NS(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ 644 if(((__INTERRUPT__) & (~FLASH_IT_ECCC)) != 0U) { SET_BIT(FLASH->NSCR1, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ 645 } while(0) 646 #else 647 /** 648 * @brief Enable non-secure FLASH interrupts from the non-secure world. 649 * @param __INTERRUPT__ FLASH interrupt. 650 * This parameter can be any combination of the following values: 651 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 652 * @arg @ref FLASH_IT_OPERR Error Interrupt 653 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt 654 * @retval None 655 */ 656 #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ 657 if(((__INTERRUPT__) & (~FLASH_IT_ECCC)) != 0U) { SET_BIT(FLASH->NSCR1, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ 658 } while(0) 659 #endif /* __ARM_FEATURE_CMSE */ 660 661 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 662 /** 663 * @brief Disable secure FLASH interrupts from the secure world. 664 * @param __INTERRUPT__ FLASH interrupt. 665 * This parameter can be any combination of the following values: 666 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 667 * @arg @ref FLASH_IT_OPERR Error Interrupt 668 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt 669 * @retval None 670 */ 671 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ 672 if(((__INTERRUPT__) & (~FLASH_IT_ECCC)) != 0U) { CLEAR_BIT(FLASH->SECCR1, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ 673 } while(0) 674 /** 675 * @brief Disable non-secure FLASH interrupts from the secure world. 676 * @param __INTERRUPT__ FLASH interrupt. 677 * This parameter can be any combination of the following values: 678 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 679 * @arg @ref FLASH_IT_OPERR Error Interrupt 680 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt 681 * @retval None 682 */ 683 #define __HAL_FLASH_DISABLE_IT_NS(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ 684 if(((__INTERRUPT__) & (~FLASH_IT_ECCC)) != 0U) { CLEAR_BIT(FLASH->NSCR1, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ 685 } while(0) 686 #else 687 /** 688 * @brief Disable non-secure FLASH interrupts from the non-secure world. 689 * @param __INTERRUPT__ FLASH interrupt. 690 * This parameter can be any combination of the following values: 691 * @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt 692 * @arg @ref FLASH_IT_OPERR Error Interrupt 693 * @arg @ref FLASH_IT_ECCC ECC Correction Interrupt 694 * @retval None 695 */ 696 #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\ 697 if(((__INTERRUPT__) & (~FLASH_IT_ECCC)) != 0U) { CLEAR_BIT(FLASH->NSCR1, ((__INTERRUPT__) & (~FLASH_IT_ECCC))); }\ 698 } while(0) 699 #endif /* __ARM_FEATURE_CMSE */ 700 701 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 702 /** 703 * @brief Check whether the specified secure FLASH flags from the secure world is set or not. 704 * @param __FLAG__ specifies the FLASH flag to check. 705 * This parameter can be one of the following values: 706 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 707 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 708 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 709 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 710 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 711 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 712 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 713 * @arg @ref FLASH_FLAG_OPTWERR FLASH Option modification error flag 714 * @arg @ref FLASH_FLAG_BSY FLASH write/erase operations in progress flag 715 * @arg @ref FLASH_FLAG_WDW FLASH Wait Data to Write flag 716 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected 717 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected 718 * @retval The new state of FLASH_FLAG (SET or RESET). 719 */ 720 #define __HAL_FLASH_GET_FLAG(__FLAG__) ((((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) ? \ 721 (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \ 722 ((((__FLAG__) & (FLASH_FLAG_OPTWERR)) != 0U) ? \ 723 (READ_BIT(FLASH->NSSR, (__FLAG__)) == (__FLAG__)) : \ 724 (READ_BIT(FLASH->SECSR, (__FLAG__)) == (__FLAG__)))) 725 /** 726 * @brief Check whether the specified non-secure FLASH flags from the secure world is set or not. 727 * @param __FLAG__ specifies the FLASH flag to check. 728 * This parameter can be one of the following values: 729 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 730 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 731 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 732 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 733 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 734 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 735 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 736 * @arg @ref FLASH_FLAG_OPTWERR FLASH Option modification error flag 737 * @arg @ref FLASH_FLAG_BSY FLASH write/erase operations in progress flag 738 * @arg @ref FLASH_FLAG_WDW FLASH Wait Data to Write flag 739 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected 740 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected 741 * @retval The new state of FLASH_FLAG (SET or RESET). 742 */ 743 #define __HAL_FLASH_GET_FLAG_NS(__FLAG__) ((((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) ? \ 744 (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \ 745 (READ_BIT(FLASH->NSSR, (__FLAG__)) == (__FLAG__))) 746 #else 747 /** 748 * @brief Check whether the specified non-secure FLASH flags from the non-secure world is set or not. 749 * @param __FLAG__ specifies the FLASH flag to check. 750 * This parameter can be one of the following values: 751 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 752 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 753 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 754 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 755 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 756 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 757 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 758 * @arg @ref FLASH_FLAG_OPTWERR FLASH Option modification error flag 759 * @arg @ref FLASH_FLAG_BSY FLASH write/erase operations in progress flag 760 * @arg @ref FLASH_FLAG_WDW FLASH Wait Data to Write flag 761 * @arg @ref FLASH_FLAG_OEM1LOCK FLASH OEM1 key RDP lock flag 762 * @arg @ref FLASH_FLAG_OEM2LOCK FLASH OEM2 key RDP lock flag 763 * @arg @ref FLASH_FLAG_PD FLASH in power-down lock flag 764 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected 765 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected 766 * @retval The new state of FLASH_FLAG (SET or RESET). 767 */ 768 #define __HAL_FLASH_GET_FLAG(__FLAG__) ((((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) ? \ 769 (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \ 770 (READ_BIT(FLASH->NSSR, (__FLAG__)) == (__FLAG__))) 771 #endif /* __ARM_FEATURE_CMSE */ 772 773 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 774 /** 775 * @brief Clear secure FLASH flags from the secure world. 776 * @param __FLAG__ specifies the FLASH flags to clear. 777 * This parameter can be any combination of the following values: 778 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 779 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 780 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 781 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 782 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 783 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 784 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 785 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected 786 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected 787 * @arg @ref FLASH_FLAG_ALL_ERRORS FLASH All errors flags 788 * @retval None 789 */ 790 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { if(((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & FLASH_FLAG_ECCR_ERRORS)); }\ 791 if(((__FLAG__) & FLASH_FLAG_OPTWERR) != 0U) { SET_BIT(FLASH->NSSR, ((__FLAG__) & (FLASH_FLAG_OPTWERR))); }\ 792 if(((__FLAG__) & ~(FLASH_FLAG_ECCR_ERRORS | FLASH_FLAG_OPTWERR)) != 0U) { WRITE_REG(FLASH->SECSR, ((__FLAG__) & ~(FLASH_FLAG_ECCR_ERRORS | FLASH_FLAG_OPTWERR))); } \ 793 } while(0) 794 /** 795 * @brief Clear non-secure FLASH flags from the secure world. 796 * @param __FLAG__ specifies the FLASH flags to clear. 797 * This parameter can be any combination of the following values: 798 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 799 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 800 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 801 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 802 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 803 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 804 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 805 * @arg @ref FLASH_FLAG_OPTWERR FLASH Option modification error flag 806 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected 807 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected 808 * @arg @ref FLASH_FLAG_ALL_ERRORS FLASH All errors flags 809 * @retval None 810 */ 811 #define __HAL_FLASH_CLEAR_FLAG_NS(__FLAG__) do { if(((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & FLASH_FLAG_ECCR_ERRORS)); }\ 812 if(((__FLAG__) & ~(FLASH_FLAG_ECCR_ERRORS)) != 0U) { WRITE_REG(FLASH->NSSR, ((__FLAG__) & ~(FLASH_FLAG_ECCR_ERRORS))); }\ 813 } while(0) 814 #else 815 /** 816 * @brief Clear non-secure FLASH flags from the non-secure world. 817 * @param __FLAG__ specifies the FLASH flags to clear. 818 * This parameter can be any combination of the following values: 819 * @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag 820 * @arg @ref FLASH_FLAG_OPERR FLASH Operation error flag 821 * @arg @ref FLASH_FLAG_PROGERR FLASH Programming error flag 822 * @arg @ref FLASH_FLAG_WRPERR FLASH Write protection error flag 823 * @arg @ref FLASH_FLAG_PGAERR FLASH Programming alignment error flag 824 * @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag 825 * @arg @ref FLASH_FLAG_PGSERR FLASH Programming sequence error flag 826 * @arg @ref FLASH_FLAG_OPTWERR FLASH Option modification error flag 827 * @arg @ref FLASH_FLAG_ECCC FLASH one ECC error has been detected and corrected 828 * @arg @ref FLASH_FLAG_ECCD FLASH two ECC errors have been detected 829 * @arg @ref FLASH_FLAG_ALL_ERRORS FLASH All errors flags 830 * @retval None 831 */ 832 #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) do { if(((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & FLASH_FLAG_ECCR_ERRORS)); }\ 833 if(((__FLAG__) & ~(FLASH_FLAG_ECCR_ERRORS)) != 0U) { WRITE_REG(FLASH->NSSR, ((__FLAG__) & ~(FLASH_FLAG_ECCR_ERRORS))); }\ 834 } while(0) 835 #endif /* __ARM_FEATURE_CMSE */ 836 /** 837 * @} 838 */ 839 840 /* Include FLASH HAL Extended module */ 841 #include "stm32wbaxx_hal_flash_ex.h" 842 843 844 /* Exported functions --------------------------------------------------------*/ 845 /** @addtogroup FLASH_Exported_Functions 846 * @{ 847 */ 848 849 /* Program operation functions ***********************************************/ 850 /** @addtogroup FLASH_Exported_Functions_Group1 851 * @{ 852 */ 853 HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t DataAddress); 854 HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t DataAddress); 855 /* FLASH IRQ handler method */ 856 void HAL_FLASH_IRQHandler(void); 857 /* Callbacks in non blocking modes */ 858 void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); 859 void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); 860 /** 861 * @} 862 */ 863 864 /* Peripheral Control functions **********************************************/ 865 /** @addtogroup FLASH_Exported_Functions_Group2 866 * @{ 867 */ 868 HAL_StatusTypeDef HAL_FLASH_Unlock(void); 869 HAL_StatusTypeDef HAL_FLASH_Lock(void); 870 /* Option bytes control */ 871 HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); 872 HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); 873 HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); 874 /** 875 * @} 876 */ 877 878 /* Peripheral State functions ************************************************/ 879 /** @addtogroup FLASH_Exported_Functions_Group3 880 * @{ 881 */ 882 uint32_t HAL_FLASH_GetError(void); 883 /** 884 * @} 885 */ 886 887 /** 888 * @} 889 */ 890 891 /* Private variables ---------------------------------------------------------*/ 892 /** @addtogroup FLASH_Private_Variables FLASH Private Variables 893 * @{ 894 */ 895 extern FLASH_ProcessTypeDef pFlash; 896 /** 897 * @} 898 */ 899 900 /* Private function ----------------------------------------------------------*/ 901 /** @addtogroup FLASH_Private_Functions FLASH Private Functions 902 * @{ 903 */ 904 HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); 905 /** 906 * @} 907 */ 908 909 /* Private constants ---------------------------------------------------------*/ 910 /** @defgroup FLASH_Private_Constants FLASH Private Constants 911 * @{ 912 */ 913 #define FLASH_BANK_SIZE FLASH_SIZE 914 #define FLASH_PAGE_SIZE 0x2000U /* 8 KB */ 915 916 #define FLASH_PAGE_NB (FLASH_SIZE / FLASH_PAGE_SIZE) 917 918 #define FLASH_TIMEOUT_VALUE 1000U /* 1 s */ 919 920 #define FLASH_NON_SECURE_MASK 0x80000000U 921 /** 922 * @} 923 */ 924 925 /* Private macros ------------------------------------------------------------*/ 926 /** @defgroup FLASH_Private_Macros FLASH Private Macros 927 * @{ 928 */ 929 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 930 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ 931 ((VALUE) == FLASH_TYPEERASE_PAGES_NS) || \ 932 ((VALUE) == FLASH_TYPEERASE_MASSERASE) || \ 933 ((VALUE) == FLASH_TYPEERASE_MASSERASE_NS)) 934 #else 935 #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ 936 ((VALUE) == FLASH_TYPEERASE_MASSERASE)) 937 #endif /* __ARM_FEATURE_CMSE */ 938 939 #define IS_FLASH_BANK(BANK) ((BANK) == FLASH_BANK_1) 940 941 #define IS_FLASH_BANK_EXCLUSIVE(BANK) ((BANK) == FLASH_BANK_1) 942 943 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 944 #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_QUADWORD) || \ 945 ((VALUE) == FLASH_TYPEPROGRAM_QUADWORD_NS) || \ 946 ((VALUE) == FLASH_TYPEPROGRAM_BURST) || \ 947 ((VALUE) == FLASH_TYPEPROGRAM_BURST_NS)) 948 #else 949 #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_QUADWORD) || \ 950 ((VALUE) == FLASH_TYPEPROGRAM_BURST)) 951 #endif /* __ARM_FEATURE_CMSE */ 952 953 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 954 #define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) ((((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE+FLASH_SIZE))) || \ 955 (((ADDRESS) >= FLASH_BASE_NS) && ((ADDRESS) < (FLASH_BASE_NS+FLASH_SIZE)))) 956 #else 957 #define IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE+FLASH_SIZE))) 958 #endif /* __ARM_FEATURE_CMSE */ 959 960 #define IS_FLASH_OTP_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_OTP_BASE) && ((ADDRESS) < (FLASH_OTP_BASE + FLASH_OTP_SIZE))) 961 962 #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) ((IS_FLASH_MAIN_MEM_ADDRESS(ADDRESS)) || (IS_FLASH_OTP_ADDRESS(ADDRESS))) 963 964 #define IS_FLASH_PAGE(PAGE) ((PAGE) < FLASH_PAGE_NB) 965 966 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 967 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | \ 968 OPTIONBYTE_WMSEC | OPTIONBYTE_BOOT_LOCK | OPTIONBYTE_BOOTADDR | \ 969 OPTIONBYTE_RDPKEY))) 970 #else 971 #define IS_OPTIONBYTE(VALUE) (((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | \ 972 OPTIONBYTE_BOOTADDR | OPTIONBYTE_RDPKEY))) 973 #endif /* __ARM_FEATURE_CMSE */ 974 975 #define IS_OB_WRPAREA(VALUE) (((VALUE) == OB_WRPAREA_BANK1_AREAA) || ((VALUE) == OB_WRPAREA_BANK1_AREAB)) 976 977 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ 978 ((LEVEL) == OB_RDP_LEVEL_0_5) ||\ 979 ((LEVEL) == OB_RDP_LEVEL_1) ||\ 980 ((LEVEL) == OB_RDP_LEVEL_2)) 981 982 #define IS_OB_USER_TYPE(TYPE) ((((TYPE) & OB_USER_ALL) != 0x00U) && (((TYPE) & ~OB_USER_ALL) == 0x00U)) 983 984 #define IS_OB_USER_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL_0) || ((LEVEL) == OB_BOR_LEVEL_1) || \ 985 ((LEVEL) == OB_BOR_LEVEL_2) || ((LEVEL) == OB_BOR_LEVEL_3) || \ 986 ((LEVEL) == OB_BOR_LEVEL_4)) 987 988 #define IS_OB_USER_STOP(VALUE) (((VALUE) == OB_STOP_RST) || ((VALUE) == OB_STOP_NORST)) 989 990 #define IS_OB_USER_STANDBY(VALUE) (((VALUE) == OB_STANDBY_RST) || ((VALUE) == OB_STANDBY_NORST)) 991 992 #define IS_OB_USER_SRAM1_RST(VALUE) (((VALUE) == OB_SRAM1_RST_ERASE) || ((VALUE) == OB_SRAM1_RST_NOT_ERASE)) 993 994 #define IS_OB_USER_IWDG(VALUE) (((VALUE) == OB_IWDG_HW) || ((VALUE) == OB_IWDG_SW)) 995 996 #define IS_OB_USER_IWDG_STOP(VALUE) (((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_RUN)) 997 998 #define IS_OB_USER_IWDG_STDBY(VALUE) (((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_RUN)) 999 1000 #define IS_OB_USER_WWDG(VALUE) (((VALUE) == OB_WWDG_HW) || ((VALUE) == OB_WWDG_SW)) 1001 1002 #define IS_OB_USER_SRAM2_PARITY(VALUE) (((VALUE) == OB_SRAM2_PARITY_ENABLE) || ((VALUE) == OB_SRAM2_PARITY_DISABLE)) 1003 1004 #define IS_OB_USER_SRAM2_RST(VALUE) (((VALUE) == OB_SRAM2_RST_ERASE) || ((VALUE) == OB_SRAM2_RST_NOT_ERASE)) 1005 1006 #define IS_OB_USER_SWBOOT0(VALUE) (((VALUE) == OB_BOOT0_FROM_OB) || ((VALUE) == OB_BOOT0_FROM_PIN)) 1007 1008 #define IS_OB_USER_BOOT0(VALUE) (((VALUE) == OB_nBOOT0_RESET) || ((VALUE) == OB_nBOOT0_SET)) 1009 1010 #define IS_OB_USER_TZEN(VALUE) (((VALUE) == OB_TZEN_DISABLE) || ((VALUE) == OB_TZEN_ENABLE)) 1011 1012 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 1013 #define IS_OB_BOOT_LOCK(VALUE) (((VALUE) == OB_BOOT_LOCK_DISABLE) || ((VALUE) == OB_BOOT_LOCK_ENABLE)) 1014 1015 #define IS_OB_WMSEC_CONFIG(CFG) ((((CFG) & 0x7F1U) != 0U) && (((CFG) & 0x1U) != 0U) && (((CFG) & 0xFFFFF80EU) == 0U)) 1016 1017 #define IS_OB_WMSEC_AREA_EXCLUSIVE(WMSEC) (((WMSEC) & OB_WMSEC_AREA1) != 0U) 1018 #endif /* __ARM_FEATURE_CMSE */ 1019 1020 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 1021 #define IS_OB_BOOTADDR_CONFIG(CFG) (((CFG) == OB_BOOTADDR_NS0) || ((CFG) == OB_BOOTADDR_NS1) || \ 1022 ((CFG) == OB_BOOTADDR_SEC0)) 1023 #else 1024 #define IS_OB_BOOTADDR_CONFIG(CFG) (((CFG) == OB_BOOTADDR_NS0) || ((CFG) == OB_BOOTADDR_NS1)) 1025 #endif /* __ARM_FEATURE_CMSE */ 1026 1027 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || ((LATENCY) == FLASH_LATENCY_1) || \ 1028 ((LATENCY) == FLASH_LATENCY_2) || ((LATENCY) == FLASH_LATENCY_3) || \ 1029 ((LATENCY) == FLASH_LATENCY_4) || ((LATENCY) == FLASH_LATENCY_5) || \ 1030 ((LATENCY) == FLASH_LATENCY_6) || ((LATENCY) == FLASH_LATENCY_7) || \ 1031 ((LATENCY) == FLASH_LATENCY_8) || ((LATENCY) == FLASH_LATENCY_9) || \ 1032 ((LATENCY) == FLASH_LATENCY_10) || ((LATENCY) == FLASH_LATENCY_11) || \ 1033 ((LATENCY) == FLASH_LATENCY_12) || ((LATENCY) == FLASH_LATENCY_13) || \ 1034 ((LATENCY) == FLASH_LATENCY_14) || ((LATENCY) == FLASH_LATENCY_15)) 1035 1036 #define IS_OB_RDP_KEY_TYPE(TYPE) (((TYPE) == OB_RDP_KEY_OEM1) || \ 1037 ((TYPE) == OB_RDP_KEY_OEM2)) 1038 1039 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 1040 #define IS_FLASH_SECURE_OPERATION() ((pFlash.ProcedureOnGoing & FLASH_NON_SECURE_MASK) == 0U) 1041 #else 1042 #define IS_FLASH_SECURE_OPERATION() (0U) 1043 #endif /* __ARM_FEATURE_CMSE */ 1044 /** 1045 * @} 1046 */ 1047 1048 /** 1049 * @} 1050 */ 1051 1052 /** 1053 * @} 1054 */ 1055 1056 #ifdef __cplusplus 1057 } 1058 #endif 1059 1060 #endif /* STM32WBAxx_HAL_FLASH_H */ 1061
