1 /**
2 ******************************************************************************
3 * @file stm32u5xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2021 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32u5xx_ll_usart.h"
22 #include "stm32u5xx_ll_rcc.h"
23 #include "stm32u5xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32U5xx_LL_Driver
31 * @{
32 */
33
34 #if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @addtogroup USART_LL_Private_Constants
44 * @{
45 */
46
47 /* Definition of default baudrate value used for USART initialisation */
48 #define USART_DEFAULT_BAUDRATE (9600U)
49
50 /**
51 * @}
52 */
53
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56 * @{
57 */
58
59 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
60 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
61 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
62 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
63 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
64 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
65 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
66 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
67 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
68 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
69 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
70 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
71
72 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
73 * divided by the smallest oversampling used on the USART (i.e. 8) */
74 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 20000000U)
75
76 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
77 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
78
79 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
80 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
81 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
82 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
83
84 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
85 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
86 || ((__VALUE__) == LL_USART_PARITY_ODD))
87
88 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
89 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
90 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
91
92 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
93 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
94
95 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
96 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
97
98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
99 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
100
101 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
102 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
103
104 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
105 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
106
107 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
108 || ((__VALUE__) == LL_USART_STOPBITS_1) \
109 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
110 || ((__VALUE__) == LL_USART_STOPBITS_2))
111
112 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
113 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
114 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
115 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
116
117 /**
118 * @}
119 */
120
121 /* Private function prototypes -----------------------------------------------*/
122
123 /* Exported functions --------------------------------------------------------*/
124 /** @addtogroup USART_LL_Exported_Functions
125 * @{
126 */
127
128 /** @addtogroup USART_LL_EF_Init
129 * @{
130 */
131
132 /**
133 * @brief De-initialize USART registers (Registers restored to their default values).
134 * @param USARTx USART Instance
135 * @retval An ErrorStatus enumeration value:
136 * - SUCCESS: USART registers are de-initialized
137 * - ERROR: USART registers are not de-initialized
138 */
LL_USART_DeInit(const USART_TypeDef * USARTx)139 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
140 {
141 ErrorStatus status = SUCCESS;
142
143 /* Check the parameters */
144 assert_param(IS_UART_INSTANCE(USARTx));
145
146 if (USARTx == USART1)
147 {
148 /* Force reset of USART clock */
149 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
150
151 /* Release reset of USART clock */
152 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
153 }
154 #if defined(USART2)
155 else if (USARTx == USART2)
156 {
157 /* Force reset of USART clock */
158 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
159
160 /* Release reset of USART clock */
161 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
162 }
163 #endif /* USART2 */
164 else if (USARTx == USART3)
165 {
166 /* Force reset of USART clock */
167 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
168
169 /* Release reset of USART clock */
170 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
171 }
172 else if (USARTx == UART4)
173 {
174 /* Force reset of UART clock */
175 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
176
177 /* Release reset of UART clock */
178 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
179 }
180 else if (USARTx == UART5)
181 {
182 /* Force reset of UART clock */
183 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
184
185 /* Release reset of UART clock */
186 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
187 }
188 #if defined(USART6)
189 else if (USARTx == USART6)
190 {
191 /* Force reset of USART clock */
192 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART6);
193
194 /* Release reset of USART clock */
195 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART6);
196 }
197 #endif /* USART6 */
198 else
199 {
200 status = ERROR;
201 }
202
203 return (status);
204 }
205
206 /**
207 * @brief Initialize USART registers according to the specified
208 * parameters in USART_InitStruct.
209 * @note As some bits in USART configuration registers can only be written when
210 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
211 * this function. Otherwise, ERROR result will be returned.
212 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
213 * @param USARTx USART Instance
214 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
215 * that contains the configuration information for the specified USART peripheral.
216 * @retval An ErrorStatus enumeration value:
217 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
218 * - ERROR: Problem occurred during USART Registers initialization
219 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)220 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
221 {
222 ErrorStatus status = ERROR;
223 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
224
225 /* Check the parameters */
226 assert_param(IS_UART_INSTANCE(USARTx));
227 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
228 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
229 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
230 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
231 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
232 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
233 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
234 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
235
236 /* USART needs to be in disabled state, in order to be able to configure some bits in
237 CRx registers */
238 if (LL_USART_IsEnabled(USARTx) == 0U)
239 {
240 /*---------------------------- USART CR1 Configuration ---------------------
241 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
242 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
243 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
244 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
245 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
246 */
247 MODIFY_REG(USARTx->CR1,
248 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
249 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
250 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
251 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
252
253 /*---------------------------- USART CR2 Configuration ---------------------
254 * Configure USARTx CR2 (Stop bits) with parameters:
255 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
256 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
257 */
258 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
259
260 /*---------------------------- USART CR3 Configuration ---------------------
261 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
262 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
263 * USART_InitStruct->HardwareFlowControl value.
264 */
265 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
266
267 /*---------------------------- USART BRR Configuration ---------------------
268 * Retrieve Clock frequency used for USART Peripheral
269 */
270 if (USARTx == USART1)
271 {
272 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
273 }
274 #if defined(USART2)
275 else if (USARTx == USART2)
276 {
277 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
278 }
279 #endif /* USART2 */
280 else if (USARTx == USART3)
281 {
282 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
283 }
284 else if (USARTx == UART4)
285 {
286 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
287 }
288 else if (USARTx == UART5)
289 {
290 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
291 }
292 #if defined(USART6)
293 else if (USARTx == USART6)
294 {
295 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
296 }
297 #endif /* USART6 */
298 else
299 {
300 /* Nothing to do, as error code is already assigned to ERROR value */
301 }
302
303 /* Configure the USART Baud Rate :
304 - prescaler value is required
305 - valid baud rate value (different from 0) is required
306 - Peripheral clock as returned by RCC service, should be valid (different from 0).
307 */
308 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
309 && (USART_InitStruct->BaudRate != 0U))
310 {
311 status = SUCCESS;
312 LL_USART_SetBaudRate(USARTx,
313 periphclk,
314 USART_InitStruct->PrescalerValue,
315 USART_InitStruct->OverSampling,
316 USART_InitStruct->BaudRate);
317
318 /* Check BRR is greater than or equal to 16d */
319 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
320 }
321
322 /*---------------------------- USART PRESC Configuration -----------------------
323 * Configure USARTx PRESC (Prescaler) with parameters:
324 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
325 */
326 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
327 }
328 /* Endif (=> USART not in Disabled state => return ERROR) */
329
330 return (status);
331 }
332
333 /**
334 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
335 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
336 * whose fields will be set to default values.
337 * @retval None
338 */
339
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)340 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
341 {
342 /* Set USART_InitStruct fields to default values */
343 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
344 USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
345 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
346 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
347 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
348 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
349 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
350 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
351 }
352
353 /**
354 * @brief Initialize USART Clock related settings according to the
355 * specified parameters in the USART_ClockInitStruct.
356 * @note As some bits in USART configuration registers can only be written when
357 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
358 * this function. Otherwise, ERROR result will be returned.
359 * @param USARTx USART Instance
360 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
361 * that contains the Clock configuration information for the specified USART peripheral.
362 * @retval An ErrorStatus enumeration value:
363 * - SUCCESS: USART registers related to Clock settings are initialized according
364 * to USART_ClockInitStruct content
365 * - ERROR: Problem occurred during USART Registers initialization
366 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)367 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
368 {
369 ErrorStatus status = SUCCESS;
370
371 /* Check USART Instance and Clock signal output parameters */
372 assert_param(IS_UART_INSTANCE(USARTx));
373 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
374
375 /* USART needs to be in disabled state, in order to be able to configure some bits in
376 CRx registers */
377 if (LL_USART_IsEnabled(USARTx) == 0U)
378 {
379 /* Ensure USART instance is USART capable */
380 assert_param(IS_USART_INSTANCE(USARTx));
381
382 /* Check clock related parameters */
383 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
384 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
385 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
386
387 /*---------------------------- USART CR2 Configuration -----------------------
388 * Configure USARTx CR2 (Clock signal related bits) with parameters:
389 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
390 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
391 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
392 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
393 */
394 MODIFY_REG(USARTx->CR2,
395 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
396 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
397 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
398 }
399 /* Else (USART not in Disabled state => return ERROR */
400 else
401 {
402 status = ERROR;
403 }
404
405 return (status);
406 }
407
408 /**
409 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
410 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
411 * whose fields will be set to default values.
412 * @retval None
413 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)414 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
415 {
416 /* Set LL_USART_ClockInitStruct fields with default values */
417 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
418 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
419 LL_USART_CLOCK_DISABLE */
420 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
421 LL_USART_CLOCK_DISABLE */
422 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
423 LL_USART_CLOCK_DISABLE */
424 }
425
426 /**
427 * @}
428 */
429
430 /**
431 * @}
432 */
433
434 /**
435 * @}
436 */
437
438 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
439
440 /**
441 * @}
442 */
443
444 #endif /* USE_FULL_LL_DRIVER */
445
