1 /**
2 ******************************************************************************
3 * @file stm32u5xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Converter (ADC)
7 * peripheral:
8 * + Operation functions
9 * ++ Start, stop, get result of conversions of ADC group injected,
10 * using 2 possible modes: polling, interruption.
11 * ++ Calibration
12 * +++ ADC automatic self-calibration
13 * +++ Calibration factors get or set
14 * ++ Multimode feature when available
15 * + Control functions
16 * ++ Channels configuration on ADC group injected
17 * + State functions
18 * ++ ADC group injected contexts queue management
19 * Other functions (generic functions) are available in file
20 * "stm32u5xx_hal_adc.c".
21 *
22 ******************************************************************************
23 * @attention
24 *
25 * Copyright (c) 2021 STMicroelectronics.
26 * All rights reserved.
27 *
28 * This software is licensed under terms that can be found in the LICENSE file
29 * in the root directory of this software component.
30 * If no LICENSE file comes with this software, it is provided AS-IS.
31 *
32 ******************************************************************************
33 @verbatim
34 [..]
35 (@) Sections "ADC peripheral features" and "How to use this driver" are
36 available in file of generic functions "stm32u5xx_hal_adc.c".
37 [..]
38 @endverbatim
39 ******************************************************************************
40 */
41
42 /* Includes ------------------------------------------------------------------*/
43 #include "stm32u5xx_hal.h"
44
45 /** @addtogroup STM32U5xx_HAL_Driver
46 * @{
47 */
48
49 /** @defgroup ADCEx ADCEx
50 * @brief ADC Extended HAL module driver
51 * @{
52 */
53
54 #ifdef HAL_ADC_MODULE_ENABLED
55
56 /* Private typedef -----------------------------------------------------------*/
57 /* Private define ------------------------------------------------------------*/
58
59 /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
60 * @{
61 */
62
63 #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
64 ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
65 ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime
66 once the ADC is enabled */
67
68 /* Fixed timeout value for ADC calibration. */
69 /* Values defined to be higher than worst cases: maximum ratio between ADC */
70 /* and CPU clock frequencies. */
71 /* Example of profile low frequency : ADC frequency minimum 140kHz (cf */
72 /* datasheet for ADC4), CPU frequency 160MHz. */
73 /* Calibration time max = 25502 / fADC (refer to datasheet) */
74 /* = 29M CPU cycles */
75 #define ADC_CALIBRATION_TIMEOUT (29000000U) /*!< ADC calibration time-out value */
76
77 /**
78 * @}
79 */
80
81 /* Private macro -------------------------------------------------------------*/
82 /* Private variables ---------------------------------------------------------*/
83 /* Private function prototypes -----------------------------------------------*/
84 /* Exported functions --------------------------------------------------------*/
85
86 /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
87 * @{
88 */
89
90 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
91 * @brief Extended IO operation functions
92 *
93 @verbatim
94 ===============================================================================
95 ##### IO operation functions #####
96 ===============================================================================
97 [..] This section provides functions allowing to:
98
99 (+) Perform the ADC self-calibration for single or differential ending.
100 (+) Get calibration factors for single or differential ending.
101 (+) Set calibration factors for single or differential ending.
102
103 (+) Start conversion of ADC group injected.
104 (+) Stop conversion of ADC group injected.
105 (+) Poll for conversion complete on ADC group injected.
106 (+) Get result of ADC group injected channel conversion.
107 (+) Start conversion of ADC group injected and enable interruptions.
108 (+) Stop conversion of ADC group injected and disable interruptions.
109
110 (+) When multimode feature is available, start multimode and enable DMA transfer.
111 (+) Stop multimode and disable ADC DMA transfer.
112 (+) Get result of multimode conversion.
113
114 @endverbatim
115 * @{
116 */
117
118 /**
119 * @brief Perform an ADC automatic self-calibration
120 * Calibration prerequisite: ADC must be disabled (execute this
121 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
122 * @param hadc ADC handle
123 * @param CalibrationMode Selection of calibration offset or
124 * linear calibration offset.
125 * @arg ADC_CALIB_OFFSET Channel in mode calibration offset
126 * @arg ADC_CALIB_OFFSET_LINEARITY Channel in mode linear calibration offset
127 * @param SingleDiff Selection of single-ended or differential input
128 * This parameter can be one of the following values:
129 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
130 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
131 * @retval HAL status
132 */
HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef * hadc,uint32_t CalibrationMode,uint32_t SingleDiff)133 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t CalibrationMode, uint32_t SingleDiff)
134 {
135 HAL_StatusTypeDef tmp_hal_status;
136 __IO uint32_t wait_loop_index = 0UL;
137 uint32_t backup_setting_cfgr1;
138 uint32_t backup_setting_pwrr;
139
140 UNUSED(SingleDiff); /* STM32U5 calibration is not making difference between Single and Diff ended */
141 /* We keep this to be inligne with old products API and for any further use */
142
143 /* Check the parameters */
144 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
145 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
146
147 __HAL_LOCK(hadc);
148
149 /* Calibration prerequisite: ADC must be disabled. */
150
151 /* Disable the ADC (if not already disabled) */
152 tmp_hal_status = ADC_Disable(hadc);
153
154 /* Check if ADC is effectively disabled */
155 if (tmp_hal_status == HAL_OK)
156 {
157 /* Set ADC state */
158 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_BUSY_INTERNAL);
159
160 if (hadc->Instance == ADC4)
161 {
162 /* Manage settings impacting calibration */
163 /* - Disable ADC mode auto power-off */
164 /* - Disable ADC DMA transfer request during calibration */
165 /* Note: Specificity of this STM32 series: Calibration factor is */
166 /* available in data register and also transferred by DMA. */
167 /* To not insert ADC calibration factor among ADC conversion data */
168 /* in array variable, DMA transfer must be disabled during */
169 /* calibration. */
170 backup_setting_pwrr = READ_BIT(hadc->Instance->PWRR, ADC4_PWRR_AUTOFF);
171 backup_setting_cfgr1 = READ_BIT(hadc->Instance->CFGR1, ADC4_CFGR1_DMAEN | ADC4_CFGR1_DMACFG);
172 CLEAR_BIT(hadc->Instance->CFGR1, ADC4_CFGR1_DMAEN | ADC4_CFGR1_DMACFG);
173 CLEAR_BIT(hadc->Instance->PWRR, ADC4_PWRR_AUTOFF);
174
175 /* Start ADC calibration in mode single-ended */
176 LL_ADC_StartCalibration(hadc->Instance, LL_ADC_CALIB_OFFSET);
177
178 /* Wait for calibration completion */
179 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
180 {
181 wait_loop_index++;
182 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
183 {
184 /* Update ADC state machine to error */
185 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL);
186
187 __HAL_UNLOCK(hadc);
188
189 return HAL_ERROR;
190 }
191 }
192
193 /* Restore configuration after calibration */
194 SET_BIT(hadc->Instance->CFGR1, backup_setting_cfgr1);
195 SET_BIT(hadc->Instance->PWRR, backup_setting_pwrr);
196 }
197 else /* ADC instance ADC1 or ADC2 */
198 {
199 /* Get device information */
200 uint32_t dev_id = READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID);
201 uint32_t rev_id = READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_IDCODE_REV_ID_Pos;
202
203 /* Assess whether extended calibration is available on the selected device */
204 if ((dev_id == 0x455UL) || (dev_id == 0x476UL)
205 || (((dev_id == 0x481UL) || (dev_id == 0x482UL)) && (rev_id >= 0x3000UL)))
206 {
207 /* Perform extended calibration */
208 /* Refer to ref manual for extended calibration procedure details */
209 tmp_hal_status = ADC_Enable(hadc);
210
211 if (tmp_hal_status == HAL_OK)
212 {
213 MODIFY_REG(hadc->Instance->CR, ADC_CR_CALINDEX, 0x9UL << ADC_CR_CALINDEX_Pos);
214 MODIFY_REG(hadc->Instance->CALFACT2, 0x00FF0000UL, 0x00020000UL);
215 SET_BIT(hadc->Instance->CALFACT, ADC_CALFACT_LATCH_COEF);
216
217 tmp_hal_status = ADC_Disable(hadc);
218
219 if (CalibrationMode == ADC_CALIB_OFFSET_LINEARITY)
220 {
221 MODIFY_REG(hadc->Instance->CR, ADC_CR_ADCALLIN | ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADCALLIN);
222 }
223
224 MODIFY_REG(hadc->Instance->CR, ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADCAL);
225
226 /* Wait for calibration completion */
227 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
228 {
229 wait_loop_index++;
230 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
231 {
232 /* Update ADC state machine to error */
233 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL);
234
235 __HAL_UNLOCK(hadc);
236
237 return HAL_ERROR;
238 }
239 }
240 }
241 }
242 else
243 {
244 /* Start ADC calibration in mode single-ended or differential */
245 LL_ADC_StartCalibration(hadc->Instance, CalibrationMode);
246
247 /* Wait for calibration completion */
248 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
249 {
250 wait_loop_index++;
251 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
252 {
253 /* Update ADC state machine to error */
254 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL);
255
256 __HAL_UNLOCK(hadc);
257
258 return HAL_ERROR;
259 }
260 }
261 }
262 }
263
264 /* Set ADC state */
265 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY);
266 }
267 else /* ADC not disabled */
268 {
269 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
270
271 /* Note: No need to update variable "tmp_hal_status" here: already set */
272 /* to state "HAL_ERROR" by function disabling the ADC. */
273 }
274
275 __HAL_UNLOCK(hadc);
276
277 return tmp_hal_status;
278 }
279
280 /**
281 * @brief Get the calibration factor.
282 * @param hadc ADC handle.
283 * @param SingleDiff This parameter can be only:
284 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
285 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
286 * @retval Calibration value.
287 */
HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)288 uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
289 {
290 uint32_t Calib_Val = 0UL;
291 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
292
293 /* Check the parameters */
294 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
295 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
296
297 if (hadc->Instance != ADC4)
298 {
299 tmp_hal_status = ADC_Enable(hadc); /* ADC need to be enabled to perform calibration for ADC1/2 and not for ADC4 */
300 }
301
302 if (tmp_hal_status == HAL_OK)
303 {
304 /* Return the selected ADC calibration value */
305 Calib_Val = LL_ADC_GetCalibrationOffsetFactor(hadc->Instance, SingleDiff);
306 }
307
308 if (hadc->Instance != ADC4)
309 {
310 tmp_hal_status = ADC_Disable(hadc);
311 UNUSED(tmp_hal_status);
312 }
313 return Calib_Val;
314 }
315
316 /**
317 * @brief Get the calibration factor from automatic conversion result
318 * @param hadc ADC handle
319 * @param pLinearCalib_Buffer Linear calibration factor (table of 9 elements)
320 * @retval HAL state
321 */
HAL_ADCEx_LinearCalibration_GetValue(ADC_HandleTypeDef * hadc,uint32_t * pLinearCalib_Buffer)322 HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t *pLinearCalib_Buffer)
323 {
324 uint32_t cnt;
325 HAL_StatusTypeDef tmp_hal_status;
326
327 /* Check the parameters */
328 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
329
330 if (hadc->Instance != ADC4)
331 {
332 /* Enable the ADC to be able to read the linear calibration factor */
333 tmp_hal_status = ADC_Enable(hadc);
334
335 if (tmp_hal_status == HAL_OK)
336 {
337 /* Note: Bitfields ADC_CALFACT_LATCH_COEF and ADC_CALFACT_CAPTURE_COEF have property "wr1",
338 therefore they are not cleared in this function. */
339 SET_BIT(hadc->Instance->CALFACT, ADC_CALFACT_CAPTURE_COEF);
340
341 for (cnt = 0UL; cnt <= 8UL; cnt++)
342 {
343 MODIFY_REG(hadc->Instance->CR,
344 (ADC_CR_CALINDEX),
345 (cnt << ADC_CR_CALINDEX_Pos));
346 pLinearCalib_Buffer[cnt] = (uint32_t)(READ_BIT(hadc->Instance->CALFACT2, ADC_CALFACT2_CALFACT_Msk));
347 }
348 }
349
350 tmp_hal_status = ADC_Disable(hadc);
351 }
352 else
353 {
354 /* ADC linear calibration not available on ADC4 */
355 tmp_hal_status = HAL_ERROR;
356 }
357
358 return tmp_hal_status;
359 }
360
361 /**
362 * @brief Set the calibration factor to overwrite automatic conversion result.
363 * ADC must be enabled and no conversion is ongoing.
364 * @param hadc ADC handle
365 * @param SingleDiff This parameter can be only:
366 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
367 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
368 * @param CalibrationFactor Calibration factor (range 0xFFFF for ADC1 and ADC2, range 0x7F for ADC4)
369 * @retval HAL state
370 */
HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff,uint32_t CalibrationFactor)371 HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff,
372 uint32_t CalibrationFactor)
373 {
374 HAL_StatusTypeDef tmp_hal_status;
375 uint32_t tmp_adc_is_conversion_on_going_regular;
376 uint32_t tmp_adc_is_conversion_on_going_injected;
377
378 /* Check the parameters */
379 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
380 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
381 assert_param(IS_ADC_CALFACT(CalibrationFactor));
382
383 __HAL_LOCK(hadc);
384
385 /* Verification of hardware constraints before modifying the calibration */
386 /* factors register: ADC must be enabled, no conversion on going. */
387 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
388 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
389
390 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
391 && (tmp_adc_is_conversion_on_going_injected == 0UL)
392 )
393 {
394 /* Enable the ADC to be able to set the calibration factor */
395 tmp_hal_status = ADC_Enable(hadc);
396
397 if (tmp_hal_status == HAL_OK)
398 {
399 /* Set the selected ADC calibration value */
400 LL_ADC_SetCalibrationOffsetFactor(hadc->Instance, SingleDiff, CalibrationFactor);
401
402 tmp_hal_status = ADC_Disable(hadc);
403 }
404 }
405 else
406 {
407 /* Update ADC state machine */
408 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
409 /* Update ADC error code */
410 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
411
412 /* Update ADC state machine to error */
413 tmp_hal_status = HAL_ERROR;
414 }
415
416 __HAL_UNLOCK(hadc);
417
418 return tmp_hal_status;
419 }
420
421 /**
422 * @brief Set the linear calibration factor
423 * @param hadc ADC handle
424 * @param pLinearCalib_Buffer Linear calibration factor (table of 9 elements)
425 * @retval HAL state
426 */
HAL_ADCEx_LinearCalibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t * pLinearCalib_Buffer)427 HAL_StatusTypeDef HAL_ADCEx_LinearCalibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t *pLinearCalib_Buffer)
428 {
429 uint32_t cnt;
430 HAL_StatusTypeDef tmp_hal_status;
431
432 /* Check the parameters */
433 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
434
435 if (hadc->Instance != ADC4)
436 {
437 tmp_hal_status = ADC_Enable(hadc);
438
439 if (tmp_hal_status == HAL_OK)
440 {
441 /* Note: Bitfields ADC_CALFACT_LATCH_COEF and ADC_CALFACT_CAPTURE_COEF have property "wr1",
442 therefore they are not cleared in this function. */
443 for (cnt = 0UL; cnt <= 7UL; cnt++)
444 {
445 MODIFY_REG(hadc->Instance->CR,
446 (ADC_CR_CALINDEX),
447 (cnt << ADC_CR_CALINDEX_Pos));
448
449 if (cnt == 7UL)
450 {
451 /* Specific case for linearity factor 7 and internal offset: must be concatenated */
452 MODIFY_REG(hadc->Instance->CALFACT2,
453 ADC_CALFACT2_CALFACT,
454 pLinearCalib_Buffer[cnt] | ((pLinearCalib_Buffer[cnt + 1UL] & 0xFF000000UL) >> 8UL));
455 }
456 else
457 {
458 MODIFY_REG(hadc->Instance->CALFACT2, ADC_CALFACT2_CALFACT, pLinearCalib_Buffer[cnt]);
459 }
460 }
461
462 SET_BIT(hadc->Instance->CALFACT, ADC_CALFACT_LATCH_COEF);
463 CLEAR_BIT(hadc->Instance->CR, ADC_CR_CALINDEX);
464
465 tmp_hal_status = ADC_Disable(hadc);
466 }
467 }
468 else
469 {
470 /* ADC linear calibration not available on ADC4 */
471 tmp_hal_status = HAL_ERROR;
472 }
473
474 return tmp_hal_status;
475 }
476
477 /**
478 * @brief Enable ADC, start conversion of injected group.
479 * @note Interruptions enabled in this function: None.
480 * @note Case of multimode enabled when multimode feature is available:
481 * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
482 * then for ADC master.
483 * For ADC slave, ADC is enabled only (conversion is not started).
484 * For ADC master, ADC is enabled and multimode conversion is started.
485 * @param hadc ADC handle.
486 * @retval HAL status
487 */
HAL_ADCEx_InjectedStart(ADC_HandleTypeDef * hadc)488 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc)
489 {
490 HAL_StatusTypeDef tmp_hal_status;
491 #if defined(ADC_MULTIMODE_SUPPORT)
492 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
493 #endif /* ADC_MULTIMODE_SUPPORT */
494
495 /* Check the parameters */
496 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
497
498 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
499 {
500 tmp_hal_status = HAL_BUSY;
501 }
502 else
503 {
504 /* In case of software trigger detection enabled, JQDIS must be set
505 (which can be done only if ADSTART and JADSTART are both cleared).
506 If JQDIS is not set at that point, returns an error
507 - since software trigger detection is disabled. User needs to
508 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
509 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
510 the queue is empty */
511
512 __HAL_LOCK(hadc);
513
514 /* Enable the ADC peripheral */
515 tmp_hal_status = ADC_Enable(hadc);
516
517 /* Start conversion if ADC is effectively enabled */
518 if (tmp_hal_status == HAL_OK)
519 {
520 /* Clear ADC error code */
521 ADC_CLEAR_ERRORCODE(hadc);
522
523 /* Set ADC state */
524 /* - Clear state bitfield related to injected group conversion results */
525 /* - Set state bitfield related to injected operation */
526 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
527
528 #if defined(ADC_MULTIMODE_SUPPORT)
529 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
530 - if ADC instance is master or if multimode feature is not available
531 - if multimode setting is disabled (ADC instance slave in independent mode) */
532 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
533 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
534 )
535 {
536 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
537 }
538 #endif /* ADC_MULTIMODE_SUPPORT */
539
540 /* Clear ADC group injected group conversion flag */
541 /* (To ensure of no unknown state from potential previous ADC operations) */
542 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
543
544 /* Unlock before starting ADC conversions: in case of potential */
545 /* interruption, to let the process to ADC IRQ Handler. */
546 __HAL_UNLOCK(hadc);
547
548 /* Enable conversion of injected group, if automatic injected conversion */
549 /* is disabled. */
550 /* If software start has been selected, conversion starts immediately. */
551 /* If external trigger has been selected, conversion will start at next */
552 /* trigger event. */
553 /* Case of multimode enabled (when multimode feature is available): */
554 /* if ADC is slave, */
555 /* - ADC is enabled only (conversion is not started), */
556 /* - if multimode only concerns regular conversion, ADC is enabled */
557 /* and conversion is started. */
558 /* If ADC is master or independent, */
559 /* - ADC is enabled and conversion is started. */
560 #if defined(ADC_MULTIMODE_SUPPORT)
561 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
562 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
563 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
564 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
565 )
566 {
567 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
568 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
569 {
570 LL_ADC_INJ_StartConversion(hadc->Instance);
571 }
572 }
573 else
574 {
575 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
576 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
577 }
578 #else
579 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
580 {
581 LL_ADC_INJ_StartConversion(hadc->Instance);
582 }
583 #endif /* ADC_MULTIMODE_SUPPORT */
584
585 }
586 else
587 {
588 __HAL_UNLOCK(hadc);
589 }
590 }
591
592 return tmp_hal_status;
593 }
594
595 /**
596 * @brief Stop conversion of injected channels. Disable ADC peripheral if
597 * no regular conversion is on going.
598 * @note If ADC must be disabled and if conversion is on going on
599 * regular group, function HAL_ADC_Stop must be used to stop both
600 * injected and regular groups, and disable the ADC.
601 * @note If injected group mode auto-injection is enabled,
602 * function HAL_ADC_Stop must be used.
603 * @note In case of multimode enabled (when multimode feature is available),
604 * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
605 * For ADC master, conversion is stopped and ADC is disabled.
606 * For ADC slave, ADC is disabled only (conversion stop of ADC master
607 * has already stopped conversion of ADC slave).
608 * @param hadc ADC handle.
609 * @retval HAL status
610 */
HAL_ADCEx_InjectedStop(ADC_HandleTypeDef * hadc)611 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc)
612 {
613 HAL_StatusTypeDef tmp_hal_status;
614
615 /* Check the parameters */
616 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
617
618 __HAL_LOCK(hadc);
619
620 /* 1. Stop potential conversion on going on injected group only. */
621 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
622
623 /* Disable ADC peripheral if injected conversions are effectively stopped */
624 /* and if no conversion on regular group is on-going */
625 if (tmp_hal_status == HAL_OK)
626 {
627 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
628 {
629 /* 2. Disable the ADC peripheral */
630 tmp_hal_status = ADC_Disable(hadc);
631
632 /* Check if ADC is effectively disabled */
633 if (tmp_hal_status == HAL_OK)
634 {
635 /* Set ADC state */
636 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
637 }
638 }
639 /* Conversion on injected group is stopped, but ADC not disabled since */
640 /* conversion on regular group is still running. */
641 else
642 {
643 /* Set ADC state */
644 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
645 }
646 }
647
648 __HAL_UNLOCK(hadc);
649
650 return tmp_hal_status;
651 }
652
653 /**
654 * @brief Wait for injected group conversion to be completed.
655 * @param hadc ADC handle
656 * @param Timeout Timeout value in millisecond.
657 * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
658 * checked and cleared depending on AUTDLY bit status.
659 * @retval HAL status
660 */
HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)661 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
662 {
663 uint32_t tickstart;
664 uint32_t tmp_flag_end;
665 uint32_t tmp_adc_inj_is_trigger_source_sw_start;
666 uint32_t tmp_adc_reg_is_trigger_source_sw_start;
667 uint32_t tmp_cfgr;
668 #if defined(ADC_MULTIMODE_SUPPORT)
669 const ADC_TypeDef *tmp_adc_master;
670 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
671 #endif /* ADC_MULTIMODE_SUPPORT */
672
673 /* Check the parameters */
674 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
675
676 /* If end of sequence selected */
677 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
678 {
679 tmp_flag_end = ADC_FLAG_JEOS;
680 }
681 else /* end of conversion selected */
682 {
683 tmp_flag_end = ADC_FLAG_JEOC;
684 }
685
686 tickstart = HAL_GetTick();
687
688 /* Wait until End of Conversion or Sequence flag is raised */
689 while ((hadc->Instance->ISR & tmp_flag_end) == 0UL)
690 {
691 /* Check if timeout is disabled (set to infinite wait) */
692 if (Timeout != HAL_MAX_DELAY)
693 {
694 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
695 {
696 if ((hadc->Instance->ISR & tmp_flag_end) == 0UL)
697 {
698 /* Update ADC state machine to timeout */
699 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
700
701 /* Process unlocked */
702 __HAL_UNLOCK(hadc);
703
704 return HAL_TIMEOUT;
705 }
706 }
707 }
708 }
709
710 /* Retrieve ADC configuration */
711 tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance);
712 tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance);
713 /* Get relevant register CFGR in ADC instance of ADC master or slave */
714 /* in function of multimode state (for devices with multimode */
715 /* available). */
716 #if defined(ADC_MULTIMODE_SUPPORT)
717 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
718 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
719 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
720 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
721 )
722 {
723 tmp_cfgr = READ_REG(hadc->Instance->CFGR1);
724 }
725 else
726 {
727 tmp_adc_master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance);
728 tmp_cfgr = READ_REG(tmp_adc_master->CFGR1);
729 }
730 #else
731 tmp_cfgr = READ_REG(hadc->Instance->CFGR1);
732 #endif /* ADC_MULTIMODE_SUPPORT */
733
734 /* Update ADC state machine */
735 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
736
737 /* Determine whether any further conversion upcoming on group injected */
738 /* by external trigger or by automatic injected conversion */
739 /* from group regular. */
740 if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) ||
741 ((READ_BIT(tmp_cfgr, ADC_CFGR1_JAUTO) == 0UL) &&
742 ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) &&
743 (READ_BIT(tmp_cfgr, ADC_CFGR1_CONT) == 0UL))))
744 {
745 /* Check whether end of sequence is reached */
746 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
747 {
748 /* Particular case if injected contexts queue is enabled: */
749 /* when the last context has been fully processed, JSQR is reset */
750 /* by the hardware. Even if no injected conversion is planned to come */
751 /* (queue empty, triggers are ignored), it can start again */
752 /* immediately after setting a new context (JADSTART is still set). */
753 /* Therefore, state of HAL ADC injected group is kept to busy. */
754
755 /* Set ADC state */
756 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
757
758 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL)
759 {
760 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
761 }
762 }
763 }
764
765 /* Clear polled flag */
766 if (tmp_flag_end == ADC_FLAG_JEOS)
767 {
768 /* Clear end of sequence JEOS flag of injected group if low power feature */
769 /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
770 /* For injected groups, no new conversion will start before JEOS is */
771 /* cleared. */
772 if (READ_BIT(tmp_cfgr, ADC_CFGR1_AUTDLY) == 0UL)
773 {
774 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
775 }
776 }
777 else
778 {
779 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
780 }
781
782 return HAL_OK;
783 }
784
785 /**
786 * @brief Enable ADC, start conversion of injected group with interruption.
787 * @note Interruptions enabled in this function according to initialization
788 * setting : JEOC (end of conversion) or JEOS (end of sequence)
789 * @note Case of multimode enabled (when multimode feature is enabled):
790 * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
791 * then for ADC master.
792 * For ADC slave, ADC is enabled only (conversion is not started).
793 * For ADC master, ADC is enabled and multimode conversion is started.
794 * @param hadc ADC handle.
795 * @retval HAL status.
796 */
HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef * hadc)797 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc)
798 {
799 HAL_StatusTypeDef tmp_hal_status;
800 #if defined(ADC_MULTIMODE_SUPPORT)
801 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
802 #endif /* ADC_MULTIMODE_SUPPORT */
803
804 /* Check the parameters */
805 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
806
807 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
808 {
809 tmp_hal_status = HAL_BUSY;
810 }
811 else
812 {
813 /* In case of software trigger detection enabled, JQDIS must be set
814 (which can be done only if ADSTART and JADSTART are both cleared).
815 If JQDIS is not set at that point, returns an error
816 - since software trigger detection is disabled. User needs to
817 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
818 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
819 the queue is empty */
820
821 __HAL_LOCK(hadc);
822
823 /* Enable the ADC peripheral */
824 tmp_hal_status = ADC_Enable(hadc);
825
826 /* Start conversion if ADC is effectively enabled */
827 if (tmp_hal_status == HAL_OK)
828 {
829 /* Clear ADC error code */
830 ADC_CLEAR_ERRORCODE(hadc);
831
832 /* Set ADC state */
833 /* - Clear state bitfield related to injected group conversion results */
834 /* - Set state bitfield related to injected operation */
835 ADC_STATE_CLR_SET(hadc->State,
836 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
837 HAL_ADC_STATE_INJ_BUSY);
838
839 #if defined(ADC_MULTIMODE_SUPPORT)
840 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
841 - if ADC instance is master or if multimode feature is not available
842 - if multimode setting is disabled (ADC instance slave in independent mode) */
843 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
844 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
845 )
846 {
847 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
848 }
849 #endif /* ADC_MULTIMODE_SUPPORT */
850
851 /* Clear ADC group injected group conversion flag */
852 /* (To ensure of no unknown state from potential previous ADC operations) */
853 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
854
855 /* Unlock before starting ADC conversions: in case of potential */
856 /* interruption, to let the process to ADC IRQ Handler. */
857 __HAL_UNLOCK(hadc);
858
859 /* Enable ADC end of conversion interrupt */
860 switch (hadc->Init.EOCSelection)
861 {
862 case ADC_EOC_SEQ_CONV:
863 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
864 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
865 break;
866 /* case ADC_EOC_SINGLE_CONV */
867 default:
868 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
869 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
870 break;
871 }
872
873 /* Enable conversion of injected group, if automatic injected conversion */
874 /* is disabled. */
875 /* If software start has been selected, conversion starts immediately. */
876 /* If external trigger has been selected, conversion will start at next */
877 /* trigger event. */
878 /* Case of multimode enabled (when multimode feature is available): */
879 /* if ADC is slave, */
880 /* - ADC is enabled only (conversion is not started), */
881 /* - if multimode only concerns regular conversion, ADC is enabled */
882 /* and conversion is started. */
883 /* If ADC is master or independent, */
884 /* - ADC is enabled and conversion is started. */
885 #if defined(ADC_MULTIMODE_SUPPORT)
886 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
887 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
888 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
889 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
890 )
891 {
892 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
893 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
894 {
895 LL_ADC_INJ_StartConversion(hadc->Instance);
896 }
897 }
898 else
899 {
900 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
901 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
902 }
903 #else
904 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
905 {
906 LL_ADC_INJ_StartConversion(hadc->Instance);
907 }
908 #endif /* ADC_MULTIMODE_SUPPORT */
909
910 }
911 else
912 {
913 __HAL_UNLOCK(hadc);
914 }
915 }
916
917 return tmp_hal_status;
918 }
919
920 /**
921 * @brief Stop conversion of injected channels, disable interruption of
922 * end-of-conversion. Disable ADC peripheral if no regular conversion
923 * is on going.
924 * @note If ADC must be disabled and if conversion is on going on
925 * regular group, function HAL_ADC_Stop must be used to stop both
926 * injected and regular groups, and disable the ADC.
927 * @note If injected group mode auto-injection is enabled,
928 * function HAL_ADC_Stop must be used.
929 * @note Case of multimode enabled (when multimode feature is available):
930 * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
931 * then for ADC slave.
932 * For ADC master, conversion is stopped and ADC is disabled.
933 * For ADC slave, ADC is disabled only (conversion stop of ADC master
934 * has already stopped conversion of ADC slave).
935 * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
936 * @param hadc ADC handle
937 * @retval HAL status
938 */
HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef * hadc)939 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
940 {
941 HAL_StatusTypeDef tmp_hal_status;
942
943 /* Check the parameters */
944 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
945
946 __HAL_LOCK(hadc);
947
948 /* 1. Stop potential conversion on going on injected group only. */
949 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
950
951 /* Disable ADC peripheral if injected conversions are effectively stopped */
952 /* and if no conversion on the other group (regular group) is intended to */
953 /* continue. */
954 if (tmp_hal_status == HAL_OK)
955 {
956 /* Disable ADC end of conversion interrupt for injected channels */
957 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS));
958
959 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
960 {
961 /* 2. Disable the ADC peripheral */
962 tmp_hal_status = ADC_Disable(hadc);
963
964 /* Check if ADC is effectively disabled */
965 if (tmp_hal_status == HAL_OK)
966 {
967 /* Set ADC state */
968 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
969 }
970 }
971 /* Conversion on injected group is stopped, but ADC not disabled since */
972 /* conversion on regular group is still running. */
973 else
974 {
975 /* Set ADC state */
976 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
977 }
978 }
979
980 __HAL_UNLOCK(hadc);
981
982 return tmp_hal_status;
983 }
984
985 #if defined(ADC_MULTIMODE_SUPPORT)
986 /**
987 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
988 * @note Multimode must have been previously configured using
989 * HAL_ADCEx_MultiModeConfigChannel() function.
990 * Interruptions enabled in this function:
991 * overrun, DMA half transfer, DMA transfer complete.
992 * Each of these interruptions has its dedicated callback function.
993 * @note State field of Slave ADC handle is not updated in this configuration:
994 * user should not rely on it for information related to Slave regular
995 * conversions.
996 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
997 * @param pData Destination Buffer address.
998 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
999 * @retval HAL status
1000 */
HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef * hadc,const uint32_t * pData,uint32_t Length)1001 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, const uint32_t *pData, uint32_t Length)
1002 {
1003 HAL_StatusTypeDef tmp_hal_status;
1004 ADC_HandleTypeDef tmp_hadc_slave;
1005 ADC_Common_TypeDef *tmp_adc_common;
1006 uint32_t LengthInBytes;
1007 DMA_NodeConfTypeDef node_conf;
1008
1009 /* Check the parameters */
1010 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1011 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1012 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
1013
1014 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
1015 {
1016 tmp_hal_status = HAL_BUSY;
1017 }
1018 else
1019 {
1020 __HAL_LOCK(hadc);
1021
1022 /* Temporary handle minimum initialization */
1023 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
1024 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
1025
1026 /* Set a temporary handle of the ADC slave associated to the ADC master */
1027 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
1028
1029 if (tmp_hadc_slave.Instance == NULL)
1030 {
1031 /* Set ADC state */
1032 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1033 __HAL_UNLOCK(hadc);
1034 return HAL_ERROR;
1035 }
1036
1037 /* Enable the ADC peripherals: master and slave (in case if not already */
1038 /* enabled previously) */
1039 tmp_hal_status = ADC_Enable(hadc);
1040 if (tmp_hal_status == HAL_OK)
1041 {
1042 /* Reinitialize the LowPowerAutoPowerOff parameter from master to slave */
1043 tmp_hadc_slave.Init.LowPowerAutoPowerOff = hadc->Init.LowPowerAutoPowerOff;
1044 tmp_hal_status = ADC_Enable(&tmp_hadc_slave);
1045 }
1046
1047 /* Start multimode conversion of ADCs pair */
1048 if (tmp_hal_status == HAL_OK)
1049 {
1050 /* Set ADC state */
1051 ADC_STATE_CLR_SET(hadc->State,
1052 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR \
1053 | HAL_ADC_STATE_REG_EOSMP),
1054 HAL_ADC_STATE_REG_BUSY);
1055
1056 ADC_CLEAR_ERRORCODE(hadc);
1057
1058 /* Set the DMA transfer complete callback */
1059 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1060
1061 /* Set the DMA half transfer complete callback */
1062 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1063
1064 /* Set the DMA error callback */
1065 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
1066
1067 /* Pointer to the common control register */
1068 tmp_adc_common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1069
1070 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1071 /* start (in case of SW start): */
1072
1073 /* Clear regular group conversion flag and overrun flag */
1074 /* (To ensure of no unknown state from potential previous ADC operations) */
1075 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1076
1077 /* Unlock before starting ADC conversions: in case of potential */
1078 /* interruption, to let the process to ADC IRQ Handler. */
1079 __HAL_UNLOCK(hadc);
1080
1081 /* Enable ADC overrun interrupt */
1082 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1083
1084 /* Start the DMA channel */
1085 /* Check linkedlist mode */
1086 if ((hadc->DMA_Handle->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
1087 {
1088 if ((hadc->DMA_Handle->LinkedListQueue != NULL) && (hadc->DMA_Handle->LinkedListQueue->Head != NULL))
1089 {
1090 /* Length should be converted to number of bytes */
1091 if (HAL_DMAEx_List_GetNodeConfig(&node_conf, hadc->DMA_Handle->LinkedListQueue->Head) != HAL_OK)
1092 {
1093 return HAL_ERROR;
1094 }
1095
1096 /* Length should be converted to number of bytes */
1097 if (node_conf.Init.SrcDataWidth == DMA_SRC_DATAWIDTH_WORD)
1098 {
1099 /* Word -> Bytes */
1100 LengthInBytes = Length * 4U;
1101 }
1102 else if (node_conf.Init.SrcDataWidth == DMA_SRC_DATAWIDTH_HALFWORD)
1103 {
1104 /* Halfword -> Bytes */
1105 LengthInBytes = Length * 2U;
1106 }
1107 else /* Bytes */
1108 {
1109 /* Same size already expressed in Bytes */
1110 LengthInBytes = Length;
1111 }
1112
1113 hadc->DMA_Handle->LinkedListQueue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = (uint32_t)LengthInBytes;
1114 hadc->DMA_Handle->LinkedListQueue->Head->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = \
1115 (uint32_t)&tmp_adc_common->CDR;
1116 hadc->DMA_Handle->LinkedListQueue->Head->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = (uint32_t)pData;
1117 tmp_hal_status = HAL_DMAEx_List_Start_IT(hadc->DMA_Handle);
1118 }
1119 else
1120 {
1121 tmp_hal_status = HAL_ERROR;
1122 }
1123 }
1124 else
1125 {
1126 /* Length should be converted to number of bytes */
1127 if (hadc->DMA_Handle->Init.SrcDataWidth == DMA_SRC_DATAWIDTH_WORD)
1128 {
1129 /* Word -> Bytes */
1130 LengthInBytes = Length * 4U;
1131 }
1132 else if (hadc->DMA_Handle->Init.SrcDataWidth == DMA_SRC_DATAWIDTH_HALFWORD)
1133 {
1134 /* Halfword -> Bytes */
1135 LengthInBytes = Length * 2U;
1136 }
1137 else /* Bytes */
1138 {
1139 /* Same size already expressed in Bytes */
1140 LengthInBytes = Length;
1141 }
1142
1143 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmp_adc_common->CDR, (uint32_t)pData, \
1144 LengthInBytes);
1145 }
1146
1147 /* Enable conversion of regular group. */
1148 /* If software start has been selected, conversion starts immediately. */
1149 /* If external trigger has been selected, conversion will start at next */
1150 /* trigger event. */
1151 /* Start ADC group regular conversion */
1152 LL_ADC_REG_StartConversion(hadc->Instance);
1153 }
1154 else
1155 {
1156 __HAL_UNLOCK(hadc);
1157 }
1158 }
1159
1160 return tmp_hal_status;
1161 }
1162
1163 /**
1164 * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
1165 * @note Multimode is kept enabled after this function. MultiMode DMA bits
1166 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1167 * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1168 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1169 * resort to HAL_ADCEx_DisableMultiMode() API.
1170 * @note In case of DMA configured in circular mode, function
1171 * HAL_ADC_Stop_DMA() must be called after this function with handle of
1172 * ADC slave, to properly disable the DMA channel.
1173 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1174 * @retval HAL status
1175 */
HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef * hadc)1176 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1177 {
1178 HAL_StatusTypeDef tmp_hal_status;
1179 uint32_t tickstart;
1180 ADC_HandleTypeDef tmp_hadc_slave;
1181 uint32_t tmp_hadc_slave_conversion_on_going;
1182 HAL_StatusTypeDef tmp_hadc_slave_disable_status;
1183
1184 /* Check the parameters */
1185 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1186
1187 __HAL_LOCK(hadc);
1188
1189 /* 1. Stop potential multimode conversion on going, on regular and injected groups */
1190 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
1191
1192 /* Disable ADC peripheral if conversions are effectively stopped */
1193 if (tmp_hal_status == HAL_OK)
1194 {
1195 /* Temporary handle minimum initialization */
1196 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
1197 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
1198
1199 /* Set a temporary handle of the ADC slave associated to the ADC master */
1200 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
1201
1202 if (tmp_hadc_slave.Instance == NULL)
1203 {
1204 /* Update ADC state machine to error */
1205 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1206
1207 __HAL_UNLOCK(hadc);
1208
1209 return HAL_ERROR;
1210 }
1211
1212 /* Procedure to disable the ADC peripheral: wait for conversions */
1213 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1214
1215 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1216 tickstart = HAL_GetTick();
1217
1218 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1219 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1220 || (tmp_hadc_slave_conversion_on_going == 1UL)
1221 )
1222 {
1223 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1224 {
1225 /* New check to avoid false timeout detection in case of preemption */
1226 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1227
1228 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1229 || (tmp_hadc_slave_conversion_on_going == 1UL)
1230 )
1231 {
1232 /* Update ADC state machine to error */
1233 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1234
1235 /* Process unlocked */
1236 __HAL_UNLOCK(hadc);
1237
1238 return HAL_ERROR;
1239 }
1240 }
1241
1242 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1243 }
1244
1245 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1246 /* while DMA transfer is on going) */
1247 /* Note: DMA channel of ADC slave should be stopped after this function */
1248 /* with HAL_ADC_Stop_DMA() API. */
1249 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1250
1251 /* Check if DMA channel effectively disabled */
1252 if (tmp_hal_status == HAL_ERROR)
1253 {
1254 /* Update ADC state machine to error */
1255 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1256 }
1257
1258 /* Disable ADC overrun interrupt */
1259 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1260
1261 /* 2. Disable the ADC peripherals: master and slave */
1262 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1263 /* memory a potential failing status. */
1264 if (tmp_hal_status == HAL_OK)
1265 {
1266 tmp_hadc_slave_disable_status = ADC_Disable(&tmp_hadc_slave);
1267 if ((ADC_Disable(hadc) == HAL_OK) &&
1268 (tmp_hadc_slave_disable_status == HAL_OK))
1269 {
1270 tmp_hal_status = HAL_OK;
1271 }
1272 }
1273 else
1274 {
1275 /* In case of error, attempt to disable ADC master and slave without status assert */
1276 (void) ADC_Disable(hadc);
1277 (void) ADC_Disable(&tmp_hadc_slave);
1278 }
1279
1280 /* Set ADC state (ADC master) */
1281 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1282 }
1283
1284 __HAL_UNLOCK(hadc);
1285
1286 return tmp_hal_status;
1287 }
1288
1289 /**
1290 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
1291 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1292 * @retval The converted data values.
1293 */
HAL_ADCEx_MultiModeGetValue(const ADC_HandleTypeDef * hadc)1294 uint32_t HAL_ADCEx_MultiModeGetValue(const ADC_HandleTypeDef *hadc)
1295 {
1296 const ADC_Common_TypeDef *tmp_adc_common;
1297
1298 /* Check the parameters */
1299 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1300
1301 /* Prevent unused argument(s) compilation warning if no assert_param check */
1302 /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1303 UNUSED(hadc);
1304
1305 /* Pointer to the common control register */
1306 tmp_adc_common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1307
1308 /* Return the multi mode conversion value */
1309 return tmp_adc_common->CDR;
1310 }
1311
1312 /**
1313 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
1314 * @note Multimode must have been previously configured using
1315 * HAL_ADCEx_MultiModeConfigChannel() function.
1316 * Interruptions enabled in this function:
1317 * overrun, DMA half transfer, DMA transfer complete.
1318 * Each of these interruptions has its dedicated callback function.
1319 * @note State field of Slave ADC handle is not updated in this configuration:
1320 * user should not rely on it for information related to Slave regular
1321 * conversions.
1322 * @param hadc ADC handle of ADC
1323 * @note - Only ADC master could start the conversion.
1324 * - Two ADC conversions (Master & Slave) per external trig and so two DMA requests.
1325 * @param pData Destination Buffer address.
1326 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
1327 * @retval HAL status
1328 */
HAL_ADCEx_MultiModeStart_DMA_Data32(ADC_HandleTypeDef * hadc,const uint32_t * pData,uint32_t Length)1329 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA_Data32(ADC_HandleTypeDef *hadc, const uint32_t *pData, uint32_t Length)
1330 {
1331 HAL_StatusTypeDef tmp_hal_status;
1332 ADC_HandleTypeDef tmp_hadc_slave;
1333 ADC_Common_TypeDef *tmp_adc_common;
1334 uint32_t LengthInBytes;
1335
1336 /* Check the parameters */
1337 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1338 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1339 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
1340
1341 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
1342 {
1343 return HAL_BUSY;
1344 }
1345 else
1346 {
1347 __HAL_LOCK(hadc);
1348
1349 /* Temporary handle minimum initialization */
1350 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
1351 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
1352
1353 /* Set a temporary handle of the ADC slave associated to the ADC master */
1354 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
1355
1356 if (tmp_hadc_slave.Instance == NULL)
1357 {
1358 /* Set ADC state */
1359 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1360
1361 /* Process unlocked */
1362 __HAL_UNLOCK(hadc);
1363
1364 return HAL_ERROR;
1365 }
1366
1367 /* Enable the ADC peripherals: master and slave (in case if not already */
1368 /* enabled previously) */
1369 tmp_hal_status = ADC_Enable(hadc);
1370 if (tmp_hal_status == HAL_OK)
1371 {
1372 /* Reinitialize the LowPowerAutoPowerOff parameter from master to slave */
1373 tmp_hadc_slave.Init.LowPowerAutoPowerOff = hadc->Init.LowPowerAutoPowerOff;
1374 tmp_hal_status = ADC_Enable(&tmp_hadc_slave);
1375 }
1376
1377 /* Start multimode conversion of ADCs pair */
1378 if (tmp_hal_status == HAL_OK)
1379 {
1380 /* Set ADC state */
1381 ADC_STATE_CLR_SET(hadc->State,
1382 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR \
1383 | HAL_ADC_STATE_REG_EOSMP),
1384 HAL_ADC_STATE_REG_BUSY);
1385
1386 /* Set ADC error code to none */
1387 ADC_CLEAR_ERRORCODE(hadc);
1388
1389 /* Set the DMA transfer complete callback */
1390 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1391
1392 /* Set the DMA half transfer complete callback */
1393 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1394
1395 /* Set the DMA error callback */
1396 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1397
1398 /* Pointer to the common control register */
1399 tmp_adc_common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1400
1401 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
1402 /* start (in case of SW start): */
1403
1404 /* Clear regular group conversion flag and overrun flag */
1405 /* (To ensure of no unknown state from potential previous ADC operations) */
1406 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
1407
1408 /* Process unlocked */
1409 /* Unlock before starting ADC conversions: in case of potential */
1410 /* interruption, to let the process to ADC IRQ Handler. */
1411 __HAL_UNLOCK(hadc);
1412
1413 /* Enable ADC overrun interrupt */
1414 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1415
1416 /* Length should be converted to number of bytes */
1417 LengthInBytes = (uint32_t)(Length * 4U);
1418
1419 /* Start the DMA channel */
1420 if ((hadc->DMA_Handle->Mode & DMA_LINKEDLIST) == DMA_LINKEDLIST)
1421 {
1422 if ((hadc->DMA_Handle->LinkedListQueue != NULL) && (hadc->DMA_Handle->LinkedListQueue->Head != NULL))
1423 {
1424 hadc->DMA_Handle->LinkedListQueue->Head->LinkRegisters[NODE_CBR1_DEFAULT_OFFSET] = (LengthInBytes * 2U);
1425 hadc->DMA_Handle->LinkedListQueue->Head->LinkRegisters[NODE_CSAR_DEFAULT_OFFSET] = \
1426 (uint32_t)&tmp_adc_common->CDR2;
1427 hadc->DMA_Handle->LinkedListQueue->Head->LinkRegisters[NODE_CDAR_DEFAULT_OFFSET] = (uint32_t)pData;
1428 tmp_hal_status = HAL_DMAEx_List_Start_IT(hadc->DMA_Handle);
1429 }
1430 else
1431 {
1432 tmp_hal_status = HAL_ERROR;
1433 };
1434 }
1435 else
1436 {
1437 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmp_adc_common->CDR2, (uint32_t)pData, \
1438 (LengthInBytes * 2U));
1439 }
1440
1441 /* Enable conversion of regular group. */
1442 /* If software start has been selected, conversion starts immediately. */
1443 /* If external trigger has been selected, conversion will start at next */
1444 /* trigger event. */
1445 /* Start ADC group regular conversion */
1446 LL_ADC_REG_StartConversion(hadc->Instance);
1447 }
1448 else
1449 {
1450 /* Process unlocked */
1451 __HAL_UNLOCK(hadc);
1452 }
1453
1454 /* Return function status */
1455 return tmp_hal_status;
1456 }
1457 }
1458
1459 /**
1460 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
1461 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1462 * @retval The converted data values.
1463 */
HAL_ADCEx_MultiModeGetValue_Data32(const ADC_HandleTypeDef * hadc)1464 uint32_t HAL_ADCEx_MultiModeGetValue_Data32(const ADC_HandleTypeDef *hadc)
1465 {
1466 const ADC_Common_TypeDef *tmpADC_Common;
1467
1468 /* Check the parameters */
1469 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1470
1471 /* Prevent unused argument(s) compilation warning if no assert_param check */
1472 /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1473 UNUSED(hadc);
1474
1475 /* Pointer to the common control register */
1476 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1477
1478 /* Return the multi mode conversion value */
1479 return tmpADC_Common->CDR2;
1480 }
1481 #endif /* ADC_MULTIMODE_SUPPORT */
1482
1483 /**
1484 * @brief Get ADC injected group conversion result.
1485 * @note Reading register JDRx automatically clears ADC flag JEOC
1486 * (ADC group injected end of unitary conversion).
1487 * @note This function does not clear ADC flag JEOS
1488 * (ADC group injected end of sequence conversion)
1489 * Occurrence of flag JEOS rising:
1490 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
1491 * to flag JEOC.
1492 * - If sequencer is composed of several ranks, during the scan
1493 * sequence flag JEOC only is raised, at the end of the scan sequence
1494 * both flags JEOC and EOS are raised.
1495 * Flag JEOS must not be cleared by this function because
1496 * it would not be compliant with low power features
1497 * (feature low power auto-wait, not available on all STM32 families).
1498 * To clear this flag, either use function:
1499 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1500 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
1501 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
1502 * @param hadc ADC handle
1503 * @param InjectedRank the converted ADC injected rank.
1504 * This parameter can be one of the following values:
1505 * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
1506 * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
1507 * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
1508 * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
1509 * @retval ADC group injected conversion data
1510 */
HAL_ADCEx_InjectedGetValue(const ADC_HandleTypeDef * hadc,uint32_t InjectedRank)1511 uint32_t HAL_ADCEx_InjectedGetValue(const ADC_HandleTypeDef *hadc, uint32_t InjectedRank)
1512 {
1513 uint32_t tmp_jdr;
1514
1515 /* Check the parameters */
1516 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1517 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
1518
1519 /* Get ADC converted value */
1520 switch (InjectedRank)
1521 {
1522 case ADC_INJECTED_RANK_4:
1523 tmp_jdr = hadc->Instance->JDR4;
1524 break;
1525 case ADC_INJECTED_RANK_3:
1526 tmp_jdr = hadc->Instance->JDR3;
1527 break;
1528 case ADC_INJECTED_RANK_2:
1529 tmp_jdr = hadc->Instance->JDR2;
1530 break;
1531 case ADC_INJECTED_RANK_1:
1532 default:
1533 tmp_jdr = hadc->Instance->JDR1;
1534 break;
1535 }
1536
1537 return tmp_jdr;
1538 }
1539
1540 /**
1541 * @brief Injected conversion complete callback in non-blocking mode.
1542 * @param hadc ADC handle
1543 * @retval None
1544 */
HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef * hadc)1545 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc)
1546 {
1547 /* Prevent unused argument(s) compilation warning */
1548 UNUSED(hadc);
1549
1550 /* NOTE : This function should not be modified. When the callback is needed,
1551 function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
1552 */
1553 }
1554
1555 /**
1556 * @brief Injected context queue overflow callback.
1557 * @note This callback is called if injected context queue is enabled
1558 (parameter "QueueInjectedContext" in injected channel configuration)
1559 and if a new injected context is set when queue is full (maximum 2
1560 contexts).
1561 * @param hadc ADC handle
1562 * @retval None
1563 */
HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef * hadc)1564 __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc)
1565 {
1566 /* Prevent unused argument(s) compilation warning */
1567 UNUSED(hadc);
1568
1569 /* NOTE : This function should not be modified. When the callback is needed,
1570 function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
1571 */
1572 }
1573
1574 /**
1575 * @brief Analog watchdog 2 callback in non-blocking mode.
1576 * @param hadc ADC handle
1577 * @retval None
1578 */
HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef * hadc)1579 __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc)
1580 {
1581 /* Prevent unused argument(s) compilation warning */
1582 UNUSED(hadc);
1583
1584 /* NOTE : This function should not be modified. When the callback is needed,
1585 function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
1586 */
1587 }
1588
1589 /**
1590 * @brief Analog watchdog 3 callback in non-blocking mode.
1591 * @param hadc ADC handle
1592 * @retval None
1593 */
HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef * hadc)1594 __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc)
1595 {
1596 /* Prevent unused argument(s) compilation warning */
1597 UNUSED(hadc);
1598
1599 /* NOTE : This function should not be modified. When the callback is needed,
1600 function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
1601 */
1602 }
1603
1604
1605 /**
1606 * @brief End Of Sampling callback in non-blocking mode.
1607 * @param hadc ADC handle
1608 * @retval None
1609 */
HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef * hadc)1610 __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc)
1611 {
1612 /* Prevent unused argument(s) compilation warning */
1613 UNUSED(hadc);
1614
1615 /* NOTE : This function should not be modified. When the callback is needed,
1616 function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
1617 */
1618 }
1619
1620
1621 /**
1622 * @brief Stop ADC conversion of regular group (and injected channels in
1623 * case of auto_injection mode), disable ADC peripheral if no
1624 * conversion is on going on injected group.
1625 * @param hadc ADC handle
1626 * @retval HAL status.
1627 */
HAL_ADCEx_RegularStop(ADC_HandleTypeDef * hadc)1628 HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc)
1629 {
1630 HAL_StatusTypeDef tmp_hal_status;
1631
1632 /* Check the parameters */
1633 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1634
1635 __HAL_LOCK(hadc);
1636
1637 /* 1. Stop potential regular conversion on going */
1638 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1639
1640 /* Disable ADC peripheral if regular conversions are effectively stopped
1641 and if no injected conversions are on-going */
1642 if (tmp_hal_status == HAL_OK)
1643 {
1644 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1645 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1646
1647 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1648 {
1649 /* 2. Disable the ADC peripheral */
1650 tmp_hal_status = ADC_Disable(hadc);
1651
1652 /* Check if ADC is effectively disabled */
1653 if (tmp_hal_status == HAL_OK)
1654 {
1655 /* Set ADC state */
1656 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1657 }
1658 }
1659 /* Conversion on injected group is stopped, but ADC not disabled since */
1660 /* conversion on regular group is still running. */
1661 else
1662 {
1663 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1664 }
1665 }
1666
1667 __HAL_UNLOCK(hadc);
1668
1669 return tmp_hal_status;
1670 }
1671
1672
1673 /**
1674 * @brief Stop ADC conversion of ADC groups regular and injected,
1675 * disable interrution of end-of-conversion,
1676 * disable ADC peripheral if no conversion is on going
1677 * on injected group.
1678 * @param hadc ADC handle
1679 * @retval HAL status.
1680 */
HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef * hadc)1681 HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc)
1682 {
1683 HAL_StatusTypeDef tmp_hal_status;
1684
1685 /* Check the parameters */
1686 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1687
1688 __HAL_LOCK(hadc);
1689
1690 /* 1. Stop potential regular conversion on going */
1691 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1692
1693 /* Disable ADC peripheral if conversions are effectively stopped
1694 and if no injected conversion is on-going */
1695 if (tmp_hal_status == HAL_OK)
1696 {
1697 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1698 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1699
1700 /* Disable all regular-related interrupts */
1701 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1702
1703 /* 2. Disable ADC peripheral if no injected conversions are on-going */
1704 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1705 {
1706 tmp_hal_status = ADC_Disable(hadc);
1707 /* if no issue reported */
1708 if (tmp_hal_status == HAL_OK)
1709 {
1710 /* Set ADC state */
1711 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1712 }
1713 }
1714 else
1715 {
1716 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1717 }
1718 }
1719
1720 __HAL_UNLOCK(hadc);
1721
1722 return tmp_hal_status;
1723 }
1724
1725 /**
1726 * @brief Stop ADC conversion of regular group (and injected group in
1727 * case of auto_injection mode), disable ADC DMA transfer, disable
1728 * ADC peripheral if no conversion is on going
1729 * on injected group.
1730 * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
1731 * For multimode (when multimode feature is available),
1732 * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
1733 * @param hadc ADC handle
1734 * @retval HAL status.
1735 */
HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef * hadc)1736 HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc)
1737 {
1738 HAL_StatusTypeDef tmp_hal_status;
1739
1740 /* Check the parameters */
1741 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1742
1743 __HAL_LOCK(hadc);
1744
1745 /* 1. Stop potential regular conversion on going */
1746 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1747
1748 /* Disable ADC peripheral if conversions are effectively stopped
1749 and if no injected conversion is on-going */
1750 if (tmp_hal_status == HAL_OK)
1751 {
1752 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1753 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1754
1755 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1756 MODIFY_REG(hadc->Instance->CFGR1, ADC_CFGR1_DMNGT_0 | ADC_CFGR1_DMNGT_1, 0UL);
1757
1758 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1759 /* while DMA transfer is on going) */
1760 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1761
1762 /* Check if DMA channel effectively disabled */
1763 if (tmp_hal_status != HAL_OK)
1764 {
1765 /* Update ADC state machine to error */
1766 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1767 }
1768
1769 /* Disable ADC overrun interrupt */
1770 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1771
1772 /* 2. Disable the ADC peripheral */
1773 /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1774 /* to keep in memory a potential failing status. */
1775 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1776 {
1777 if (tmp_hal_status == HAL_OK)
1778 {
1779 tmp_hal_status = ADC_Disable(hadc);
1780 }
1781 else
1782 {
1783 (void)ADC_Disable(hadc);
1784 }
1785
1786 /* Check if ADC is effectively disabled */
1787 if (tmp_hal_status == HAL_OK)
1788 {
1789 /* Set ADC state */
1790 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1791 }
1792 }
1793 else
1794 {
1795 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1796 }
1797 }
1798
1799 __HAL_UNLOCK(hadc);
1800
1801 return tmp_hal_status;
1802 }
1803
1804 #if defined(ADC_MULTIMODE_SUPPORT)
1805 /**
1806 * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected
1807 * conversion is on-going.
1808 * @note Multimode is kept enabled after this function. Multimode DMA bits
1809 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1810 * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1811 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1812 * resort to HAL_ADCEx_DisableMultiMode() API.
1813 * @note In case of DMA configured in circular mode, function
1814 * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
1815 * ADC slave, to properly disable the DMA channel.
1816 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1817 * @retval HAL status
1818 */
HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef * hadc)1819 HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1820 {
1821 HAL_StatusTypeDef tmp_hal_status;
1822 ADC_HandleTypeDef tmp_hadc_slave;
1823 uint32_t tmp_hadc_slave_conversion_on_going;
1824 uint32_t tickstart;
1825
1826 /* Check the parameters */
1827 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1828
1829 __HAL_LOCK(hadc);
1830
1831 /* 1. Stop potential multimode conversion on going, on regular groups */
1832 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1833
1834 /* Disable ADC peripheral if conversions are effectively stopped */
1835 if (tmp_hal_status == HAL_OK)
1836 {
1837 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1838 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1839
1840 /* Temporary handle minimum initialization */
1841 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
1842 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
1843
1844 /* Set a temporary handle of the ADC slave associated to the ADC master */
1845 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
1846
1847 if (tmp_hadc_slave.Instance == NULL)
1848 {
1849 /* Update ADC state machine to error */
1850 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1851 __HAL_UNLOCK(hadc);
1852 return HAL_ERROR;
1853 }
1854
1855 /* Procedure to disable the ADC peripheral: wait for conversions */
1856 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1857
1858 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1859 tickstart = HAL_GetTick();
1860
1861 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1862 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1863 || (tmp_hadc_slave_conversion_on_going == 1UL)
1864 )
1865 {
1866 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1867 {
1868 /* Update ADC state machine to error */
1869 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1870
1871 __HAL_UNLOCK(hadc);
1872 return HAL_ERROR;
1873 }
1874
1875 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
1876 }
1877
1878 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1879 /* while DMA transfer is on going) */
1880 /* Note: DMA channel of ADC slave should be stopped after this function */
1881 /* with HAL_ADCEx_RegularStop_DMA() API. */
1882 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1883
1884 /* Check if DMA channel effectively disabled */
1885 if (tmp_hal_status != HAL_OK)
1886 {
1887 /* Update ADC state machine to error */
1888 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1889 }
1890
1891 /* Disable ADC overrun interrupt */
1892 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1893
1894 /* 2. Disable the ADC peripherals: master and slave if no injected */
1895 /* conversion is on-going. */
1896 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1897 /* memory a potential failing status. */
1898 if (tmp_hal_status == HAL_OK)
1899 {
1900 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1901 {
1902 tmp_hal_status = ADC_Disable(hadc);
1903 if (tmp_hal_status == HAL_OK)
1904 {
1905 if (LL_ADC_INJ_IsConversionOngoing((&tmp_hadc_slave)->Instance) == 0UL)
1906 {
1907 tmp_hal_status = ADC_Disable(&tmp_hadc_slave);
1908 }
1909 }
1910 }
1911
1912 if (tmp_hal_status == HAL_OK)
1913 {
1914 /* Both Master and Slave ADC's could be disabled. Update Master State */
1915 /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
1916 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1917 }
1918 else
1919 {
1920 /* injected (Master or Slave) conversions are still on-going,
1921 no Master State change */
1922 }
1923 }
1924 }
1925
1926 __HAL_UNLOCK(hadc);
1927
1928 return tmp_hal_status;
1929 }
1930 #endif /* ADC_MULTIMODE_SUPPORT */
1931
1932 /**
1933 * @}
1934 */
1935
1936 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
1937 * @brief ADC Extended Peripheral Control functions
1938 *
1939 @verbatim
1940 ===============================================================================
1941 ##### Peripheral Control functions #####
1942 ===============================================================================
1943 [..] This section provides functions allowing to:
1944 (+) Configure channels on injected group
1945 (+) Configure multimode when multimode feature is available
1946 (+) Enable or Disable Injected Queue
1947 (+) Disable ADC voltage regulator
1948 (+) Enter ADC deep-power-down mode
1949
1950 @endverbatim
1951 * @{
1952 */
1953
1954 /**
1955 * @brief Configure a channel to be assigned to ADC group injected.
1956 * @note Possibility to update parameters on the fly:
1957 * This function initializes injected group, following calls to this
1958 * function can be used to reconfigure some parameters of structure
1959 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
1960 * The setting of these parameters is conditioned to ADC state:
1961 * Refer to comments of structure "ADC_InjectionConfTypeDef".
1962 * @note In case of usage of internal measurement channels:
1963 * Vbat/VrefInt/TempSensor.
1964 * These internal paths can be disabled using function
1965 * HAL_ADC_DeInit().
1966 * @note Caution: For Injected Context Queue use, a context must be fully
1967 * defined before start of injected conversion. All channels are configured
1968 * consecutively for the same ADC instance. Therefore, the number of calls to
1969 * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
1970 * InjectedNbrOfConversion for each context.
1971 * - Example 1: If 1 context is intended to be used (or if there is no use of the
1972 * Injected Queue Context feature) and if the context contains 3 injected ranks
1973 * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
1974 * called once for each channel (i.e. 3 times) before starting a conversion.
1975 * This function must not be called to configure a 4th injected channel:
1976 * it would start a new context into context queue.
1977 * - Example 2: If 2 contexts are intended to be used and each of them contains
1978 * 3 injected ranks (InjectedNbrOfConversion = 3),
1979 * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
1980 * for each context (3 channels x 2 contexts = 6 calls). Conversion can
1981 * start once the 1st context is set, that is after the first three
1982 * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
1983 * @param hadc ADC handle
1984 * @param pConfigInjected Structure of ADC injected group and ADC channel for
1985 * injected group.
1986 * @retval HAL status
1987 */
HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef * hadc,ADC_InjectionConfTypeDef * pConfigInjected)1988 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef *pConfigInjected)
1989 {
1990 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1991 uint32_t tmp_offset_shifted;
1992 uint32_t tmp_config_internal_channel;
1993 uint32_t tmp_adc_is_conversion_on_going_regular;
1994 uint32_t tmp_adc_is_conversion_on_going_injected;
1995 __IO uint32_t wait_loop_index;
1996 uint32_t tmp_jsqr_context_queue_being_built = 0U;
1997 uint32_t tmp_channel;
1998
1999 /* Check the parameters */
2000 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2001 assert_param(IS_ADC_SAMPLE_TIME(pConfigInjected->InjectedSamplingTime));
2002 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(pConfigInjected->InjectedSingleDiff));
2003 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->AutoInjectedConv));
2004 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(pConfigInjected->ExternalTrigInjecConvEdge));
2005 assert_param(IS_ADC_EXTTRIGINJEC(pConfigInjected->ExternalTrigInjecConv));
2006 assert_param(IS_ADC_OFFSET_NUMBER(pConfigInjected->InjectedOffsetNumber));
2007 assert_param(IS_ADC_OFFSET_SIGN(pConfigInjected->InjectedOffsetSign));
2008 assert_param(IS_ADC_RANGE(hadc->Instance, ADC_GET_RESOLUTION(hadc), pConfigInjected->InjectedOffset));
2009 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjecOversamplingMode));
2010
2011 if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
2012 {
2013 assert_param(IS_ADC_INJECTED_RANK(pConfigInjected->InjectedRank));
2014 assert_param(IS_ADC_INJECTED_NB_CONV(pConfigInjected->InjectedNbrOfConversion));
2015 assert_param(IS_FUNCTIONAL_STATE(pConfigInjected->InjectedDiscontinuousConvMode));
2016 }
2017
2018 /* Check offset range according to oversampling setting */
2019 if (hadc->Init.OversamplingMode == ENABLE)
2020 {
2021 assert_param(IS_ADC_RANGE(hadc->Instance, ADC_GET_RESOLUTION(hadc),
2022 pConfigInjected->InjectedOffset / (hadc->Init.Oversampling.Ratio + 1U)));
2023 }
2024 else
2025 {
2026 assert_param(IS_ADC_RANGE(hadc->Instance, ADC_GET_RESOLUTION(hadc), pConfigInjected->InjectedOffset));
2027 }
2028
2029 /* JDISCEN and JAUTO bits can't be set at the same time */
2030 assert_param(!((pConfigInjected->InjectedDiscontinuousConvMode == ENABLE) \
2031 && (pConfigInjected->AutoInjectedConv == ENABLE)));
2032
2033 /* DISCEN and JAUTO bits can't be set at the same time */
2034 assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (pConfigInjected->AutoInjectedConv == ENABLE)));
2035
2036 /* Verification of channel number */
2037 if (pConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
2038 {
2039 assert_param(IS_ADC_CHANNEL(pConfigInjected->InjectedChannel));
2040 }
2041 else
2042 {
2043 if (hadc->Instance != ADC4) /* ADC1 or ADC2 */
2044 {
2045 #if defined (ADC2)
2046 assert_param(IS_ADC12_DIFF_CHANNEL(pConfigInjected->InjectedChannel));
2047 #else
2048 assert_param(IS_ADC1_DIFF_CHANNEL(pConfigInjected->InjectedChannel));
2049 #endif /* ADC2 */
2050 }
2051 }
2052
2053 __HAL_LOCK(hadc);
2054
2055 /* Configuration of injected group sequencer: */
2056 /* Hardware constraint: Must fully define injected context register JSQR */
2057 /* before make it entering into injected sequencer queue. */
2058 /* */
2059 /* - if scan mode is disabled: */
2060 /* * Injected channels sequence length is set to 0x00: 1 channel */
2061 /* converted (channel on injected rank 1) */
2062 /* Parameter "InjectedNbrOfConversion" is discarded. */
2063 /* * Injected context register JSQR setting is simple: register is fully */
2064 /* defined on one call of this function (for injected rank 1) and can */
2065 /* be entered into queue directly. */
2066 /* - if scan mode is enabled: */
2067 /* * Injected channels sequence length is set to parameter */
2068 /* "InjectedNbrOfConversion". */
2069 /* * Injected context register JSQR setting more complex: register is */
2070 /* fully defined over successive calls of this function, for each */
2071 /* injected channel rank. It is entered into queue only when all */
2072 /* injected ranks have been set. */
2073 /* Note: Scan mode is not present by hardware on this device, but used */
2074 /* by software for alignment over all STM32 devices. */
2075
2076 if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
2077 (pConfigInjected->InjectedNbrOfConversion == 1U))
2078 {
2079 /* Configuration of context register JSQR: */
2080 /* - number of ranks in injected group sequencer: fixed to 1st rank */
2081 /* (scan mode disabled, only rank 1 used) */
2082 /* - external trigger to start conversion */
2083 /* - external trigger polarity */
2084 /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
2085
2086 if (pConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
2087 {
2088 /* Enable external trigger if trigger selection is different of */
2089 /* software start. */
2090 /* Note: This configuration keeps the hardware feature of parameter */
2091 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
2092 /* software start. */
2093 if (pConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
2094 {
2095 tmp_jsqr_context_queue_being_built = (ADC_JSQR_RK(pConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1)
2096 | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
2097 | pConfigInjected->ExternalTrigInjecConvEdge
2098 );
2099 }
2100 else
2101 {
2102 tmp_jsqr_context_queue_being_built = (ADC_JSQR_RK(pConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1));
2103 }
2104
2105 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_jsqr_context_queue_being_built);
2106 /* For debug and informative reasons, hadc handle saves JSQR setting */
2107 hadc->InjectionConfig.ContextQueue = tmp_jsqr_context_queue_being_built;
2108 }
2109 }
2110 else
2111 {
2112 /* Case of scan mode enabled, several channels to set into injected group */
2113 /* sequencer. */
2114 /* */
2115 /* Procedure to define injected context register JSQR over successive */
2116 /* calls of this function, for each injected channel rank: */
2117 /* 1. Start new context and set parameters related to all injected */
2118 /* channels: injected sequence length and trigger. */
2119
2120 /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
2121 /* call of the context under setting */
2122 if (hadc->InjectionConfig.ChannelCount == 0U)
2123 {
2124 /* Initialize number of channels that will be configured on the context */
2125 /* being built */
2126 hadc->InjectionConfig.ChannelCount = pConfigInjected->InjectedNbrOfConversion;
2127 /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
2128 call, this context will be written in JSQR register at the last call.
2129 At this point, the context is merely reset */
2130 hadc->InjectionConfig.ContextQueue = 0x00000000U;
2131
2132 /* Configuration of context register JSQR: */
2133 /* - number of ranks in injected group sequencer */
2134 /* - external trigger to start conversion */
2135 /* - external trigger polarity */
2136
2137 /* Enable external trigger if trigger selection is different of */
2138 /* software start. */
2139 /* Note: This configuration keeps the hardware feature of parameter */
2140 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
2141 /* software start. */
2142 if (pConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
2143 {
2144 tmp_jsqr_context_queue_being_built = ((pConfigInjected->InjectedNbrOfConversion - 1U)
2145 | (pConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
2146 | pConfigInjected->ExternalTrigInjecConvEdge
2147 );
2148 }
2149 else
2150 {
2151 tmp_jsqr_context_queue_being_built = ((pConfigInjected->InjectedNbrOfConversion - 1U));
2152 }
2153 }
2154
2155 /* 2. Continue setting of context under definition with parameter */
2156 /* related to each channel: channel rank sequence */
2157 /* Clear the old JSQx bits for the selected rank */
2158 tmp_jsqr_context_queue_being_built &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, pConfigInjected->InjectedRank);
2159
2160 /* Set the JSQx bits for the selected rank */
2161 tmp_jsqr_context_queue_being_built |= ADC_JSQR_RK(pConfigInjected->InjectedChannel, pConfigInjected->InjectedRank);
2162
2163 /* Decrease channel count */
2164 hadc->InjectionConfig.ChannelCount--;
2165
2166 /* 3. tmp_jsqr_context_queue_being_built is fully built for this HAL_ADCEx_InjectedConfigChannel()
2167 call, aggregate the setting to those already built during the previous
2168 HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
2169 hadc->InjectionConfig.ContextQueue |= tmp_jsqr_context_queue_being_built;
2170
2171 /* 4. End of context setting: if this is the last channel set, then write context
2172 into register JSQR and make it enter into queue */
2173 if (hadc->InjectionConfig.ChannelCount == 0U)
2174 {
2175 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
2176 }
2177 }
2178
2179 /* Parameters update conditioned to ADC state: */
2180 /* Parameters that can be updated when ADC is disabled or enabled without */
2181 /* conversion on going on injected group: */
2182 /* - Injected context queue: Queue disable (active context is kept) or */
2183 /* enable (context decremented, up to 2 contexts queued) */
2184 /* - Injected discontinuous mode: can be enabled only if auto-injected */
2185 /* mode is disabled. */
2186 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
2187 {
2188 /* ADC channels preselection */
2189 hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel) & 0x1FUL));
2190
2191 /* If auto-injected mode is disabled: no constraint */
2192 if (pConfigInjected->AutoInjectedConv == DISABLE)
2193 {
2194 MODIFY_REG(hadc->Instance->CFGR1,
2195 ADC_CFGR1_JDISCEN,
2196 ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)pConfigInjected->InjectedDiscontinuousConvMode));
2197 }
2198 /* If auto-injected mode is enabled: Injected discontinuous setting is */
2199 /* discarded. */
2200 else
2201 {
2202 MODIFY_REG(hadc->Instance->CFGR1,
2203 ADC_CFGR1_JDISCEN,
2204 ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)pConfigInjected->InjectedDiscontinuousConvMode));
2205 }
2206 }
2207
2208 /* Parameters update conditioned to ADC state: */
2209 /* Parameters that can be updated when ADC is disabled or enabled without */
2210 /* conversion on going on regular and injected groups: */
2211 /* - Automatic injected conversion: can be enabled if injected group */
2212 /* external triggers are disabled. */
2213 /* - Channel sampling time */
2214 /* - Channel offset */
2215 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2216 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2217
2218 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2219 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2220 )
2221 {
2222 /* If injected group external triggers are disabled (set to injected */
2223 /* software start): no constraint */
2224 if ((pConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
2225 || (pConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
2226 {
2227 if (pConfigInjected->AutoInjectedConv == ENABLE)
2228 {
2229 SET_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO);
2230 }
2231 else
2232 {
2233 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO);
2234 }
2235 }
2236 /* If Automatic injected conversion was intended to be set and could not */
2237 /* due to injected group external triggers enabled, error is reported. */
2238 else
2239 {
2240 if (pConfigInjected->AutoInjectedConv == ENABLE)
2241 {
2242 /* Update ADC state machine to error */
2243 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2244
2245 tmp_hal_status = HAL_ERROR;
2246 }
2247 else
2248 {
2249 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO);
2250 }
2251 }
2252
2253 if (pConfigInjected->InjecOversamplingMode == ENABLE)
2254 {
2255 assert_param(IS_ADC_OVERSAMPLING_RATIO(pConfigInjected->InjecOversampling.Ratio));
2256 assert_param(IS_ADC12_RIGHT_BIT_SHIFT(pConfigInjected->InjecOversampling.RightBitShift));
2257
2258 /* JOVSE must be reset in case of triggered regular mode */
2259 assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) ==
2260 (ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS)));
2261
2262 /* Configuration of Injected Oversampler: */
2263 /* - Oversampling Ratio */
2264 /* - Right bit shift */
2265
2266 /* Enable OverSampling mode */
2267 MODIFY_REG(hadc->Instance->CFGR2,
2268 ADC_CFGR2_JOVSE | ADC_CFGR2_OVSR | ADC_CFGR2_OVSS,
2269 ADC_CFGR2_JOVSE | (pConfigInjected->InjecOversampling.Ratio << ADC_CFGR2_OVSR_Pos) |
2270 pConfigInjected->InjecOversampling.RightBitShift);
2271 }
2272 else
2273 {
2274 /* Disable Regular OverSampling */
2275 CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
2276 }
2277
2278 /* Set sampling time of the selected ADC channel */
2279 LL_ADC_SetChannelSamplingTime(hadc->Instance, pConfigInjected->InjectedChannel,
2280 pConfigInjected->InjectedSamplingTime);
2281
2282 /* Configure the offset: offset enable/disable, channel, offset value */
2283
2284 /* Shift the offset with respect to the selected ADC resolution. */
2285 /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
2286 tmp_offset_shifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, pConfigInjected->InjectedOffset);
2287
2288 if (pConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
2289 {
2290 /* Set ADC selected offset number */
2291 LL_ADC_SetOffset(hadc->Instance, pConfigInjected->InjectedOffsetNumber, pConfigInjected->InjectedChannel,
2292 tmp_offset_shifted);
2293 /* Set ADC selected offset sign */
2294 LL_ADC_SetOffsetSign(hadc->Instance, pConfigInjected->InjectedOffsetNumber, pConfigInjected->InjectedOffsetSign);
2295
2296 /* Configure offset saturation */
2297 if (pConfigInjected->InjectedOffsetSaturation == ENABLE)
2298 {
2299 /* Set ADC selected offset unsigned/signed saturation */
2300 LL_ADC_SetOffsetUnsignedSaturation(hadc->Instance, pConfigInjected->InjectedOffsetNumber,
2301 (pConfigInjected->InjectedOffsetSignedSaturation == DISABLE)
2302 ? LL_ADC_OFFSET_UNSIGNED_SATURATION_ENABLE \
2303 : LL_ADC_OFFSET_UNSIGNED_SATURATION_DISABLE);
2304
2305 LL_ADC_SetOffsetSignedSaturation(hadc->Instance, pConfigInjected->InjectedOffsetNumber,
2306 (pConfigInjected->InjectedOffsetSignedSaturation == ENABLE)
2307 ? LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE \
2308 : LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
2309 }
2310 else
2311 {
2312 /* Disable ADC offset signed saturation */
2313 LL_ADC_SetOffsetUnsignedSaturation(hadc->Instance, pConfigInjected->InjectedOffsetNumber,
2314 LL_ADC_OFFSET_UNSIGNED_SATURATION_DISABLE);
2315 LL_ADC_SetOffsetSignedSaturation(hadc->Instance, pConfigInjected->InjectedOffsetNumber,
2316 LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE);
2317 }
2318 }
2319 else
2320 {
2321 /* Scan each offset register to check if the selected channel is targeted. */
2322 /* If this is the case, the corresponding offset number is disabled. */
2323 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1))
2324 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
2325 {
2326 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_1, pConfigInjected->InjectedChannel, 0x0);
2327 }
2328 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2))
2329 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
2330 {
2331 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_2, pConfigInjected->InjectedChannel, 0x0);
2332 }
2333 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3))
2334 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
2335 {
2336 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_3, pConfigInjected->InjectedChannel, 0x0);
2337 }
2338 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4))
2339 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel))
2340 {
2341 LL_ADC_SetOffset(hadc->Instance, LL_ADC_OFFSET_4, pConfigInjected->InjectedChannel, 0x0);
2342 }
2343 }
2344 }
2345
2346 /* Parameters update conditioned to ADC state: */
2347 /* Parameters that can be updated only when ADC is disabled: */
2348 /* - Single or differential mode */
2349 /* - Internal measurement channels: Vbat/VrefInt/TempSensor */
2350 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2351 {
2352 /* Set mode single-ended or differential input of the selected ADC channel */
2353 LL_ADC_SetChannelSingleDiff(hadc->Instance, pConfigInjected->InjectedChannel, pConfigInjected->InjectedSingleDiff);
2354
2355 /* Configuration of differential mode */
2356 /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */
2357 if (pConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
2358 {
2359 /* Set sampling time of the selected ADC channel */
2360 tmp_channel = __LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB(pConfigInjected->InjectedChannel) \
2361 + 1UL) & 0x1FUL);
2362 LL_ADC_SetChannelSamplingTime(hadc->Instance, tmp_channel, pConfigInjected->InjectedSamplingTime);
2363 }
2364
2365 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
2366 /* internal measurement paths enable: If internal channel selected, */
2367 /* enable dedicated internal buffers and path. */
2368 /* Note: these internal measurement paths can be disabled using */
2369 /* HAL_ADC_DeInit(). */
2370
2371 if (__LL_ADC_IS_CHANNEL_INTERNAL(pConfigInjected->InjectedChannel))
2372 {
2373 /* Configuration of common ADC parameters (continuation) */
2374 /* Software is allowed to change common parameters only when all ADCs */
2375 /* of the common group are disabled. */
2376 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2377 {
2378 tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
2379
2380 /* If the requested internal measurement path has already been enabled, */
2381 /* bypass the configuration processing. */
2382 if ((pConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
2383 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL))
2384 {
2385 if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
2386 {
2387 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2388 LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel);
2389
2390 /* Delay for temperature sensor stabilization time */
2391 /* Wait loop initialization and execution */
2392 /* Note: Variable divided by 2 to compensate partially */
2393 /* CPU processing cycles, scaling in us split to not */
2394 /* exceed 32 bits register capacity and handle low frequency. */
2395 wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL)));
2396 while (wait_loop_index != 0UL)
2397 {
2398 wait_loop_index--;
2399 }
2400 }
2401 }
2402 else if ((pConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
2403 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL))
2404 {
2405 if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
2406 {
2407 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2408 LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel);
2409 }
2410 }
2411 else if ((pConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
2412 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL))
2413 {
2414 if (ADC_VREFINT_INSTANCE(hadc))
2415 {
2416 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2417 LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel);
2418 }
2419 }
2420 else
2421 {
2422 /* nothing to do */
2423 }
2424 }
2425 /* If the requested internal measurement path has already been enabled */
2426 /* and other ADC of the common group are enabled, internal */
2427 /* measurement paths cannot be enabled. */
2428 else
2429 {
2430 /* Update ADC state machine to error */
2431 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2432
2433 tmp_hal_status = HAL_ERROR;
2434 }
2435 }
2436 }
2437
2438 __HAL_UNLOCK(hadc);
2439
2440 return tmp_hal_status;
2441 }
2442
2443 #if defined(ADC_MULTIMODE_SUPPORT)
2444 /**
2445 * @brief Enable ADC multimode and configure multimode parameters
2446 * @note Possibility to update parameters on the fly:
2447 * This function initializes multimode parameters, following
2448 * calls to this function can be used to reconfigure some parameters
2449 * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
2450 * the ADCs.
2451 * The setting of these parameters is conditioned to ADC state.
2452 * For parameters constraints, see comments of structure
2453 * "ADC_MultiModeTypeDef".
2454 * @note To move back configuration from multimode to single mode, ADC must
2455 * be reset (using function HAL_ADC_Init() ).
2456 * @param hadc Master ADC handle
2457 * @param pMultimode Structure of ADC multimode configuration
2458 * @retval HAL status
2459 */
HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef * hadc,ADC_MultiModeTypeDef * pMultimode)2460 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *pMultimode)
2461 {
2462 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2463 ADC_Common_TypeDef *tmp_adc_common;
2464 ADC_HandleTypeDef tmp_hadc_slave;
2465 uint32_t tmp_hadc_slave_conversion_on_going;
2466
2467 /* Check the parameters */
2468 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2469 assert_param(IS_ADC_MULTIMODE(pMultimode->Mode));
2470 if (pMultimode->Mode != ADC_MODE_INDEPENDENT)
2471 {
2472 assert_param(IS_ADC_DUAL_DATA_MODE(pMultimode->DualModeData));
2473 assert_param(IS_ADC_SAMPLING_DELAY(pMultimode->TwoSamplingDelay));
2474 }
2475
2476 __HAL_LOCK(hadc);
2477
2478 /* Temporary handle minimum initialization */
2479 __HAL_ADC_RESET_HANDLE_STATE(&tmp_hadc_slave);
2480 ADC_CLEAR_ERRORCODE(&tmp_hadc_slave);
2481
2482 ADC_MULTI_SLAVE(hadc, &tmp_hadc_slave);
2483
2484 if (tmp_hadc_slave.Instance == NULL)
2485 {
2486 /* Update ADC state machine to error */
2487 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2488
2489 __HAL_UNLOCK(hadc);
2490
2491 return HAL_ERROR;
2492 }
2493
2494 /* Parameters update conditioned to ADC state: */
2495 /* Parameters that can be updated when ADC is disabled or enabled without */
2496 /* conversion on going on regular group: */
2497 /* - Multimode DMA configuration */
2498 /* - Multimode DMA mode */
2499 tmp_hadc_slave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmp_hadc_slave)->Instance);
2500 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
2501 && (tmp_hadc_slave_conversion_on_going == 0UL))
2502 {
2503 /* Pointer to the common control register */
2504 tmp_adc_common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
2505
2506 /* If multimode is selected, configure all pMultimode parameters. */
2507 /* Otherwise, reset pMultimode parameters (can be used in case of */
2508 /* transition from multimode to independent mode). */
2509 if (pMultimode->Mode != ADC_MODE_INDEPENDENT)
2510 {
2511 MODIFY_REG(tmp_adc_common->CCR, ADC_CCR_DAMDF, pMultimode->DualModeData);
2512
2513 /* Parameters that can be updated only when ADC is disabled: */
2514 /* - Multimode mode selection */
2515 /* - Multimode delay */
2516 /* Note: Delay range depends on selected resolution: */
2517 /* from 1 to 12 clock cycles for 12 bits */
2518 /* from 1 to 10 clock cycles for 10 bits, */
2519 /* from 1 to 8 clock cycles for 8 bits */
2520 /* from 1 to 6 clock cycles for 6 bits */
2521 /* If a higher delay is selected, it will be clipped to maximum delay */
2522 /* range */
2523 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2524 {
2525 MODIFY_REG(tmp_adc_common->CCR, (ADC_CCR_DUAL | ADC_CCR_DELAY), \
2526 (pMultimode->Mode | pMultimode->TwoSamplingDelay));
2527 }
2528 }
2529 else /* ADC_MODE_INDEPENDENT */
2530 {
2531 CLEAR_BIT(tmp_adc_common->CCR, ADC_CCR_DAMDF);
2532
2533 /* Parameters that can be updated only when ADC is disabled: */
2534 /* - Multimode mode selection */
2535 /* - Multimode delay */
2536 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2537 {
2538 CLEAR_BIT(tmp_adc_common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
2539 }
2540 }
2541 }
2542 /* If one of the ADC sharing the same common group is enabled, no update */
2543 /* could be done on neither of the multimode structure parameters. */
2544 else
2545 {
2546 /* Update ADC state machine to error */
2547 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2548 tmp_hal_status = HAL_ERROR;
2549 }
2550
2551 __HAL_UNLOCK(hadc);
2552
2553 return tmp_hal_status;
2554 }
2555 #endif /* ADC_MULTIMODE_SUPPORT */
2556
2557 /**
2558 * @brief Disable ADC voltage regulator.
2559 * @note Disabling voltage regulator allows to save power. This operation can
2560 * be carried out only when ADC is disabled.
2561 * @note To enable again the voltage regulator, the user is expected to
2562 * resort to HAL_ADC_Init() API.
2563 * @param hadc ADC handle
2564 * @retval HAL status
2565 */
HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef * hadc)2566 HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc)
2567 {
2568 HAL_StatusTypeDef tmp_hal_status;
2569
2570 /* Check the parameters */
2571 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2572
2573 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2574 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2575 {
2576 LL_ADC_DisableInternalRegulator(hadc->Instance);
2577 tmp_hal_status = HAL_OK;
2578 }
2579 else
2580 {
2581 tmp_hal_status = HAL_ERROR;
2582 }
2583
2584 return tmp_hal_status;
2585 }
2586
2587 /**
2588 * @brief Enter ADC deep-power-down mode
2589 * @note This mode is achieved in setting DEEPPWD bit and allows to save power
2590 * in reducing leakage currents. It is particularly interesting before
2591 * entering stop modes.
2592 * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
2593 * ADC voltage regulator. This means that this API encompasses
2594 * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
2595 * calibration is lost.
2596 * @note To exit the ADC deep-power-down mode, the user is expected to
2597 * resort to HAL_ADC_Init() API as well as to relaunch a calibration
2598 * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
2599 * saved calibration factor.
2600 * @param hadc ADC handle
2601 * @retval HAL status
2602 */
HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef * hadc)2603 HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc)
2604 {
2605 HAL_StatusTypeDef tmp_hal_status;
2606
2607 /* Check the parameters */
2608 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2609
2610 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2611 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2612 {
2613 LL_ADC_EnableDeepPowerDown(hadc->Instance);
2614 tmp_hal_status = HAL_OK;
2615 }
2616 else
2617 {
2618 tmp_hal_status = HAL_ERROR;
2619 }
2620
2621 return tmp_hal_status;
2622 }
2623
2624 /**
2625 * @}
2626 */
2627
2628 /**
2629 * @}
2630 */
2631
2632 #endif /* HAL_ADC_MODULE_ENABLED */
2633 /**
2634 * @}
2635 */
2636
2637 /**
2638 * @}
2639 */
2640
