1 /**
2 ******************************************************************************
3 * @file stm32mp1xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32mp1xx_ll_usart.h"
22 #include "stm32mp1xx_ll_rcc.h"
23 #include "stm32mp1xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32MP1xx_LL_Driver
31 * @{
32 */
33
34 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Macros
45 * @{
46 */
47
48 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
49 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
50 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
51 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
52 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
53 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
54 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
55 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
56 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
57 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
58 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
59 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
60
61 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
62 * divided by the smallest oversampling used on the USART (i.e. 8) */
63 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500001U)
64
65 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
66 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
67
68 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
69 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
70 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
71 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
72
73 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
74 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
75 || ((__VALUE__) == LL_USART_PARITY_ODD))
76
77 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
78 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
79 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
80
81 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
82 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
83
84 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
85 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
86
87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
88 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
89
90 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
91 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
92
93 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
94 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
95
96 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
97 || ((__VALUE__) == LL_USART_STOPBITS_1) \
98 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
99 || ((__VALUE__) == LL_USART_STOPBITS_2))
100
101 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
102 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
103 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
104 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
105
106 /**
107 * @}
108 */
109
110 /* Private function prototypes -----------------------------------------------*/
111
112 /* Exported functions --------------------------------------------------------*/
113 /** @addtogroup USART_LL_Exported_Functions
114 * @{
115 */
116
117 /** @addtogroup USART_LL_EF_Init
118 * @{
119 */
120
121 /**
122 * @brief De-initialize USART registers (Registers restored to their default values).
123 * @param USARTx USART Instance
124 * @retval An ErrorStatus enumeration value:
125 * - SUCCESS: USART registers are de-initialized
126 * - ERROR: USART registers are not de-initialized
127 */
LL_USART_DeInit(USART_TypeDef * USARTx)128 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
129 {
130 ErrorStatus status = SUCCESS;
131
132 /* Check the parameters */
133 assert_param(IS_UART_INSTANCE(USARTx));
134
135 if (USARTx == USART1)
136 {
137 /* Force reset of USART clock */
138 LL_APB5_GRP1_ForceReset(LL_APB5_GRP1_PERIPH_USART1);
139
140 /* Release reset of USART clock */
141 LL_APB5_GRP1_ReleaseReset(LL_APB5_GRP1_PERIPH_USART1);
142 }
143 else if (USARTx == USART2)
144 {
145 /* Force reset of USART clock */
146 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
147
148 /* Release reset of USART clock */
149 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
150 }
151 else if (USARTx == USART3)
152 {
153 /* Force reset of USART clock */
154 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
155
156 /* Release reset of USART clock */
157 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
158 }
159 else if (USARTx == UART4)
160 {
161 /* Force reset of UART clock */
162 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
163
164 /* Release reset of UART clock */
165 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
166 }
167 else if (USARTx == UART5)
168 {
169 /* Force reset of UART clock */
170 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
171
172 /* Release reset of UART clock */
173 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
174 }
175 else if (USARTx == USART6)
176 {
177 /* Force reset of USART clock */
178 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
179
180 /* Release reset of USART clock */
181 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
182 }
183 else if (USARTx == UART7)
184 {
185 /* Force reset of UART clock */
186 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
187
188 /* Release reset of UART clock */
189 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
190 }
191 else if (USARTx == UART8)
192 {
193 /* Force reset of UART clock */
194 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
195
196 /* Release reset of UART clock */
197 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
198 }
199 else
200 {
201 status = ERROR;
202 }
203
204 return (status);
205 }
206
207 /**
208 * @brief Initialize USART registers according to the specified
209 * parameters in USART_InitStruct.
210 * @note As some bits in USART configuration registers can only be written when
211 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
212 * this function. Otherwise, ERROR result will be returned.
213 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
214 * @param USARTx USART Instance
215 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
216 * that contains the configuration information for the specified USART peripheral.
217 * @retval An ErrorStatus enumeration value:
218 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
219 * - ERROR: Problem occurred during USART Registers initialization
220 */
LL_USART_Init(USART_TypeDef * USARTx,LL_USART_InitTypeDef * USART_InitStruct)221 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
222 {
223 ErrorStatus status = ERROR;
224 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
225
226 /* Check the parameters */
227 assert_param(IS_UART_INSTANCE(USARTx));
228 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
229 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
230 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
231 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
232 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
233 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
234 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
235 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
236
237 /* USART needs to be in disabled state, in order to be able to configure some bits in
238 CRx registers */
239 if (LL_USART_IsEnabled(USARTx) == 0U)
240 {
241 /*---------------------------- USART CR1 Configuration ---------------------
242 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
243 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
244 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
245 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
246 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
247 */
248 MODIFY_REG(USARTx->CR1,
249 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
250 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
251 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
252 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
253
254 /*---------------------------- USART CR2 Configuration ---------------------
255 * Configure USARTx CR2 (Stop bits) with parameters:
256 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
257 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
258 */
259 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
260
261 /*---------------------------- USART CR3 Configuration ---------------------
262 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
263 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
264 * USART_InitStruct->HardwareFlowControl value.
265 */
266 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
267
268 /*---------------------------- USART BRR Configuration ---------------------
269 * Retrieve Clock frequency used for USART Peripheral
270 */
271 if (USARTx == USART1)
272 {
273 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_USART1_CLKSOURCE);
274 }
275 else if (USARTx == USART2)
276 {
277 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART24_CLKSOURCE);
278 }
279 else if (USARTx == USART3)
280 {
281 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART35_CLKSOURCE);
282 }
283 else if (USARTx == UART4)
284 {
285 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART24_CLKSOURCE);
286 }
287 else if (USARTx == UART5)
288 {
289 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART35_CLKSOURCE);
290 }
291 else if (USARTx == USART6)
292 {
293 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_USART6_CLKSOURCE);
294 }
295 else if (USARTx == UART7)
296 {
297 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART78_CLKSOURCE);
298 }
299 else if (USARTx == UART8)
300 {
301 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART78_CLKSOURCE);
302 }
303 else
304 {
305 /* Nothing to do, as error code is already assigned to ERROR value */
306 }
307
308 /* Configure the USART Baud Rate :
309 - prescaler value is required
310 - valid baud rate value (different from 0) is required
311 - Peripheral clock as returned by RCC service, should be valid (different from 0).
312 */
313 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
314 && (USART_InitStruct->BaudRate != 0U))
315 {
316 status = SUCCESS;
317 LL_USART_SetBaudRate(USARTx,
318 periphclk,
319 USART_InitStruct->PrescalerValue,
320 USART_InitStruct->OverSampling,
321 USART_InitStruct->BaudRate);
322
323 /* Check BRR is greater than or equal to 16d */
324 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
325 }
326
327 /*---------------------------- USART PRESC Configuration -----------------------
328 * Configure USARTx PRESC (Prescaler) with parameters:
329 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
330 */
331 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
332 }
333 /* Endif (=> USART not in Disabled state => return ERROR) */
334
335 return (status);
336 }
337
338 /**
339 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
340 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
341 * whose fields will be set to default values.
342 * @retval None
343 */
344
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)345 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
346 {
347 /* Set USART_InitStruct fields to default values */
348 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
349 USART_InitStruct->BaudRate = 9600U;
350 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
351 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
352 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
353 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
354 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
355 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
356 }
357
358 /**
359 * @brief Initialize USART Clock related settings according to the
360 * specified parameters in the USART_ClockInitStruct.
361 * @note As some bits in USART configuration registers can only be written when
362 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
363 * this function. Otherwise, ERROR result will be returned.
364 * @param USARTx USART Instance
365 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
366 * that contains the Clock configuration information for the specified USART peripheral.
367 * @retval An ErrorStatus enumeration value:
368 * - SUCCESS: USART registers related to Clock settings are initialized according
369 * to USART_ClockInitStruct content
370 * - ERROR: Problem occurred during USART Registers initialization
371 */
LL_USART_ClockInit(USART_TypeDef * USARTx,LL_USART_ClockInitTypeDef * USART_ClockInitStruct)372 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
373 {
374 ErrorStatus status = SUCCESS;
375
376 /* Check USART Instance and Clock signal output parameters */
377 assert_param(IS_UART_INSTANCE(USARTx));
378 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
379
380 /* USART needs to be in disabled state, in order to be able to configure some bits in
381 CRx registers */
382 if (LL_USART_IsEnabled(USARTx) == 0U)
383 {
384 /* Ensure USART instance is USART capable */
385 assert_param(IS_USART_INSTANCE(USARTx));
386
387 /* Check clock related parameters */
388 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
389 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
390 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
391
392 /*---------------------------- USART CR2 Configuration -----------------------
393 * Configure USARTx CR2 (Clock signal related bits) with parameters:
394 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
395 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
396 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
397 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
398 */
399 MODIFY_REG(USARTx->CR2,
400 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
401 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
402 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
403 }
404 /* Else (USART not in Disabled state => return ERROR */
405 else
406 {
407 status = ERROR;
408 }
409
410 return (status);
411 }
412
413 /**
414 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
415 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
416 * whose fields will be set to default values.
417 * @retval None
418 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)419 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
420 {
421 /* Set LL_USART_ClockInitStruct fields with default values */
422 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
423 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
424 LL_USART_CLOCK_DISABLE */
425 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
426 LL_USART_CLOCK_DISABLE */
427 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
428 LL_USART_CLOCK_DISABLE */
429 }
430
431 /**
432 * @}
433 */
434
435 /**
436 * @}
437 */
438
439 /**
440 * @}
441 */
442
443 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 */
444
445 /**
446 * @}
447 */
448
449 #endif /* USE_FULL_LL_DRIVER */
450
