1 /**
2   ******************************************************************************
3   * @file    stm32mp1xx_ll_lptim.c
4   * @author  MCD Application Team
5   * @brief   LPTIM LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2019 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32mp1xx_ll_lptim.h"
22 #include "stm32mp1xx_ll_bus.h"
23 #include "stm32mp1xx_ll_rcc.h"
24 
25 
26 #ifdef  USE_FULL_ASSERT
27 #include "stm32_assert.h"
28 #else
29 #define assert_param(expr) ((void)0U)
30 #endif /* USE_FULL_ASSERT */
31 
32 /** @addtogroup STM32MP1xx_LL_Driver
33   * @{
34   */
35 
36 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
37 
38 /** @addtogroup LPTIM_LL
39   * @{
40   */
41 
42 /* Private types -------------------------------------------------------------*/
43 /* Private variables ---------------------------------------------------------*/
44 /* Private constants ---------------------------------------------------------*/
45 /* Private macros ------------------------------------------------------------*/
46 /** @addtogroup LPTIM_LL_Private_Macros
47   * @{
48   */
49 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
50                                              || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
51 
52 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1)   \
53                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2)   \
54                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4)   \
55                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8)   \
56                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16)  \
57                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32)  \
58                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64)  \
59                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
60 
61 #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
62                                          || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
63 
64 #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
65                                                 || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
66 /**
67   * @}
68   */
69 
70 
71 /* Private function prototypes -----------------------------------------------*/
72 /* Private functions ---------------------------------------------------------*/
73 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
74   * @{
75   */
76 /**
77   * @}
78   */
79 /* Exported functions --------------------------------------------------------*/
80 /** @addtogroup LPTIM_LL_Exported_Functions
81   * @{
82   */
83 
84 /** @addtogroup LPTIM_LL_EF_Init
85   * @{
86   */
87 
88 /**
89   * @brief  Set LPTIMx registers to their reset values.
90   * @param  LPTIMx LP Timer instance
91   * @retval An ErrorStatus enumeration value:
92   *          - SUCCESS: LPTIMx registers are de-initialized
93   *          - ERROR: invalid LPTIMx instance
94   */
LL_LPTIM_DeInit(LPTIM_TypeDef * LPTIMx)95 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx)
96 {
97   ErrorStatus result = SUCCESS;
98 
99   /* Check the parameters */
100   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
101 
102   if (LPTIMx == LPTIM1)
103   {
104     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
105     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
106   }
107   else if (LPTIMx == LPTIM2)
108   {
109     LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_LPTIM2);
110     LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_LPTIM2);
111   }
112   else if (LPTIMx == LPTIM3)
113   {
114     LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_LPTIM3);
115     LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_LPTIM3);
116   }
117   else if (LPTIMx == LPTIM4)
118   {
119     LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_LPTIM4);
120     LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_LPTIM4);
121   }
122   else if (LPTIMx == LPTIM5)
123   {
124     LL_APB3_GRP1_ForceReset(LL_APB3_GRP1_PERIPH_LPTIM5);
125     LL_APB3_GRP1_ReleaseReset(LL_APB3_GRP1_PERIPH_LPTIM5);
126   }
127   else
128   {
129     result = ERROR;
130   }
131 
132   return result;
133 }
134 
135 /**
136   * @brief  Set each fields of the LPTIM_InitStruct structure to its default
137   *         value.
138   * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
139   * @retval None
140   */
LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef * LPTIM_InitStruct)141 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
142 {
143   /* Set the default configuration */
144   LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
145   LPTIM_InitStruct->Prescaler   = LL_LPTIM_PRESCALER_DIV1;
146   LPTIM_InitStruct->Waveform    = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
147   LPTIM_InitStruct->Polarity    = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
148 }
149 
150 /**
151   * @brief  Configure the LPTIMx peripheral according to the specified parameters.
152   * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
153   * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
154   * @param  LPTIMx LP Timer Instance
155   * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
156   * @retval An ErrorStatus enumeration value:
157   *          - SUCCESS: LPTIMx instance has been initialized
158   *          - ERROR: LPTIMx instance hasn't been initialized
159   */
LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx,LL_LPTIM_InitTypeDef * LPTIM_InitStruct)160 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
161 {
162   ErrorStatus result = SUCCESS;
163   /* Check the parameters */
164   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
165   assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
166   assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
167   assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
168   assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
169 
170   /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
171      (ENABLE bit is reset to 0).
172   */
173   if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL)
174   {
175     result = ERROR;
176   }
177   else
178   {
179     /* Set CKSEL bitfield according to ClockSource value */
180     /* Set PRESC bitfield according to Prescaler value */
181     /* Set WAVE bitfield according to Waveform value */
182     /* Set WAVEPOL bitfield according to Polarity value */
183     MODIFY_REG(LPTIMx->CFGR,
184                (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL),
185                LPTIM_InitStruct->ClockSource | \
186                LPTIM_InitStruct->Prescaler | \
187                LPTIM_InitStruct->Waveform | \
188                LPTIM_InitStruct->Polarity);
189   }
190 
191   return result;
192 }
193 
194 /**
195   * @brief  Disable the LPTIM instance
196   * @rmtoll CR           ENABLE        LL_LPTIM_Disable
197   * @param  LPTIMx Low-Power Timer instance
198   * @note   The following sequence is required to solve LPTIM disable HW limitation.
199   *         Please check Errata Sheet ES0335 for more details under "MCU may remain
200   *         stuck in LPTIM interrupt when entering Stop mode" section.
201   * @retval None
202   */
LL_LPTIM_Disable(LPTIM_TypeDef * LPTIMx)203 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
204 {
205   LL_RCC_ClocksTypeDef rcc_clock;
206   uint32_t tmpclksource = 0;
207   uint32_t tmpIER;
208   uint32_t tmpCFGR;
209   uint32_t tmpCMP;
210   uint32_t tmpARR;
211   uint32_t primask_bit;
212   uint32_t tmpCFGR2;
213 
214   /* Check the parameters */
215   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
216 
217   /* Enter critical section */
218   primask_bit = __get_PRIMASK();
219   __set_PRIMASK(1) ;
220 
221   /********** Save LPTIM Config *********/
222   /* Save LPTIM source clock */
223   switch ((uint32_t)LPTIMx)
224   {
225     case LPTIM1_BASE:
226       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE);
227       break;
228     case LPTIM2_BASE:
229       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM23_CLKSOURCE);
230       break;
231     case LPTIM3_BASE:
232       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM23_CLKSOURCE);
233       break;
234     case LPTIM4_BASE:
235     case LPTIM5_BASE:
236       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM45_CLKSOURCE);
237       break;
238     default:
239       break;
240   }
241 
242   /* Save LPTIM configuration registers */
243   tmpIER = LPTIMx->IER;
244   tmpCFGR = LPTIMx->CFGR;
245   tmpCMP = LPTIMx->CMP;
246   tmpARR = LPTIMx->ARR;
247   tmpCFGR2 = LPTIMx->CFGR2;
248 
249   /************* Reset LPTIM ************/
250   (void)LL_LPTIM_DeInit(LPTIMx);
251 
252   /********* Restore LPTIM Config *******/
253   LL_RCC_GetSystemClocksFreq(&rcc_clock);
254 
255   if ((tmpCMP != 0UL) || (tmpARR != 0UL))
256   {
257     /* Force LPTIM source kernel clock from APB */
258     switch ((uint32_t)LPTIMx)
259     {
260       case LPTIM1_BASE:
261         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1);
262         break;
263       case LPTIM2_BASE:
264         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM23_CLKSOURCE_PCLK3);
265         break;
266       case LPTIM3_BASE:
267         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM23_CLKSOURCE_PCLK3);
268         break;
269       case LPTIM4_BASE:
270       case LPTIM5_BASE:
271         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM45_CLKSOURCE_PCLK3);
272         break;
273       default:
274         break;
275     }
276 
277     if (tmpCMP != 0UL)
278     {
279       /* Restore CMP and ARR registers (LPTIM should be enabled first) */
280       LPTIMx->CR |= LPTIM_CR_ENABLE;
281       LPTIMx->CMP = tmpCMP;
282 
283       /* Polling on CMP write ok status after above restore operation */
284       do
285       {
286         rcc_clock.MCU_Frequency--; /* Used for timeout */
287       } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.MCU_Frequency) > 0UL));
288 
289       LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
290     }
291 
292     if (tmpARR != 0UL)
293     {
294       LPTIMx->CR |= LPTIM_CR_ENABLE;
295       LPTIMx->ARR = tmpARR;
296 
297       LL_RCC_GetSystemClocksFreq(&rcc_clock);
298       /* Polling on ARR write ok status after above restore operation */
299       do
300       {
301         rcc_clock.MCU_Frequency--; /* Used for timeout */
302       } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.MCU_Frequency) > 0UL));
303 
304       LL_LPTIM_ClearFlag_ARROK(LPTIMx);
305     }
306 
307 
308     /* Restore LPTIM source kernel clock */
309     LL_RCC_SetLPTIMClockSource(tmpclksource);
310   }
311 
312   /* Restore configuration registers (LPTIM should be disabled first) */
313   LPTIMx->CR &= ~(LPTIM_CR_ENABLE);
314   LPTIMx->IER = tmpIER;
315   LPTIMx->CFGR = tmpCFGR;
316   LPTIMx->CFGR2 = tmpCFGR2;
317 
318   /* Exit critical section: restore previous priority mask */
319   __set_PRIMASK(primask_bit);
320 }
321 
322 /**
323   * @}
324   */
325 
326 /**
327   * @}
328   */
329 
330 /**
331   * @}
332   */
333 
334 #endif /* LPTIM1 || LPTIM2 ||  LPTIM3 || LPTIM4 || LPTIM5 */
335 
336 /**
337   * @}
338   */
339 
340 #endif /* USE_FULL_LL_DRIVER */
341