1 /**
2 ******************************************************************************
3 * @file stm32mp1xx_hal_tim_ex.c
4 * @author MCD Application Team
5 * @brief TIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Timer Extended peripheral:
8 * + Time Hall Sensor Interface Initialization
9 * + Time Hall Sensor Interface Start
10 * + Time Complementary signal break and dead time configuration
11 * + Time Master and Slave synchronization configuration
12 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
13 * + Timer remapping capabilities configuration
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2019 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### TIMER Extended features #####
28 ==============================================================================
29 [..]
30 The Timer Extended features include:
31 (#) Complementary outputs with programmable dead-time for :
32 (++) Output Compare
33 (++) PWM generation (Edge and Center-aligned Mode)
34 (++) One-pulse mode output
35 (#) Synchronization circuit to control the timer with external signals and to
36 interconnect several timers together.
37 (#) Break input to put the timer output signals in reset state or in a known state.
38 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
39 positioning purposes
40
41 ##### How to use this driver #####
42 ==============================================================================
43 [..]
44 (#) Initialize the TIM low level resources by implementing the following functions
45 depending on the selected feature:
46 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
47
48 (#) Initialize the TIM low level resources :
49 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
50 (##) TIM pins configuration
51 (+++) Enable the clock for the TIM GPIOs using the following function:
52 __HAL_RCC_GPIOx_CLK_ENABLE();
53 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
54
55 (#) The external Clock can be configured, if needed (the default clock is the
56 internal clock from the APBx), using the following function:
57 HAL_TIM_ConfigClockSource, the clock configuration should be done before
58 any start function.
59
60 (#) Configure the TIM in the desired functioning mode using one of the
61 initialization function of this driver:
62 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
63 Timer Hall Sensor Interface and the commutation event with the corresponding
64 Interrupt and DMA request if needed (Note that One Timer is used to interface
65 with the Hall sensor Interface and another Timer should be used to use
66 the commutation event).
67
68 (#) Activate the TIM peripheral using one of the start functions:
69 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
70 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
71 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
72 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
73
74 @endverbatim
75 ******************************************************************************
76 */
77
78 /* Includes ------------------------------------------------------------------*/
79 #include "stm32mp1xx_hal.h"
80
81 /** @addtogroup STM32MP1xx_HAL_Driver
82 * @{
83 */
84
85 /** @defgroup TIMEx TIMEx
86 * @brief TIM Extended HAL module driver
87 * @{
88 */
89
90 #ifdef HAL_TIM_MODULE_ENABLED
91
92 /* Private typedef -----------------------------------------------------------*/
93 /* Private define ------------------------------------------------------------*/
94 /* Private constants ---------------------------------------------------------*/
95 /** @defgroup TIMEx_Private_Constants TIM Extended Private Constants
96 * @{
97 */
98 /* Timeout for break input rearm */
99 #define TIM_BREAKINPUT_REARM_TIMEOUT 5UL /* 5 milliseconds */
100 /**
101 * @}
102 */
103 /* End of private constants --------------------------------------------------*/
104
105 /* Private macro -------------------------------------------------------------*/
106 /* Private variables ---------------------------------------------------------*/
107 /* Private function prototypes -----------------------------------------------*/
108 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
109
110 /* Exported functions --------------------------------------------------------*/
111 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
112 * @{
113 */
114
115 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
116 * @brief Timer Hall Sensor functions
117 *
118 @verbatim
119 ==============================================================================
120 ##### Timer Hall Sensor functions #####
121 ==============================================================================
122 [..]
123 This section provides functions allowing to:
124 (+) Initialize and configure TIM HAL Sensor.
125 (+) De-initialize TIM HAL Sensor.
126 (+) Start the Hall Sensor Interface.
127 (+) Stop the Hall Sensor Interface.
128 (+) Start the Hall Sensor Interface and enable interrupts.
129 (+) Stop the Hall Sensor Interface and disable interrupts.
130 (+) Start the Hall Sensor Interface and enable DMA transfers.
131 (+) Stop the Hall Sensor Interface and disable DMA transfers.
132
133 @endverbatim
134 * @{
135 */
136 /**
137 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
138 * @param htim TIM Hall Sensor Interface handle
139 * @param sConfig TIM Hall Sensor configuration structure
140 * @retval HAL status
141 */
HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef * htim,TIM_HallSensor_InitTypeDef * sConfig)142 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
143 {
144 TIM_OC_InitTypeDef OC_Config;
145
146 /* Check the TIM handle allocation */
147 if (htim == NULL)
148 {
149 return HAL_ERROR;
150 }
151
152 /* Check the parameters */
153 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
154 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
155 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
156 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
157 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
158 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
159 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
160
161 if (htim->State == HAL_TIM_STATE_RESET)
162 {
163 /* Allocate lock resource and initialize it */
164 htim->Lock = HAL_UNLOCKED;
165
166 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
167 /* Reset interrupt callbacks to legacy week callbacks */
168 TIM_ResetCallback(htim);
169
170 if (htim->HallSensor_MspInitCallback == NULL)
171 {
172 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
173 }
174 /* Init the low level hardware : GPIO, CLOCK, NVIC */
175 htim->HallSensor_MspInitCallback(htim);
176 #else
177 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
178 HAL_TIMEx_HallSensor_MspInit(htim);
179 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
180 }
181
182 /* Set the TIM state */
183 htim->State = HAL_TIM_STATE_BUSY;
184
185 /* Configure the Time base in the Encoder Mode */
186 TIM_Base_SetConfig(htim->Instance, &htim->Init);
187
188 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
189 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
190
191 /* Reset the IC1PSC Bits */
192 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
193 /* Set the IC1PSC value */
194 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
195
196 /* Enable the Hall sensor interface (XOR function of the three inputs) */
197 htim->Instance->CR2 |= TIM_CR2_TI1S;
198
199 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
200 htim->Instance->SMCR &= ~TIM_SMCR_TS;
201 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
202
203 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
204 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
205 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
206
207 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
208 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
209 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
210 OC_Config.OCMode = TIM_OCMODE_PWM2;
211 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
212 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
213 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
214 OC_Config.Pulse = sConfig->Commutation_Delay;
215
216 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
217
218 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
219 register to 101 */
220 htim->Instance->CR2 &= ~TIM_CR2_MMS;
221 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
222
223 /* Initialize the TIM state*/
224 htim->State = HAL_TIM_STATE_READY;
225
226 return HAL_OK;
227 }
228
229 /**
230 * @brief DeInitializes the TIM Hall Sensor interface
231 * @param htim TIM Hall Sensor Interface handle
232 * @retval HAL status
233 */
HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef * htim)234 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
235 {
236 /* Check the parameters */
237 assert_param(IS_TIM_INSTANCE(htim->Instance));
238
239 htim->State = HAL_TIM_STATE_BUSY;
240
241 /* Disable the TIM Peripheral Clock */
242 __HAL_TIM_DISABLE(htim);
243
244 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
245 if (htim->HallSensor_MspDeInitCallback == NULL)
246 {
247 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
248 }
249 /* DeInit the low level hardware */
250 htim->HallSensor_MspDeInitCallback(htim);
251 #else
252 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
253 HAL_TIMEx_HallSensor_MspDeInit(htim);
254 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
255
256 /* Change TIM state */
257 htim->State = HAL_TIM_STATE_RESET;
258
259 /* Release Lock */
260 __HAL_UNLOCK(htim);
261
262 return HAL_OK;
263 }
264
265 /**
266 * @brief Initializes the TIM Hall Sensor MSP.
267 * @param htim TIM Hall Sensor Interface handle
268 * @retval None
269 */
HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef * htim)270 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
271 {
272 /* Prevent unused argument(s) compilation warning */
273 UNUSED(htim);
274
275 /* NOTE : This function should not be modified, when the callback is needed,
276 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
277 */
278 }
279
280 /**
281 * @brief DeInitializes TIM Hall Sensor MSP.
282 * @param htim TIM Hall Sensor Interface handle
283 * @retval None
284 */
HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef * htim)285 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
286 {
287 /* Prevent unused argument(s) compilation warning */
288 UNUSED(htim);
289
290 /* NOTE : This function should not be modified, when the callback is needed,
291 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
292 */
293 }
294
295 /**
296 * @brief Starts the TIM Hall Sensor Interface.
297 * @param htim TIM Hall Sensor Interface handle
298 * @retval HAL status
299 */
HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef * htim)300 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
301 {
302 uint32_t tmpsmcr;
303
304 /* Check the parameters */
305 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
306
307 /* Enable the Input Capture channel 1
308 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
309 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
310
311 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
312 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
313 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
314 {
315 __HAL_TIM_ENABLE(htim);
316 }
317
318 /* Return function status */
319 return HAL_OK;
320 }
321
322 /**
323 * @brief Stops the TIM Hall sensor Interface.
324 * @param htim TIM Hall Sensor Interface handle
325 * @retval HAL status
326 */
HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef * htim)327 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
328 {
329 /* Check the parameters */
330 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
331
332 /* Disable the Input Capture channels 1, 2 and 3
333 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
334 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
335
336 /* Disable the Peripheral */
337 __HAL_TIM_DISABLE(htim);
338
339 /* Return function status */
340 return HAL_OK;
341 }
342
343 /**
344 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
345 * @param htim TIM Hall Sensor Interface handle
346 * @retval HAL status
347 */
HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef * htim)348 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
349 {
350 uint32_t tmpsmcr;
351
352 /* Check the parameters */
353 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
354
355 /* Enable the capture compare Interrupts 1 event */
356 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
357
358 /* Enable the Input Capture channel 1
359 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
360 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
361
362 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
363 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
364 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
365 {
366 __HAL_TIM_ENABLE(htim);
367 }
368
369 /* Return function status */
370 return HAL_OK;
371 }
372
373 /**
374 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
375 * @param htim TIM Hall Sensor Interface handle
376 * @retval HAL status
377 */
HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef * htim)378 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
379 {
380 /* Check the parameters */
381 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
382
383 /* Disable the Input Capture channel 1
384 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
385 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
386
387 /* Disable the capture compare Interrupts event */
388 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
389
390 /* Disable the Peripheral */
391 __HAL_TIM_DISABLE(htim);
392
393 /* Return function status */
394 return HAL_OK;
395 }
396
397 /**
398 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
399 * @param htim TIM Hall Sensor Interface handle
400 * @param pData The destination Buffer address.
401 * @param Length The length of data to be transferred from TIM peripheral to memory.
402 * @retval HAL status
403 */
HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef * htim,uint32_t * pData,uint16_t Length)404 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
405 {
406 uint32_t tmpsmcr;
407
408 /* Check the parameters */
409 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
410
411 if (htim->State == HAL_TIM_STATE_BUSY)
412 {
413 return HAL_BUSY;
414 }
415 else if (htim->State == HAL_TIM_STATE_READY)
416 {
417 if (((uint32_t)pData == 0U) && (Length > 0U))
418 {
419 return HAL_ERROR;
420 }
421 else
422 {
423 htim->State = HAL_TIM_STATE_BUSY;
424 }
425 }
426 else
427 {
428 /* nothing to do */
429 }
430 /* Enable the Input Capture channel 1
431 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
432 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
433
434 /* Set the DMA Input Capture 1 Callbacks */
435 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
436 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
437 /* Set the DMA error callback */
438 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
439
440 /* Enable the DMA channel for Capture 1*/
441 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
442 {
443 return HAL_ERROR;
444 }
445 /* Enable the capture compare 1 Interrupt */
446 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
447
448 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
449 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
450 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
451 {
452 __HAL_TIM_ENABLE(htim);
453 }
454
455 /* Return function status */
456 return HAL_OK;
457 }
458
459 /**
460 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
461 * @param htim TIM Hall Sensor Interface handle
462 * @retval HAL status
463 */
HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef * htim)464 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
465 {
466 /* Check the parameters */
467 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
468
469 /* Disable the Input Capture channel 1
470 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
471 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
472
473
474 /* Disable the capture compare Interrupts 1 event */
475 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
476
477 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
478 /* Disable the Peripheral */
479 __HAL_TIM_DISABLE(htim);
480
481 /* Return function status */
482 return HAL_OK;
483 }
484
485 /**
486 * @}
487 */
488
489 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
490 * @brief Timer Complementary Output Compare functions
491 *
492 @verbatim
493 ==============================================================================
494 ##### Timer Complementary Output Compare functions #####
495 ==============================================================================
496 [..]
497 This section provides functions allowing to:
498 (+) Start the Complementary Output Compare/PWM.
499 (+) Stop the Complementary Output Compare/PWM.
500 (+) Start the Complementary Output Compare/PWM and enable interrupts.
501 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
502 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
503 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
504
505 @endverbatim
506 * @{
507 */
508
509 /**
510 * @brief Starts the TIM Output Compare signal generation on the complementary
511 * output.
512 * @param htim TIM Output Compare handle
513 * @param Channel TIM Channel to be enabled
514 * This parameter can be one of the following values:
515 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
516 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
517 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
518 * @retval HAL status
519 */
HAL_TIMEx_OCN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)520 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
521 {
522 uint32_t tmpsmcr;
523
524 /* Check the parameters */
525 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
526
527 /* Enable the Capture compare channel N */
528 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
529
530 /* Enable the Main Output */
531 __HAL_TIM_MOE_ENABLE(htim);
532
533 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
534 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
535 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
536 {
537 __HAL_TIM_ENABLE(htim);
538 }
539
540 /* Return function status */
541 return HAL_OK;
542 }
543
544 /**
545 * @brief Stops the TIM Output Compare signal generation on the complementary
546 * output.
547 * @param htim TIM handle
548 * @param Channel TIM Channel to be disabled
549 * This parameter can be one of the following values:
550 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
551 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
552 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
553 * @retval HAL status
554 */
HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)555 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
556 {
557 /* Check the parameters */
558 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
559
560 /* Disable the Capture compare channel N */
561 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
562
563 /* Disable the Main Output */
564 __HAL_TIM_MOE_DISABLE(htim);
565
566 /* Disable the Peripheral */
567 __HAL_TIM_DISABLE(htim);
568
569 /* Return function status */
570 return HAL_OK;
571 }
572
573 /**
574 * @brief Starts the TIM Output Compare signal generation in interrupt mode
575 * on the complementary output.
576 * @param htim TIM OC handle
577 * @param Channel TIM Channel to be enabled
578 * This parameter can be one of the following values:
579 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
580 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
581 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
582 * @retval HAL status
583 */
HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)584 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
585 {
586 uint32_t tmpsmcr;
587
588 /* Check the parameters */
589 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
590
591 switch (Channel)
592 {
593 case TIM_CHANNEL_1:
594 {
595 /* Enable the TIM Output Compare interrupt */
596 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
597 break;
598 }
599
600 case TIM_CHANNEL_2:
601 {
602 /* Enable the TIM Output Compare interrupt */
603 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
604 break;
605 }
606
607 case TIM_CHANNEL_3:
608 {
609 /* Enable the TIM Output Compare interrupt */
610 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
611 break;
612 }
613
614
615 default:
616 break;
617 }
618
619 /* Enable the TIM Break interrupt */
620 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
621
622 /* Enable the Capture compare channel N */
623 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
624
625 /* Enable the Main Output */
626 __HAL_TIM_MOE_ENABLE(htim);
627
628 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
629 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
630 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
631 {
632 __HAL_TIM_ENABLE(htim);
633 }
634
635 /* Return function status */
636 return HAL_OK;
637 }
638
639 /**
640 * @brief Stops the TIM Output Compare signal generation in interrupt mode
641 * on the complementary output.
642 * @param htim TIM Output Compare handle
643 * @param Channel TIM Channel to be disabled
644 * This parameter can be one of the following values:
645 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
646 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
647 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
648 * @retval HAL status
649 */
HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)650 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
651 {
652 uint32_t tmpccer;
653 /* Check the parameters */
654 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
655
656 switch (Channel)
657 {
658 case TIM_CHANNEL_1:
659 {
660 /* Disable the TIM Output Compare interrupt */
661 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
662 break;
663 }
664
665 case TIM_CHANNEL_2:
666 {
667 /* Disable the TIM Output Compare interrupt */
668 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
669 break;
670 }
671
672 case TIM_CHANNEL_3:
673 {
674 /* Disable the TIM Output Compare interrupt */
675 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
676 break;
677 }
678
679 default:
680 break;
681 }
682
683 /* Disable the Capture compare channel N */
684 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
685
686 /* Disable the TIM Break interrupt (only if no more channel is active) */
687 tmpccer = htim->Instance->CCER;
688 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
689 {
690 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
691 }
692
693 /* Disable the Main Output */
694 __HAL_TIM_MOE_DISABLE(htim);
695
696 /* Disable the Peripheral */
697 __HAL_TIM_DISABLE(htim);
698
699 /* Return function status */
700 return HAL_OK;
701 }
702
703 /**
704 * @brief Starts the TIM Output Compare signal generation in DMA mode
705 * on the complementary output.
706 * @param htim TIM Output Compare handle
707 * @param Channel TIM Channel to be enabled
708 * This parameter can be one of the following values:
709 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
710 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
711 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
712 * @param pData The source Buffer address.
713 * @param Length The length of data to be transferred from memory to TIM peripheral
714 * @retval HAL status
715 */
HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,uint32_t * pData,uint16_t Length)716 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
717 {
718 uint32_t tmpsmcr;
719
720 /* Check the parameters */
721 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
722
723 if (htim->State == HAL_TIM_STATE_BUSY)
724 {
725 return HAL_BUSY;
726 }
727 else if (htim->State == HAL_TIM_STATE_READY)
728 {
729 if (((uint32_t)pData == 0U) && (Length > 0U))
730 {
731 return HAL_ERROR;
732 }
733 else
734 {
735 htim->State = HAL_TIM_STATE_BUSY;
736 }
737 }
738 else
739 {
740 /* nothing to do */
741 }
742
743 switch (Channel)
744 {
745 case TIM_CHANNEL_1:
746 {
747 /* Set the DMA compare callbacks */
748 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
749 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
750
751 /* Set the DMA error callback */
752 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
753
754 /* Enable the DMA channel */
755 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
756 {
757 return HAL_ERROR;
758 }
759 /* Enable the TIM Output Compare DMA request */
760 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
761 break;
762 }
763
764 case TIM_CHANNEL_2:
765 {
766 /* Set the DMA compare callbacks */
767 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
768 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
769
770 /* Set the DMA error callback */
771 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
772
773 /* Enable the DMA channel */
774 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
775 {
776 return HAL_ERROR;
777 }
778 /* Enable the TIM Output Compare DMA request */
779 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
780 break;
781 }
782
783 case TIM_CHANNEL_3:
784 {
785 /* Set the DMA compare callbacks */
786 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
787 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
788
789 /* Set the DMA error callback */
790 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
791
792 /* Enable the DMA channel */
793 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
794 {
795 return HAL_ERROR;
796 }
797 /* Enable the TIM Output Compare DMA request */
798 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
799 break;
800 }
801
802 default:
803 break;
804 }
805
806 /* Enable the Capture compare channel N */
807 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
808
809 /* Enable the Main Output */
810 __HAL_TIM_MOE_ENABLE(htim);
811
812 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
813 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
814 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
815 {
816 __HAL_TIM_ENABLE(htim);
817 }
818
819 /* Return function status */
820 return HAL_OK;
821 }
822
823 /**
824 * @brief Stops the TIM Output Compare signal generation in DMA mode
825 * on the complementary output.
826 * @param htim TIM Output Compare handle
827 * @param Channel TIM Channel to be disabled
828 * This parameter can be one of the following values:
829 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
830 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
831 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
832 * @retval HAL status
833 */
HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)834 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
835 {
836 /* Check the parameters */
837 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
838
839 switch (Channel)
840 {
841 case TIM_CHANNEL_1:
842 {
843 /* Disable the TIM Output Compare DMA request */
844 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
845 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
846 break;
847 }
848
849 case TIM_CHANNEL_2:
850 {
851 /* Disable the TIM Output Compare DMA request */
852 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
853 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
854 break;
855 }
856
857 case TIM_CHANNEL_3:
858 {
859 /* Disable the TIM Output Compare DMA request */
860 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
861 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
862 break;
863 }
864
865 default:
866 break;
867 }
868
869 /* Disable the Capture compare channel N */
870 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
871
872 /* Disable the Main Output */
873 __HAL_TIM_MOE_DISABLE(htim);
874
875 /* Disable the Peripheral */
876 __HAL_TIM_DISABLE(htim);
877
878 /* Change the htim state */
879 htim->State = HAL_TIM_STATE_READY;
880
881 /* Return function status */
882 return HAL_OK;
883 }
884
885 /**
886 * @}
887 */
888
889 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
890 * @brief Timer Complementary PWM functions
891 *
892 @verbatim
893 ==============================================================================
894 ##### Timer Complementary PWM functions #####
895 ==============================================================================
896 [..]
897 This section provides functions allowing to:
898 (+) Start the Complementary PWM.
899 (+) Stop the Complementary PWM.
900 (+) Start the Complementary PWM and enable interrupts.
901 (+) Stop the Complementary PWM and disable interrupts.
902 (+) Start the Complementary PWM and enable DMA transfers.
903 (+) Stop the Complementary PWM and disable DMA transfers.
904 (+) Start the Complementary Input Capture measurement.
905 (+) Stop the Complementary Input Capture.
906 (+) Start the Complementary Input Capture and enable interrupts.
907 (+) Stop the Complementary Input Capture and disable interrupts.
908 (+) Start the Complementary Input Capture and enable DMA transfers.
909 (+) Stop the Complementary Input Capture and disable DMA transfers.
910 (+) Start the Complementary One Pulse generation.
911 (+) Stop the Complementary One Pulse.
912 (+) Start the Complementary One Pulse and enable interrupts.
913 (+) Stop the Complementary One Pulse and disable interrupts.
914
915 @endverbatim
916 * @{
917 */
918
919 /**
920 * @brief Starts the PWM signal generation on the complementary output.
921 * @param htim TIM handle
922 * @param Channel TIM Channel to be enabled
923 * This parameter can be one of the following values:
924 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
925 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
926 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
927 * @retval HAL status
928 */
HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)929 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
930 {
931 uint32_t tmpsmcr;
932
933 /* Check the parameters */
934 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
935
936 /* Enable the complementary PWM output */
937 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
938
939 /* Enable the Main Output */
940 __HAL_TIM_MOE_ENABLE(htim);
941
942 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
943 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
944 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
945 {
946 __HAL_TIM_ENABLE(htim);
947 }
948
949 /* Return function status */
950 return HAL_OK;
951 }
952
953 /**
954 * @brief Stops the PWM signal generation on the complementary output.
955 * @param htim TIM handle
956 * @param Channel TIM Channel to be disabled
957 * This parameter can be one of the following values:
958 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
959 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
960 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
961 * @retval HAL status
962 */
HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)963 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
964 {
965 /* Check the parameters */
966 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
967
968 /* Disable the complementary PWM output */
969 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
970
971 /* Disable the Main Output */
972 __HAL_TIM_MOE_DISABLE(htim);
973
974 /* Disable the Peripheral */
975 __HAL_TIM_DISABLE(htim);
976
977 /* Return function status */
978 return HAL_OK;
979 }
980
981 /**
982 * @brief Starts the PWM signal generation in interrupt mode on the
983 * complementary output.
984 * @param htim TIM handle
985 * @param Channel TIM Channel to be disabled
986 * This parameter can be one of the following values:
987 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
988 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
989 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
990 * @retval HAL status
991 */
HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)992 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
993 {
994 uint32_t tmpsmcr;
995
996 /* Check the parameters */
997 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
998
999 switch (Channel)
1000 {
1001 case TIM_CHANNEL_1:
1002 {
1003 /* Enable the TIM Capture/Compare 1 interrupt */
1004 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1005 break;
1006 }
1007
1008 case TIM_CHANNEL_2:
1009 {
1010 /* Enable the TIM Capture/Compare 2 interrupt */
1011 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1012 break;
1013 }
1014
1015 case TIM_CHANNEL_3:
1016 {
1017 /* Enable the TIM Capture/Compare 3 interrupt */
1018 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
1019 break;
1020 }
1021
1022 default:
1023 break;
1024 }
1025
1026 /* Enable the TIM Break interrupt */
1027 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1028
1029 /* Enable the complementary PWM output */
1030 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1031
1032 /* Enable the Main Output */
1033 __HAL_TIM_MOE_ENABLE(htim);
1034
1035 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1036 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1037 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1038 {
1039 __HAL_TIM_ENABLE(htim);
1040 }
1041
1042 /* Return function status */
1043 return HAL_OK;
1044 }
1045
1046 /**
1047 * @brief Stops the PWM signal generation in interrupt mode on the
1048 * complementary output.
1049 * @param htim TIM handle
1050 * @param Channel TIM Channel to be disabled
1051 * This parameter can be one of the following values:
1052 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1053 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1054 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1055 * @retval HAL status
1056 */
HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1057 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1058 {
1059 uint32_t tmpccer;
1060
1061 /* Check the parameters */
1062 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1063
1064 switch (Channel)
1065 {
1066 case TIM_CHANNEL_1:
1067 {
1068 /* Disable the TIM Capture/Compare 1 interrupt */
1069 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1070 break;
1071 }
1072
1073 case TIM_CHANNEL_2:
1074 {
1075 /* Disable the TIM Capture/Compare 2 interrupt */
1076 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1077 break;
1078 }
1079
1080 case TIM_CHANNEL_3:
1081 {
1082 /* Disable the TIM Capture/Compare 3 interrupt */
1083 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1084 break;
1085 }
1086
1087 default:
1088 break;
1089 }
1090
1091 /* Disable the complementary PWM output */
1092 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1093
1094 /* Disable the TIM Break interrupt (only if no more channel is active) */
1095 tmpccer = htim->Instance->CCER;
1096 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1097 {
1098 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
1099 }
1100
1101 /* Disable the Main Output */
1102 __HAL_TIM_MOE_DISABLE(htim);
1103
1104 /* Disable the Peripheral */
1105 __HAL_TIM_DISABLE(htim);
1106
1107 /* Return function status */
1108 return HAL_OK;
1109 }
1110
1111 /**
1112 * @brief Starts the TIM PWM signal generation in DMA mode on the
1113 * complementary output
1114 * @param htim TIM handle
1115 * @param Channel TIM Channel to be enabled
1116 * This parameter can be one of the following values:
1117 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1118 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1119 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1120 * @param pData The source Buffer address.
1121 * @param Length The length of data to be transferred from memory to TIM peripheral
1122 * @retval HAL status
1123 */
HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,uint32_t * pData,uint16_t Length)1124 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
1125 {
1126 uint32_t tmpsmcr;
1127
1128 /* Check the parameters */
1129 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1130
1131 if (htim->State == HAL_TIM_STATE_BUSY)
1132 {
1133 return HAL_BUSY;
1134 }
1135 else if (htim->State == HAL_TIM_STATE_READY)
1136 {
1137 if (((uint32_t)pData == 0U) && (Length > 0U))
1138 {
1139 return HAL_ERROR;
1140 }
1141 else
1142 {
1143 htim->State = HAL_TIM_STATE_BUSY;
1144 }
1145 }
1146 else
1147 {
1148 /* nothing to do */
1149 }
1150 switch (Channel)
1151 {
1152 case TIM_CHANNEL_1:
1153 {
1154 /* Set the DMA compare callbacks */
1155 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
1156 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1157
1158 /* Set the DMA error callback */
1159 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
1160
1161 /* Enable the DMA channel */
1162 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
1163 {
1164 return HAL_ERROR;
1165 }
1166 /* Enable the TIM Capture/Compare 1 DMA request */
1167 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1168 break;
1169 }
1170
1171 case TIM_CHANNEL_2:
1172 {
1173 /* Set the DMA compare callbacks */
1174 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
1175 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1176
1177 /* Set the DMA error callback */
1178 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
1179
1180 /* Enable the DMA channel */
1181 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
1182 {
1183 return HAL_ERROR;
1184 }
1185 /* Enable the TIM Capture/Compare 2 DMA request */
1186 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1187 break;
1188 }
1189
1190 case TIM_CHANNEL_3:
1191 {
1192 /* Set the DMA compare callbacks */
1193 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
1194 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1195
1196 /* Set the DMA error callback */
1197 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
1198
1199 /* Enable the DMA channel */
1200 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
1201 {
1202 return HAL_ERROR;
1203 }
1204 /* Enable the TIM Capture/Compare 3 DMA request */
1205 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1206 break;
1207 }
1208
1209 default:
1210 break;
1211 }
1212
1213 /* Enable the complementary PWM output */
1214 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1215
1216 /* Enable the Main Output */
1217 __HAL_TIM_MOE_ENABLE(htim);
1218
1219 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1220 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1221 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1222 {
1223 __HAL_TIM_ENABLE(htim);
1224 }
1225
1226 /* Return function status */
1227 return HAL_OK;
1228 }
1229
1230 /**
1231 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1232 * output
1233 * @param htim TIM handle
1234 * @param Channel TIM Channel to be disabled
1235 * This parameter can be one of the following values:
1236 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1237 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1238 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1239 * @retval HAL status
1240 */
HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1241 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1242 {
1243 /* Check the parameters */
1244 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1245
1246 switch (Channel)
1247 {
1248 case TIM_CHANNEL_1:
1249 {
1250 /* Disable the TIM Capture/Compare 1 DMA request */
1251 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1252 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1253 break;
1254 }
1255
1256 case TIM_CHANNEL_2:
1257 {
1258 /* Disable the TIM Capture/Compare 2 DMA request */
1259 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1260 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1261 break;
1262 }
1263
1264 case TIM_CHANNEL_3:
1265 {
1266 /* Disable the TIM Capture/Compare 3 DMA request */
1267 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1268 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1269 break;
1270 }
1271
1272 default:
1273 break;
1274 }
1275
1276 /* Disable the complementary PWM output */
1277 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1278
1279 /* Disable the Main Output */
1280 __HAL_TIM_MOE_DISABLE(htim);
1281
1282 /* Disable the Peripheral */
1283 __HAL_TIM_DISABLE(htim);
1284
1285 /* Change the htim state */
1286 htim->State = HAL_TIM_STATE_READY;
1287
1288 /* Return function status */
1289 return HAL_OK;
1290 }
1291
1292 /**
1293 * @}
1294 */
1295
1296 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1297 * @brief Timer Complementary One Pulse functions
1298 *
1299 @verbatim
1300 ==============================================================================
1301 ##### Timer Complementary One Pulse functions #####
1302 ==============================================================================
1303 [..]
1304 This section provides functions allowing to:
1305 (+) Start the Complementary One Pulse generation.
1306 (+) Stop the Complementary One Pulse.
1307 (+) Start the Complementary One Pulse and enable interrupts.
1308 (+) Stop the Complementary One Pulse and disable interrupts.
1309
1310 @endverbatim
1311 * @{
1312 */
1313
1314 /**
1315 * @brief Starts the TIM One Pulse signal generation on the complementary
1316 * output.
1317 * @param htim TIM One Pulse handle
1318 * @param OutputChannel TIM Channel to be enabled
1319 * This parameter can be one of the following values:
1320 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1321 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1322 * @retval HAL status
1323 */
HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1324 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1325 {
1326 /* Check the parameters */
1327 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1328
1329 /* Enable the complementary One Pulse output */
1330 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1331
1332 /* Enable the Main Output */
1333 __HAL_TIM_MOE_ENABLE(htim);
1334
1335 /* Return function status */
1336 return HAL_OK;
1337 }
1338
1339 /**
1340 * @brief Stops the TIM One Pulse signal generation on the complementary
1341 * output.
1342 * @param htim TIM One Pulse handle
1343 * @param OutputChannel TIM Channel to be disabled
1344 * This parameter can be one of the following values:
1345 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1346 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1347 * @retval HAL status
1348 */
HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1349 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1350 {
1351
1352 /* Check the parameters */
1353 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1354
1355 /* Disable the complementary One Pulse output */
1356 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1357
1358 /* Disable the Main Output */
1359 __HAL_TIM_MOE_DISABLE(htim);
1360
1361 /* Disable the Peripheral */
1362 __HAL_TIM_DISABLE(htim);
1363
1364 /* Return function status */
1365 return HAL_OK;
1366 }
1367
1368 /**
1369 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1370 * complementary channel.
1371 * @param htim TIM One Pulse handle
1372 * @param OutputChannel TIM Channel to be enabled
1373 * This parameter can be one of the following values:
1374 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1375 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1376 * @retval HAL status
1377 */
HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1378 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1379 {
1380 /* Check the parameters */
1381 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1382
1383 /* Enable the TIM Capture/Compare 1 interrupt */
1384 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1385
1386 /* Enable the TIM Capture/Compare 2 interrupt */
1387 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1388
1389 /* Enable the complementary One Pulse output */
1390 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1391
1392 /* Enable the Main Output */
1393 __HAL_TIM_MOE_ENABLE(htim);
1394
1395 /* Return function status */
1396 return HAL_OK;
1397 }
1398
1399 /**
1400 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1401 * complementary channel.
1402 * @param htim TIM One Pulse handle
1403 * @param OutputChannel TIM Channel to be disabled
1404 * This parameter can be one of the following values:
1405 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1406 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1407 * @retval HAL status
1408 */
HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1409 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1410 {
1411 /* Check the parameters */
1412 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1413
1414 /* Disable the TIM Capture/Compare 1 interrupt */
1415 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1416
1417 /* Disable the TIM Capture/Compare 2 interrupt */
1418 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1419
1420 /* Disable the complementary One Pulse output */
1421 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1422
1423 /* Disable the Main Output */
1424 __HAL_TIM_MOE_DISABLE(htim);
1425
1426 /* Disable the Peripheral */
1427 __HAL_TIM_DISABLE(htim);
1428
1429 /* Return function status */
1430 return HAL_OK;
1431 }
1432
1433 /**
1434 * @}
1435 */
1436
1437 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1438 * @brief Peripheral Control functions
1439 *
1440 @verbatim
1441 ==============================================================================
1442 ##### Peripheral Control functions #####
1443 ==============================================================================
1444 [..]
1445 This section provides functions allowing to:
1446 (+) Configure the commutation event in case of use of the Hall sensor interface.
1447 (+) Configure Output channels for OC and PWM mode.
1448
1449 (+) Configure Complementary channels, break features and dead time.
1450 (+) Configure Master synchronization.
1451 (+) Configure timer remapping capabilities.
1452 (+) Select timer input source.
1453 (+) Enable or disable channel grouping.
1454
1455 @endverbatim
1456 * @{
1457 */
1458
1459 /**
1460 * @brief Configure the TIM commutation event sequence.
1461 * @note This function is mandatory to use the commutation event in order to
1462 * update the configuration at each commutation detection on the TRGI input of the Timer,
1463 * the typical use of this feature is with the use of another Timer(interface Timer)
1464 * configured in Hall sensor interface, this interface Timer will generate the
1465 * commutation at its TRGO output (connected to Timer used in this function) each time
1466 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1467 * @param htim TIM handle
1468 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1469 * This parameter can be one of the following values:
1470 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1471 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1472 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1473 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1474 * @arg TIM_TS_NONE: No trigger is needed
1475 * @param CommutationSource the Commutation Event source
1476 * This parameter can be one of the following values:
1477 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1478 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1479 * @retval HAL status
1480 */
HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1481 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1482 uint32_t CommutationSource)
1483 {
1484 /* Check the parameters */
1485 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1486 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1487
1488 __HAL_LOCK(htim);
1489
1490 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1491 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1492 {
1493 /* Select the Input trigger */
1494 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1495 htim->Instance->SMCR |= InputTrigger;
1496 }
1497
1498 /* Select the Capture Compare preload feature */
1499 htim->Instance->CR2 |= TIM_CR2_CCPC;
1500 /* Select the Commutation event source */
1501 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1502 htim->Instance->CR2 |= CommutationSource;
1503
1504 /* Disable Commutation Interrupt */
1505 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1506
1507 /* Disable Commutation DMA request */
1508 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1509
1510 __HAL_UNLOCK(htim);
1511
1512 return HAL_OK;
1513 }
1514
1515 /**
1516 * @brief Configure the TIM commutation event sequence with interrupt.
1517 * @note This function is mandatory to use the commutation event in order to
1518 * update the configuration at each commutation detection on the TRGI input of the Timer,
1519 * the typical use of this feature is with the use of another Timer(interface Timer)
1520 * configured in Hall sensor interface, this interface Timer will generate the
1521 * commutation at its TRGO output (connected to Timer used in this function) each time
1522 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1523 * @param htim TIM handle
1524 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1525 * This parameter can be one of the following values:
1526 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1527 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1528 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1529 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1530 * @arg TIM_TS_NONE: No trigger is needed
1531 * @param CommutationSource the Commutation Event source
1532 * This parameter can be one of the following values:
1533 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1534 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1535 * @retval HAL status
1536 */
HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1537 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1538 uint32_t CommutationSource)
1539 {
1540 /* Check the parameters */
1541 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1542 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1543
1544 __HAL_LOCK(htim);
1545
1546 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1547 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1548 {
1549 /* Select the Input trigger */
1550 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1551 htim->Instance->SMCR |= InputTrigger;
1552 }
1553
1554 /* Select the Capture Compare preload feature */
1555 htim->Instance->CR2 |= TIM_CR2_CCPC;
1556 /* Select the Commutation event source */
1557 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1558 htim->Instance->CR2 |= CommutationSource;
1559
1560 /* Disable Commutation DMA request */
1561 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
1562
1563 /* Enable the Commutation Interrupt */
1564 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1565
1566 __HAL_UNLOCK(htim);
1567
1568 return HAL_OK;
1569 }
1570
1571 /**
1572 * @brief Configure the TIM commutation event sequence with DMA.
1573 * @note This function is mandatory to use the commutation event in order to
1574 * update the configuration at each commutation detection on the TRGI input of the Timer,
1575 * the typical use of this feature is with the use of another Timer(interface Timer)
1576 * configured in Hall sensor interface, this interface Timer will generate the
1577 * commutation at its TRGO output (connected to Timer used in this function) each time
1578 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1579 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1580 * @param htim TIM handle
1581 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1582 * This parameter can be one of the following values:
1583 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1584 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1585 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1586 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1587 * @arg TIM_TS_NONE: No trigger is needed
1588 * @param CommutationSource the Commutation Event source
1589 * This parameter can be one of the following values:
1590 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1591 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1592 * @retval HAL status
1593 */
HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1594 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
1595 uint32_t CommutationSource)
1596 {
1597 /* Check the parameters */
1598 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1599 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1600
1601 __HAL_LOCK(htim);
1602
1603 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1604 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1605 {
1606 /* Select the Input trigger */
1607 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1608 htim->Instance->SMCR |= InputTrigger;
1609 }
1610
1611 /* Select the Capture Compare preload feature */
1612 htim->Instance->CR2 |= TIM_CR2_CCPC;
1613 /* Select the Commutation event source */
1614 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1615 htim->Instance->CR2 |= CommutationSource;
1616
1617 /* Enable the Commutation DMA Request */
1618 /* Set the DMA Commutation Callback */
1619 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1620 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1621 /* Set the DMA error callback */
1622 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1623
1624 /* Disable Commutation Interrupt */
1625 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
1626
1627 /* Enable the Commutation DMA Request */
1628 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1629
1630 __HAL_UNLOCK(htim);
1631
1632 return HAL_OK;
1633 }
1634
1635 /**
1636 * @brief Configures the TIM in master mode.
1637 * @param htim TIM handle.
1638 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1639 * contains the selected trigger output (TRGO) and the Master/Slave
1640 * mode.
1641 * @retval HAL status
1642 */
HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef * htim,TIM_MasterConfigTypeDef * sMasterConfig)1643 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
1644 TIM_MasterConfigTypeDef *sMasterConfig)
1645 {
1646 uint32_t tmpcr2;
1647 uint32_t tmpsmcr;
1648
1649 /* Check the parameters */
1650 assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
1651 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
1652 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1653
1654 /* Check input state */
1655 __HAL_LOCK(htim);
1656
1657 /* Change the handler state */
1658 htim->State = HAL_TIM_STATE_BUSY;
1659
1660 /* Get the TIMx CR2 register value */
1661 tmpcr2 = htim->Instance->CR2;
1662
1663 /* Get the TIMx SMCR register value */
1664 tmpsmcr = htim->Instance->SMCR;
1665
1666 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
1667 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
1668 {
1669 /* Check the parameters */
1670 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
1671
1672 /* Clear the MMS2 bits */
1673 tmpcr2 &= ~TIM_CR2_MMS2;
1674 /* Select the TRGO2 source*/
1675 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
1676 }
1677
1678 /* Reset the MMS Bits */
1679 tmpcr2 &= ~TIM_CR2_MMS;
1680 /* Select the TRGO source */
1681 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
1682
1683 /* Reset the MSM Bit */
1684 tmpsmcr &= ~TIM_SMCR_MSM;
1685 /* Set master mode */
1686 tmpsmcr |= sMasterConfig->MasterSlaveMode;
1687
1688 /* Update TIMx CR2 */
1689 htim->Instance->CR2 = tmpcr2;
1690
1691 /* Update TIMx SMCR */
1692 htim->Instance->SMCR = tmpsmcr;
1693
1694 /* Change the htim state */
1695 htim->State = HAL_TIM_STATE_READY;
1696
1697 __HAL_UNLOCK(htim);
1698
1699 return HAL_OK;
1700 }
1701
1702 /**
1703 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
1704 * and the AOE(automatic output enable).
1705 * @param htim TIM handle
1706 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
1707 * contains the BDTR Register configuration information for the TIM peripheral.
1708 * @note Interrupts can be generated when an active level is detected on the
1709 * break input, the break 2 input or the system break input. Break
1710 * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
1711 * @retval HAL status
1712 */
HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef * htim,TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)1713 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
1714 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
1715 {
1716 /* Keep this variable initialized to 0 as it is used to configure BDTR register */
1717 uint32_t tmpbdtr = 0U;
1718
1719 /* Check the parameters */
1720 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1721 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
1722 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
1723 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
1724 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
1725 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
1726 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
1727 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
1728 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
1729
1730 /* Check input state */
1731 __HAL_LOCK(htim);
1732
1733 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
1734 the OSSI State, the dead time value and the Automatic Output Enable Bit */
1735
1736 /* Set the BDTR bits */
1737 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
1738 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
1739 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
1740 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
1741 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
1742 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
1743 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
1744 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
1745
1746 if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
1747 {
1748 /* Check the parameters */
1749 assert_param(IS_TIM_BREAK_AFMODE(sBreakDeadTimeConfig->BreakAFMode));
1750
1751 /* Set BREAK AF mode */
1752 MODIFY_REG(tmpbdtr, TIM_BDTR_BKBID, sBreakDeadTimeConfig->BreakAFMode);
1753 }
1754
1755 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
1756 {
1757 /* Check the parameters */
1758 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
1759 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
1760 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
1761
1762 /* Set the BREAK2 input related BDTR bits */
1763 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
1764 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
1765 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
1766
1767 if (IS_TIM_ADVANCED_INSTANCE(htim->Instance))
1768 {
1769 /* Check the parameters */
1770 assert_param(IS_TIM_BREAK2_AFMODE(sBreakDeadTimeConfig->Break2AFMode));
1771
1772 /* Set BREAK2 AF mode */
1773 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2BID, sBreakDeadTimeConfig->Break2AFMode);
1774 }
1775 }
1776
1777 /* Set TIMx_BDTR */
1778 htim->Instance->BDTR = tmpbdtr;
1779
1780 __HAL_UNLOCK(htim);
1781
1782 return HAL_OK;
1783 }
1784
1785 /**
1786 * @brief Configures the break input source.
1787 * @param htim TIM handle.
1788 * @param BreakInput Break input to configure
1789 * This parameter can be one of the following values:
1790 * @arg TIM_BREAKINPUT_BRK: Timer break input
1791 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
1792 * @param sBreakInputConfig Break input source configuration
1793 * @retval HAL status
1794 */
HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput,TIMEx_BreakInputConfigTypeDef * sBreakInputConfig)1795 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
1796 uint32_t BreakInput,
1797 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
1798
1799 {
1800 uint32_t tmporx;
1801 uint32_t bkin_enable_mask;
1802 uint32_t bkin_polarity_mask;
1803 uint32_t bkin_enable_bitpos;
1804 uint32_t bkin_polarity_bitpos;
1805
1806 /* Check the parameters */
1807 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1808 assert_param(IS_TIM_BREAKINPUT(BreakInput));
1809 assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
1810 assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
1811 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1812 {
1813 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
1814 }
1815
1816 /* Check input state */
1817 __HAL_LOCK(htim);
1818
1819 switch (sBreakInputConfig->Source)
1820 {
1821 case TIM_BREAKINPUTSOURCE_BKIN:
1822 {
1823 bkin_enable_mask = TIM1_AF1_BKINE;
1824 bkin_enable_bitpos = TIM1_AF1_BKINE_Pos;
1825 bkin_polarity_mask = TIM1_AF1_BKINP;
1826 bkin_polarity_bitpos = TIM1_AF1_BKINP_Pos;
1827 break;
1828 }
1829
1830 default:
1831 {
1832 bkin_enable_mask = 0U;
1833 bkin_polarity_mask = 0U;
1834 bkin_enable_bitpos = 0U;
1835 bkin_polarity_bitpos = 0U;
1836 break;
1837 }
1838 }
1839
1840 switch (BreakInput)
1841 {
1842 case TIM_BREAKINPUT_BRK:
1843 {
1844 /* Get the TIMx_AF1 register value */
1845 tmporx = htim->Instance->AF1;
1846
1847 /* Enable the break input */
1848 tmporx &= ~bkin_enable_mask;
1849 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1850
1851 /* Set the break input polarity */
1852 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1853 {
1854 tmporx &= ~bkin_polarity_mask;
1855 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1856 }
1857
1858 /* Set TIMx_AF1 */
1859 htim->Instance->AF1 = tmporx;
1860 break;
1861 }
1862 case TIM_BREAKINPUT_BRK2:
1863 {
1864 /* Get the TIMx_AF2 register value */
1865 tmporx = htim->Instance->AF2;
1866
1867 /* Enable the break input */
1868 tmporx &= ~bkin_enable_mask;
1869 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1870
1871 /* Set the break input polarity */
1872 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1873 {
1874 tmporx &= ~bkin_polarity_mask;
1875 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1876 }
1877
1878 /* Set TIMx_AF2 */
1879 htim->Instance->AF2 = tmporx;
1880 break;
1881 }
1882 default:
1883 break;
1884 }
1885
1886 __HAL_UNLOCK(htim);
1887
1888 return HAL_OK;
1889 }
1890
1891 /**
1892 * @brief Configures the TIMx Remapping input capabilities.
1893 * @param htim TIM handle.
1894 * @param Remap specifies the TIM remapping source.
1895 *
1896 * @retval HAL status
1897 */
HAL_TIMEx_RemapConfig(TIM_HandleTypeDef * htim,uint32_t Remap)1898 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
1899 {
1900
1901 return HAL_OK;
1902 }
1903
1904 /**
1905 * @brief Select the timer input source
1906 * @param htim TIM handle.
1907 * @param Channel specifies the TIM Channel
1908 * This parameter can be one of the following values:
1909 * @arg TIM_CHANNEL_1: TI1 input channel
1910 * @arg TIM_CHANNEL_2: TI2 input channel
1911 * @arg TIM_CHANNEL_3: TIM Channel 3
1912 * @arg TIM_CHANNEL_4: TIM Channel 4
1913 * @param TISelection parameter of the TIM_TISelectionStruct structure is detailed as follows:
1914 * For TIM1, the parameter is one of the following values:
1915 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
1916 * @arg TIM_TIM1_TI2_GPIO: TIM1 TI2 is connected to GPIO
1917 * @arg TIM_TIM1_TI3_GPIO: TIM1 TI3 is connected to GPIO
1918 * @arg TIM_TIM1_TI4_GPIO: TIM1 TI4 is connected to GPIO
1919 *
1920 * For TIM2, the parameter is one of the following values:
1921 * @arg TIM_TIM2_TI1_GPIO: TIM2 TI1 is connected to GPIO
1922 * @arg TIM_TIM2_TI2_GPIO: TIM2 TI2 is connected to GPIO
1923 * @arg TIM_TIM2_TI3_GPIO: TIM2 TI3 is connected to GPIO
1924 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
1925 *
1926 * For TIM3, the parameter is one of the following values:
1927 * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
1928 * @arg TIM_TIM3_TI2_GPIO: TIM3 TI2 is connected to GPIO
1929 * @arg TIM_TIM3_TI3_GPIO: TIM3 TI3 is connected to GPIO
1930 * @arg TIM_TIM3_TI4_GPIO: TIM3 TI4 is connected to GPIO
1931 *
1932 * For TIM4, the parameter is one of the following values:
1933 * @arg TIM_TIM4_TI1_GPIO: TIM4 TI1 is connected to GPIO
1934 * @arg TIM_TIM4_TI2_GPIO: TIM4 TI2 is connected to GPIO
1935 * @arg TIM_TIM4_TI3_GPIO: TIM4 TI3 is connected to GPIO
1936 * @arg TIM_TIM4_TI4_GPIO: TIM4 TI4 is connected to GPIO
1937 *
1938 * For TIM5, the parameter is one of the following values:
1939 * @arg TIM_TIM5_TI1_GPIO: TIM5 TI1 is connected to GPIO
1940 * @arg TIM_TIM5_TI1_FDCAN_TMP: TIM5 TI1 is connected to FDCAN TMP
1941 * @arg TIM_TIM5_TI1_FDCAN_RTP: TIM5 TI1 is connected to FDCAN RTP
1942 * @arg TIM_TIM5_TI2_GPIO: TIM5 TI2 is connected to GPIO
1943 * @arg TIM_TIM5_TI3_GPIO: TIM5 TI3 is connected to GPIO
1944 * @arg TIM_TIM5_TI4_GPIO: TIM5 TI4 is connected to GPIO
1945 *
1946 * For TIM8, the parameter is one of the following values:
1947 * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO
1948 * @arg TIM_TIM8_TI2_GPIO: TIM8 TI2 is connected to GPIO
1949 * @arg TIM_TIM8_TI3_GPIO: TIM8 TI3 is connected to GPIO
1950 * @arg TIM_TIM8_TI4_GPIO: TIM8 TI4 is connected to GPIO
1951 *
1952 * For TIM12, the parameter can have the following values:
1953 * @arg TIM_TIM12_TI1_GPIO: TIM12 TI1 is connected to GPIO
1954 * @arg TIM_TIM12_TI2_GPIO: TIM12 TI2 is connected to GPIO
1955 *
1956 * For TIM13, the parameter can have the following values:
1957 * @arg TIM_TIM13_TI1_GPIO: TIM13 TI1 is connected to GPIO
1958 *
1959 * For TIM14, the parameter can have the following values:
1960 * @arg TIM_TIM14_TI1_GPIO: TIM14 TI1 is connected to GPIO
1961 *
1962 * For TIM15, the parameter is one of the following values:
1963 * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
1964 * @arg TIM_TIM15_TI1_TIM2: TIM15 TI1 is connected to TIM2 CH1
1965 * @arg TIM_TIM15_TI1_TIM3: TIM15 TI1 is connected to TIM3 CH1
1966 * @arg TIM_TIM15_TI1_TIM4: TIM15 TI1 is connected to TIM4 CH1
1967 * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
1968 * @arg TIM_TIM15_TI1_CSI: TIM15 TI1 is connected to CSI
1969 * @arg TIM_TIM15_TI1_MCO2: TIM15 TI1 is connected to MCO2
1970 * @arg TIM_TIM15_TI2_GPIO: TIM15 TI2 is connected to GPIO
1971 * @arg TIM_TIM15_TI2_TIM2: TIM15 TI2 is connected to TIM2 CH2
1972 * @arg TIM_TIM15_TI2_TIM3: TIM15 TI2 is connected to TIM3 CH2
1973 * @arg TIM_TIM15_TI2_TIM4: TIM15 TI2 is connected to TIM4 CH2
1974 *
1975 * For TIM16, the parameter can have the following values:
1976 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
1977 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
1978 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
1979 * @arg TIM_TIM16_TI1_WKUP_IT: TIM16 TI1 is connected to RTC wakeup interrupt
1980 *
1981 * For TIM17, the parameter can have the following values:
1982 * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
1983 * @arg TIM_TIM17_TI1_SPDIF_FS: TIM17 TI1 is connected to SPDIF FS (**)
1984 * @arg TIM_TIM17_TI1_HSE_RTC: TIM17 TI1 is connected to HSE_RTC
1985 * @arg TIM_TIM17_TI1_MCO1: TIM17 TI1 is connected to MCO1
1986 * @retval HAL status
1987 */
HAL_TIMEx_TISelection(TIM_HandleTypeDef * htim,uint32_t TISelection,uint32_t Channel)1988 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel)
1989 {
1990 HAL_StatusTypeDef status = HAL_OK;
1991
1992 /* Check parameters */
1993 assert_param(IS_TIM_TISEL_INSTANCE(htim->Instance));
1994 assert_param(IS_TIM_TISEL(TISelection));
1995
1996 __HAL_LOCK(htim);
1997
1998 switch (Channel)
1999 {
2000 case TIM_CHANNEL_1:
2001 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI1SEL, TISelection);
2002 break;
2003 case TIM_CHANNEL_2:
2004 MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI2SEL, TISelection);
2005 break;
2006 default:
2007 status = HAL_ERROR;
2008 break;
2009 }
2010
2011 __HAL_UNLOCK(htim);
2012
2013 return status;
2014 }
2015
2016 /**
2017 * @brief Group channel 5 and channel 1, 2 or 3
2018 * @param htim TIM handle.
2019 * @param Channels specifies the reference signal(s) the OC5REF is combined with.
2020 * This parameter can be any combination of the following values:
2021 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
2022 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
2023 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
2024 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
2025 * @retval HAL status
2026 */
HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef * htim,uint32_t Channels)2027 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
2028 {
2029 /* Check parameters */
2030 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
2031 assert_param(IS_TIM_GROUPCH5(Channels));
2032
2033 /* Process Locked */
2034 __HAL_LOCK(htim);
2035
2036 htim->State = HAL_TIM_STATE_BUSY;
2037
2038 /* Clear GC5Cx bit fields */
2039 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
2040
2041 /* Set GC5Cx bit fields */
2042 htim->Instance->CCR5 |= Channels;
2043
2044 /* Change the htim state */
2045 htim->State = HAL_TIM_STATE_READY;
2046
2047 __HAL_UNLOCK(htim);
2048
2049 return HAL_OK;
2050 }
2051
2052 /**
2053 * @brief Disarm the designated break input (when it operates in bidirectional mode).
2054 * @param htim TIM handle.
2055 * @param BreakInput Break input to disarm
2056 * This parameter can be one of the following values:
2057 * @arg TIM_BREAKINPUT_BRK: Timer break input
2058 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2059 * @note The break input can be disarmed only when it is configured in
2060 * bidirectional mode and when when MOE is reset.
2061 * @note Purpose is to be able to have the input voltage back to high-state,
2062 * whatever the time constant on the output .
2063 * @retval HAL status
2064 */
HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput)2065 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
2066 {
2067 uint32_t tmpbdtr;
2068
2069 /* Check the parameters */
2070 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
2071 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2072
2073 switch (BreakInput)
2074 {
2075 case TIM_BREAKINPUT_BRK:
2076 {
2077 /* Check initial conditions */
2078 tmpbdtr = READ_REG(htim->Instance->BDTR);
2079 if ((READ_BIT(tmpbdtr, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) &&
2080 (READ_BIT(tmpbdtr, TIM_BDTR_MOE) == 0U))
2081 {
2082 /* Break input BRK is disarmed */
2083 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM);
2084 }
2085 break;
2086 }
2087
2088 case TIM_BREAKINPUT_BRK2:
2089 {
2090 /* Check initial conditions */
2091 tmpbdtr = READ_REG(htim->Instance->BDTR);
2092 if ((READ_BIT(tmpbdtr, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) &&
2093 (READ_BIT(tmpbdtr, TIM_BDTR_MOE) == 0U))
2094 {
2095 /* Break input BRK is disarmed */
2096 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM);
2097 }
2098 break;
2099 }
2100 default:
2101 break;
2102 }
2103
2104 return HAL_OK;
2105 }
2106
2107 /**
2108 * @brief Arm the designated break input (when it operates in bidirectional mode).
2109 * @param htim TIM handle.
2110 * @param BreakInput Break input to arm
2111 * This parameter can be one of the following values:
2112 * @arg TIM_BREAKINPUT_BRK: Timer break input
2113 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
2114 * @note Arming is possible at anytime, even if fault is present.
2115 * @note Break input is automatically armed as soon as MOE bit is set.
2116 * @retval HAL status
2117 */
HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput)2118 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput)
2119 {
2120 uint32_t tickstart;
2121
2122 /* Check the parameters */
2123 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance));
2124 assert_param(IS_TIM_BREAKINPUT(BreakInput));
2125
2126 switch (BreakInput)
2127 {
2128 case TIM_BREAKINPUT_BRK:
2129 {
2130 /* Check initial conditions */
2131 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID)
2132 {
2133 /* Break input BRK is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
2134 /* Init tickstart for timeout management */
2135 tickstart = HAL_GetTick();
2136 do
2137 {
2138 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != TIM_BDTR_BKDSRM)
2139 {
2140 return HAL_OK;
2141 }
2142 } while ((HAL_GetTick() - tickstart) <= TIM_BREAKINPUT_REARM_TIMEOUT);
2143
2144 return HAL_TIMEOUT;
2145 }
2146 break;
2147 }
2148
2149 case TIM_BREAKINPUT_BRK2:
2150 {
2151 /* Check initial conditions */
2152 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID)
2153 {
2154 /* Break input BRK2 is re-armed automatically by hardware. Poll to check whether fault condition disappeared */
2155 /* Init tickstart for timeout management */
2156 tickstart = HAL_GetTick();
2157 do
2158 {
2159 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != TIM_BDTR_BK2DSRM)
2160 {
2161 return HAL_OK;
2162 }
2163 } while ((HAL_GetTick() - tickstart) <= TIM_BREAKINPUT_REARM_TIMEOUT);
2164
2165 return HAL_TIMEOUT;
2166 }
2167 break;
2168 }
2169 default:
2170 break;
2171 }
2172
2173 return HAL_OK;
2174 }
2175
2176 /**
2177 * @}
2178 */
2179
2180 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2181 * @brief Extended Callbacks functions
2182 *
2183 @verbatim
2184 ==============================================================================
2185 ##### Extended Callbacks functions #####
2186 ==============================================================================
2187 [..]
2188 This section provides Extended TIM callback functions:
2189 (+) Timer Commutation callback
2190 (+) Timer Break callback
2191
2192 @endverbatim
2193 * @{
2194 */
2195
2196 /**
2197 * @brief Hall commutation changed callback in non-blocking mode
2198 * @param htim TIM handle
2199 * @retval None
2200 */
HAL_TIMEx_CommutCallback(TIM_HandleTypeDef * htim)2201 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
2202 {
2203 /* Prevent unused argument(s) compilation warning */
2204 UNUSED(htim);
2205
2206 /* NOTE : This function should not be modified, when the callback is needed,
2207 the HAL_TIMEx_CommutCallback could be implemented in the user file
2208 */
2209 }
2210 /**
2211 * @brief Hall commutation changed half complete callback in non-blocking mode
2212 * @param htim TIM handle
2213 * @retval None
2214 */
HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef * htim)2215 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
2216 {
2217 /* Prevent unused argument(s) compilation warning */
2218 UNUSED(htim);
2219
2220 /* NOTE : This function should not be modified, when the callback is needed,
2221 the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
2222 */
2223 }
2224
2225 /**
2226 * @brief Hall Break detection callback in non-blocking mode
2227 * @param htim TIM handle
2228 * @retval None
2229 */
HAL_TIMEx_BreakCallback(TIM_HandleTypeDef * htim)2230 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2231 {
2232 /* Prevent unused argument(s) compilation warning */
2233 UNUSED(htim);
2234
2235 /* NOTE : This function should not be modified, when the callback is needed,
2236 the HAL_TIMEx_BreakCallback could be implemented in the user file
2237 */
2238 }
2239
2240 /**
2241 * @brief Hall Break2 detection callback in non blocking mode
2242 * @param htim: TIM handle
2243 * @retval None
2244 */
HAL_TIMEx_Break2Callback(TIM_HandleTypeDef * htim)2245 __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
2246 {
2247 /* Prevent unused argument(s) compilation warning */
2248 UNUSED(htim);
2249
2250 /* NOTE : This function Should not be modified, when the callback is needed,
2251 the HAL_TIMEx_Break2Callback could be implemented in the user file
2252 */
2253 }
2254 /**
2255 * @}
2256 */
2257
2258 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2259 * @brief Extended Peripheral State functions
2260 *
2261 @verbatim
2262 ==============================================================================
2263 ##### Extended Peripheral State functions #####
2264 ==============================================================================
2265 [..]
2266 This subsection permits to get in run-time the status of the peripheral
2267 and the data flow.
2268
2269 @endverbatim
2270 * @{
2271 */
2272
2273 /**
2274 * @brief Return the TIM Hall Sensor interface handle state.
2275 * @param htim TIM Hall Sensor handle
2276 * @retval HAL state
2277 */
HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef * htim)2278 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
2279 {
2280 return htim->State;
2281 }
2282
2283 /**
2284 * @}
2285 */
2286
2287 /**
2288 * @}
2289 */
2290
2291 /* Private functions ---------------------------------------------------------*/
2292 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
2293 * @{
2294 */
2295
2296 /**
2297 * @brief TIM DMA Commutation callback.
2298 * @param hdma pointer to DMA handle.
2299 * @retval None
2300 */
TIMEx_DMACommutationCplt(DMA_HandleTypeDef * hdma)2301 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2302 {
2303 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2304
2305 /* Change the htim state */
2306 htim->State = HAL_TIM_STATE_READY;
2307
2308 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2309 htim->CommutationCallback(htim);
2310 #else
2311 HAL_TIMEx_CommutCallback(htim);
2312 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2313 }
2314
2315 /**
2316 * @brief TIM DMA Commutation half complete callback.
2317 * @param hdma pointer to DMA handle.
2318 * @retval None
2319 */
TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef * hdma)2320 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
2321 {
2322 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2323
2324 /* Change the htim state */
2325 htim->State = HAL_TIM_STATE_READY;
2326
2327 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2328 htim->CommutationHalfCpltCallback(htim);
2329 #else
2330 HAL_TIMEx_CommutHalfCpltCallback(htim);
2331 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2332 }
2333
2334
2335 /**
2336 * @brief Enables or disables the TIM Capture Compare Channel xN.
2337 * @param TIMx to select the TIM peripheral
2338 * @param Channel specifies the TIM Channel
2339 * This parameter can be one of the following values:
2340 * @arg TIM_CHANNEL_1: TIM Channel 1
2341 * @arg TIM_CHANNEL_2: TIM Channel 2
2342 * @arg TIM_CHANNEL_3: TIM Channel 3
2343 * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2344 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2345 * @retval None
2346 */
TIM_CCxNChannelCmd(TIM_TypeDef * TIMx,uint32_t Channel,uint32_t ChannelNState)2347 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2348 {
2349 uint32_t tmp;
2350
2351 tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2352
2353 /* Reset the CCxNE Bit */
2354 TIMx->CCER &= ~tmp;
2355
2356 /* Set or reset the CCxNE Bit */
2357 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2358 }
2359 /**
2360 * @}
2361 */
2362
2363 #endif /* HAL_TIM_MODULE_ENABLED */
2364 /**
2365 * @}
2366 */
2367
2368 /**
2369 * @}
2370 */
2371
