1 /** 2 ****************************************************************************** 3 * @file stm32mp1xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32MP1xx_HAL_TIM_EX_H 21 #define STM32MP1xx_HAL_TIM_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32mp1xx_hal_def.h" 29 30 /** @addtogroup STM32MP1xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup TIMEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief TIM Hall sensor Configuration Structure definition 45 */ 46 47 typedef struct 48 { 49 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 52 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 55 uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 58 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 } TIM_HallSensor_InitTypeDef; 61 62 /** 63 * @brief TIM Break/Break2 input configuration 64 */ 65 typedef struct 66 { 67 uint32_t Source; /*!< Specifies the source of the timer break input. 68 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 69 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 70 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 71 uint32_t Polarity; /*!< Specifies the break input source polarity. 72 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity 73 Not relevant when analog watchdog output of the DFSDM1 used as break input source */ 74 } 75 TIMEx_BreakInputConfigTypeDef; 76 77 /** 78 * @} 79 */ 80 /* End of exported types -----------------------------------------------------*/ 81 82 /* Exported constants --------------------------------------------------------*/ 83 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 84 * @{ 85 */ 86 87 /** @defgroup TIMEx_Remap TIM Extended Remapping 88 * @{ 89 */ 90 #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */ 91 #define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */ 92 #define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /* !< TIM1_ETR is connected to ADC1 AWD2 */ 93 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ 94 #define TIM_TIM1_ETR_ADC2_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is connected to ADC3 AWD1 */ 95 #define TIM_TIM1_ETR_ADC2_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */ 96 #define TIM_TIM1_ETR_ADC2_AWD3 TIM1_AF1_ETRSEL_3 /* !< TIM1_ETR is connected to ADC3 AWD3 */ 97 #if defined(TIM8) 98 #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */ 99 #define TIM_TIM8_ETR_ADC1_AWD1 (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC1 AWD1 */ 100 #define TIM_TIM8_ETR_ADC1_AWD2 (TIM8_AF1_ETRSEL_2) /* !< TIM8_ETR is connected to ADC1 AWD2 */ 101 #define TIM_TIM8_ETR_ADC1_AWD3 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC1 AWD3 */ 102 #define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1) /* !< TIM8_ETR is connected to ADC3 AWD1 */ 103 #define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */ 104 #define TIM_TIM8_ETR_ADC2_AWD3 TIM8_AF1_ETRSEL_3 /* !< TIM8_ETR is connected to ADC3 AWD3 */ 105 #endif 106 #if defined(TIM2) 107 #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */ 108 #define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to RCC LSE */ 109 #define TIM_TIM2_ETR_SAI1_FSA (TIM2_AF1_ETRSEL_2) /* !< TIM2_ETR is connected to SAI1 FS_A */ 110 #define TIM_TIM2_ETR_SAI1_FSB (TIM2_AF1_ETRSEL_2 | TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to SAI1 FS_B */ 111 #define TIM_TIM2_ETR_ETH_PPS (TIM2_AF1_ETRSEL_2 | TIM2_AF1_ETRSEL_1) /* !< TIM2_ETR is connected to ETH PPS */ 112 #endif 113 #if defined(TIM3) 114 #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */ 115 #define TIM_TIM3_ETR_ETH_PPS (TIM3_AF1_ETRSEL_2 | TIM3_AF1_ETRSEL_1) /* !< TIM3_ETR is connected to ETH PPS */ 116 #endif 117 #if defined(TIM4) 118 #define TIM_TIM4_ETR_GPIO 0x00000000U /* !< TIM4_ETR is connected to GPIO */ 119 #endif 120 #if defined(TIM5) 121 #define TIM_TIM5_ETR_GPIO 0x00000000U /* !< TIM5_ETR is connected to GPIO */ 122 #define TIM_TIM5_ETR_SAI2_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI2 FS_A */ 123 #define TIM_TIM5_ETR_SAI2_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI2 FS_B */ 124 #define TIM_TIM5_ETR_OTG_SOF (TIM5_AF1_ETRSEL_1 | TIM5_AF1_ETRSEL_0) /* !< TIM5_ETR is connected to OTG SOF */ 125 #endif 126 /** 127 * @} 128 */ 129 130 /** @defgroup TIMEx_Break_Input TIM Extended Break input 131 * @{ 132 */ 133 #define TIM_BREAKINPUT_BRK 0x00000001U /* !< Timer break input */ 134 #define TIM_BREAKINPUT_BRK2 0x00000002U /* !< Timer break2 input */ 135 /** 136 * @} 137 */ 138 139 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 140 * @{ 141 */ 142 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */ 143 #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ 144 /** 145 * @} 146 */ 147 148 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 149 * @{ 150 */ 151 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /* !< Break input source is disabled */ 152 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /* !< Break input source is enabled */ 153 /** 154 * @} 155 */ 156 157 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 158 * @{ 159 */ 160 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /* !< Break input source is active low */ 161 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /* !< Break input source is active_high */ 162 /** 163 * @} 164 */ 165 166 /** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection 167 * @{ 168 */ 169 170 #define TIM_TIM1_TI1_GPIO 0x00000000UL /* !< TIM1_TI1 is connected to GPIO */ 171 #define TIM_TIM1_TI2_GPIO 0x00000000UL /* !< TIM1_TI2 is connected to GPIO */ 172 #define TIM_TIM1_TI3_GPIO 0x00000000UL /* !< TIM1_TI3 is connected to GPIO */ 173 #define TIM_TIM1_TI4_GPIO 0x00000000UL /* !< TIM1_TI4 is connected to GPIO */ 174 175 #define TIM_TIM8_TI1_GPIO 0x00000000UL /* !< TIM8_TI1 is connected to GPIO */ 176 #define TIM_TIM8_TI2_GPIO 0x00000000UL /* !< TIM8_TI2 is connected to GPIO */ 177 #define TIM_TIM8_TI3_GPIO 0x00000000UL /* !< TIM8_TI3 is connected to GPIO */ 178 #define TIM_TIM8_TI4_GPIO 0x00000000UL /* !< TIM8_TI4 is connected to GPIO */ 179 180 #define TIM_TIM2_TI1_GPIO 0x00000000UL /* !< TIM2_TI1 is connected to GPIO */ 181 #define TIM_TIM2_TI2_GPIO 0x00000000UL /* !< TIM2_TI2 is connected to GPIO */ 182 #define TIM_TIM2_TI3_GPIO 0x00000000UL /* !< TIM2_TI3 is connected to GPIO */ 183 #define TIM_TIM2_TI4_GPIO 0x00000000UL /* !< TIM2_TI4 is connected to GPIO */ 184 185 #define TIM_TIM3_TI1_GPIO 0x00000000UL /* !< TIM3_TI1 is connected to GPIO */ 186 #define TIM_TIM3_TI2_GPIO 0x00000000UL /* !< TIM3_TI2 is connected to GPIO */ 187 #define TIM_TIM3_TI3_GPIO 0x00000000UL /* !< TIM3_TI3 is connected to GPIO */ 188 #define TIM_TIM3_TI4_GPIO 0x00000000UL /* !< TIM3_TI4 is connected to GPIO */ 189 190 #define TIM_TIM4_TI1_GPIO 0x00000000UL /* !< TIM4_TI1 is connected to GPIO */ 191 #define TIM_TIM4_TI2_GPIO 0x00000000UL /* !< TIM4_TI2 is connected to GPIO */ 192 #define TIM_TIM4_TI3_GPIO 0x00000000UL /* !< TIM4_TI3 is connected to GPIO */ 193 #define TIM_TIM4_TI4_GPIO 0x00000000UL /* !< TIM4_TI4 is connected to GPIO */ 194 195 #define TIM_TIM5_TI1_GPIO 0x00000000U /* !< TIM5_TI1 is connected to GPIO */ 196 #define TIM_TIM5_TI1_FDCAN1_TMP TIM_TISEL_TI1SEL_0 /* !< TIM5_TI1 is connected to FDCAN1 TMP */ 197 #define TIM_TIM5_TI1_FDCAN1_RTP TIM_TISEL_TI1SEL_1 /* !< TIM5_TI1 is connected to FDCAN1 RTP */ 198 #define TIM_TIM5_TI2_GPIO 0x00000000UL /* !< TIM5_TI2 is connected to GPIO */ 199 #define TIM_TIM5_TI3_GPIO 0x00000000UL /* !< TIM5_TI3 is connected to GPIO */ 200 #define TIM_TIM5_TI4_GPIO 0x00000000UL /* !< TIM5_TI4 is connected to GPIO */ 201 202 #define TIM_TIM12_TI1_GPIO 0x00000000UL /* !< TIM12_TI1 is connected to GPIO */ 203 #define TIM_TIM12_TI1_HSI_CAL_CK TIM_TISEL_TI1SEL_0 /* !< TIM12_TI1 is connected to HSI CAL CK */ 204 #define TIM_TIM12_TI1_CSI_CAL_CK TIM_TISEL_TI1SEL_1 /* !< TIM12_TI1 is connected to CSI CAL CK */ 205 #define TIM_TIM12_TI2_GPIO 0x00000000UL /* !< TIM12_TI2 is connected to GPIO */ 206 207 #define TIM_TIM13_TI1_GPIO 0x00000000UL /* !< TIM13_TI1 is connected to GPIO */ 208 209 #define TIM_TIM14_TI1_GPIO 0x00000000UL /* !< TIM14_TI1 is connected to GPIO */ 210 211 #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15_TI1 is connected to GPIO */ 212 #define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /* !< TIM15_TI1 is connected to TIM2 CH1 */ 213 #define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /* !< TIM15_TI1 is connected to TIM3 CH1 */ 214 #define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */ 215 #define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_2) /* !< TIM15_TI1 is connected to RCC LSE */ 216 #define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI */ 217 #define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */ 218 #define TIM_TIM15_TI1_HSI_CAL_CK (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1 | TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to HSI CAL CK */ 219 #define TIM_TIM15_TI1_CSI_CAL_CK TIM_TISEL_TI1SEL_3 /* !< TIM15_TI1 is connected to CSI CAL CK */ 220 221 #define TIM_TIM15_TI2_GPIO 0x00000000U /* !< TIM15_TI2 is connected to GPIO */ 222 #define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0) /* !< TIM15_TI2 is connected to TIM2 CH2 */ 223 #define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM3 CH2 */ 224 #define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */ 225 226 #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */ 227 #define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0 /* !< TIM16 TI1 is connected to RCC LSI */ 228 #define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1 /* !< TIM16 TI1 is connected to RCC LSE */ 229 #define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */ 230 231 #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */ 232 #define TIM_TIM17_TI1_SPDIFRX_FS TIM_TISEL_TI1SEL_0 /* !< TIM17 TI1 is connected to SPDIF FS */ 233 #define TIM_TIM17_TI1_RCC_HSE_RTC TIM_TISEL_TI1SEL_1 /* !< TIM17 TI1 is connected to RCC HSE RTC */ 234 #define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */ 235 /** 236 * @} 237 */ 238 239 /** 240 * @} 241 */ 242 /* End of exported constants -------------------------------------------------*/ 243 244 /* Exported macro ------------------------------------------------------------*/ 245 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 246 * @{ 247 */ 248 249 /** 250 * @} 251 */ 252 /* End of exported macro -----------------------------------------------------*/ 253 254 /* Private macro -------------------------------------------------------------*/ 255 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 256 * @{ 257 */ 258 #define IS_TIM_REMAP(__REMAP__) ((((__REMAP__) & 0xFFFC3FFFU) == 0x00000000U)) 259 260 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 261 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 262 263 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) ((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) 264 265 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 266 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 267 268 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 269 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 270 271 #define IS_TIM_TISEL(__TISEL__) ((((__TISEL__) & 0xF0F0F0F0U) == 0x00000000U)) 272 273 274 /** 275 * @} 276 */ 277 /* End of private macro ------------------------------------------------------*/ 278 279 /* Exported functions --------------------------------------------------------*/ 280 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 281 * @{ 282 */ 283 284 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 285 * @brief Timer Hall Sensor functions 286 * @{ 287 */ 288 /* Timer Hall Sensor functions **********************************************/ 289 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); 290 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 291 292 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 293 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 294 295 /* Blocking mode: Polling */ 296 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 297 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 298 /* Non-Blocking mode: Interrupt */ 299 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 300 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 301 /* Non-Blocking mode: DMA */ 302 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 303 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 304 /** 305 * @} 306 */ 307 308 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 309 * @brief Timer Complementary Output Compare functions 310 * @{ 311 */ 312 /* Timer Complementary Output Compare functions *****************************/ 313 /* Blocking mode: Polling */ 314 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 315 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 316 317 /* Non-Blocking mode: Interrupt */ 318 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 319 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 320 321 /* Non-Blocking mode: DMA */ 322 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 323 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 324 /** 325 * @} 326 */ 327 328 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 329 * @brief Timer Complementary PWM functions 330 * @{ 331 */ 332 /* Timer Complementary PWM functions ****************************************/ 333 /* Blocking mode: Polling */ 334 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 335 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 336 337 /* Non-Blocking mode: Interrupt */ 338 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 339 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 340 /* Non-Blocking mode: DMA */ 341 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 342 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 343 /** 344 * @} 345 */ 346 347 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 348 * @brief Timer Complementary One Pulse functions 349 * @{ 350 */ 351 /* Timer Complementary One Pulse functions **********************************/ 352 /* Blocking mode: Polling */ 353 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 354 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 355 356 /* Non-Blocking mode: Interrupt */ 357 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 358 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 359 /** 360 * @} 361 */ 362 363 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 364 * @brief Peripheral Control functions 365 * @{ 366 */ 367 /* Extended Control functions ************************************************/ 368 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 369 uint32_t CommutationSource); 370 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 371 uint32_t CommutationSource); 372 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 373 uint32_t CommutationSource); 374 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 375 TIM_MasterConfigTypeDef *sMasterConfig); 376 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 377 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 378 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 379 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 380 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 381 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 382 HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel); 383 384 HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 385 HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput); 386 /** 387 * @} 388 */ 389 390 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 391 * @brief Extended Callbacks functions 392 * @{ 393 */ 394 /* Extended Callback **********************************************************/ 395 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 396 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 397 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 398 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 399 /** 400 * @} 401 */ 402 403 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 404 * @brief Extended Peripheral State functions 405 * @{ 406 */ 407 /* Extended Peripheral State functions ***************************************/ 408 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); 409 /** 410 * @} 411 */ 412 413 /** 414 * @} 415 */ 416 /* End of exported functions -------------------------------------------------*/ 417 418 /* Private functions----------------------------------------------------------*/ 419 /** @addtogroup TIMEx_Private_Functions TIMEx Private Functions 420 * @{ 421 */ 422 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 423 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 424 /** 425 * @} 426 */ 427 /* End of private functions --------------------------------------------------*/ 428 429 /** 430 * @} 431 */ 432 433 /** 434 * @} 435 */ 436 437 #ifdef __cplusplus 438 } 439 #endif 440 441 442 #endif /* STM32MP1xx_HAL_TIM_EX_H */ 443
