1 /**
2   ******************************************************************************
3   * @file    stm32mp1xx_hal_spdifrx.h
4   * @author  MCD Application Team
5   * @brief   Header file of SPDIFRX HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2019 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef __STM32MP1xx_HAL_SPDIFRX_H
21 #define __STM32MP1xx_HAL_SPDIFRX_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 #if defined (SPDIFRX)
28 
29 /* Includes ------------------------------------------------------------------*/
30 #include "stm32mp1xx_hal_def.h"
31 
32 /** @addtogroup STM32MP1xx_HAL_Driver
33   * @{
34   */
35 
36 /** @addtogroup SPDIFRX
37   * @{
38   */
39 
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types
42   * @{
43   */
44 
45 /**
46   * @brief SPDIFRX Init structure definition
47   */
48 typedef struct
49 {
50   uint32_t InputSelection;           /*!< Specifies the SPDIF input selection.
51                                           This parameter can be a value of @ref SPDIFRX_Input_Selection */
52 
53   uint32_t Retries;                  /*!< Specifies the Maximum allowed re-tries during synchronization phase.
54                                           This parameter can be a value of @ref SPDIFRX_Max_Retries */
55 
56   uint32_t WaitForActivity;          /*!< Specifies the wait for activity on SPDIF selected input.
57                                           This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */
58 
59   uint32_t ChannelSelection;         /*!< Specifies whether the control flow will take the channel status from channel A or B.
60                                           This parameter can be a value of @ref SPDIFRX_Channel_Selection */
61 
62   uint32_t DataFormat;               /*!< Specifies the Data samples format (LSB, MSB, ...).
63                                           This parameter can be a value of @ref SPDIFRX_Data_Format */
64 
65   uint32_t StereoMode;               /*!< Specifies whether the peripheral is in stereo or mono mode.
66                                           This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
67 
68   uint32_t PreambleTypeMask;          /*!< Specifies whether The preamble type bits are copied or not into the received frame.
69                                                                                    This parameter can be a value of @ref SPDIFRX_PT_Mask */
70 
71   uint32_t ChannelStatusMask;        /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
72                                                                                   This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
73 
74   uint32_t ValidityBitMask;          /*!< Specifies whether the validity bit is copied or not into the received frame.
75                                                                                   This parameter can be a value of @ref SPDIFRX_V_Mask */
76 
77   uint32_t ParityErrorMask;          /*!< Specifies whether the parity error bit is copied or not into the received frame.
78                                                                                   This parameter can be a value of @ref SPDIFRX_PE_Mask */
79 
80 } SPDIFRX_InitTypeDef;
81 
82 /**
83   * @brief SPDIFRX SetDataFormat structure definition
84   */
85 typedef struct
86 {
87   uint32_t DataFormat;               /*!< Specifies the Data samples format (LSB, MSB, ...).
88                                           This parameter can be a value of @ref SPDIFRX_Data_Format */
89 
90   uint32_t StereoMode;               /*!< Specifies whether the peripheral is in stereo or mono mode.
91                                           This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
92 
93   uint32_t PreambleTypeMask;          /*!< Specifies whether The preamble type bits are copied or not into the received frame.
94                                                                                    This parameter can be a value of @ref SPDIFRX_PT_Mask */
95 
96   uint32_t ChannelStatusMask;        /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
97                                                                                   This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
98 
99   uint32_t ValidityBitMask;          /*!< Specifies whether the validity bit is copied or not into the received frame.
100                                                                                   This parameter can be a value of @ref SPDIFRX_V_Mask */
101 
102   uint32_t ParityErrorMask;          /*!< Specifies whether the parity error bit is copied or not into the received frame.
103                                                                                   This parameter can be a value of @ref SPDIFRX_PE_Mask */
104 
105 } SPDIFRX_SetDataFormatTypeDef;
106 
107 /**
108   * @brief  HAL State structures definition
109   */
110 typedef enum
111 {
112   HAL_SPDIFRX_STATE_RESET      = 0x00U,  /*!< SPDIFRX not yet initialized or disabled                */
113   HAL_SPDIFRX_STATE_READY      = 0x01U,  /*!< SPDIFRX initialized and ready for use                  */
114   HAL_SPDIFRX_STATE_BUSY       = 0x02U,  /*!< SPDIFRX internal process is ongoing                    */
115   HAL_SPDIFRX_STATE_BUSY_RX    = 0x03U,  /*!< SPDIFRX internal Data Flow RX process is ongoing       */
116   HAL_SPDIFRX_STATE_BUSY_CX    = 0x04U,  /*!< SPDIFRX internal Control Flow RX process is ongoing    */
117   HAL_SPDIFRX_STATE_ERROR      = 0x07U   /*!< SPDIFRX error state                                    */
118 } HAL_SPDIFRX_StateTypeDef;
119 
120 /**
121   * @brief SPDIFRX handle Structure definition
122   */
123 typedef struct
124 {
125   SPDIFRX_TypeDef            *Instance;    /* SPDIFRX registers base address */
126 
127   SPDIFRX_InitTypeDef        Init;         /* SPDIFRX communication parameters */
128 
129   uint32_t                   *pRxBuffPtr;  /* Pointer to SPDIFRX Rx transfer buffer */
130 
131   uint32_t                   *pCsBuffPtr;  /* Pointer to SPDIFRX Cx transfer buffer */
132 
133   __IO uint16_t              RxXferSize;   /* SPDIFRX Rx transfer size */
134 
135   __IO uint16_t              RxXferCount;  /* SPDIFRX Rx transfer counter
136                                               (This field is initialized at the
137                                                same value as transfer size at the
138                                                beginning of the transfer and
139                                                decremented when a sample is received.
140                                                NbSamplesReceived = RxBufferSize-RxBufferCount) */
141 
142   __IO uint16_t              CsXferSize;   /* SPDIFRX Rx transfer size */
143 
144   __IO uint16_t              CsXferCount;  /* SPDIFRX Rx transfer counter
145                                               (This field is initialized at the
146                                                same value as transfer size at the
147                                                beginning of the transfer and
148                                                decremented when a sample is received.
149                                                NbSamplesReceived = RxBufferSize-RxBufferCount) */
150 
151   DMA_HandleTypeDef          *hdmaCsRx;    /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
152 
153   DMA_HandleTypeDef          *hdmaDrRx;    /* SPDIFRX Rx DMA handle parameters */
154 
155   __IO HAL_LockTypeDef       Lock;         /* SPDIFRX locking object */
156 
157   __IO HAL_SPDIFRX_StateTypeDef  State;    /* SPDIFRX communication state */
158 
159   __IO uint32_t  ErrorCode;                /* SPDIFRX Error code                 */
160 
161 } SPDIFRX_HandleTypeDef;
162 /**
163   * @}
164   */
165 
166 /* Exported constants --------------------------------------------------------*/
167 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants
168   * @{
169   */
170 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code
171   * @{
172   */
173 #define HAL_SPDIFRX_ERROR_NONE      ((uint32_t)0x00000000U)  /*!< No error           */
174 #define HAL_SPDIFRX_ERROR_TIMEOUT   ((uint32_t)0x00000001U)  /*!< Timeout error      */
175 #define HAL_SPDIFRX_ERROR_OVR       ((uint32_t)0x00000002U)  /*!< OVR error          */
176 #define HAL_SPDIFRX_ERROR_PE        ((uint32_t)0x00000004U)  /*!< Parity error       */
177 #define HAL_SPDIFRX_ERROR_DMA       ((uint32_t)0x00000008U)  /*!< DMA transfer error */
178 #define HAL_SPDIFRX_ERROR_UNKNOWN   ((uint32_t)0x00000010U)  /*!< Unknown Error error */
179 /**
180   * @}
181   */
182 
183 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection
184   * @{
185   */
186 #define SPDIFRX_INPUT_IN0               ((uint32_t)0x00000000U)
187 #define SPDIFRX_INPUT_IN1               ((uint32_t)0x00010000U)
188 #define SPDIFRX_INPUT_IN2               ((uint32_t)0x00020000U)
189 #define SPDIFRX_INPUT_IN3               ((uint32_t)0x00030000U)
190 /**
191   * @}
192   */
193 
194 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries
195   * @{
196   */
197 #define SPDIFRX_MAXRETRIES_NONE            ((uint32_t)0x00000000U)
198 #define SPDIFRX_MAXRETRIES_3               ((uint32_t)0x00001000U)
199 #define SPDIFRX_MAXRETRIES_15              ((uint32_t)0x00002000U)
200 #define SPDIFRX_MAXRETRIES_63              ((uint32_t)0x00003000U)
201 /**
202   * @}
203   */
204 
205 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity
206   * @{
207   */
208 #define SPDIFRX_WAITFORACTIVITY_OFF                   ((uint32_t)0x00000000U)
209 #define SPDIFRX_WAITFORACTIVITY_ON                    ((uint32_t)SPDIFRX_CR_WFA)
210 /**
211   * @}
212   */
213 
214 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask
215 * @{
216 */
217 #define SPDIFRX_PREAMBLETYPEMASK_OFF                   ((uint32_t)0x00000000U)
218 #define SPDIFRX_PREAMBLETYPEMASK_ON                    ((uint32_t)SPDIFRX_CR_PTMSK)
219 /**
220   * @}
221   */
222 
223 /** @defgroup SPDIFRX_ChannelStatus_Mask  SPDIFRX Channel Status Mask
224 * @{
225 */
226 #define SPDIFRX_CHANNELSTATUS_OFF                 ((uint32_t)0x00000000U)        /* The channel status and user bits are copied into the SPDIF_DR */
227 #define SPDIFRX_CHANNELSTATUS_ON                  ((uint32_t)SPDIFRX_CR_CUMSK)  /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
228 /**
229   * @}
230   */
231 
232 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask
233 * @{
234 */
235 #define SPDIFRX_VALIDITYMASK_OFF                   ((uint32_t)0x00000000U)
236 #define SPDIFRX_VALIDITYMASK_ON                    ((uint32_t)SPDIFRX_CR_VMSK)
237 /**
238   * @}
239   */
240 
241 /** @defgroup SPDIFRX_PE_Mask  SPDIFRX Parity Error Mask
242 * @{
243 */
244 #define SPDIFRX_PARITYERRORMASK_OFF                   ((uint32_t)0x00000000U)
245 #define SPDIFRX_PARITYERRORMASK_ON                    ((uint32_t)SPDIFRX_CR_PMSK)
246 /**
247   * @}
248   */
249 
250 /** @defgroup SPDIFRX_Channel_Selection  SPDIFRX Channel Selection
251   * @{
252   */
253 #define SPDIFRX_CHANNEL_A      ((uint32_t)0x00000000U)
254 #define SPDIFRX_CHANNEL_B      ((uint32_t)SPDIFRX_CR_CHSEL)
255 /**
256   * @}
257   */
258 
259 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format
260   * @{
261   */
262 #define SPDIFRX_DATAFORMAT_LSB                   ((uint32_t)0x00000000U)
263 #define SPDIFRX_DATAFORMAT_MSB                   ((uint32_t)0x00000010U)
264 #define SPDIFRX_DATAFORMAT_32BITS                ((uint32_t)0x00000020U)
265 /**
266   * @}
267   */
268 
269 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode
270   * @{
271   */
272 #define SPDIFRX_STEREOMODE_DISABLE           ((uint32_t)0x00000000U)
273 #define SPDIFRX_STEREOMODE_ENABLE           ((uint32_t)SPDIFRX_CR_RXSTEO)
274 /**
275   * @}
276   */
277 
278 /** @defgroup SPDIFRX_State SPDIFRX State
279   * @{
280   */
281 
282 #define SPDIFRX_STATE_IDLE    ((uint32_t)0xFFFFFFFCU)
283 #define SPDIFRX_STATE_SYNC    ((uint32_t)0x00000001U)
284 #define SPDIFRX_STATE_RCV     ((uint32_t)SPDIFRX_CR_SPDIFEN)
285 /**
286   * @}
287   */
288 
289 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition
290   * @{
291   */
292 #define SPDIFRX_IT_RXNE                       ((uint32_t)SPDIFRX_IMR_RXNEIE)
293 #define SPDIFRX_IT_CSRNE                      ((uint32_t)SPDIFRX_IMR_CSRNEIE)
294 #define SPDIFRX_IT_PERRIE                     ((uint32_t)SPDIFRX_IMR_PERRIE)
295 #define SPDIFRX_IT_OVRIE                      ((uint32_t)SPDIFRX_IMR_OVRIE)
296 #define SPDIFRX_IT_SBLKIE                     ((uint32_t)SPDIFRX_IMR_SBLKIE)
297 #define SPDIFRX_IT_SYNCDIE                    ((uint32_t)SPDIFRX_IMR_SYNCDIE)
298 #define SPDIFRX_IT_IFEIE                      ((uint32_t)SPDIFRX_IMR_IFEIE )
299 /**
300   * @}
301   */
302 
303 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition
304   * @{
305   */
306 #define SPDIFRX_FLAG_RXNE                   ((uint32_t)SPDIFRX_SR_RXNE)
307 #define SPDIFRX_FLAG_CSRNE                  ((uint32_t)SPDIFRX_SR_CSRNE)
308 #define SPDIFRX_FLAG_PERR                   ((uint32_t)SPDIFRX_SR_PERR)
309 #define SPDIFRX_FLAG_OVR                    ((uint32_t)SPDIFRX_SR_OVR)
310 #define SPDIFRX_FLAG_SBD                    ((uint32_t)SPDIFRX_SR_SBD)
311 #define SPDIFRX_FLAG_SYNCD                  ((uint32_t)SPDIFRX_SR_SYNCD)
312 #define SPDIFRX_FLAG_FERR                   ((uint32_t)SPDIFRX_SR_FERR)
313 #define SPDIFRX_FLAG_SERR                   ((uint32_t)SPDIFRX_SR_SERR)
314 #define SPDIFRX_FLAG_TERR                   ((uint32_t)SPDIFRX_SR_TERR)
315 /**
316   * @}
317   */
318 
319 /**
320   * @}
321   */
322 
323 /* Exported macros -----------------------------------------------------------*/
324 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros
325   * @{
326   */
327 
328 /** @brief  Reset SPDIFRX handle state
329   * @param  __HANDLE__: SPDIFRX handle.
330   * @retval None
331   */
332 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = (uint16_t)SPDIFRX_CR_SPDIFEN)
333 
334 /** @brief  Disable the specified SPDIFRX peripheral (IDLE State).
335   * @param  __HANDLE__: specifies the SPDIFRX Handle.
336   * @retval None
337   */
338 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
339 
340 /** @brief  Enable the specified SPDIFRX peripheral (SYNC State).
341   * @param  __HANDLE__: specifies the SPDIFRX Handle.
342   * @retval None
343   */
344 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
345 
346 
347 /** @brief  Enable the specified SPDIFRX peripheral (RCV State).
348   * @param  __HANDLE__: specifies the SPDIFRX Handle.
349   * @retval None
350   */
351 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
352 
353 
354 /** @brief  Enable or disable the specified SPDIFRX interrupts.
355   * @param  __HANDLE__: specifies the SPDIFRX Handle.
356   * @param  __INTERRUPT__: specifies the interrupt source to enable or disable.
357   *        This parameter can be one of the following values:
358   *            @arg SPDIFRX_IT_RXNE
359   *            @arg SPDIFRX_IT_CSRNE
360   *            @arg SPDIFRX_IT_PERRIE
361   *            @arg SPDIFRX_IT_OVRIE
362   *            @arg SPDIFRX_IT_SBLKIE
363   *            @arg SPDIFRX_IT_SYNCDIE
364   *            @arg SPDIFRX_IT_IFEIE
365   * @retval None
366   */
367 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
368 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__)))
369 
370 /** @brief  Checks if the specified SPDIFRX interrupt source is enabled or disabled.
371   * @param  __HANDLE__: specifies the SPDIFRX Handle.
372   * @param  __INTERRUPT__: specifies the SPDIFRX interrupt source to check.
373   *          This parameter can be one of the following values:
374   *            @arg SPDIFRX_IT_RXNE
375   *            @arg SPDIFRX_IT_CSRNE
376   *            @arg SPDIFRX_IT_PERRIE
377   *            @arg SPDIFRX_IT_OVRIE
378   *            @arg SPDIFRX_IT_SBLKIE
379   *            @arg SPDIFRX_IT_SYNCDIE
380   *            @arg SPDIFRX_IT_IFEIE
381   * @retval The new state of __IT__ (TRUE or FALSE).
382   */
383 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
384 
385 /** @brief  Checks whether the specified SPDIFRX flag is set or not.
386   * @param  __HANDLE__: specifies the SPDIFRX Handle.
387   * @param  __FLAG__: specifies the flag to check.
388   *        This parameter can be one of the following values:
389   *            @arg SPDIFRX_FLAG_RXNE
390   *            @arg SPDIFRX_FLAG_CSRNE
391   *            @arg SPDIFRX_FLAG_PERR
392   *            @arg SPDIFRX_FLAG_OVR
393   *            @arg SPDIFRX_FLAG_SBD
394   *            @arg SPDIFRX_FLAG_SYNCD
395   *            @arg SPDIFRX_FLAG_FERR
396   *            @arg SPDIFRX_FLAG_SERR
397   *            @arg SPDIFRX_FLAG_TERR
398   * @retval The new state of __FLAG__ (TRUE or FALSE).
399   */
400 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
401 
402 /** @brief  Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
403   * @param  __HANDLE__: specifies the USART Handle.
404   * @param  __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
405   *                       to clear the corresponding interrupt
406   *          This parameter can be one of the following values:
407   *            @arg SPDIFRX_FLAG_PERR
408   *            @arg SPDIFRX_FLAG_OVR
409   *            @arg SPDIFRX_SR_SBD
410   *            @arg SPDIFRX_SR_SYNCD
411   * @retval None
412   */
413 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
414 
415 /**
416   * @}
417   */
418 
419 /* Exported functions --------------------------------------------------------*/
420 /** @addtogroup SPDIFRX_Exported_Functions
421   * @{
422   */
423 
424 /** @addtogroup SPDIFRX_Exported_Functions_Group1
425   * @{
426   */
427 /* Initialization/de-initialization functions  **********************************/
428 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
429 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif);
430 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
431 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
432 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef  sDataFormat);
433 /**
434   * @}
435   */
436 
437 /** @addtogroup SPDIFRX_Exported_Functions_Group2
438   * @{
439   */
440 /* I/O operation functions  ***************************************************/
441 /* Blocking mode: Polling */
442 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
443 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
444 
445 /* Non-Blocking mode: Interrupt */
446 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
447 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
448 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
449 
450 /* Non-Blocking mode: DMA */
451 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
452 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
453 
454 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
455 
456 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
457 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
458 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
459 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
460 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
461 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
462 /**
463   * @}
464   */
465 
466 /** @addtogroup SPDIFRX_Exported_Functions_Group3
467   * @{
468   */
469 /* Peripheral Control and State functions  ************************************/
470 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif);
471 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif);
472 /**
473   * @}
474   */
475 
476 /**
477   * @}
478   */
479 /* Private types -------------------------------------------------------------*/
480 /* Private variables ---------------------------------------------------------*/
481 /* Private constants ---------------------------------------------------------*/
482 /* Private macros ------------------------------------------------------------*/
483 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros
484   * @{
485   */
486 #define IS_SPDIFRX_INPUT_SELECT(INPUT)  (((INPUT) == SPDIFRX_INPUT_IN1) || \
487                                          ((INPUT) == SPDIFRX_INPUT_IN2) || \
488                                          ((INPUT) == SPDIFRX_INPUT_IN3)  || \
489                                          ((INPUT) == SPDIFRX_INPUT_IN0))
490 #define IS_SPDIFRX_MAX_RETRIES(RET)   (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
491                                       ((RET) == SPDIFRX_MAXRETRIES_3)  || \
492                                       ((RET) == SPDIFRX_MAXRETRIES_15) || \
493                                       ((RET) == SPDIFRX_MAXRETRIES_63))
494 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL)    (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
495                                                ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
496 #define IS_PREAMBLE_TYPE_MASK(VAL)           (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
497                                              ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
498 #define IS_VALIDITY_MASK(VAL)               (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
499                                              ((VAL) == SPDIFRX_VALIDITYMASK_ON))
500 #define IS_PARITY_ERROR_MASK(VAL)            (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
501                                              ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
502 #define IS_SPDIFRX_CHANNEL(CHANNEL)   (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
503                                        ((CHANNEL) == SPDIFRX_CHANNEL_B))
504 #define IS_SPDIFRX_DATA_FORMAT(FORMAT)           (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
505                                                  ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
506                                                  ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
507 #define IS_STEREO_MODE(MODE)                 (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
508                                              ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
509 
510 #define IS_CHANNEL_STATUS_MASK(VAL)          (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
511                                               ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
512 /**
513   * @}
514   */
515 
516 /* Private functions ---------------------------------------------------------*/
517 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions
518   * @{
519   */
520 /**
521   * @}
522   */
523 
524 /**
525   * @}
526   */
527 
528 /**
529   * @}
530   */
531 
532 #endif /* SPDIFRX */
533 
534 #ifdef __cplusplus
535 }
536 #endif
537 
538 
539 #endif /* __STM32MP1xx_HAL_SPDIFRX_H */
540