1 /** 2 ****************************************************************************** 3 * @file stm32mp1xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32MP1xx_HAL_DAC_H 21 #define STM32MP1xx_HAL_DAC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32mp1xx_hal_def.h" 30 31 /** @addtogroup STM32MP1xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup DAC 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** @defgroup DAC_Exported_Types DAC Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL State structures definition 47 */ 48 typedef enum 49 { 50 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ 51 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ 52 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ 53 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ 54 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ 55 56 } HAL_DAC_StateTypeDef; 57 58 /** 59 * @brief DAC handle Structure definition 60 */ 61 typedef struct __DAC_HandleTypeDef 62 { 63 DAC_TypeDef *Instance; /*!< Register base address */ 64 65 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 66 67 HAL_LockTypeDef Lock; /*!< DAC locking object */ 68 69 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 70 71 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 72 73 __IO uint32_t ErrorCode; /*!< DAC Error code */ 74 75 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 76 void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 77 void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 78 void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 79 void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); 80 void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 81 void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 82 void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 83 void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac); 84 85 void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); 86 void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); 87 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 88 89 } DAC_HandleTypeDef; 90 91 /** 92 * @brief DAC Configuration sample and hold Channel structure definition 93 */ 94 typedef struct 95 { 96 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 97 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 98 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 99 100 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 101 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 102 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 103 104 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 105 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 106 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 107 } 108 DAC_SampleAndHoldConfTypeDef; 109 110 /** 111 * @brief DAC Configuration regular Channel structure definition 112 */ 113 typedef struct 114 { 115 uint32_t DAC_HighFrequency; /*!< Specifies the frequency interface mode 116 This parameter can be a value of @ref DAC_HighFrequency */ 117 118 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 119 This parameter can be a value of @ref DAC_SampleAndHold */ 120 121 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 122 This parameter can be a value of @ref DAC_trigger_selection */ 123 124 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 125 This parameter can be a value of @ref DAC_output_buffer */ 126 127 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 128 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 129 130 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 131 This parameter must be a value of @ref DAC_UserTrimming 132 DAC_UserTrimming is either factory or user trimming */ 133 134 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 135 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 136 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 137 138 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 139 140 } DAC_ChannelConfTypeDef; 141 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 142 /** 143 * @brief HAL DAC Callback ID enumeration definition 144 */ 145 typedef enum 146 { 147 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 148 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 149 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 150 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 151 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 152 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 153 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 154 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 155 HAL_DAC_MSP_INIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 156 HAL_DAC_MSP_DEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 157 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 158 } HAL_DAC_CallbackIDTypeDef; 159 160 /** 161 * @brief HAL DAC Callback pointer definition 162 */ 163 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 164 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 165 166 /** 167 * @} 168 */ 169 170 /* Exported constants --------------------------------------------------------*/ 171 172 /** @defgroup DAC_Exported_Constants DAC Exported Constants 173 * @{ 174 */ 175 176 /** @defgroup DAC_Error_Code DAC Error Code 177 * @{ 178 */ 179 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 180 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 181 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 182 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 183 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 184 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 185 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 186 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 187 /** 188 * @} 189 */ 190 191 /** @defgroup DAC_trigger_selection DAC trigger selection 192 * @{ 193 */ 194 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 195 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ 196 #define DAC_TRIGGER_T1_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ 197 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 198 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 199 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_2 |DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 200 #define DAC_TRIGGER_T6_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 201 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 202 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 203 #define DAC_TRIGGER_T15_TRGO ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TEN1)) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 204 #define DAC_TRIGGER_LP1_OUT ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< LP1 OUT TRGO selected as external conversion trigger for DAC channel */ 205 #define DAC_TRIGGER_LP2_OUT ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< LP2 OUT TRGO selected as external conversion trigger for DAC channel */ 206 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 207 /** 208 * @} 209 */ 210 211 /** @defgroup DAC_output_buffer DAC output buffer 212 * @{ 213 */ 214 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) 215 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_MCR_MODE1_1) 216 217 /** 218 * @} 219 */ 220 221 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 222 * @{ 223 */ 224 #define DAC_CHIPCONNECT_DISABLE ((uint32_t)0x00000000) 225 #define DAC_CHIPCONNECT_ENABLE ((uint32_t)DAC_MCR_MODE1_0) 226 227 /** 228 * @} 229 */ 230 231 /** @defgroup DAC_UserTrimming DAC User Trimming 232 * @{ 233 */ 234 235 #define DAC_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */ 236 #define DAC_TRIMMING_USER ((uint32_t)0x00000001) /*!< User trimming */ 237 238 /** 239 * @} 240 */ 241 242 /** @defgroup DAC_SampleAndHold. Mode is Sample and hold (low power or normal) 243 * @{ 244 */ 245 #define DAC_SAMPLEANDHOLD_DISABLE ((uint32_t)0x00000000) 246 #define DAC_SAMPLEANDHOLD_ENABLE ((uint32_t)DAC_MCR_MODE1_2) 247 248 249 /** 250 * @} 251 */ 252 253 254 /** @defgroup DAC_Channel_selection DAC Channel selection 255 * @{ 256 */ 257 #define DAC_CHANNEL_1 ((uint32_t)0x00000000) 258 #define DAC_CHANNEL_2 ((uint32_t)0x00000010) 259 260 /** 261 * @} 262 */ 263 264 /** @defgroup DAC_data_alignment DAC data alignment 265 * @{ 266 */ 267 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000) 268 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004) 269 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008) 270 /** 271 * @} 272 */ 273 274 /** @defgroup DAC_flags_definition DAC flags definition 275 * @{ 276 */ 277 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 278 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 279 280 /** 281 * @} 282 */ 283 284 /** @defgroup DAC_IT_definition DAC IT definition 285 * @{ 286 */ 287 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) 288 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) 289 290 /** 291 * @} 292 */ 293 294 /** @defgroup DAC_HighFrequency DAC high frequency interface mode 295 * @{ 296 */ 297 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE ((uint32_t)0x00000000) /*!< High frequency interface mode disabled */ 298 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ ((uint32_t)DAC_CR_HFSEL) /*!< High frequency interface mode enabled */ 299 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC ((uint32_t)0x00000002) /*!< High frequency interface mode automatic */ 300 301 /** 302 * @} 303 */ 304 305 /** 306 * @} 307 */ 308 309 /* Exported macro ------------------------------------------------------------*/ 310 311 /** @defgroup DAC_Exported_Macros DAC Exported Macros 312 * @{ 313 */ 314 315 /** @brief Reset DAC handle state. 316 * @param __HANDLE__: specifies the DAC handle. 317 * @retval None 318 */ 319 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 320 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 321 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 322 (__HANDLE__)->MspInitCallback = NULL; \ 323 (__HANDLE__)->MspDeInitCallback = NULL; \ 324 } while(0) 325 #else 326 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 327 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 328 329 /** @brief Enable the DAC channel. 330 * @param __HANDLE__: specifies the DAC handle. 331 * @param __DAC_Channel__: specifies the DAC channel 332 * @retval None 333 */ 334 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 335 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) 336 337 /** @brief Disable the DAC channel. 338 * @param __HANDLE__: specifies the DAC handle 339 * @param __DAC_Channel__: specifies the DAC channel. 340 * @retval None 341 */ 342 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 343 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) 344 345 /** @brief Set DHR12R1 alignment. 346 * @param __ALIGNMENT__: specifies the DAC alignment 347 * @retval None 348 */ 349 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__)) 350 351 /** @brief Set DHR12R2 alignment. 352 * @param __ALIGNMENT__: specifies the DAC alignment 353 * @retval None 354 */ 355 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__)) 356 357 /** @brief Set DHR12RD alignment. 358 * @param __ALIGNMENT__: specifies the DAC alignment 359 * @retval None 360 */ 361 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__)) 362 363 /** @brief Enable the DAC interrupt. 364 * @param __HANDLE__: specifies the DAC handle 365 * @param __INTERRUPT__: specifies the DAC interrupt. 366 * This parameter can be any combination of the following values: 367 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 368 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 369 * @retval None 370 */ 371 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 372 373 /** @brief Disable the DAC interrupt. 374 * @param __HANDLE__: specifies the DAC handle 375 * @param __INTERRUPT__: specifies the DAC interrupt. 376 * This parameter can be any combination of the following values: 377 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 378 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 379 * @retval None 380 */ 381 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 382 383 /** @brief Check whether the specified DAC interrupt source is enabled or not. 384 * @param __HANDLE__: DAC handle 385 * @param __INTERRUPT__: DAC interrupt source to check 386 * This parameter can be any combination of the following values: 387 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 388 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 389 * @retval State of interruption (SET or RESET) 390 */ 391 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 392 393 /** @brief Get the selected DAC's flag status. 394 * @param __HANDLE__: specifies the DAC handle. 395 * @param __FLAG__: specifies the DAC flag to get. 396 * This parameter can be any combination of the following values: 397 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 398 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 399 * @retval None 400 */ 401 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 402 403 /** @brief Clear the DAC's flag. 404 * @param __HANDLE__: specifies the DAC handle. 405 * @param __FLAG__: specifies the DAC flag to clear. 406 * This parameter can be any combination of the following values: 407 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 408 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 409 * @retval None 410 */ 411 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 412 413 /** 414 * @} 415 */ 416 417 /* Private macro -------------------------------------------------------------*/ 418 419 /** @defgroup DAC_Private_Macros DAC Private Macros 420 * @{ 421 */ 422 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 423 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 424 425 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 426 ((CHANNEL) == DAC_CHANNEL_2)) 427 428 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 429 ((ALIGN) == DAC_ALIGN_12B_L) || \ 430 ((ALIGN) == DAC_ALIGN_8B_R)) 431 432 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) 433 434 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FF) 435 436 /** 437 * @} 438 */ 439 440 /* Include DAC HAL Extended module */ 441 #include "stm32mp1xx_hal_dac_ex.h" 442 443 /* Exported functions --------------------------------------------------------*/ 444 445 /** @addtogroup DAC_Exported_Functions 446 * @{ 447 */ 448 449 /** @addtogroup DAC_Exported_Functions_Group1 450 * @{ 451 */ 452 /* Initialization and de-initialization functions *****************************/ 453 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 454 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 455 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 456 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 457 458 /** 459 * @} 460 */ 461 462 /** @addtogroup DAC_Exported_Functions_Group2 463 * @{ 464 */ 465 /* IO operation functions *****************************************************/ 466 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 467 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 468 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, uint32_t Alignment); 469 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 470 471 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 472 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 473 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 474 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 475 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 476 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 477 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 478 /* DAC callback registering/unregistering */ 479 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId, pDAC_CallbackTypeDef pCallback); 480 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId); 481 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 482 /** 483 * @} 484 */ 485 486 /** @addtogroup DAC_Exported_Functions_Group3 487 * @{ 488 */ 489 /* Peripheral Control functions ***********************************************/ 490 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 491 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel); 492 /** 493 * @} 494 */ 495 496 /** @addtogroup DAC_Exported_Functions_Group4 497 * @{ 498 */ 499 /* Peripheral State and Error functions ***************************************/ 500 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac); 501 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 502 503 /** 504 * @} 505 */ 506 507 /** 508 * @} 509 */ 510 511 /** 512 * @} 513 */ 514 515 /** 516 * @} 517 */ 518 519 #ifdef __cplusplus 520 } 521 #endif 522 523 524 #endif /*STM32MP1xx_HAL_DAC_H */ 525
