1 /**
2   ******************************************************************************
3   * @file    stm32l5xx_ll_lptim.c
4   * @author  MCD Application Team
5   * @brief   LPTIM LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2019 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32l5xx_ll_lptim.h"
22 #include "stm32l5xx_ll_bus.h"
23 #include "stm32l5xx_ll_rcc.h"
24 
25 
26 #ifdef  USE_FULL_ASSERT
27 #include "stm32_assert.h"
28 #else
29 #define assert_param(expr) ((void)0U)
30 #endif /* USE_FULL_ASSERT */
31 
32 /** @addtogroup STM32L5xx_LL_Driver
33   * @{
34   */
35 
36 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3)
37 
38 /** @addtogroup LPTIM_LL
39   * @{
40   */
41 
42 /* Private types -------------------------------------------------------------*/
43 /* Private variables ---------------------------------------------------------*/
44 /* Private constants ---------------------------------------------------------*/
45 /* Private macros ------------------------------------------------------------*/
46 /** @addtogroup LPTIM_LL_Private_Macros
47   * @{
48   */
49 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
50                                              || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
51 
52 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1)   \
53                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2)   \
54                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4)   \
55                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8)   \
56                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16)  \
57                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32)  \
58                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64)  \
59                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
60 
61 #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
62                                          || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
63 
64 #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
65                                                 || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
66 /**
67   * @}
68   */
69 
70 
71 /* Private function prototypes -----------------------------------------------*/
72 /* Private functions ---------------------------------------------------------*/
73 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
74   * @{
75   */
76 /**
77   * @}
78   */
79 /* Exported functions --------------------------------------------------------*/
80 /** @addtogroup LPTIM_LL_Exported_Functions
81   * @{
82   */
83 
84 /** @addtogroup LPTIM_LL_EF_Init
85   * @{
86   */
87 
88 /**
89   * @brief  Set LPTIMx registers to their reset values.
90   * @param  LPTIMx LP Timer instance
91   * @retval An ErrorStatus enumeration value:
92   *          - SUCCESS: LPTIMx registers are de-initialized
93   *          - ERROR: invalid LPTIMx instance
94   */
LL_LPTIM_DeInit(LPTIM_TypeDef * LPTIMx)95 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx)
96 {
97   ErrorStatus result = SUCCESS;
98 
99   /* Check the parameters */
100   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
101 
102   if (LPTIMx == LPTIM1)
103   {
104     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
105     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
106   }
107   else if (LPTIMx == LPTIM2)
108   {
109     LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2);
110     LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2);
111   }
112   else if (LPTIMx == LPTIM3)
113   {
114     LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM3);
115     LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM3);
116   }
117   else
118   {
119     result = ERROR;
120   }
121 
122   return result;
123 }
124 
125 /**
126   * @brief  Set each fields of the LPTIM_InitStruct structure to its default
127   *         value.
128   * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
129   * @retval None
130   */
LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef * LPTIM_InitStruct)131 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
132 {
133   /* Set the default configuration */
134   LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
135   LPTIM_InitStruct->Prescaler   = LL_LPTIM_PRESCALER_DIV1;
136   LPTIM_InitStruct->Waveform    = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
137   LPTIM_InitStruct->Polarity    = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
138 }
139 
140 /**
141   * @brief  Configure the LPTIMx peripheral according to the specified parameters.
142   * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
143   * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
144   * @param  LPTIMx LP Timer Instance
145   * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
146   * @retval An ErrorStatus enumeration value:
147   *          - SUCCESS: LPTIMx instance has been initialized
148   *          - ERROR: LPTIMx instance hasn't been initialized
149   */
LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx,const LL_LPTIM_InitTypeDef * LPTIM_InitStruct)150 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
151 {
152   ErrorStatus result = SUCCESS;
153   /* Check the parameters */
154   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
155   assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
156   assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
157   assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
158   assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
159 
160   /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
161      (ENABLE bit is reset to 0).
162   */
163   if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL)
164   {
165     result = ERROR;
166   }
167   else
168   {
169     /* Set CKSEL bitfield according to ClockSource value */
170     /* Set PRESC bitfield according to Prescaler value */
171     /* Set WAVE bitfield according to Waveform value */
172     /* Set WAVEPOL bitfield according to Polarity value */
173     MODIFY_REG(LPTIMx->CFGR,
174                (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL),
175                LPTIM_InitStruct->ClockSource | \
176                LPTIM_InitStruct->Prescaler | \
177                LPTIM_InitStruct->Waveform | \
178                LPTIM_InitStruct->Polarity);
179   }
180 
181   return result;
182 }
183 
184 /**
185   * @brief  Disable the LPTIM instance
186   * @rmtoll CR           ENABLE        LL_LPTIM_Disable
187   * @param  LPTIMx Low-Power Timer instance
188   * @note   The following sequence is required to solve LPTIM disable HW limitation.
189   *         Please check Errata Sheet ES0335 for more details under "MCU may remain
190   *         stuck in LPTIM interrupt when entering Stop mode" section.
191   * @retval None
192   */
LL_LPTIM_Disable(LPTIM_TypeDef * LPTIMx)193 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
194 {
195   LL_RCC_ClocksTypeDef rcc_clock;
196   uint32_t tmpclksource = 0;
197   uint32_t tmpIER;
198   uint32_t tmpCFGR;
199   uint32_t tmpCMP;
200   uint32_t tmpARR;
201   uint32_t primask_bit;
202   uint32_t tmpOR;
203   uint32_t tmpRCR;
204 
205   /* Check the parameters */
206   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
207 
208   /* Enter critical section */
209   primask_bit = __get_PRIMASK();
210   __set_PRIMASK(1) ;
211 
212   /********** Save LPTIM Config *********/
213   /* Save LPTIM source clock */
214   switch ((uint32_t)LPTIMx)
215   {
216     case LPTIM1_BASE:
217       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE);
218       break;
219     case LPTIM2_BASE:
220       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE);
221       break;
222     case LPTIM3_BASE:
223       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM3_CLKSOURCE);
224       break;
225     default:
226       break;
227   }
228 
229   /* Save LPTIM configuration registers */
230   tmpIER = LPTIMx->IER;
231   tmpCFGR = LPTIMx->CFGR;
232   tmpCMP = LPTIMx->CMP;
233   tmpARR = LPTIMx->ARR;
234   tmpOR = LPTIMx->OR;
235   tmpRCR = LPTIMx->RCR;
236 
237   /************* Reset LPTIM ************/
238   (void)LL_LPTIM_DeInit(LPTIMx);
239 
240   /********* Restore LPTIM Config *******/
241   LL_RCC_GetSystemClocksFreq(&rcc_clock);
242 
243   if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
244   {
245     /* Force LPTIM source kernel clock from APB */
246     switch ((uint32_t)LPTIMx)
247     {
248       case LPTIM1_BASE:
249         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1);
250         break;
251       case LPTIM2_BASE:
252         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE_PCLK1);
253         break;
254       case LPTIM3_BASE:
255         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM3_CLKSOURCE_PCLK1);
256         break;
257       default:
258         break;
259     }
260 
261     if (tmpCMP != 0UL)
262     {
263       /* Restore CMP and ARR registers (LPTIM should be enabled first) */
264       LPTIMx->CR |= LPTIM_CR_ENABLE;
265       LPTIMx->CMP = tmpCMP;
266 
267       /* Polling on CMP write ok status after above restore operation */
268       do
269       {
270         rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
271       } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
272 
273       LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
274     }
275 
276     if (tmpARR != 0UL)
277     {
278       LPTIMx->CR |= LPTIM_CR_ENABLE;
279       LPTIMx->ARR = tmpARR;
280 
281       LL_RCC_GetSystemClocksFreq(&rcc_clock);
282       /* Polling on ARR write ok status after above restore operation */
283       do
284       {
285         rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
286       } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
287 
288       LL_LPTIM_ClearFlag_ARROK(LPTIMx);
289     }
290 
291     if (tmpRCR != 0UL)
292     {
293       LPTIMx->CR |= LPTIM_CR_ENABLE;
294       LPTIMx->RCR = tmpRCR;
295 
296       LL_RCC_GetSystemClocksFreq(&rcc_clock);
297       /* Polling on RCR write ok status after above restore operation */
298       do
299       {
300         rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
301       } while (((LL_LPTIM_IsActiveFlag_REPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
302 
303       LL_LPTIM_ClearFlag_REPOK(LPTIMx);
304     }
305 
306     /* Restore LPTIM source kernel clock */
307     LL_RCC_SetLPTIMClockSource(tmpclksource);
308   }
309 
310   /* Restore configuration registers (LPTIM should be disabled first) */
311   LPTIMx->CR &= ~(LPTIM_CR_ENABLE);
312   LPTIMx->IER = tmpIER;
313   LPTIMx->CFGR = tmpCFGR;
314   LPTIMx->OR = tmpOR;
315 
316   /* Exit critical section: restore previous priority mask */
317   __set_PRIMASK(primask_bit);
318 }
319 
320 /**
321   * @}
322   */
323 
324 /**
325   * @}
326   */
327 
328 /**
329   * @}
330   */
331 
332 #endif /* LPTIM1 || LPTIM2 || LPTIM3 */
333 
334 /**
335   * @}
336   */
337 
338 #endif /* USE_FULL_LL_DRIVER */
339