1 /**
2 ******************************************************************************
3 * @file stm32l5xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2019 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### How to use this driver #####
28 ==============================================================================
29 [..]
30 The LPTIM HAL driver can be used as follows:
31
32 (#)Initialize the LPTIM low level resources by implementing the
33 HAL_LPTIM_MspInit():
34 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
35 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
36 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
37 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
38 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
39
40 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
41 configures mainly:
42 (++) The instance: LPTIM1, LPTIM2 or LPTIM3.
43 (++) Clock: the counter clock.
44 (+++) Source : it can be either the ULPTIM input (IN1) or one of
45 the internal clock; (APB, LSE, LSI or HSI).
46 (+++) Prescaler: select the clock divider.
47 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
48 as counter clock source.
49 (+++) Polarity: polarity of the active edge for the counter unit
50 if the ULPTIM input is selected.
51 (+++) SampleTime: clock sampling time to configure the clock glitch
52 filter.
53 (++) Trigger: How the counter start.
54 (+++) Source: trigger can be software or one of the hardware triggers.
55 (+++) ActiveEdge : only for hardware trigger.
56 (+++) SampleTime : trigger sampling time to configure the trigger
57 glitch filter.
58 (++) OutputPolarity : 2 opposite polarities are possible.
59 (++) UpdateMode: specifies whether the update of the autoreload and
60 the compare values is done immediately or after the end of current
61 period.
62 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
63 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
64 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
65
66 (#)Six modes are available:
67
68 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
69 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
70 mode.
71
72 (++) One Pulse Mode: To generate pulse with specified width in response
73 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
74 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
75
76 (++) Set once Mode: In this mode, the output changes the level (from
77 low level to high level if the output polarity is configured high, else
78 the opposite) when a compare match occurs. To start this mode, call
79 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
80 interruption mode.
81
82 (++) Encoder Mode: To use the encoder interface call
83 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
84 interruption mode. Only available for LPTIM1 instance.
85
86 (++) Time out Mode: an active edge on one selected trigger input rests
87 the counter. The first trigger event will start the timer, any
88 successive trigger event will reset the counter and the timer will
89 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
90 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
91
92 (++) Counter Mode: counter can be used to count external events on
93 the LPTIM Input1 or it can be used to count internal clock cycles.
94 To start this mode, call HAL_LPTIM_Counter_Start() or
95 HAL_LPTIM_Counter_Start_IT() for interruption mode.
96
97
98 (#) User can stop any process by calling the corresponding API:
99 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
100 already started in interruption mode.
101
102 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
103
104 *** Callback registration ***
105 =============================================
106 [..]
107 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
108 allows the user to configure dynamically the driver callbacks.
109 [..]
110 Use Function HAL_LPTIM_RegisterCallback() to register a callback.
111 HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
112 the Callback ID and a pointer to the user callback function.
113 [..]
114 Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the
115 default weak function.
116 HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
117 and the Callback ID.
118 [..]
119 These functions allow to register/unregister following callbacks:
120
121 (+) MspInitCallback : LPTIM Base Msp Init Callback.
122 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
123 (+) CompareMatchCallback : Compare match Callback.
124 (+) AutoReloadMatchCallback : Auto-reload match Callback.
125 (+) TriggerCallback : External trigger event detection Callback.
126 (+) CompareWriteCallback : Compare register write complete Callback.
127 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
128 (+) DirectionUpCallback : Up-counting direction change Callback.
129 (+) DirectionDownCallback : Down-counting direction change Callback.
130 (+) UpdateEventCallback : Update event detection Callback.
131 (+) RepCounterWriteCallback : Repetition counter register write complete Callback.
132
133 [..]
134 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
135 all interrupt callbacks are set to the corresponding weak functions:
136 examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback().
137
138 [..]
139 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
140 functionalities in the Init/DeInit only when these callbacks are null
141 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
142 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
143
144 [..]
145 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
146 Exception done MspInit/MspDeInit that can be registered/unregistered
147 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
148 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
149 In that case first register the MspInit/MspDeInit user callbacks
150 using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
151
152 [..]
153 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
154 not defined, the callback registration feature is not available and all callbacks
155 are set to the corresponding weak functions.
156
157 @endverbatim
158 ******************************************************************************
159 */
160
161 /* Includes ------------------------------------------------------------------*/
162 #include "stm32l5xx_hal.h"
163
164 /** @addtogroup STM32L5xx_HAL_Driver
165 * @{
166 */
167
168 /** @defgroup LPTIM LPTIM
169 * @brief LPTIM HAL module driver.
170 * @{
171 */
172
173 #ifdef HAL_LPTIM_MODULE_ENABLED
174
175 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3)
176
177 /* Private typedef -----------------------------------------------------------*/
178 /* Private define ------------------------------------------------------------*/
179 /** @addtogroup LPTIM_Private_Constants
180 * @{
181 */
182 #define TIMEOUT 1000UL /* Timeout is 1s */
183 /**
184 * @}
185 */
186
187 /* Private macro -------------------------------------------------------------*/
188 /** @addtogroup LPTIM_Private_Macros
189 * @{
190 */
191 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) \
192 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() :\
193 ((__INSTANCE__) == LPTIM2) ? __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT() : __HAL_LPTIM_LPTIM3_EXTI_ENABLE_IT())
194
195 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) \
196 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() :\
197 ((__INSTANCE__) == LPTIM2) ? __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT() : __HAL_LPTIM_LPTIM3_EXTI_DISABLE_IT())
198 /**
199 * @}
200 */
201
202 /* Private variables ---------------------------------------------------------*/
203 /* Private function prototypes -----------------------------------------------*/
204 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
205 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
206 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
207 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
208
209 /* Exported functions --------------------------------------------------------*/
210
211 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
212 * @{
213 */
214
215 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
216 * @brief Initialization and Configuration functions.
217 *
218 @verbatim
219 ==============================================================================
220 ##### Initialization and de-initialization functions #####
221 ==============================================================================
222 [..] This section provides functions allowing to:
223 (+) Initialize the LPTIM according to the specified parameters in the
224 LPTIM_InitTypeDef and initialize the associated handle.
225 (+) DeInitialize the LPTIM peripheral.
226 (+) Initialize the LPTIM MSP.
227 (+) DeInitialize the LPTIM MSP.
228
229 @endverbatim
230 * @{
231 */
232
233 /**
234 * @brief Initialize the LPTIM according to the specified parameters in the
235 * LPTIM_InitTypeDef and initialize the associated handle.
236 * @param hlptim LPTIM handle
237 * @retval HAL status
238 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)239 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
240 {
241 uint32_t tmpcfgr;
242
243 /* Check the LPTIM handle allocation */
244 if (hlptim == NULL)
245 {
246 return HAL_ERROR;
247 }
248
249 /* Check the parameters */
250 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
251
252 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
253 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
254 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
255 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
256 {
257 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
258 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
259 }
260 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
261 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
262 {
263 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
264 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
265 }
266 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
267 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
268 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
269 assert_param(IS_LPTIM_REPETITION(hlptim->Init.RepetitionCounter));
270
271 if (hlptim->State == HAL_LPTIM_STATE_RESET)
272 {
273 /* Allocate lock resource and initialize it */
274 hlptim->Lock = HAL_UNLOCKED;
275
276 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
277 /* Reset interrupt callbacks to legacy weak callbacks */
278 LPTIM_ResetCallback(hlptim);
279
280 if (hlptim->MspInitCallback == NULL)
281 {
282 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
283 }
284
285 /* Init the low level hardware : GPIO, CLOCK, NVIC */
286 hlptim->MspInitCallback(hlptim);
287 #else
288 /* Init the low level hardware : GPIO, CLOCK, NVIC */
289 HAL_LPTIM_MspInit(hlptim);
290 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
291 }
292
293 /* Change the LPTIM state */
294 hlptim->State = HAL_LPTIM_STATE_BUSY;
295
296 /* Enable the Peripheral */
297 __HAL_LPTIM_ENABLE(hlptim);
298
299 /* Clear flag */
300 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
301
302 /* Set the repetition counter */
303 __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
304
305 /* Wait for the completion of the write operation to the LPTIM_RCR register */
306 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
307 {
308 return HAL_TIMEOUT;
309 }
310
311 /* Disable the Peripheral */
312 __HAL_LPTIM_DISABLE(hlptim);
313
314 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
315 {
316 return HAL_TIMEOUT;
317 }
318
319
320 /* Get the LPTIMx CFGR value */
321 tmpcfgr = hlptim->Instance->CFGR;
322
323 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
324 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
325 {
326 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
327 }
328 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
329 {
330 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
331 }
332
333 /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
334 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
335 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
336
337 /* Set initialization parameters */
338 tmpcfgr |= (hlptim->Init.Clock.Source |
339 hlptim->Init.Clock.Prescaler |
340 hlptim->Init.OutputPolarity |
341 hlptim->Init.UpdateMode |
342 hlptim->Init.CounterSource);
343
344 /* Glitch filters for internal triggers and external inputs are configured
345 * only if an internal clock source is provided to the LPTIM
346 */
347 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
348 {
349 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
350 hlptim->Init.UltraLowPowerClock.SampleTime);
351 }
352
353 /* Configure LPTIM external clock polarity and digital filter */
354 if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
355 || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
356 {
357 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
358 hlptim->Init.UltraLowPowerClock.SampleTime);
359 }
360
361 /* Configure LPTIM external trigger */
362 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
363 {
364 /* Enable External trigger and set the trigger source */
365 tmpcfgr |= (hlptim->Init.Trigger.Source |
366 hlptim->Init.Trigger.ActiveEdge |
367 hlptim->Init.Trigger.SampleTime);
368 }
369
370 /* Write to LPTIMx CFGR */
371 hlptim->Instance->CFGR = tmpcfgr;
372
373 /* Configure LPTIM input sources */
374 if (hlptim->Instance == LPTIM1)
375 {
376 /* Check LPTIM Input1 and Input2 sources */
377 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
378 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
379
380 /* Configure LPTIM Input1 and Input2 sources */
381 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
382 }
383 else
384 {
385 /* Check LPTIM2 and LPTIM3 Input1 source */
386 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
387
388 /* Configure LPTIM2 and LPTIM3 Input1 source */
389 hlptim->Instance->OR = hlptim->Init.Input1Source;
390 }
391
392 /* Change the LPTIM state */
393 hlptim->State = HAL_LPTIM_STATE_READY;
394
395 /* Return function status */
396 return HAL_OK;
397 }
398
399 /**
400 * @brief DeInitialize the LPTIM peripheral.
401 * @param hlptim LPTIM handle
402 * @retval HAL status
403 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)404 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
405 {
406 /* Check the LPTIM handle allocation */
407 if (hlptim == NULL)
408 {
409 return HAL_ERROR;
410 }
411
412 /* Change the LPTIM state */
413 hlptim->State = HAL_LPTIM_STATE_BUSY;
414
415 /* Disable the LPTIM Peripheral Clock */
416 __HAL_LPTIM_DISABLE(hlptim);
417
418 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
419 {
420 return HAL_TIMEOUT;
421 }
422
423 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
424 if (hlptim->MspDeInitCallback == NULL)
425 {
426 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
427 }
428
429 /* DeInit the low level hardware: CLOCK, NVIC.*/
430 hlptim->MspDeInitCallback(hlptim);
431 #else
432 /* DeInit the low level hardware: CLOCK, NVIC.*/
433 HAL_LPTIM_MspDeInit(hlptim);
434 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
435
436 /* Change the LPTIM state */
437 hlptim->State = HAL_LPTIM_STATE_RESET;
438
439 /* Release Lock */
440 __HAL_UNLOCK(hlptim);
441
442 /* Return function status */
443 return HAL_OK;
444 }
445
446 /**
447 * @brief Initialize the LPTIM MSP.
448 * @param hlptim LPTIM handle
449 * @retval None
450 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)451 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
452 {
453 /* Prevent unused argument(s) compilation warning */
454 UNUSED(hlptim);
455
456 /* NOTE : This function should not be modified, when the callback is needed,
457 the HAL_LPTIM_MspInit could be implemented in the user file
458 */
459 }
460
461 /**
462 * @brief DeInitialize LPTIM MSP.
463 * @param hlptim LPTIM handle
464 * @retval None
465 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)466 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
467 {
468 /* Prevent unused argument(s) compilation warning */
469 UNUSED(hlptim);
470
471 /* NOTE : This function should not be modified, when the callback is needed,
472 the HAL_LPTIM_MspDeInit could be implemented in the user file
473 */
474 }
475
476 /**
477 * @}
478 */
479
480 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
481 * @brief Start-Stop operation functions.
482 *
483 @verbatim
484 ==============================================================================
485 ##### LPTIM Start Stop operation functions #####
486 ==============================================================================
487 [..] This section provides functions allowing to:
488 (+) Start the PWM mode.
489 (+) Stop the PWM mode.
490 (+) Start the One pulse mode.
491 (+) Stop the One pulse mode.
492 (+) Start the Set once mode.
493 (+) Stop the Set once mode.
494 (+) Start the Encoder mode.
495 (+) Stop the Encoder mode.
496 (+) Start the Timeout mode.
497 (+) Stop the Timeout mode.
498 (+) Start the Counter mode.
499 (+) Stop the Counter mode.
500
501
502 @endverbatim
503 * @{
504 */
505
506 /**
507 * @brief Start the LPTIM PWM generation.
508 * @param hlptim LPTIM handle
509 * @param Period Specifies the Autoreload value.
510 * This parameter must be a value between 0x0001 and 0xFFFF.
511 * @param Pulse Specifies the compare value.
512 * This parameter must be a value between 0x0000 and 0xFFFF.
513 * @retval HAL status
514 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)515 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
516 {
517 /* Check the parameters */
518 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
519 assert_param(IS_LPTIM_PERIOD(Period));
520 assert_param(IS_LPTIM_PULSE(Pulse));
521
522 /* Set the LPTIM state */
523 hlptim->State = HAL_LPTIM_STATE_BUSY;
524
525 /* Reset WAVE bit to set PWM mode */
526 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
527
528 /* Enable the Peripheral */
529 __HAL_LPTIM_ENABLE(hlptim);
530
531 /* Clear flag */
532 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
533
534 /* Load the period value in the autoreload register */
535 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
536
537 /* Wait for the completion of the write operation to the LPTIM_ARR register */
538 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
539 {
540 return HAL_TIMEOUT;
541 }
542
543 /* Clear flag */
544 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
545
546 /* Load the pulse value in the compare register */
547 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
548
549 /* Wait for the completion of the write operation to the LPTIM_CMP register */
550 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
551 {
552 return HAL_TIMEOUT;
553 }
554
555 /* Start timer in continuous mode */
556 __HAL_LPTIM_START_CONTINUOUS(hlptim);
557
558 /* Change the LPTIM state */
559 hlptim->State = HAL_LPTIM_STATE_READY;
560
561 /* Return function status */
562 return HAL_OK;
563 }
564
565 /**
566 * @brief Stop the LPTIM PWM generation.
567 * @param hlptim LPTIM handle
568 * @retval HAL status
569 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)570 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
571 {
572 /* Check the parameters */
573 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
574
575 /* Change the LPTIM state */
576 hlptim->State = HAL_LPTIM_STATE_BUSY;
577
578 /* Disable the Peripheral */
579 __HAL_LPTIM_DISABLE(hlptim);
580
581 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
582 {
583 return HAL_TIMEOUT;
584 }
585
586 /* Change the LPTIM state */
587 hlptim->State = HAL_LPTIM_STATE_READY;
588
589 /* Return function status */
590 return HAL_OK;
591 }
592
593 /**
594 * @brief Start the LPTIM PWM generation in interrupt mode.
595 * @param hlptim LPTIM handle
596 * @param Period Specifies the Autoreload value.
597 * This parameter must be a value between 0x0001 and 0xFFFF
598 * @param Pulse Specifies the compare value.
599 * This parameter must be a value between 0x0000 and 0xFFFF
600 * @retval HAL status
601 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)602 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
603 {
604 /* Check the parameters */
605 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
606 assert_param(IS_LPTIM_PERIOD(Period));
607 assert_param(IS_LPTIM_PULSE(Pulse));
608
609 /* Set the LPTIM state */
610 hlptim->State = HAL_LPTIM_STATE_BUSY;
611
612 /* Reset WAVE bit to set PWM mode */
613 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
614
615 /* Enable the Peripheral */
616 __HAL_LPTIM_ENABLE(hlptim);
617
618 /* Clear flag */
619 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
620
621 /* Load the period value in the autoreload register */
622 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
623
624 /* Wait for the completion of the write operation to the LPTIM_ARR register */
625 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
626 {
627 return HAL_TIMEOUT;
628 }
629
630 /* Clear flag */
631 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
632
633 /* Load the pulse value in the compare register */
634 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
635
636 /* Wait for the completion of the write operation to the LPTIM_CMP register */
637 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
638 {
639 return HAL_TIMEOUT;
640 }
641
642 /* Disable the Peripheral */
643 __HAL_LPTIM_DISABLE(hlptim);
644
645 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
646 {
647 return HAL_TIMEOUT;
648 }
649
650 /* Enable Autoreload write complete interrupt */
651 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
652
653 /* Enable Compare write complete interrupt */
654 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
655
656 /* Enable Autoreload match interrupt */
657 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
658
659 /* Enable Compare match interrupt */
660 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
661
662 /* If external trigger source is used, then enable external trigger interrupt */
663 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
664 {
665 /* Enable external trigger interrupt */
666 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
667 }
668
669 /* Enable Rep Update Ok interrupt */
670 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
671
672 /* Enable Update Event interrupt */
673 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
674
675 /* Enable the Peripheral */
676 __HAL_LPTIM_ENABLE(hlptim);
677
678 /* Start timer in continuous mode */
679 __HAL_LPTIM_START_CONTINUOUS(hlptim);
680
681 /* Change the LPTIM state */
682 hlptim->State = HAL_LPTIM_STATE_READY;
683
684 /* Return function status */
685 return HAL_OK;
686 }
687
688 /**
689 * @brief Stop the LPTIM PWM generation in interrupt mode.
690 * @param hlptim LPTIM handle
691 * @retval HAL status
692 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)693 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
694 {
695 /* Check the parameters */
696 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
697
698 /* Change the LPTIM state */
699 hlptim->State = HAL_LPTIM_STATE_BUSY;
700
701 /* Disable the Peripheral */
702 __HAL_LPTIM_DISABLE(hlptim);
703
704 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
705 {
706 return HAL_TIMEOUT;
707 }
708
709 /* Disable Autoreload write complete interrupt */
710 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
711
712 /* Disable Compare write complete interrupt */
713 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
714
715 /* Disable Autoreload match interrupt */
716 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
717
718 /* Disable Compare match interrupt */
719 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
720
721 /* If external trigger source is used, then disable external trigger interrupt */
722 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
723 {
724 /* Disable external trigger interrupt */
725 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
726 }
727
728 /* Enable Rep Update Ok interrupt */
729 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
730
731 /* Enable Update Event interrupt */
732 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
733
734 /* Change the LPTIM state */
735 hlptim->State = HAL_LPTIM_STATE_READY;
736
737 /* Return function status */
738 return HAL_OK;
739 }
740
741 /**
742 * @brief Start the LPTIM One pulse generation.
743 * @param hlptim LPTIM handle
744 * @param Period Specifies the Autoreload value.
745 * This parameter must be a value between 0x0001 and 0xFFFF.
746 * @param Pulse Specifies the compare value.
747 * This parameter must be a value between 0x0000 and 0xFFFF.
748 * @retval HAL status
749 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)750 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
751 {
752 /* Check the parameters */
753 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
754 assert_param(IS_LPTIM_PERIOD(Period));
755 assert_param(IS_LPTIM_PULSE(Pulse));
756
757 /* Set the LPTIM state */
758 hlptim->State = HAL_LPTIM_STATE_BUSY;
759
760 /* Reset WAVE bit to set one pulse mode */
761 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
762
763 /* Enable the Peripheral */
764 __HAL_LPTIM_ENABLE(hlptim);
765
766 /* Clear flag */
767 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
768
769 /* Load the period value in the autoreload register */
770 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
771
772 /* Wait for the completion of the write operation to the LPTIM_ARR register */
773 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
774 {
775 return HAL_TIMEOUT;
776 }
777
778 /* Clear flag */
779 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
780
781 /* Load the pulse value in the compare register */
782 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
783
784 /* Wait for the completion of the write operation to the LPTIM_CMP register */
785 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
786 {
787 return HAL_TIMEOUT;
788 }
789
790 /* Start timer in single (one shot) mode */
791 __HAL_LPTIM_START_SINGLE(hlptim);
792
793 /* Change the LPTIM state */
794 hlptim->State = HAL_LPTIM_STATE_READY;
795
796 /* Return function status */
797 return HAL_OK;
798 }
799
800 /**
801 * @brief Stop the LPTIM One pulse generation.
802 * @param hlptim LPTIM handle
803 * @retval HAL status
804 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)805 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
806 {
807 /* Check the parameters */
808 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
809
810 /* Set the LPTIM state */
811 hlptim->State = HAL_LPTIM_STATE_BUSY;
812
813 /* Disable the Peripheral */
814 __HAL_LPTIM_DISABLE(hlptim);
815
816 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
817 {
818 return HAL_TIMEOUT;
819 }
820
821 /* Change the LPTIM state */
822 hlptim->State = HAL_LPTIM_STATE_READY;
823
824 /* Return function status */
825 return HAL_OK;
826 }
827
828 /**
829 * @brief Start the LPTIM One pulse generation in interrupt mode.
830 * @param hlptim LPTIM handle
831 * @param Period Specifies the Autoreload value.
832 * This parameter must be a value between 0x0001 and 0xFFFF.
833 * @param Pulse Specifies the compare value.
834 * This parameter must be a value between 0x0000 and 0xFFFF.
835 * @retval HAL status
836 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)837 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
838 {
839 /* Check the parameters */
840 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
841 assert_param(IS_LPTIM_PERIOD(Period));
842 assert_param(IS_LPTIM_PULSE(Pulse));
843
844 /* Set the LPTIM state */
845 hlptim->State = HAL_LPTIM_STATE_BUSY;
846
847 /* Reset WAVE bit to set one pulse mode */
848 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
849
850 /* Enable the Peripheral */
851 __HAL_LPTIM_ENABLE(hlptim);
852
853 /* Clear flag */
854 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
855
856 /* Load the period value in the autoreload register */
857 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
858
859 /* Wait for the completion of the write operation to the LPTIM_ARR register */
860 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
861 {
862 return HAL_TIMEOUT;
863 }
864
865 /* Clear flag */
866 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
867
868 /* Load the pulse value in the compare register */
869 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
870
871 /* Wait for the completion of the write operation to the LPTIM_CMP register */
872 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
873 {
874 return HAL_TIMEOUT;
875 }
876
877 /* Disable the Peripheral */
878 __HAL_LPTIM_DISABLE(hlptim);
879
880 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
881 {
882 return HAL_TIMEOUT;
883 }
884
885 /* Enable Autoreload write complete interrupt */
886 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
887
888 /* Enable Compare write complete interrupt */
889 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
890
891 /* Enable Autoreload match interrupt */
892 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
893
894 /* Enable Compare match interrupt */
895 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
896
897 /* If external trigger source is used, then enable external trigger interrupt */
898 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
899 {
900 /* Enable external trigger interrupt */
901 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
902 }
903
904 /* Enable Rep Update Ok interrupt */
905 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
906
907 /* Enable Update Event interrupt */
908 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
909
910 /* Enable the Peripheral */
911 __HAL_LPTIM_ENABLE(hlptim);
912
913 /* Start timer in single (one shot) mode */
914 __HAL_LPTIM_START_SINGLE(hlptim);
915
916 /* Change the LPTIM state */
917 hlptim->State = HAL_LPTIM_STATE_READY;
918
919 /* Return function status */
920 return HAL_OK;
921 }
922
923 /**
924 * @brief Stop the LPTIM One pulse generation in interrupt mode.
925 * @param hlptim LPTIM handle
926 * @retval HAL status
927 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)928 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
929 {
930 /* Check the parameters */
931 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
932
933 /* Set the LPTIM state */
934 hlptim->State = HAL_LPTIM_STATE_BUSY;
935
936
937 /* Disable the Peripheral */
938 __HAL_LPTIM_DISABLE(hlptim);
939
940 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
941 {
942 return HAL_TIMEOUT;
943 }
944
945 /* Disable Autoreload write complete interrupt */
946 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
947
948 /* Disable Compare write complete interrupt */
949 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
950
951 /* Disable Autoreload match interrupt */
952 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
953
954 /* Disable Compare match interrupt */
955 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
956
957 /* If external trigger source is used, then disable external trigger interrupt */
958 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
959 {
960 /* Disable external trigger interrupt */
961 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
962 }
963
964 /* Enable Rep Update Ok interrupt */
965 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
966
967 /* Enable Update Event interrupt */
968 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
969
970 /* Change the LPTIM state */
971 hlptim->State = HAL_LPTIM_STATE_READY;
972
973 /* Return function status */
974 return HAL_OK;
975 }
976
977 /**
978 * @brief Start the LPTIM in Set once mode.
979 * @param hlptim LPTIM handle
980 * @param Period Specifies the Autoreload value.
981 * This parameter must be a value between 0x0001 and 0xFFFF.
982 * @param Pulse Specifies the compare value.
983 * This parameter must be a value between 0x0000 and 0xFFFF.
984 * @retval HAL status
985 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)986 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
987 {
988 /* Check the parameters */
989 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
990 assert_param(IS_LPTIM_PERIOD(Period));
991 assert_param(IS_LPTIM_PULSE(Pulse));
992
993 /* Set the LPTIM state */
994 hlptim->State = HAL_LPTIM_STATE_BUSY;
995
996 /* Set WAVE bit to enable the set once mode */
997 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
998
999 /* Enable the Peripheral */
1000 __HAL_LPTIM_ENABLE(hlptim);
1001
1002 /* Clear flag */
1003 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1004
1005 /* Load the period value in the autoreload register */
1006 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1007
1008 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1009 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1010 {
1011 return HAL_TIMEOUT;
1012 }
1013
1014 /* Clear flag */
1015 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1016
1017 /* Load the pulse value in the compare register */
1018 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1019
1020 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1021 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1022 {
1023 return HAL_TIMEOUT;
1024 }
1025
1026 /* Start timer in single (one shot) mode */
1027 __HAL_LPTIM_START_SINGLE(hlptim);
1028
1029 /* Change the LPTIM state */
1030 hlptim->State = HAL_LPTIM_STATE_READY;
1031
1032 /* Return function status */
1033 return HAL_OK;
1034 }
1035
1036 /**
1037 * @brief Stop the LPTIM Set once mode.
1038 * @param hlptim LPTIM handle
1039 * @retval HAL status
1040 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)1041 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
1042 {
1043 /* Check the parameters */
1044 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1045
1046 /* Set the LPTIM state */
1047 hlptim->State = HAL_LPTIM_STATE_BUSY;
1048
1049 /* Disable the Peripheral */
1050 __HAL_LPTIM_DISABLE(hlptim);
1051
1052 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1053 {
1054 return HAL_TIMEOUT;
1055 }
1056
1057 /* Change the LPTIM state */
1058 hlptim->State = HAL_LPTIM_STATE_READY;
1059
1060 /* Return function status */
1061 return HAL_OK;
1062 }
1063
1064 /**
1065 * @brief Start the LPTIM Set once mode in interrupt mode.
1066 * @param hlptim LPTIM handle
1067 * @param Period Specifies the Autoreload value.
1068 * This parameter must be a value between 0x0000 and 0xFFFF.
1069 * @param Pulse Specifies the compare value.
1070 * This parameter must be a value between 0x0000 and 0xFFFF.
1071 * @retval HAL status
1072 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1073 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1074 {
1075 /* Check the parameters */
1076 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1077 assert_param(IS_LPTIM_PERIOD(Period));
1078 assert_param(IS_LPTIM_PULSE(Pulse));
1079
1080 /* Set the LPTIM state */
1081 hlptim->State = HAL_LPTIM_STATE_BUSY;
1082
1083 /* Set WAVE bit to enable the set once mode */
1084 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1085
1086 /* Enable the Peripheral */
1087 __HAL_LPTIM_ENABLE(hlptim);
1088
1089 /* Clear flag */
1090 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1091
1092 /* Load the period value in the autoreload register */
1093 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1094
1095 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1096 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1097 {
1098 return HAL_TIMEOUT;
1099 }
1100
1101 /* Clear flag */
1102 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1103
1104 /* Load the pulse value in the compare register */
1105 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1106
1107 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1108 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1109 {
1110 return HAL_TIMEOUT;
1111 }
1112
1113 /* Disable the Peripheral */
1114 __HAL_LPTIM_DISABLE(hlptim);
1115
1116 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1117 {
1118 return HAL_TIMEOUT;
1119 }
1120
1121 /* Enable Autoreload write complete interrupt */
1122 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1123
1124 /* Enable Compare write complete interrupt */
1125 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1126
1127 /* Enable Autoreload match interrupt */
1128 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1129
1130 /* Enable Compare match interrupt */
1131 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1132
1133 /* If external trigger source is used, then enable external trigger interrupt */
1134 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1135 {
1136 /* Enable external trigger interrupt */
1137 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1138 }
1139
1140 /* Enable the Peripheral */
1141 __HAL_LPTIM_ENABLE(hlptim);
1142
1143 /* Start timer in single (one shot) mode */
1144 __HAL_LPTIM_START_SINGLE(hlptim);
1145
1146 /* Change the LPTIM state */
1147 hlptim->State = HAL_LPTIM_STATE_READY;
1148
1149 /* Return function status */
1150 return HAL_OK;
1151 }
1152
1153 /**
1154 * @brief Stop the LPTIM Set once mode in interrupt mode.
1155 * @param hlptim LPTIM handle
1156 * @retval HAL status
1157 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1158 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1159 {
1160 /* Check the parameters */
1161 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1162
1163 /* Set the LPTIM state */
1164 hlptim->State = HAL_LPTIM_STATE_BUSY;
1165
1166 /* Disable the Peripheral */
1167 __HAL_LPTIM_DISABLE(hlptim);
1168
1169 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1170 {
1171 return HAL_TIMEOUT;
1172 }
1173
1174 /* Disable Autoreload write complete interrupt */
1175 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1176
1177 /* Disable Compare write complete interrupt */
1178 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1179
1180 /* Disable Autoreload match interrupt */
1181 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1182
1183 /* Disable Compare match interrupt */
1184 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1185
1186 /* If external trigger source is used, then disable external trigger interrupt */
1187 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1188 {
1189 /* Disable external trigger interrupt */
1190 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1191 }
1192
1193 /* Change the LPTIM state */
1194 hlptim->State = HAL_LPTIM_STATE_READY;
1195
1196 /* Return function status */
1197 return HAL_OK;
1198 }
1199
1200 /**
1201 * @brief Start the Encoder interface.
1202 * @param hlptim LPTIM handle
1203 * @param Period Specifies the Autoreload value.
1204 * This parameter must be a value between 0x0001 and 0xFFFF.
1205 * @retval HAL status
1206 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1207 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1208 {
1209 uint32_t tmpcfgr;
1210
1211 /* Check the parameters */
1212 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1213 assert_param(IS_LPTIM_PERIOD(Period));
1214 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1215 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1216 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1217
1218 /* Set the LPTIM state */
1219 hlptim->State = HAL_LPTIM_STATE_BUSY;
1220
1221 /* Get the LPTIMx CFGR value */
1222 tmpcfgr = hlptim->Instance->CFGR;
1223
1224 /* Clear CKPOL bits */
1225 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1226
1227 /* Set Input polarity */
1228 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1229
1230 /* Write to LPTIMx CFGR */
1231 hlptim->Instance->CFGR = tmpcfgr;
1232
1233 /* Set ENC bit to enable the encoder interface */
1234 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1235
1236 /* Enable the Peripheral */
1237 __HAL_LPTIM_ENABLE(hlptim);
1238
1239 /* Clear flag */
1240 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1241
1242 /* Load the period value in the autoreload register */
1243 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1244
1245 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1246 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1247 {
1248 return HAL_TIMEOUT;
1249 }
1250
1251 /* Start timer in continuous mode */
1252 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1253
1254 /* Change the LPTIM state */
1255 hlptim->State = HAL_LPTIM_STATE_READY;
1256
1257 /* Return function status */
1258 return HAL_OK;
1259 }
1260
1261 /**
1262 * @brief Stop the Encoder interface.
1263 * @param hlptim LPTIM handle
1264 * @retval HAL status
1265 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1266 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1267 {
1268 /* Check the parameters */
1269 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1270
1271 /* Set the LPTIM state */
1272 hlptim->State = HAL_LPTIM_STATE_BUSY;
1273
1274 /* Disable the Peripheral */
1275 __HAL_LPTIM_DISABLE(hlptim);
1276
1277 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1278 {
1279 return HAL_TIMEOUT;
1280 }
1281
1282 /* Reset ENC bit to disable the encoder interface */
1283 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1284
1285 /* Change the LPTIM state */
1286 hlptim->State = HAL_LPTIM_STATE_READY;
1287
1288 /* Return function status */
1289 return HAL_OK;
1290 }
1291
1292 /**
1293 * @brief Start the Encoder interface in interrupt mode.
1294 * @param hlptim LPTIM handle
1295 * @param Period Specifies the Autoreload value.
1296 * This parameter must be a value between 0x0000 and 0xFFFF.
1297 * @retval HAL status
1298 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1299 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1300 {
1301 uint32_t tmpcfgr;
1302
1303 /* Check the parameters */
1304 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1305 assert_param(IS_LPTIM_PERIOD(Period));
1306 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1307 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1308 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1309
1310 /* Set the LPTIM state */
1311 hlptim->State = HAL_LPTIM_STATE_BUSY;
1312
1313 /* Configure edge sensitivity for encoder mode */
1314 /* Get the LPTIMx CFGR value */
1315 tmpcfgr = hlptim->Instance->CFGR;
1316
1317 /* Clear CKPOL bits */
1318 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1319
1320 /* Set Input polarity */
1321 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1322
1323 /* Write to LPTIMx CFGR */
1324 hlptim->Instance->CFGR = tmpcfgr;
1325
1326 /* Set ENC bit to enable the encoder interface */
1327 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1328
1329 /* Enable the Peripheral */
1330 __HAL_LPTIM_ENABLE(hlptim);
1331
1332 /* Clear flag */
1333 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1334
1335 /* Load the period value in the autoreload register */
1336 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1337
1338 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1339 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1340 {
1341 return HAL_TIMEOUT;
1342 }
1343
1344 /* Disable the Peripheral */
1345 __HAL_LPTIM_DISABLE(hlptim);
1346
1347 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1348 {
1349 return HAL_TIMEOUT;
1350 }
1351
1352 /* Enable "switch to down direction" interrupt */
1353 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1354
1355 /* Enable "switch to up direction" interrupt */
1356 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1357
1358 /* Enable the Peripheral */
1359 __HAL_LPTIM_ENABLE(hlptim);
1360
1361 /* Start timer in continuous mode */
1362 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1363
1364 /* Change the LPTIM state */
1365 hlptim->State = HAL_LPTIM_STATE_READY;
1366
1367 /* Return function status */
1368 return HAL_OK;
1369 }
1370
1371 /**
1372 * @brief Stop the Encoder interface in interrupt mode.
1373 * @param hlptim LPTIM handle
1374 * @retval HAL status
1375 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1376 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1377 {
1378 /* Check the parameters */
1379 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1380
1381 /* Set the LPTIM state */
1382 hlptim->State = HAL_LPTIM_STATE_BUSY;
1383
1384 /* Disable the Peripheral */
1385 __HAL_LPTIM_DISABLE(hlptim);
1386
1387 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1388 {
1389 return HAL_TIMEOUT;
1390 }
1391
1392 /* Reset ENC bit to disable the encoder interface */
1393 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1394
1395 /* Disable "switch to down direction" interrupt */
1396 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1397
1398 /* Disable "switch to up direction" interrupt */
1399 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1400
1401 /* Change the LPTIM state */
1402 hlptim->State = HAL_LPTIM_STATE_READY;
1403
1404 /* Return function status */
1405 return HAL_OK;
1406 }
1407
1408 /**
1409 * @brief Start the Timeout function.
1410 * @note The first trigger event will start the timer, any successive
1411 * trigger event will reset the counter and the timer restarts.
1412 * @param hlptim LPTIM handle
1413 * @param Period Specifies the Autoreload value.
1414 * This parameter must be a value between 0x0001 and 0xFFFF.
1415 * @param Timeout Specifies the TimeOut value to reset the counter.
1416 * This parameter must be a value between 0x0000 and 0xFFFF.
1417 * @retval HAL status
1418 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1419 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1420 {
1421 /* Check the parameters */
1422 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1423 assert_param(IS_LPTIM_PERIOD(Period));
1424 assert_param(IS_LPTIM_PULSE(Timeout));
1425
1426 /* Set the LPTIM state */
1427 hlptim->State = HAL_LPTIM_STATE_BUSY;
1428
1429 /* Set TIMOUT bit to enable the timeout function */
1430 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1431
1432 /* Enable the Peripheral */
1433 __HAL_LPTIM_ENABLE(hlptim);
1434
1435 /* Clear flag */
1436 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1437
1438 /* Load the period value in the autoreload register */
1439 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1440
1441 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1442 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1443 {
1444 return HAL_TIMEOUT;
1445 }
1446
1447 /* Clear flag */
1448 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1449
1450 /* Load the Timeout value in the compare register */
1451 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1452
1453 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1454 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1455 {
1456 return HAL_TIMEOUT;
1457 }
1458
1459 /* Start timer in continuous mode */
1460 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1461
1462 /* Change the LPTIM state */
1463 hlptim->State = HAL_LPTIM_STATE_READY;
1464
1465 /* Return function status */
1466 return HAL_OK;
1467 }
1468
1469 /**
1470 * @brief Stop the Timeout function.
1471 * @param hlptim LPTIM handle
1472 * @retval HAL status
1473 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1474 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1475 {
1476 /* Check the parameters */
1477 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1478
1479 /* Set the LPTIM state */
1480 hlptim->State = HAL_LPTIM_STATE_BUSY;
1481
1482 /* Disable the Peripheral */
1483 __HAL_LPTIM_DISABLE(hlptim);
1484
1485 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1486 {
1487 return HAL_TIMEOUT;
1488 }
1489
1490 /* Reset TIMOUT bit to enable the timeout function */
1491 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1492
1493 /* Change the LPTIM state */
1494 hlptim->State = HAL_LPTIM_STATE_READY;
1495
1496 /* Return function status */
1497 return HAL_OK;
1498 }
1499
1500 /**
1501 * @brief Start the Timeout function in interrupt mode.
1502 * @note The first trigger event will start the timer, any successive
1503 * trigger event will reset the counter and the timer restarts.
1504 * @param hlptim LPTIM handle
1505 * @param Period Specifies the Autoreload value.
1506 * This parameter must be a value between 0x0001 and 0xFFFF.
1507 * @param Timeout Specifies the TimeOut value to reset the counter.
1508 * This parameter must be a value between 0x0000 and 0xFFFF.
1509 * @retval HAL status
1510 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1511 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1512 {
1513 /* Check the parameters */
1514 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1515 assert_param(IS_LPTIM_PERIOD(Period));
1516 assert_param(IS_LPTIM_PULSE(Timeout));
1517
1518 /* Set the LPTIM state */
1519 hlptim->State = HAL_LPTIM_STATE_BUSY;
1520
1521 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1522 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1523
1524 /* Set TIMOUT bit to enable the timeout function */
1525 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1526
1527 /* Enable the Peripheral */
1528 __HAL_LPTIM_ENABLE(hlptim);
1529
1530 /* Clear flag */
1531 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1532
1533 /* Load the period value in the autoreload register */
1534 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1535
1536 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1537 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1538 {
1539 return HAL_TIMEOUT;
1540 }
1541
1542 /* Clear flag */
1543 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1544
1545 /* Load the Timeout value in the compare register */
1546 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1547
1548 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1549 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1550 {
1551 return HAL_TIMEOUT;
1552 }
1553
1554 /* Disable the Peripheral */
1555 __HAL_LPTIM_DISABLE(hlptim);
1556
1557 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1558 {
1559 return HAL_TIMEOUT;
1560 }
1561
1562 /* Enable Compare match interrupt */
1563 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1564
1565 /* Enable the Peripheral */
1566 __HAL_LPTIM_ENABLE(hlptim);
1567
1568 /* Start timer in continuous mode */
1569 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1570
1571 /* Change the LPTIM state */
1572 hlptim->State = HAL_LPTIM_STATE_READY;
1573
1574 /* Return function status */
1575 return HAL_OK;
1576 }
1577
1578 /**
1579 * @brief Stop the Timeout function in interrupt mode.
1580 * @param hlptim LPTIM handle
1581 * @retval HAL status
1582 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1583 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1584 {
1585 /* Check the parameters */
1586 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1587
1588
1589 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1590 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1591
1592 /* Set the LPTIM state */
1593 hlptim->State = HAL_LPTIM_STATE_BUSY;
1594
1595 /* Disable the Peripheral */
1596 __HAL_LPTIM_DISABLE(hlptim);
1597
1598 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1599 {
1600 return HAL_TIMEOUT;
1601 }
1602
1603 /* Reset TIMOUT bit to enable the timeout function */
1604 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1605
1606 /* Disable Compare match interrupt */
1607 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1608
1609 /* Change the LPTIM state */
1610 hlptim->State = HAL_LPTIM_STATE_READY;
1611
1612 /* Return function status */
1613 return HAL_OK;
1614 }
1615
1616 /**
1617 * @brief Start the Counter mode.
1618 * @param hlptim LPTIM handle
1619 * @param Period Specifies the Autoreload value.
1620 * This parameter must be a value between 0x0001 and 0xFFFF.
1621 * @retval HAL status
1622 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1623 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1624 {
1625 /* Check the parameters */
1626 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1627 assert_param(IS_LPTIM_PERIOD(Period));
1628
1629 /* Set the LPTIM state */
1630 hlptim->State = HAL_LPTIM_STATE_BUSY;
1631
1632 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1633 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1634 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1635 {
1636 /* Check if clock is prescaled */
1637 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1638 /* Set clock prescaler to 0 */
1639 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1640 }
1641
1642 /* Enable the Peripheral */
1643 __HAL_LPTIM_ENABLE(hlptim);
1644
1645 /* Clear flag */
1646 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1647
1648 /* Load the period value in the autoreload register */
1649 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1650
1651 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1652 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1653 {
1654 return HAL_TIMEOUT;
1655 }
1656
1657 /* Start timer in continuous mode */
1658 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1659
1660 /* Change the LPTIM state */
1661 hlptim->State = HAL_LPTIM_STATE_READY;
1662
1663 /* Return function status */
1664 return HAL_OK;
1665 }
1666
1667 /**
1668 * @brief Stop the Counter mode.
1669 * @param hlptim LPTIM handle
1670 * @retval HAL status
1671 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1672 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1673 {
1674 /* Check the parameters */
1675 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1676
1677 /* Set the LPTIM state */
1678 hlptim->State = HAL_LPTIM_STATE_BUSY;
1679
1680 /* Disable the Peripheral */
1681 __HAL_LPTIM_DISABLE(hlptim);
1682
1683 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1684 {
1685 return HAL_TIMEOUT;
1686 }
1687
1688 /* Change the LPTIM state */
1689 hlptim->State = HAL_LPTIM_STATE_READY;
1690
1691 /* Return function status */
1692 return HAL_OK;
1693 }
1694
1695 /**
1696 * @brief Start the Counter mode in interrupt mode.
1697 * @param hlptim LPTIM handle
1698 * @param Period Specifies the Autoreload value.
1699 * This parameter must be a value between 0x0001 and 0xFFFF.
1700 * @retval HAL status
1701 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1702 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1703 {
1704 /* Check the parameters */
1705 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1706 assert_param(IS_LPTIM_PERIOD(Period));
1707
1708 /* Set the LPTIM state */
1709 hlptim->State = HAL_LPTIM_STATE_BUSY;
1710
1711 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1712 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1713
1714 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1715 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM)
1716 && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1717 {
1718 /* Check if clock is prescaled */
1719 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1720 /* Set clock prescaler to 0 */
1721 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1722 }
1723
1724 /* Enable the Peripheral */
1725 __HAL_LPTIM_ENABLE(hlptim);
1726
1727 /* Clear flag */
1728 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1729
1730 /* Load the period value in the autoreload register */
1731 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1732
1733 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1734 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1735 {
1736 return HAL_TIMEOUT;
1737 }
1738
1739 /* Disable the Peripheral */
1740 __HAL_LPTIM_DISABLE(hlptim);
1741
1742 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1743 {
1744 return HAL_TIMEOUT;
1745 }
1746
1747 /* Enable Autoreload write complete interrupt */
1748 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1749
1750 /* Enable Autoreload match interrupt */
1751 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1752
1753 /* Enable Rep Update Ok interrupt */
1754 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
1755
1756 /* Enable Update Event interrupt */
1757 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
1758
1759 /* Enable the Peripheral */
1760 __HAL_LPTIM_ENABLE(hlptim);
1761
1762 /* Start timer in continuous mode */
1763 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1764
1765 /* Change the LPTIM state */
1766 hlptim->State = HAL_LPTIM_STATE_READY;
1767
1768 /* Return function status */
1769 return HAL_OK;
1770 }
1771
1772 /**
1773 * @brief Stop the Counter mode in interrupt mode.
1774 * @param hlptim LPTIM handle
1775 * @retval HAL status
1776 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1777 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1778 {
1779 /* Check the parameters */
1780 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1781
1782
1783 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1784 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1785
1786 /* Set the LPTIM state */
1787 hlptim->State = HAL_LPTIM_STATE_BUSY;
1788
1789 /* Disable the Peripheral */
1790 __HAL_LPTIM_DISABLE(hlptim);
1791
1792 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1793 {
1794 return HAL_TIMEOUT;
1795 }
1796
1797 /* Disable Autoreload write complete interrupt */
1798 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1799
1800 /* Disable Autoreload match interrupt */
1801 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1802
1803 /* Disable Rep Update Ok interrupt */
1804 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
1805
1806 /* Disable Update Event interrupt */
1807 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
1808 /* Change the LPTIM state */
1809 hlptim->State = HAL_LPTIM_STATE_READY;
1810
1811 /* Return function status */
1812 return HAL_OK;
1813 }
1814
1815 /**
1816 * @}
1817 */
1818
1819 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1820 * @brief Read operation functions.
1821 *
1822 @verbatim
1823 ==============================================================================
1824 ##### LPTIM Read operation functions #####
1825 ==============================================================================
1826 [..] This section provides LPTIM Reading functions.
1827 (+) Read the counter value.
1828 (+) Read the period (Auto-reload) value.
1829 (+) Read the pulse (Compare)value.
1830 @endverbatim
1831 * @{
1832 */
1833
1834 /**
1835 * @brief Return the current counter value.
1836 * @param hlptim LPTIM handle
1837 * @retval Counter value.
1838 */
HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef * hlptim)1839 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim)
1840 {
1841 /* Check the parameters */
1842 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1843
1844 return (hlptim->Instance->CNT);
1845 }
1846
1847 /**
1848 * @brief Return the current Autoreload (Period) value.
1849 * @param hlptim LPTIM handle
1850 * @retval Autoreload value.
1851 */
HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef * hlptim)1852 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim)
1853 {
1854 /* Check the parameters */
1855 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1856
1857 return (hlptim->Instance->ARR);
1858 }
1859
1860 /**
1861 * @brief Return the current Compare (Pulse) value.
1862 * @param hlptim LPTIM handle
1863 * @retval Compare value.
1864 */
HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef * hlptim)1865 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim)
1866 {
1867 /* Check the parameters */
1868 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1869
1870 return (hlptim->Instance->CMP);
1871 }
1872
1873 /**
1874 * @}
1875 */
1876
1877 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1878 * @brief LPTIM IRQ handler.
1879 *
1880 @verbatim
1881 ==============================================================================
1882 ##### LPTIM IRQ handler and callbacks #####
1883 ==============================================================================
1884 [..] This section provides LPTIM IRQ handler and callback functions called within
1885 the IRQ handler:
1886 (+) LPTIM interrupt request handler
1887 (+) Compare match Callback
1888 (+) Auto-reload match Callback
1889 (+) External trigger event detection Callback
1890 (+) Compare register write complete Callback
1891 (+) Auto-reload register write complete Callback
1892 (+) Up-counting direction change Callback
1893 (+) Down-counting direction change Callback
1894
1895 @endverbatim
1896 * @{
1897 */
1898
1899 /**
1900 * @brief Handle LPTIM interrupt request.
1901 * @param hlptim LPTIM handle
1902 * @retval None
1903 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1904 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1905 {
1906 /* Compare match interrupt */
1907 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1908 {
1909 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1910 {
1911 /* Clear Compare match flag */
1912 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1913
1914 /* Compare match Callback */
1915 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1916 hlptim->CompareMatchCallback(hlptim);
1917 #else
1918 HAL_LPTIM_CompareMatchCallback(hlptim);
1919 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1920 }
1921 }
1922
1923 /* Autoreload match interrupt */
1924 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1925 {
1926 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1927 {
1928 /* Clear Autoreload match flag */
1929 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1930
1931 /* Autoreload match Callback */
1932 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1933 hlptim->AutoReloadMatchCallback(hlptim);
1934 #else
1935 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1936 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1937 }
1938 }
1939
1940 /* Trigger detected interrupt */
1941 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1942 {
1943 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1944 {
1945 /* Clear Trigger detected flag */
1946 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1947
1948 /* Trigger detected callback */
1949 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1950 hlptim->TriggerCallback(hlptim);
1951 #else
1952 HAL_LPTIM_TriggerCallback(hlptim);
1953 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1954 }
1955 }
1956
1957 /* Compare write interrupt */
1958 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1959 {
1960 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1961 {
1962 /* Clear Compare write flag */
1963 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1964
1965 /* Compare write Callback */
1966 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1967 hlptim->CompareWriteCallback(hlptim);
1968 #else
1969 HAL_LPTIM_CompareWriteCallback(hlptim);
1970 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1971 }
1972 }
1973
1974 /* Autoreload write interrupt */
1975 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1976 {
1977 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1978 {
1979 /* Clear Autoreload write flag */
1980 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1981
1982 /* Autoreload write Callback */
1983 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1984 hlptim->AutoReloadWriteCallback(hlptim);
1985 #else
1986 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1987 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1988 }
1989 }
1990
1991 /* Direction counter changed from Down to Up interrupt */
1992 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1993 {
1994 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1995 {
1996 /* Clear Direction counter changed from Down to Up flag */
1997 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1998
1999 /* Direction counter changed from Down to Up Callback */
2000 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2001 hlptim->DirectionUpCallback(hlptim);
2002 #else
2003 HAL_LPTIM_DirectionUpCallback(hlptim);
2004 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2005 }
2006 }
2007
2008 /* Direction counter changed from Up to Down interrupt */
2009 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
2010 {
2011 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
2012 {
2013 /* Clear Direction counter changed from Up to Down flag */
2014 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
2015
2016 /* Direction counter changed from Up to Down Callback */
2017 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2018 hlptim->DirectionDownCallback(hlptim);
2019 #else
2020 HAL_LPTIM_DirectionDownCallback(hlptim);
2021 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2022 }
2023 }
2024
2025 /* Repetition counter underflowed (or contains zero) and the LPTIM counter
2026 overflowed */
2027 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UPDATE) != RESET)
2028 {
2029 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UPDATE) != RESET)
2030 {
2031 /* Clear update event flag */
2032 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UPDATE);
2033
2034 /* Update event Callback */
2035 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2036 hlptim->UpdateEventCallback(hlptim);
2037 #else
2038 HAL_LPTIM_UpdateEventCallback(hlptim);
2039 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2040 }
2041 }
2042
2043 /* Successful APB bus write to repetition counter register */
2044 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_REPOK) != RESET)
2045 {
2046 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_REPOK) != RESET)
2047 {
2048 /* Clear successful APB bus write to repetition counter flag */
2049 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2050
2051 /* Successful APB bus write to repetition counter Callback */
2052 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2053 hlptim->RepCounterWriteCallback(hlptim);
2054 #else
2055 HAL_LPTIM_RepCounterWriteCallback(hlptim);
2056 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2057 }
2058 }
2059 }
2060
2061 /**
2062 * @brief Compare match callback in non-blocking mode.
2063 * @param hlptim LPTIM handle
2064 * @retval None
2065 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)2066 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
2067 {
2068 /* Prevent unused argument(s) compilation warning */
2069 UNUSED(hlptim);
2070
2071 /* NOTE : This function should not be modified, when the callback is needed,
2072 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
2073 */
2074 }
2075
2076 /**
2077 * @brief Autoreload match callback in non-blocking mode.
2078 * @param hlptim LPTIM handle
2079 * @retval None
2080 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)2081 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
2082 {
2083 /* Prevent unused argument(s) compilation warning */
2084 UNUSED(hlptim);
2085
2086 /* NOTE : This function should not be modified, when the callback is needed,
2087 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
2088 */
2089 }
2090
2091 /**
2092 * @brief Trigger detected callback in non-blocking mode.
2093 * @param hlptim LPTIM handle
2094 * @retval None
2095 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)2096 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
2097 {
2098 /* Prevent unused argument(s) compilation warning */
2099 UNUSED(hlptim);
2100
2101 /* NOTE : This function should not be modified, when the callback is needed,
2102 the HAL_LPTIM_TriggerCallback could be implemented in the user file
2103 */
2104 }
2105
2106 /**
2107 * @brief Compare write callback in non-blocking mode.
2108 * @param hlptim LPTIM handle
2109 * @retval None
2110 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)2111 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
2112 {
2113 /* Prevent unused argument(s) compilation warning */
2114 UNUSED(hlptim);
2115
2116 /* NOTE : This function should not be modified, when the callback is needed,
2117 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2118 */
2119 }
2120
2121 /**
2122 * @brief Autoreload write callback in non-blocking mode.
2123 * @param hlptim LPTIM handle
2124 * @retval None
2125 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2126 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2127 {
2128 /* Prevent unused argument(s) compilation warning */
2129 UNUSED(hlptim);
2130
2131 /* NOTE : This function should not be modified, when the callback is needed,
2132 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2133 */
2134 }
2135
2136 /**
2137 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2138 * @param hlptim LPTIM handle
2139 * @retval None
2140 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2141 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2142 {
2143 /* Prevent unused argument(s) compilation warning */
2144 UNUSED(hlptim);
2145
2146 /* NOTE : This function should not be modified, when the callback is needed,
2147 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2148 */
2149 }
2150
2151 /**
2152 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2153 * @param hlptim LPTIM handle
2154 * @retval None
2155 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2156 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2157 {
2158 /* Prevent unused argument(s) compilation warning */
2159 UNUSED(hlptim);
2160
2161 /* NOTE : This function should not be modified, when the callback is needed,
2162 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2163 */
2164 }
2165
2166 /**
2167 * @brief Repetition counter underflowed (or contains zero) and LPTIM counter overflowed callback in non-blocking mode.
2168 * @param hlptim LPTIM handle
2169 * @retval None
2170 */
HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef * hlptim)2171 __weak void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim)
2172 {
2173 /* Prevent unused argument(s) compilation warning */
2174 UNUSED(hlptim);
2175
2176 /* NOTE : This function should not be modified, when the callback is needed,
2177 the HAL_LPTIM_UpdateEventCallback could be implemented in the user file
2178 */
2179 }
2180
2181 /**
2182 * @brief Successful APB bus write to repetition counter register callback in non-blocking mode.
2183 * @param hlptim LPTIM handle
2184 * @retval None
2185 */
HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef * hlptim)2186 __weak void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim)
2187 {
2188 /* Prevent unused argument(s) compilation warning */
2189 UNUSED(hlptim);
2190
2191 /* NOTE : This function should not be modified, when the callback is needed,
2192 the HAL_LPTIM_RepCounterWriteCallback could be implemented in the user file
2193 */
2194 }
2195
2196 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2197 /**
2198 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2199 * @param hlptim LPTIM handle
2200 * @param CallbackID ID of the callback to be registered
2201 * This parameter can be one of the following values:
2202 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2203 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2204 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2205 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2206 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2207 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2208 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2209 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2210 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2211 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID
2212 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID
2213 * @param pCallback pointer to the callback function
2214 * @retval status
2215 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2216 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2217 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2218 pLPTIM_CallbackTypeDef pCallback)
2219 {
2220 HAL_StatusTypeDef status = HAL_OK;
2221
2222 if (pCallback == NULL)
2223 {
2224 return HAL_ERROR;
2225 }
2226
2227 if (hlptim->State == HAL_LPTIM_STATE_READY)
2228 {
2229 switch (CallbackID)
2230 {
2231 case HAL_LPTIM_MSPINIT_CB_ID :
2232 hlptim->MspInitCallback = pCallback;
2233 break;
2234
2235 case HAL_LPTIM_MSPDEINIT_CB_ID :
2236 hlptim->MspDeInitCallback = pCallback;
2237 break;
2238
2239 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2240 hlptim->CompareMatchCallback = pCallback;
2241 break;
2242
2243 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2244 hlptim->AutoReloadMatchCallback = pCallback;
2245 break;
2246
2247 case HAL_LPTIM_TRIGGER_CB_ID :
2248 hlptim->TriggerCallback = pCallback;
2249 break;
2250
2251 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2252 hlptim->CompareWriteCallback = pCallback;
2253 break;
2254
2255 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2256 hlptim->AutoReloadWriteCallback = pCallback;
2257 break;
2258
2259 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2260 hlptim->DirectionUpCallback = pCallback;
2261 break;
2262
2263 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2264 hlptim->DirectionDownCallback = pCallback;
2265 break;
2266
2267 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2268 hlptim->UpdateEventCallback = pCallback;
2269 break;
2270
2271 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2272 hlptim->RepCounterWriteCallback = pCallback;
2273 break;
2274
2275 default :
2276 /* Return error status */
2277 status = HAL_ERROR;
2278 break;
2279 }
2280 }
2281 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2282 {
2283 switch (CallbackID)
2284 {
2285 case HAL_LPTIM_MSPINIT_CB_ID :
2286 hlptim->MspInitCallback = pCallback;
2287 break;
2288
2289 case HAL_LPTIM_MSPDEINIT_CB_ID :
2290 hlptim->MspDeInitCallback = pCallback;
2291 break;
2292
2293 default :
2294 /* Return error status */
2295 status = HAL_ERROR;
2296 break;
2297 }
2298 }
2299 else
2300 {
2301 /* Return error status */
2302 status = HAL_ERROR;
2303 }
2304
2305 return status;
2306 }
2307
2308 /**
2309 * @brief Unregister a LPTIM callback
2310 * LLPTIM callback is redirected to the weak predefined callback
2311 * @param hlptim LPTIM handle
2312 * @param CallbackID ID of the callback to be unregistered
2313 * This parameter can be one of the following values:
2314 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2315 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2316 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2317 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2318 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2319 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2320 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2321 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2322 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2323 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID
2324 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID
2325 * @retval status
2326 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2327 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2328 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2329 {
2330 HAL_StatusTypeDef status = HAL_OK;
2331
2332 if (hlptim->State == HAL_LPTIM_STATE_READY)
2333 {
2334 switch (CallbackID)
2335 {
2336 case HAL_LPTIM_MSPINIT_CB_ID :
2337 /* Legacy weak MspInit Callback */
2338 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2339 break;
2340
2341 case HAL_LPTIM_MSPDEINIT_CB_ID :
2342 /* Legacy weak Msp DeInit Callback */
2343 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2344 break;
2345
2346 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2347 /* Legacy weak Compare match Callback */
2348 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2349 break;
2350
2351 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2352 /* Legacy weak Auto-reload match Callback */
2353 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2354 break;
2355
2356 case HAL_LPTIM_TRIGGER_CB_ID :
2357 /* Legacy weak External trigger event detection Callback */
2358 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2359 break;
2360
2361 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2362 /* Legacy weak Compare register write complete Callback */
2363 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2364 break;
2365
2366 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2367 /* Legacy weak Auto-reload register write complete Callback */
2368 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2369 break;
2370
2371 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2372 /* Legacy weak Up-counting direction change Callback */
2373 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2374 break;
2375
2376 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2377 /* Legacy weak Down-counting direction change Callback */
2378 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2379 break;
2380
2381 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2382 /* Legacy weak Update event detection Callback */
2383 hlptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback;
2384 break;
2385
2386 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2387 /* Legacy weak Repetition counter register write complete Callback */
2388 hlptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback;
2389 break;
2390
2391 default :
2392 /* Return error status */
2393 status = HAL_ERROR;
2394 break;
2395 }
2396 }
2397 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2398 {
2399 switch (CallbackID)
2400 {
2401 case HAL_LPTIM_MSPINIT_CB_ID :
2402 /* Legacy weak MspInit Callback */
2403 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
2404 break;
2405
2406 case HAL_LPTIM_MSPDEINIT_CB_ID :
2407 /* Legacy weak Msp DeInit Callback */
2408 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
2409 break;
2410
2411 default :
2412 /* Return error status */
2413 status = HAL_ERROR;
2414 break;
2415 }
2416 }
2417 else
2418 {
2419 /* Return error status */
2420 status = HAL_ERROR;
2421 }
2422
2423 return status;
2424 }
2425 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2426
2427 /**
2428 * @}
2429 */
2430
2431 /** @defgroup LPTIM_Group5 Peripheral State functions
2432 * @brief Peripheral State functions.
2433 *
2434 @verbatim
2435 ==============================================================================
2436 ##### Peripheral State functions #####
2437 ==============================================================================
2438 [..]
2439 This subsection permits to get in run-time the status of the peripheral.
2440
2441 @endverbatim
2442 * @{
2443 */
2444
2445 /**
2446 * @brief Return the LPTIM handle state.
2447 * @param hlptim LPTIM handle
2448 * @retval HAL state
2449 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2450 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2451 {
2452 /* Return LPTIM handle state */
2453 return hlptim->State;
2454 }
2455
2456 /**
2457 * @}
2458 */
2459
2460
2461 /**
2462 * @}
2463 */
2464
2465 /* Private functions ---------------------------------------------------------*/
2466
2467 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2468 * @{
2469 */
2470 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2471 /**
2472 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2473 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2474 * the configuration information for LPTIM module.
2475 * @retval None
2476 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2477 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2478 {
2479 /* Reset the LPTIM callback to the legacy weak callbacks */
2480 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback;
2481 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback;
2482 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback;
2483 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback;
2484 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback;
2485 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback;
2486 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback;
2487 lptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback;
2488 lptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback;
2489 }
2490 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2491
2492 /**
2493 * @brief LPTimer Wait for flag set
2494 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2495 * the configuration information for LPTIM module.
2496 * @param flag The lptim flag
2497 * @retval HAL status
2498 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2499 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2500 {
2501 HAL_StatusTypeDef result = HAL_OK;
2502 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2503 do
2504 {
2505 count--;
2506 if (count == 0UL)
2507 {
2508 result = HAL_TIMEOUT;
2509 }
2510 } while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2511
2512 return result;
2513 }
2514
2515 /**
2516 * @brief Disable LPTIM HW instance.
2517 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2518 * the configuration information for LPTIM module.
2519 * @note The following sequence is required to solve LPTIM disable HW limitation.
2520 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2521 * stuck in LPTIM interrupt when entering Stop mode" section.
2522 * @retval None
2523 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2524 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2525 {
2526 uint32_t tmpclksource = 0;
2527 uint32_t tmpIER;
2528 uint32_t tmpCFGR;
2529 uint32_t tmpCMP;
2530 uint32_t tmpARR;
2531 uint32_t primask_bit;
2532 uint32_t tmpOR;
2533 uint32_t tmpRCR;
2534
2535 /* Enter critical section */
2536 primask_bit = __get_PRIMASK();
2537 __set_PRIMASK(1) ;
2538
2539 /*********** Save LPTIM Config ***********/
2540 /* Save LPTIM source clock */
2541 switch ((uint32_t)hlptim->Instance)
2542 {
2543 case LPTIM1_BASE:
2544 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2545 break;
2546 case LPTIM2_BASE:
2547 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2548 break;
2549 case LPTIM3_BASE:
2550 tmpclksource = __HAL_RCC_GET_LPTIM3_SOURCE();
2551 break;
2552 default:
2553 break;
2554 }
2555
2556 /* Save LPTIM configuration registers */
2557 tmpIER = hlptim->Instance->IER;
2558 tmpCFGR = hlptim->Instance->CFGR;
2559 tmpCMP = hlptim->Instance->CMP;
2560 tmpARR = hlptim->Instance->ARR;
2561 tmpOR = hlptim->Instance->OR;
2562 tmpRCR = hlptim->Instance->RCR;
2563
2564 /*********** Reset LPTIM ***********/
2565 switch ((uint32_t)hlptim->Instance)
2566 {
2567 case LPTIM1_BASE:
2568 __HAL_RCC_LPTIM1_FORCE_RESET();
2569 __HAL_RCC_LPTIM1_RELEASE_RESET();
2570 break;
2571 case LPTIM2_BASE:
2572 __HAL_RCC_LPTIM2_FORCE_RESET();
2573 __HAL_RCC_LPTIM2_RELEASE_RESET();
2574 break;
2575 case LPTIM3_BASE:
2576 __HAL_RCC_LPTIM3_FORCE_RESET();
2577 __HAL_RCC_LPTIM3_RELEASE_RESET();
2578 break;
2579 default:
2580 break;
2581 }
2582
2583 /*********** Restore LPTIM Config ***********/
2584 if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
2585 {
2586 /* Force LPTIM source kernel clock from APB */
2587 switch ((uint32_t)hlptim->Instance)
2588 {
2589 case LPTIM1_BASE:
2590 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2591 break;
2592 case LPTIM2_BASE:
2593 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2594 break;
2595 case LPTIM3_BASE:
2596 __HAL_RCC_LPTIM3_CONFIG(RCC_LPTIM3CLKSOURCE_PCLK1);
2597 break;
2598 default:
2599 break;
2600 }
2601
2602 if (tmpCMP != 0UL)
2603 {
2604 /* Restore CMP register (LPTIM should be enabled first) */
2605 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2606 hlptim->Instance->CMP = tmpCMP;
2607
2608 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2609 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2610 {
2611 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2612 }
2613 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2614 }
2615
2616 if (tmpARR != 0UL)
2617 {
2618 /* Restore ARR register (LPTIM should be enabled first) */
2619 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2620 hlptim->Instance->ARR = tmpARR;
2621
2622 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2623 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2624 {
2625 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2626 }
2627
2628 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2629 }
2630
2631 if (tmpRCR != 0UL)
2632 {
2633 /* Restore RCR register (LPTIM should be enabled first) */
2634 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2635 hlptim->Instance->RCR = tmpRCR;
2636
2637 /* Wait for the completion of the write operation to the LPTIM_RCR register */
2638 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
2639 {
2640 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2641 }
2642 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2643 }
2644
2645 /* Restore LPTIM source kernel clock */
2646 switch ((uint32_t)hlptim->Instance)
2647 {
2648 case LPTIM1_BASE:
2649 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2650 break;
2651 case LPTIM2_BASE:
2652 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2653 break;
2654 case LPTIM3_BASE:
2655 __HAL_RCC_LPTIM3_CONFIG(tmpclksource);
2656 break;
2657 default:
2658 break;
2659 }
2660 }
2661
2662 /* Restore configuration registers (LPTIM should be disabled first) */
2663 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2664 hlptim->Instance->IER = tmpIER;
2665 hlptim->Instance->CFGR = tmpCFGR;
2666 hlptim->Instance->OR = tmpOR;
2667
2668 /* Exit critical section: restore previous priority mask */
2669 __set_PRIMASK(primask_bit);
2670 }
2671 /**
2672 * @}
2673 */
2674 #endif /* LPTIM1 || LPTIM2 || LPTIM3 */
2675
2676 #endif /* HAL_LPTIM_MODULE_ENABLED */
2677 /**
2678 * @}
2679 */
2680
2681 /**
2682 * @}
2683 */
2684
