1 /**
2 ******************************************************************************
3 * @file stm32l5xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L5xx_LL_LPTIM_H
21 #define STM32L5xx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l5xx.h"
29
30 /** @addtogroup STM32L5xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 #define LL_LPTIM_ISR_UE LPTIM_ISR_UE /*!< Update event */
113 #define LL_LPTIM_ISR_REPOK LPTIM_ISR_REPOK /*!< Repetition register update OK */
114 /**
115 * @}
116 */
117
118 /** @defgroup LPTIM_LL_EC_IT IT Defines
119 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
120 * @{
121 */
122 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
123 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
124 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
125 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
126 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
127 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
128 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
129 #define LL_LPTIM_IER_UEIE LPTIM_IER_UEIE /*!< Update event */
130 #define LL_LPTIM_IER_REPOKIE LPTIM_IER_REPOKIE /*!< Repetition register update OK */
131 /**
132 * @}
133 */
134
135 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
136 * @{
137 */
138 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
139 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
140 /**
141 * @}
142 */
143
144 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
145 * @{
146 */
147 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
148 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
149 /**
150 * @}
151 */
152
153 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
154 * @{
155 */
156 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
157 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
158 /**
159 * @}
160 */
161
162 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
163 * @{
164 */
165 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
166 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
167 /**
168 * @}
169 */
170
171 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
172 * @{
173 */
174 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
175 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
176 /**
177 * @}
178 */
179
180 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
181 * @{
182 */
183 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
184 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
185 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
186 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
187 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
188 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
189 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
190 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
191 /**
192 * @}
193 */
194
195 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
196 * @{
197 */
198 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
199 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
200 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
201 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
202 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
203 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
204 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
205 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
206 /**
207 * @}
208 */
209
210 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
211 * @{
212 */
213 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
214 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
215 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
216 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
217 /**
218 * @}
219 */
220
221 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
222 * @{
223 */
224 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
225 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
226 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
227 /**
228 * @}
229 */
230
231 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
232 * @{
233 */
234 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
235 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
236 /**
237 * @}
238 */
239
240 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
241 * @{
242 */
243 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
244 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
245 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
246 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
247 /**
248 * @}
249 */
250
251 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
252 * @{
253 */
254 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
255 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
256 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
257 /**
258 * @}
259 */
260
261 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
262 * @{
263 */
264 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
265 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
266 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
267 /**
268 * @}
269 */
270
271 /** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
272 * @{
273 */
274 #define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
275 #define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */
276 #define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */
277 #define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */
278 /**
279 * @}
280 */
281
282 /** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
283 * @{
284 */
285 #define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /*!< For LPTIM1 */
286 #define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */
287 /**
288 * @}
289 */
290
291 /**
292 * @}
293 */
294
295 /* Exported macro ------------------------------------------------------------*/
296 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
297 * @{
298 */
299
300 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
301 * @{
302 */
303
304 /**
305 * @brief Write a value in LPTIM register
306 * @param __INSTANCE__ LPTIM Instance
307 * @param __REG__ Register to be written
308 * @param __VALUE__ Value to be written in the register
309 * @retval None
310 */
311 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
312
313 /**
314 * @brief Read a value in LPTIM register
315 * @param __INSTANCE__ LPTIM Instance
316 * @param __REG__ Register to be read
317 * @retval Register value
318 */
319 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
320 /**
321 * @}
322 */
323
324 /**
325 * @}
326 */
327
328 /* Exported functions --------------------------------------------------------*/
329 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
330 * @{
331 */
332
333 /** Legacy definitions for compatibility purpose
334 @cond 0
335 */
336 #define LL_LPTIM_ClearFLAG_CMPM LL_LPTIM_ClearFlag_CMPM
337 #define LL_LPTIM_ClearFLAG_CC1 LL_LPTIM_ClearFlag_CC1
338 #define LL_LPTIM_ClearFLAG_CC2 LL_LPTIM_ClearFlag_CC2
339 #define LL_LPTIM_ClearFLAG_CC1O LL_LPTIM_ClearFlag_CC1O
340 #define LL_LPTIM_ClearFLAG_CC2O LL_LPTIM_ClearFlag_CC2O
341 #define LL_LPTIM_ClearFLAG_ARRM LL_LPTIM_ClearFlag_ARRM
342 /**
343 @endcond
344 */
345
346 #if defined(USE_FULL_LL_DRIVER)
347 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
348 * @{
349 */
350
351 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
352 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
353 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
354 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
355 /**
356 * @}
357 */
358 #endif /* USE_FULL_LL_DRIVER */
359
360 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
361 * @{
362 */
363
364 /**
365 * @brief Enable the LPTIM instance
366 * @note After setting the ENABLE bit, a delay of two counter clock is needed
367 * before the LPTIM instance is actually enabled.
368 * @rmtoll CR ENABLE LL_LPTIM_Enable
369 * @param LPTIMx Low-Power Timer instance
370 * @retval None
371 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)372 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
373 {
374 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
375 }
376
377 /**
378 * @brief Indicates whether the LPTIM instance is enabled.
379 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
380 * @param LPTIMx Low-Power Timer instance
381 * @retval State of bit (1 or 0).
382 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)383 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
384 {
385 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
386 }
387
388 /**
389 * @brief Starts the LPTIM counter in the desired mode.
390 * @note LPTIM instance must be enabled before starting the counter.
391 * @note It is possible to change on the fly from One Shot mode to
392 * Continuous mode.
393 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
394 * CR SNGSTRT LL_LPTIM_StartCounter
395 * @param LPTIMx Low-Power Timer instance
396 * @param OperatingMode This parameter can be one of the following values:
397 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
398 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
399 * @retval None
400 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)401 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
402 {
403 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
404 }
405
406 /**
407 * @brief Enable reset after read.
408 * @note After calling this function any read access to LPTIM_CNT
409 * register will asynchronously reset the LPTIM_CNT register content.
410 * @rmtoll CR RSTARE LL_LPTIM_EnableResetAfterRead
411 * @param LPTIMx Low-Power Timer instance
412 * @retval None
413 */
LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef * LPTIMx)414 __STATIC_INLINE void LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef *LPTIMx)
415 {
416 SET_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
417 }
418
419 /**
420 * @brief Disable reset after read.
421 * @rmtoll CR RSTARE LL_LPTIM_DisableResetAfterRead
422 * @param LPTIMx Low-Power Timer instance
423 * @retval None
424 */
LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef * LPTIMx)425 __STATIC_INLINE void LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef *LPTIMx)
426 {
427 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
428 }
429
430 /**
431 * @brief Indicate whether the reset after read feature is enabled.
432 * @rmtoll CR RSTARE LL_LPTIM_IsEnabledResetAfterRead
433 * @param LPTIMx Low-Power Timer instance
434 * @retval State of bit (1 or 0).
435 */
LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef * LPTIMx)436 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledResetAfterRead(const LPTIM_TypeDef *LPTIMx)
437 {
438 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_RSTARE) == LPTIM_CR_RSTARE) ? 1UL : 0UL));
439 }
440
441 /**
442 * @brief Reset of the LPTIM_CNT counter register (synchronous).
443 * @note Due to the synchronous nature of this reset, it only takes
444 * place after a synchronization delay of 3 LPTIM core clock cycles
445 * (LPTIM core clock may be different from APB clock).
446 * @note COUNTRST is automatically cleared by hardware
447 * @rmtoll CR COUNTRST LL_LPTIM_ResetCounter\n
448 * @param LPTIMx Low-Power Timer instance
449 * @retval None
450 */
LL_LPTIM_ResetCounter(LPTIM_TypeDef * LPTIMx)451 __STATIC_INLINE void LL_LPTIM_ResetCounter(LPTIM_TypeDef *LPTIMx)
452 {
453 SET_BIT(LPTIMx->CR, LPTIM_CR_COUNTRST);
454 }
455
456 /**
457 * @brief Set the LPTIM registers update mode (enable/disable register preload)
458 * @note This function must be called when the LPTIM instance is disabled.
459 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
460 * @param LPTIMx Low-Power Timer instance
461 * @param UpdateMode This parameter can be one of the following values:
462 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
463 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
464 * @retval None
465 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)466 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
467 {
468 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
469 }
470
471 /**
472 * @brief Get the LPTIM registers update mode
473 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
474 * @param LPTIMx Low-Power Timer instance
475 * @retval Returned value can be one of the following values:
476 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
477 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
478 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)479 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
480 {
481 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
482 }
483
484 /**
485 * @brief Set the auto reload value
486 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
487 * @note After a write to the LPTIMx_ARR register a new write operation to the
488 * same register can only be performed when the previous write operation
489 * is completed. Any successive write before the ARROK flag is set, will
490 * lead to unpredictable results.
491 * @note autoreload value be strictly greater than the compare value.
492 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
493 * @param LPTIMx Low-Power Timer instance
494 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
495 * @retval None
496 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)497 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
498 {
499 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
500 }
501
502 /**
503 * @brief Get actual auto reload value
504 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
505 * @param LPTIMx Low-Power Timer instance
506 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
507 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)508 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
509 {
510 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
511 }
512
513 /**
514 * @brief Set the repetition value
515 * @note The LPTIMx_RCR register content must only be modified when the LPTIM is enabled
516 * @rmtoll RCR REP LL_LPTIM_SetRepetition
517 * @param LPTIMx Low-Power Timer instance
518 * @param Repetition Value between Min_Data=0x00 and Max_Data=0xFF
519 * @retval None
520 */
LL_LPTIM_SetRepetition(LPTIM_TypeDef * LPTIMx,uint32_t Repetition)521 __STATIC_INLINE void LL_LPTIM_SetRepetition(LPTIM_TypeDef *LPTIMx, uint32_t Repetition)
522 {
523 MODIFY_REG(LPTIMx->RCR, LPTIM_RCR_REP, Repetition);
524 }
525
526 /**
527 * @brief Get the repetition value
528 * @rmtoll RCR REP LL_LPTIM_GetRepetition
529 * @param LPTIMx Low-Power Timer instance
530 * @retval Repetition Value between Min_Data=0x00 and Max_Data=0xFF
531 */
LL_LPTIM_GetRepetition(const LPTIM_TypeDef * LPTIMx)532 __STATIC_INLINE uint32_t LL_LPTIM_GetRepetition(const LPTIM_TypeDef *LPTIMx)
533 {
534 return (uint32_t)(READ_BIT(LPTIMx->RCR, LPTIM_RCR_REP));
535 }
536
537 /**
538 * @brief Set the compare value
539 * @note After a write to the LPTIMx_CMP register a new write operation to the
540 * same register can only be performed when the previous write operation
541 * is completed. Any successive write before the CMPOK flag is set, will
542 * lead to unpredictable results.
543 * @rmtoll CMP CMP LL_LPTIM_SetCompare
544 * @param LPTIMx Low-Power Timer instance
545 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
546 * @retval None
547 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)548 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
549 {
550 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
551 }
552
553 /**
554 * @brief Get actual compare value
555 * @rmtoll CMP CMP LL_LPTIM_GetCompare
556 * @param LPTIMx Low-Power Timer instance
557 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
558 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)559 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
560 {
561 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
562 }
563
564 /**
565 * @brief Get actual counter value
566 * @note When the LPTIM instance is running with an asynchronous clock, reading
567 * the LPTIMx_CNT register may return unreliable values. So in this case
568 * it is necessary to perform two consecutive read accesses and verify
569 * that the two returned values are identical.
570 * @rmtoll CNT CNT LL_LPTIM_GetCounter
571 * @param LPTIMx Low-Power Timer instance
572 * @retval Counter value
573 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)574 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
575 {
576 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
577 }
578
579 /**
580 * @brief Set the counter mode (selection of the LPTIM counter clock source).
581 * @note The counter mode can be set only when the LPTIM instance is disabled.
582 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
583 * @param LPTIMx Low-Power Timer instance
584 * @param CounterMode This parameter can be one of the following values:
585 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
586 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
587 * @retval None
588 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)589 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
590 {
591 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
592 }
593
594 /**
595 * @brief Get the counter mode
596 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
597 * @param LPTIMx Low-Power Timer instance
598 * @retval Returned value can be one of the following values:
599 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
600 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
601 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)602 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
603 {
604 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
605 }
606
607 /**
608 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
609 * @note This function must be called when the LPTIM instance is disabled.
610 * @note Regarding the LPTIM output polarity the change takes effect
611 * immediately, so the output default value will change immediately after
612 * the polarity is re-configured, even before the timer is enabled.
613 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
614 * CFGR WAVPOL LL_LPTIM_ConfigOutput
615 * @param LPTIMx Low-Power Timer instance
616 * @param Waveform This parameter can be one of the following values:
617 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
618 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
619 * @param Polarity This parameter can be one of the following values:
620 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
621 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
622 * @retval None
623 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)624 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
625 {
626 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
627 }
628
629 /**
630 * @brief Set waveform shape
631 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
632 * @param LPTIMx Low-Power Timer instance
633 * @param Waveform This parameter can be one of the following values:
634 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
635 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
636 * @retval None
637 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)638 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
639 {
640 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
641 }
642
643 /**
644 * @brief Get actual waveform shape
645 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
646 * @param LPTIMx Low-Power Timer instance
647 * @retval Returned value can be one of the following values:
648 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
649 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
650 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)651 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
652 {
653 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
654 }
655
656 /**
657 * @brief Set output polarity
658 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
659 * @param LPTIMx Low-Power Timer instance
660 * @param Polarity This parameter can be one of the following values:
661 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
662 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
663 * @retval None
664 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)665 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
666 {
667 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
668 }
669
670 /**
671 * @brief Get actual output polarity
672 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
673 * @param LPTIMx Low-Power Timer instance
674 * @retval Returned value can be one of the following values:
675 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
676 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
677 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)678 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
679 {
680 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
681 }
682
683 /**
684 * @brief Set actual prescaler division ratio.
685 * @note This function must be called when the LPTIM instance is disabled.
686 * @note When the LPTIM is configured to be clocked by an internal clock source
687 * and the LPTIM counter is configured to be updated by active edges
688 * detected on the LPTIM external Input1, the internal clock provided to
689 * the LPTIM must be not be prescaled.
690 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
691 * @param LPTIMx Low-Power Timer instance
692 * @param Prescaler This parameter can be one of the following values:
693 * @arg @ref LL_LPTIM_PRESCALER_DIV1
694 * @arg @ref LL_LPTIM_PRESCALER_DIV2
695 * @arg @ref LL_LPTIM_PRESCALER_DIV4
696 * @arg @ref LL_LPTIM_PRESCALER_DIV8
697 * @arg @ref LL_LPTIM_PRESCALER_DIV16
698 * @arg @ref LL_LPTIM_PRESCALER_DIV32
699 * @arg @ref LL_LPTIM_PRESCALER_DIV64
700 * @arg @ref LL_LPTIM_PRESCALER_DIV128
701 * @retval None
702 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)703 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
704 {
705 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
706 }
707
708 /**
709 * @brief Get actual prescaler division ratio.
710 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
711 * @param LPTIMx Low-Power Timer instance
712 * @retval Returned value can be one of the following values:
713 * @arg @ref LL_LPTIM_PRESCALER_DIV1
714 * @arg @ref LL_LPTIM_PRESCALER_DIV2
715 * @arg @ref LL_LPTIM_PRESCALER_DIV4
716 * @arg @ref LL_LPTIM_PRESCALER_DIV8
717 * @arg @ref LL_LPTIM_PRESCALER_DIV16
718 * @arg @ref LL_LPTIM_PRESCALER_DIV32
719 * @arg @ref LL_LPTIM_PRESCALER_DIV64
720 * @arg @ref LL_LPTIM_PRESCALER_DIV128
721 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)722 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
723 {
724 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
725 }
726
727 /**
728 * @brief Set LPTIM input 1 source (default GPIO).
729 * @rmtoll OR OR LL_LPTIM_SetInput1Src
730 * @param LPTIMx Low-Power Timer instance
731 * @param Src This parameter can be one of the following values:
732 * @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
733 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
734 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
735 * @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
736 * @retval None
737 */
LL_LPTIM_SetInput1Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)738 __STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
739 {
740 MODIFY_REG(LPTIMx->OR, LPTIM_OR_OR, Src);
741 }
742
743 /**
744 * @brief Set LPTIM input 2 source (default GPIO).
745 * @rmtoll OR OR LL_LPTIM_SetInput2Src
746 * @param LPTIMx Low-Power Timer instance
747 * @param Src This parameter can be one of the following values:
748 * @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
749 * @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
750 * @retval None
751 */
LL_LPTIM_SetInput2Src(LPTIM_TypeDef * LPTIMx,uint32_t Src)752 __STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
753 {
754 MODIFY_REG(LPTIMx->OR, LPTIM_OR_OR, Src);
755 }
756
757 /**
758 * @}
759 */
760
761 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
762 * @{
763 */
764
765 /**
766 * @brief Enable the timeout function
767 * @note This function must be called when the LPTIM instance is disabled.
768 * @note The first trigger event will start the timer, any successive trigger
769 * event will reset the counter and the timer will restart.
770 * @note The timeout value corresponds to the compare value; if no trigger
771 * occurs within the expected time frame, the MCU is waked-up by the
772 * compare match event.
773 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
774 * @param LPTIMx Low-Power Timer instance
775 * @retval None
776 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)777 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
778 {
779 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
780 }
781
782 /**
783 * @brief Disable the timeout function
784 * @note This function must be called when the LPTIM instance is disabled.
785 * @note A trigger event arriving when the timer is already started will be
786 * ignored.
787 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
788 * @param LPTIMx Low-Power Timer instance
789 * @retval None
790 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)791 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
792 {
793 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
794 }
795
796 /**
797 * @brief Indicate whether the timeout function is enabled.
798 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
799 * @param LPTIMx Low-Power Timer instance
800 * @retval State of bit (1 or 0).
801 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)802 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
803 {
804 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
805 }
806
807 /**
808 * @brief Start the LPTIM counter
809 * @note This function must be called when the LPTIM instance is disabled.
810 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
811 * @param LPTIMx Low-Power Timer instance
812 * @retval None
813 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)814 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
815 {
816 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
817 }
818
819 /**
820 * @brief Configure the external trigger used as a trigger event for the LPTIM.
821 * @note This function must be called when the LPTIM instance is disabled.
822 * @note An internal clock source must be present when a digital filter is
823 * required for the trigger.
824 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
825 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
826 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
827 * @param LPTIMx Low-Power Timer instance
828 * @param Source This parameter can be one of the following values:
829 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
830 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
831 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
832 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
833 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
834 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
835 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
836 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
837 * @param Filter This parameter can be one of the following values:
838 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
839 * @arg @ref LL_LPTIM_TRIG_FILTER_2
840 * @arg @ref LL_LPTIM_TRIG_FILTER_4
841 * @arg @ref LL_LPTIM_TRIG_FILTER_8
842 * @param Polarity This parameter can be one of the following values:
843 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
844 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
845 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
846 * @retval None
847 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)848 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
849 {
850 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
851 }
852
853 /**
854 * @brief Get actual external trigger source.
855 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
856 * @param LPTIMx Low-Power Timer instance
857 * @retval Returned value can be one of the following values:
858 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
859 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
860 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
861 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
862 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
863 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
864 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
865 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
866 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)867 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
868 {
869 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
870 }
871
872 /**
873 * @brief Get actual external trigger filter.
874 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
875 * @param LPTIMx Low-Power Timer instance
876 * @retval Returned value can be one of the following values:
877 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
878 * @arg @ref LL_LPTIM_TRIG_FILTER_2
879 * @arg @ref LL_LPTIM_TRIG_FILTER_4
880 * @arg @ref LL_LPTIM_TRIG_FILTER_8
881 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)882 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
883 {
884 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
885 }
886
887 /**
888 * @brief Get actual external trigger polarity.
889 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
890 * @param LPTIMx Low-Power Timer instance
891 * @retval Returned value can be one of the following values:
892 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
893 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
894 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
895 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)896 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
897 {
898 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
899 }
900
901 /**
902 * @}
903 */
904
905 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
906 * @{
907 */
908
909 /**
910 * @brief Set the source of the clock used by the LPTIM instance.
911 * @note This function must be called when the LPTIM instance is disabled.
912 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
913 * @param LPTIMx Low-Power Timer instance
914 * @param ClockSource This parameter can be one of the following values:
915 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
916 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
917 * @retval None
918 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)919 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
920 {
921 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
922 }
923
924 /**
925 * @brief Get actual LPTIM instance clock source.
926 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
927 * @param LPTIMx Low-Power Timer instance
928 * @retval Returned value can be one of the following values:
929 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
930 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
931 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)932 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
933 {
934 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
935 }
936
937 /**
938 * @brief Configure the active edge or edges used by the counter when
939 the LPTIM is clocked by an external clock source.
940 * @note This function must be called when the LPTIM instance is disabled.
941 * @note When both external clock signal edges are considered active ones,
942 * the LPTIM must also be clocked by an internal clock source with a
943 * frequency equal to at least four times the external clock frequency.
944 * @note An internal clock source must be present when a digital filter is
945 * required for external clock.
946 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
947 * CFGR CKPOL LL_LPTIM_ConfigClock
948 * @param LPTIMx Low-Power Timer instance
949 * @param ClockFilter This parameter can be one of the following values:
950 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
951 * @arg @ref LL_LPTIM_CLK_FILTER_2
952 * @arg @ref LL_LPTIM_CLK_FILTER_4
953 * @arg @ref LL_LPTIM_CLK_FILTER_8
954 * @param ClockPolarity This parameter can be one of the following values:
955 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
956 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
957 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
958 * @retval None
959 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)960 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
961 {
962 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
963 }
964
965 /**
966 * @brief Get actual clock polarity
967 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
968 * @param LPTIMx Low-Power Timer instance
969 * @retval Returned value can be one of the following values:
970 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
971 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
972 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
973 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)974 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
975 {
976 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
977 }
978
979 /**
980 * @brief Get actual clock digital filter
981 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
982 * @param LPTIMx Low-Power Timer instance
983 * @retval Returned value can be one of the following values:
984 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
985 * @arg @ref LL_LPTIM_CLK_FILTER_2
986 * @arg @ref LL_LPTIM_CLK_FILTER_4
987 * @arg @ref LL_LPTIM_CLK_FILTER_8
988 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)989 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
990 {
991 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
992 }
993
994 /**
995 * @}
996 */
997
998 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
999 * @{
1000 */
1001
1002 /**
1003 * @brief Configure the encoder mode.
1004 * @note This function must be called when the LPTIM instance is disabled.
1005 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
1006 * @param LPTIMx Low-Power Timer instance
1007 * @param EncoderMode This parameter can be one of the following values:
1008 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
1009 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
1010 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
1011 * @retval None
1012 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)1013 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
1014 {
1015 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
1016 }
1017
1018 /**
1019 * @brief Get actual encoder mode.
1020 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
1021 * @param LPTIMx Low-Power Timer instance
1022 * @retval Returned value can be one of the following values:
1023 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
1024 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
1025 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
1026 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)1027 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
1028 {
1029 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
1030 }
1031
1032 /**
1033 * @brief Enable the encoder mode
1034 * @note This function must be called when the LPTIM instance is disabled.
1035 * @note In this mode the LPTIM instance must be clocked by an internal clock
1036 * source. Also, the prescaler division ratio must be equal to 1.
1037 * @note LPTIM instance must be configured in continuous mode prior enabling
1038 * the encoder mode.
1039 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
1040 * @param LPTIMx Low-Power Timer instance
1041 * @retval None
1042 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)1043 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
1044 {
1045 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1046 }
1047
1048 /**
1049 * @brief Disable the encoder mode
1050 * @note This function must be called when the LPTIM instance is disabled.
1051 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
1052 * @param LPTIMx Low-Power Timer instance
1053 * @retval None
1054 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)1055 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
1056 {
1057 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
1058 }
1059
1060 /**
1061 * @brief Indicates whether the LPTIM operates in encoder mode.
1062 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
1063 * @param LPTIMx Low-Power Timer instance
1064 * @retval State of bit (1 or 0).
1065 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)1066 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
1067 {
1068 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
1069 }
1070
1071 /**
1072 * @}
1073 */
1074
1075 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
1076 * @{
1077 */
1078
1079
1080 /**
1081 * @brief Clear the compare match flag (CMPMCF)
1082 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFlag_CMPM
1083 * @param LPTIMx Low-Power Timer instance
1084 * @retval None
1085 */
LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef * LPTIMx)1086 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef *LPTIMx)
1087 {
1088 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
1089 }
1090
1091 /**
1092 * @brief Inform application whether a compare match interrupt has occurred.
1093 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
1094 * @param LPTIMx Low-Power Timer instance
1095 * @retval State of bit (1 or 0).
1096 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)1097 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
1098 {
1099 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
1100 }
1101
1102 /**
1103 * @brief Clear the autoreload match flag (ARRMCF)
1104 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFlag_ARRM
1105 * @param LPTIMx Low-Power Timer instance
1106 * @retval None
1107 */
LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef * LPTIMx)1108 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef *LPTIMx)
1109 {
1110 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
1111 }
1112
1113 /**
1114 * @brief Inform application whether a autoreload match interrupt has occurred.
1115 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
1116 * @param LPTIMx Low-Power Timer instance
1117 * @retval State of bit (1 or 0).
1118 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)1119 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
1120 {
1121 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
1122 }
1123
1124 /**
1125 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
1126 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
1127 * @param LPTIMx Low-Power Timer instance
1128 * @retval None
1129 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)1130 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1131 {
1132 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1133 }
1134
1135 /**
1136 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1137 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1138 * @param LPTIMx Low-Power Timer instance
1139 * @retval State of bit (1 or 0).
1140 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1141 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1142 {
1143 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1144 }
1145
1146 /**
1147 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1148 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1149 * @param LPTIMx Low-Power Timer instance
1150 * @retval None
1151 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1152 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1153 {
1154 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1155 }
1156
1157 /**
1158 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1159 completed. If so, a new one can be initiated.
1160 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1161 * @param LPTIMx Low-Power Timer instance
1162 * @retval State of bit (1 or 0).
1163 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1164 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1165 {
1166 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1167 }
1168
1169 /**
1170 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1171 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1172 * @param LPTIMx Low-Power Timer instance
1173 * @retval None
1174 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1175 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1176 {
1177 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1178 }
1179
1180 /**
1181 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1182 completed. If so, a new one can be initiated.
1183 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1184 * @param LPTIMx Low-Power Timer instance
1185 * @retval State of bit (1 or 0).
1186 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1187 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1188 {
1189 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1190 }
1191
1192 /**
1193 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1194 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1195 * @param LPTIMx Low-Power Timer instance
1196 * @retval None
1197 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1198 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1199 {
1200 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1201 }
1202
1203 /**
1204 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1205 operates in encoder mode).
1206 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1207 * @param LPTIMx Low-Power Timer instance
1208 * @retval State of bit (1 or 0).
1209 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1210 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1211 {
1212 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1213 }
1214
1215 /**
1216 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1217 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1218 * @param LPTIMx Low-Power Timer instance
1219 * @retval None
1220 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1221 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1222 {
1223 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1224 }
1225
1226 /**
1227 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1228 operates in encoder mode).
1229 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1230 * @param LPTIMx Low-Power Timer instance
1231 * @retval State of bit (1 or 0).
1232 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1233 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1234 {
1235 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1236 }
1237
1238 /**
1239 * @brief Clear the repetition register update interrupt flag (REPOKCF).
1240 * @rmtoll ICR REPOKCF LL_LPTIM_ClearFlag_REPOK
1241 * @param LPTIMx Low-Power Timer instance
1242 * @retval None
1243 */
LL_LPTIM_ClearFlag_REPOK(LPTIM_TypeDef * LPTIMx)1244 __STATIC_INLINE void LL_LPTIM_ClearFlag_REPOK(LPTIM_TypeDef *LPTIMx)
1245 {
1246 SET_BIT(LPTIMx->ICR, LPTIM_ICR_REPOKCF);
1247 }
1248
1249 /**
1250 * @brief Informs application whether the APB bus write operation to the LPTIMx_RCR register has been successfully
1251 completed; If so, a new one can be initiated.
1252 * @rmtoll ISR REPOK LL_LPTIM_IsActiveFlag_REPOK
1253 * @param LPTIMx Low-Power Timer instance
1254 * @retval State of bit (1 or 0).
1255 */
LL_LPTIM_IsActiveFlag_REPOK(const LPTIM_TypeDef * LPTIMx)1256 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_REPOK(const LPTIM_TypeDef *LPTIMx)
1257 {
1258 return ((READ_BIT(LPTIMx->ISR, LPTIM_ISR_REPOK) == (LPTIM_ISR_REPOK)) ? 1UL : 0UL);
1259 }
1260
1261 /**
1262 * @brief Clear the update event flag (UECF).
1263 * @rmtoll ICR UECF LL_LPTIM_ClearFlag_UE
1264 * @param LPTIMx Low-Power Timer instance
1265 * @retval None
1266 */
LL_LPTIM_ClearFlag_UE(LPTIM_TypeDef * LPTIMx)1267 __STATIC_INLINE void LL_LPTIM_ClearFlag_UE(LPTIM_TypeDef *LPTIMx)
1268 {
1269 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UECF);
1270 }
1271
1272 /**
1273 * @brief Informs application whether the LPTIMx update event has occurred.
1274 * @rmtoll ISR UE LL_LPTIM_IsActiveFlag_UE
1275 * @param LPTIMx Low-Power Timer instance
1276 * @retval State of bit (1 or 0).
1277 */
LL_LPTIM_IsActiveFlag_UE(const LPTIM_TypeDef * LPTIMx)1278 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UE(const LPTIM_TypeDef *LPTIMx)
1279 {
1280 return ((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UE) == (LPTIM_ISR_UE)) ? 1UL : 0UL);
1281 }
1282
1283 /**
1284 * @}
1285 */
1286
1287 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1288 * @{
1289 */
1290
1291 /**
1292 * @brief Enable compare match interrupt (CMPMIE).
1293 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1294 * @param LPTIMx Low-Power Timer instance
1295 * @retval None
1296 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1297 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1298 {
1299 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1300 }
1301
1302 /**
1303 * @brief Disable compare match interrupt (CMPMIE).
1304 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1305 * @param LPTIMx Low-Power Timer instance
1306 * @retval None
1307 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1308 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1309 {
1310 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1311 }
1312
1313 /**
1314 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1315 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1316 * @param LPTIMx Low-Power Timer instance
1317 * @retval State of bit (1 or 0).
1318 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1319 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1320 {
1321 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1322 }
1323
1324 /**
1325 * @brief Enable autoreload match interrupt (ARRMIE).
1326 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1327 * @param LPTIMx Low-Power Timer instance
1328 * @retval None
1329 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1330 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1331 {
1332 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1333 }
1334
1335 /**
1336 * @brief Disable autoreload match interrupt (ARRMIE).
1337 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1338 * @param LPTIMx Low-Power Timer instance
1339 * @retval None
1340 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1341 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1342 {
1343 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1344 }
1345
1346 /**
1347 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1348 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1349 * @param LPTIMx Low-Power Timer instance
1350 * @retval State of bit (1 or 0).
1351 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1352 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1353 {
1354 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1355 }
1356
1357 /**
1358 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1359 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1360 * @param LPTIMx Low-Power Timer instance
1361 * @retval None
1362 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1363 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1364 {
1365 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1366 }
1367
1368 /**
1369 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1370 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1371 * @param LPTIMx Low-Power Timer instance
1372 * @retval None
1373 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1374 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1375 {
1376 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1377 }
1378
1379 /**
1380 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1381 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1382 * @param LPTIMx Low-Power Timer instance
1383 * @retval State of bit (1 or 0).
1384 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1385 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1386 {
1387 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1388 }
1389
1390 /**
1391 * @brief Enable compare register write completed interrupt (CMPOKIE).
1392 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1393 * @param LPTIMx Low-Power Timer instance
1394 * @retval None
1395 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1396 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1397 {
1398 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1399 }
1400
1401 /**
1402 * @brief Disable compare register write completed interrupt (CMPOKIE).
1403 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1404 * @param LPTIMx Low-Power Timer instance
1405 * @retval None
1406 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1407 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1408 {
1409 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1410 }
1411
1412 /**
1413 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1414 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1415 * @param LPTIMx Low-Power Timer instance
1416 * @retval State of bit (1 or 0).
1417 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1418 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1419 {
1420 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1421 }
1422
1423 /**
1424 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1425 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1426 * @param LPTIMx Low-Power Timer instance
1427 * @retval None
1428 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1429 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1430 {
1431 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1432 }
1433
1434 /**
1435 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1436 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1437 * @param LPTIMx Low-Power Timer instance
1438 * @retval None
1439 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1440 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1441 {
1442 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1443 }
1444
1445 /**
1446 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1447 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1448 * @param LPTIMx Low-Power Timer instance
1449 * @retval State of bit(1 or 0).
1450 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1451 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1452 {
1453 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1454 }
1455
1456 /**
1457 * @brief Enable direction change to up interrupt (UPIE).
1458 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1459 * @param LPTIMx Low-Power Timer instance
1460 * @retval None
1461 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1462 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1463 {
1464 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1465 }
1466
1467 /**
1468 * @brief Disable direction change to up interrupt (UPIE).
1469 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1470 * @param LPTIMx Low-Power Timer instance
1471 * @retval None
1472 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1473 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1474 {
1475 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1476 }
1477
1478 /**
1479 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1480 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1481 * @param LPTIMx Low-Power Timer instance
1482 * @retval State of bit(1 or 0).
1483 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1484 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1485 {
1486 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1487 }
1488
1489 /**
1490 * @brief Enable direction change to down interrupt (DOWNIE).
1491 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1492 * @param LPTIMx Low-Power Timer instance
1493 * @retval None
1494 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1495 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1496 {
1497 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1498 }
1499
1500 /**
1501 * @brief Disable direction change to down interrupt (DOWNIE).
1502 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1503 * @param LPTIMx Low-Power Timer instance
1504 * @retval None
1505 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1506 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1507 {
1508 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1509 }
1510
1511 /**
1512 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1513 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1514 * @param LPTIMx Low-Power Timer instance
1515 * @retval State of bit(1 or 0).
1516 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1517 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1518 {
1519 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1520 }
1521
1522 /**
1523 * @brief Enable repetition register update successfully completed interrupt (REPOKIE).
1524 * @rmtoll IER REPOKIE LL_LPTIM_EnableIT_REPOK
1525 * @param LPTIMx Low-Power Timer instance
1526 * @retval None
1527 */
LL_LPTIM_EnableIT_REPOK(LPTIM_TypeDef * LPTIMx)1528 __STATIC_INLINE void LL_LPTIM_EnableIT_REPOK(LPTIM_TypeDef *LPTIMx)
1529 {
1530 SET_BIT(LPTIMx->IER, LPTIM_IER_REPOKIE);
1531 }
1532
1533 /**
1534 * @brief Disable repetition register update successfully completed interrupt (REPOKIE).
1535 * @rmtoll IER REPOKIE LL_LPTIM_DisableIT_REPOK
1536 * @param LPTIMx Low-Power Timer instance
1537 * @retval None
1538 */
LL_LPTIM_DisableIT_REPOK(LPTIM_TypeDef * LPTIMx)1539 __STATIC_INLINE void LL_LPTIM_DisableIT_REPOK(LPTIM_TypeDef *LPTIMx)
1540 {
1541 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_REPOKIE);
1542 }
1543
1544 /**
1545 * @brief Indicates whether the repetition register update successfully completed interrupt (REPOKIE) is enabled.
1546 * @rmtoll IER REPOKIE LL_LPTIM_IsEnabledIT_REPOK
1547 * @param LPTIMx Low-Power Timer instance
1548 * @retval State of bit(1 or 0).
1549 */
LL_LPTIM_IsEnabledIT_REPOK(const LPTIM_TypeDef * LPTIMx)1550 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_REPOK(const LPTIM_TypeDef *LPTIMx)
1551 {
1552 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_REPOKIE) == (LPTIM_IER_REPOKIE)) ? 1UL : 0UL);
1553 }
1554
1555 /**
1556 * @brief Enable update event interrupt (UEIE).
1557 * @rmtoll IER UEIE LL_LPTIM_EnableIT_UE
1558 * @param LPTIMx Low-Power Timer instance
1559 * @retval None
1560 */
LL_LPTIM_EnableIT_UE(LPTIM_TypeDef * LPTIMx)1561 __STATIC_INLINE void LL_LPTIM_EnableIT_UE(LPTIM_TypeDef *LPTIMx)
1562 {
1563 SET_BIT(LPTIMx->IER, LPTIM_IER_UEIE);
1564 }
1565
1566 /**
1567 * @brief Disable update event interrupt (UEIE).
1568 * @rmtoll IER UEIE LL_LPTIM_DisableIT_UE
1569 * @param LPTIMx Low-Power Timer instance
1570 * @retval None
1571 */
LL_LPTIM_DisableIT_UE(LPTIM_TypeDef * LPTIMx)1572 __STATIC_INLINE void LL_LPTIM_DisableIT_UE(LPTIM_TypeDef *LPTIMx)
1573 {
1574 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UEIE);
1575 }
1576
1577 /**
1578 * @brief Indicates whether the update event interrupt (UEIE) is enabled.
1579 * @rmtoll IER UEIE LL_LPTIM_IsEnabledIT_UE
1580 * @param LPTIMx Low-Power Timer instance
1581 *@ retval State of bit(1 or 0).
1582 */
LL_LPTIM_IsEnabledIT_UE(const LPTIM_TypeDef * LPTIMx)1583 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UE(const LPTIM_TypeDef *LPTIMx)
1584 {
1585 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_UEIE) == (LPTIM_IER_UEIE)) ? 1UL : 0UL);
1586 }
1587 /**
1588 * @}
1589 */
1590
1591 /**
1592 * @}
1593 */
1594
1595 /**
1596 * @}
1597 */
1598
1599 #endif /* LPTIM1 || LPTIM2 || LPTIM3 */
1600
1601 /**
1602 * @}
1603 */
1604
1605 #ifdef __cplusplus
1606 }
1607 #endif
1608
1609 #endif /* STM32L5xx_LL_LPTIM_H */
1610
