1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32l4xx_ll_usart.h"
22 #include "stm32l4xx_ll_rcc.h"
23 #include "stm32l4xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32L4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Macros
45 * @{
46 */
47
48 #if defined(USART_PRESC_PRESCALER)
49 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
50 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
51 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
52 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
53 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
54 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
55 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
56 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
57 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
58 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
59 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
60 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
61
62 #endif /* USART_PRESC_PRESCALER */
63 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
64 * divided by the smallest oversampling used on the USART (i.e. 8) */
65 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
66 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 15000000U)
67 #else
68 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 10000000U)
69 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
70
71 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
72 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
73
74 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
75 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
76 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
77 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
78
79 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
80 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
81 || ((__VALUE__) == LL_USART_PARITY_ODD))
82
83 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
84 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
85 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
86
87 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
88 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
89
90 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
91 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
92
93 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
94 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
95
96 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
97 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
98
99 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
100 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
101
102 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
103 || ((__VALUE__) == LL_USART_STOPBITS_1) \
104 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
105 || ((__VALUE__) == LL_USART_STOPBITS_2))
106
107 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
108 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
109 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
110 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
111
112 /**
113 * @}
114 */
115
116 /* Private function prototypes -----------------------------------------------*/
117
118 /* Exported functions --------------------------------------------------------*/
119 /** @addtogroup USART_LL_Exported_Functions
120 * @{
121 */
122
123 /** @addtogroup USART_LL_EF_Init
124 * @{
125 */
126
127 /**
128 * @brief De-initialize USART registers (Registers restored to their default values).
129 * @param USARTx USART Instance
130 * @retval An ErrorStatus enumeration value:
131 * - SUCCESS: USART registers are de-initialized
132 * - ERROR: USART registers are not de-initialized
133 */
LL_USART_DeInit(const USART_TypeDef * USARTx)134 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
135 {
136 ErrorStatus status = SUCCESS;
137
138 /* Check the parameters */
139 assert_param(IS_UART_INSTANCE(USARTx));
140
141 if (USARTx == USART1)
142 {
143 /* Force reset of USART clock */
144 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
145
146 /* Release reset of USART clock */
147 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
148 }
149 else if (USARTx == USART2)
150 {
151 /* Force reset of USART clock */
152 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
153
154 /* Release reset of USART clock */
155 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
156 }
157 #if defined(USART3)
158 else if (USARTx == USART3)
159 {
160 /* Force reset of USART clock */
161 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
162
163 /* Release reset of USART clock */
164 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
165 }
166 #endif /* USART3 */
167 #if defined(UART4)
168 else if (USARTx == UART4)
169 {
170 /* Force reset of UART clock */
171 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
172
173 /* Release reset of UART clock */
174 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
175 }
176 #endif /* UART4 */
177 #if defined(UART5)
178 else if (USARTx == UART5)
179 {
180 /* Force reset of UART clock */
181 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
182
183 /* Release reset of UART clock */
184 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
185 }
186 #endif /* UART5 */
187 else
188 {
189 status = ERROR;
190 }
191
192 return (status);
193 }
194
195 /**
196 * @brief Initialize USART registers according to the specified
197 * parameters in USART_InitStruct.
198 * @note As some bits in USART configuration registers can only be written when
199 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
200 * this function. Otherwise, ERROR result will be returned.
201 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
202 * @param USARTx USART Instance
203 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
204 * that contains the configuration information for the specified USART peripheral.
205 * @retval An ErrorStatus enumeration value:
206 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
207 * - ERROR: Problem occurred during USART Registers initialization
208 */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)209 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
210 {
211 ErrorStatus status = ERROR;
212 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
213
214 /* Check the parameters */
215 assert_param(IS_UART_INSTANCE(USARTx));
216 #if defined(USART_PRESC_PRESCALER)
217 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
218 #endif /* USART_PRESC_PRESCALER */
219 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
220 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
221 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
222 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
223 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
224 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
225 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
226
227 /* USART needs to be in disabled state, in order to be able to configure some bits in
228 CRx registers */
229 if (LL_USART_IsEnabled(USARTx) == 0U)
230 {
231 /*---------------------------- USART CR1 Configuration ---------------------
232 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
233 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
234 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
235 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
236 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
237 */
238 MODIFY_REG(USARTx->CR1,
239 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
240 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
241 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
242 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
243
244 /*---------------------------- USART CR2 Configuration ---------------------
245 * Configure USARTx CR2 (Stop bits) with parameters:
246 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
247 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
248 */
249 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
250
251 /*---------------------------- USART CR3 Configuration ---------------------
252 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
253 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
254 * USART_InitStruct->HardwareFlowControl value.
255 */
256 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
257
258 /*---------------------------- USART BRR Configuration ---------------------
259 * Retrieve Clock frequency used for USART Peripheral
260 */
261 if (USARTx == USART1)
262 {
263 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
264 }
265 else if (USARTx == USART2)
266 {
267 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
268 }
269 #if defined(USART3)
270 else if (USARTx == USART3)
271 {
272 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
273 }
274 #endif /* USART3 */
275 #if defined(UART4)
276 else if (USARTx == UART4)
277 {
278 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
279 }
280 #endif /* UART4 */
281 #if defined(UART5)
282 else if (USARTx == UART5)
283 {
284 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
285 }
286 #endif /* UART5 */
287 else
288 {
289 /* Nothing to do, as error code is already assigned to ERROR value */
290 }
291
292 /* Configure the USART Baud Rate :
293 #if defined(USART_PRESC_PRESCALER)
294 - prescaler value is required
295 #endif
296 - valid baud rate value (different from 0) is required
297 - Peripheral clock as returned by RCC service, should be valid (different from 0).
298 */
299 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
300 && (USART_InitStruct->BaudRate != 0U))
301 {
302 status = SUCCESS;
303 LL_USART_SetBaudRate(USARTx,
304 periphclk,
305 #if defined(USART_PRESC_PRESCALER)
306 USART_InitStruct->PrescalerValue,
307 #endif /* USART_PRESC_PRESCALER */
308 USART_InitStruct->OverSampling,
309 USART_InitStruct->BaudRate);
310
311 /* Check BRR is greater than or equal to 16d */
312 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
313 }
314 #if defined(USART_PRESC_PRESCALER)
315
316 /*---------------------------- USART PRESC Configuration -----------------------
317 * Configure USARTx PRESC (Prescaler) with parameters:
318 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
319 */
320 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
321 #endif /* USART_PRESC_PRESCALER */
322 }
323 /* Endif (=> USART not in Disabled state => return ERROR) */
324
325 return (status);
326 }
327
328 /**
329 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
330 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
331 * whose fields will be set to default values.
332 * @retval None
333 */
334
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)335 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
336 {
337 /* Set USART_InitStruct fields to default values */
338 #if defined(USART_PRESC_PRESCALER)
339 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
340 #endif /* USART_PRESC_PRESCALER */
341 USART_InitStruct->BaudRate = 9600U;
342 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
343 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
344 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
345 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
346 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
347 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
348 }
349
350 /**
351 * @brief Initialize USART Clock related settings according to the
352 * specified parameters in the USART_ClockInitStruct.
353 * @note As some bits in USART configuration registers can only be written when
354 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
355 * this function. Otherwise, ERROR result will be returned.
356 * @param USARTx USART Instance
357 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
358 * that contains the Clock configuration information for the specified USART peripheral.
359 * @retval An ErrorStatus enumeration value:
360 * - SUCCESS: USART registers related to Clock settings are initialized according
361 * to USART_ClockInitStruct content
362 * - ERROR: Problem occurred during USART Registers initialization
363 */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)364 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
365 {
366 ErrorStatus status = SUCCESS;
367
368 /* Check USART Instance and Clock signal output parameters */
369 assert_param(IS_UART_INSTANCE(USARTx));
370 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
371
372 /* USART needs to be in disabled state, in order to be able to configure some bits in
373 CRx registers */
374 if (LL_USART_IsEnabled(USARTx) == 0U)
375 {
376 #if defined(USART_CR2_SLVEN)
377 /* Ensure USART instance is USART capable */
378 assert_param(IS_USART_INSTANCE(USARTx));
379
380 /* Check clock related parameters */
381 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
382 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
383 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
384
385 /*---------------------------- USART CR2 Configuration -----------------------
386 * Configure USARTx CR2 (Clock signal related bits) with parameters:
387 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
388 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
389 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
390 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
391 */
392 MODIFY_REG(USARTx->CR2,
393 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
394 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
395 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
396 #else
397 /* If USART Clock signal is disabled */
398 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
399 {
400 /* Deactivate Clock signal delivery :
401 * - Disable Clock Output: USART_CR2_CLKEN cleared
402 */
403 LL_USART_DisableSCLKOutput(USARTx);
404 }
405 else
406 {
407 /* Ensure USART instance is USART capable */
408 assert_param(IS_USART_INSTANCE(USARTx));
409
410 /* Check clock related parameters */
411 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
412 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
413 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
414
415 /*---------------------------- USART CR2 Configuration -----------------------
416 * Configure USARTx CR2 (Clock signal related bits) with parameters:
417 * - Enable Clock Output: USART_CR2_CLKEN set
418 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
419 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
420 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
421 */
422 MODIFY_REG(USARTx->CR2,
423 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
424 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
425 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
426 }
427 #endif /* USART_CR2_SLVEN */
428 }
429 /* Else (USART not in Disabled state => return ERROR */
430 else
431 {
432 status = ERROR;
433 }
434
435 return (status);
436 }
437
438 /**
439 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
440 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
441 * whose fields will be set to default values.
442 * @retval None
443 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)444 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
445 {
446 /* Set LL_USART_ClockInitStruct fields with default values */
447 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
448 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
449 LL_USART_CLOCK_DISABLE */
450 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
451 LL_USART_CLOCK_DISABLE */
452 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
453 LL_USART_CLOCK_DISABLE */
454 }
455
456 /**
457 * @}
458 */
459
460 /**
461 * @}
462 */
463
464 /**
465 * @}
466 */
467
468 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
469
470 /**
471 * @}
472 */
473
474 #endif /* USE_FULL_LL_DRIVER */
475
476
477
