1 /**
2   ******************************************************************************
3   * @file    stm32l4xx_ll_lptim.c
4   * @author  MCD Application Team
5   * @brief   LPTIM LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2017 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32l4xx_ll_lptim.h"
22 #include "stm32l4xx_ll_bus.h"
23 #include "stm32l4xx_ll_rcc.h"
24 
25 
26 #ifdef  USE_FULL_ASSERT
27 #include "stm32_assert.h"
28 #else
29 #define assert_param(expr) ((void)0U)
30 #endif /* USE_FULL_ASSERT */
31 
32 /** @addtogroup STM32L4xx_LL_Driver
33   * @{
34   */
35 
36 #if defined (LPTIM1) || defined (LPTIM2)
37 
38 /** @addtogroup LPTIM_LL
39   * @{
40   */
41 
42 /* Private types -------------------------------------------------------------*/
43 /* Private variables ---------------------------------------------------------*/
44 /* Private constants ---------------------------------------------------------*/
45 /* Private macros ------------------------------------------------------------*/
46 /** @addtogroup LPTIM_LL_Private_Macros
47   * @{
48   */
49 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \
50                                              || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL))
51 
52 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1)   \
53                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2)   \
54                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4)   \
55                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8)   \
56                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16)  \
57                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32)  \
58                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64)  \
59                                                 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128))
60 
61 #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \
62                                          || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE))
63 
64 #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \
65                                                 || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE))
66 /**
67   * @}
68   */
69 
70 
71 /* Private function prototypes -----------------------------------------------*/
72 /* Private functions ---------------------------------------------------------*/
73 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
74   * @{
75   */
76 /**
77   * @}
78   */
79 /* Exported functions --------------------------------------------------------*/
80 /** @addtogroup LPTIM_LL_Exported_Functions
81   * @{
82   */
83 
84 /** @addtogroup LPTIM_LL_EF_Init
85   * @{
86   */
87 
88 /**
89   * @brief  Set LPTIMx registers to their reset values.
90   * @param  LPTIMx LP Timer instance
91   * @retval An ErrorStatus enumeration value:
92   *          - SUCCESS: LPTIMx registers are de-initialized
93   *          - ERROR: invalid LPTIMx instance
94   */
LL_LPTIM_DeInit(LPTIM_TypeDef * LPTIMx)95 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx)
96 {
97   ErrorStatus result = SUCCESS;
98 
99   /* Check the parameters */
100   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
101 
102   if (LPTIMx == LPTIM1)
103   {
104     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1);
105     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1);
106   }
107 #if defined(LPTIM2)
108   else if (LPTIMx == LPTIM2)
109   {
110     LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_LPTIM2);
111     LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_LPTIM2);
112   }
113 #endif /* LPTIM2 */
114   else
115   {
116     result = ERROR;
117   }
118 
119   return result;
120 }
121 
122 /**
123   * @brief  Set each fields of the LPTIM_InitStruct structure to its default
124   *         value.
125   * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
126   * @retval None
127   */
LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef * LPTIM_InitStruct)128 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
129 {
130   /* Set the default configuration */
131   LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL;
132   LPTIM_InitStruct->Prescaler   = LL_LPTIM_PRESCALER_DIV1;
133   LPTIM_InitStruct->Waveform    = LL_LPTIM_OUTPUT_WAVEFORM_PWM;
134   LPTIM_InitStruct->Polarity    = LL_LPTIM_OUTPUT_POLARITY_REGULAR;
135 }
136 
137 /**
138   * @brief  Configure the LPTIMx peripheral according to the specified parameters.
139   * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled.
140   * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable().
141   * @param  LPTIMx LP Timer Instance
142   * @param  LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure
143   * @retval An ErrorStatus enumeration value:
144   *          - SUCCESS: LPTIMx instance has been initialized
145   *          - ERROR: LPTIMx instance hasn't been initialized
146   */
LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx,const LL_LPTIM_InitTypeDef * LPTIM_InitStruct)147 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct)
148 {
149   ErrorStatus result = SUCCESS;
150   /* Check the parameters */
151   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
152   assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource));
153   assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler));
154   assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform));
155   assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity));
156 
157   /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled
158      (ENABLE bit is reset to 0).
159   */
160   if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL)
161   {
162     result = ERROR;
163   }
164   else
165   {
166     /* Set CKSEL bitfield according to ClockSource value */
167     /* Set PRESC bitfield according to Prescaler value */
168     /* Set WAVE bitfield according to Waveform value */
169     /* Set WAVEPOL bitfield according to Polarity value */
170     MODIFY_REG(LPTIMx->CFGR,
171                (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL),
172                LPTIM_InitStruct->ClockSource | \
173                LPTIM_InitStruct->Prescaler | \
174                LPTIM_InitStruct->Waveform | \
175                LPTIM_InitStruct->Polarity);
176   }
177 
178   return result;
179 }
180 
181 /**
182   * @brief  Disable the LPTIM instance
183   * @rmtoll CR           ENABLE        LL_LPTIM_Disable
184   * @param  LPTIMx Low-Power Timer instance
185   * @note   The following sequence is required to solve LPTIM disable HW limitation.
186   *         Please check Errata Sheet ES0335 for more details under "MCU may remain
187   *         stuck in LPTIM interrupt when entering Stop mode" section.
188   * @retval None
189   */
LL_LPTIM_Disable(LPTIM_TypeDef * LPTIMx)190 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
191 {
192   LL_RCC_ClocksTypeDef rcc_clock;
193   uint32_t tmpclksource = 0;
194   uint32_t tmpIER;
195   uint32_t tmpCFGR;
196   uint32_t tmpCMP;
197   uint32_t tmpARR;
198   uint32_t primask_bit;
199   uint32_t tmpOR;
200 #if defined(LPTIM_RCR_REP)
201   uint32_t tmpRCR;
202 #endif
203 
204   /* Check the parameters */
205   assert_param(IS_LPTIM_INSTANCE(LPTIMx));
206 
207   /* Enter critical section */
208   primask_bit = __get_PRIMASK();
209   __set_PRIMASK(1) ;
210 
211   /********** Save LPTIM Config *********/
212   /* Save LPTIM source clock */
213   switch ((uint32_t)LPTIMx)
214   {
215     case LPTIM1_BASE:
216       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE);
217       break;
218 #if defined(LPTIM2)
219     case LPTIM2_BASE:
220       tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE);
221       break;
222 #endif /* LPTIM2 */
223     default:
224       break;
225   }
226 
227   /* Save LPTIM configuration registers */
228   tmpIER = LPTIMx->IER;
229   tmpCFGR = LPTIMx->CFGR;
230   tmpCMP = LPTIMx->CMP;
231   tmpARR = LPTIMx->ARR;
232   tmpOR = LPTIMx->OR;
233 #if defined(LPTIM_RCR_REP)
234   tmpRCR = LPTIMx->RCR;
235 #endif
236 
237   /************* Reset LPTIM ************/
238   (void)LL_LPTIM_DeInit(LPTIMx);
239 
240   /********* Restore LPTIM Config *******/
241   LL_RCC_GetSystemClocksFreq(&rcc_clock);
242 
243 #if defined(LPTIM_RCR_REP)
244   if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
245 #else
246   if ((tmpCMP != 0UL) || (tmpARR != 0UL))
247 #endif
248   {
249     /* Force LPTIM source kernel clock from APB */
250     switch ((uint32_t)LPTIMx)
251     {
252       case LPTIM1_BASE:
253         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1);
254         break;
255 #if defined(LPTIM2)
256       case LPTIM2_BASE:
257         LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM2_CLKSOURCE_PCLK1);
258         break;
259 #endif /* LPTIM2 */
260       default:
261         break;
262     }
263 
264     if (tmpCMP != 0UL)
265     {
266       /* Restore CMP and ARR registers (LPTIM should be enabled first) */
267       LPTIMx->CR |= LPTIM_CR_ENABLE;
268       LPTIMx->CMP = tmpCMP;
269 
270       /* Polling on CMP write ok status after above restore operation */
271       do
272       {
273         rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
274       } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
275 
276       LL_LPTIM_ClearFlag_CMPOK(LPTIMx);
277     }
278 
279     if (tmpARR != 0UL)
280     {
281       LPTIMx->CR |= LPTIM_CR_ENABLE;
282       LPTIMx->ARR = tmpARR;
283 
284       LL_RCC_GetSystemClocksFreq(&rcc_clock);
285       /* Polling on ARR write ok status after above restore operation */
286       do
287       {
288         rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
289       }
290       while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
291 
292       LL_LPTIM_ClearFlag_ARROK(LPTIMx);
293     }
294 
295 #if defined(LPTIM_RCR_REP)
296     if (tmpRCR != 0UL)
297     {
298       LPTIMx->CR |= LPTIM_CR_ENABLE;
299       LPTIMx->RCR = tmpRCR;
300 
301       LL_RCC_GetSystemClocksFreq(&rcc_clock);
302       /* Polling on RCR write ok status after above restore operation */
303       do
304       {
305         rcc_clock.SYSCLK_Frequency--; /* Used for timeout */
306       } while (((LL_LPTIM_IsActiveFlag_REPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL));
307 
308       LL_LPTIM_ClearFlag_REPOK(LPTIMx);
309     }
310 #endif
311 
312     /* Restore LPTIM source kernel clock */
313     LL_RCC_SetLPTIMClockSource(tmpclksource);
314   }
315 
316   /* Restore configuration registers (LPTIM should be disabled first) */
317   LPTIMx->CR &= ~(LPTIM_CR_ENABLE);
318   LPTIMx->IER = tmpIER;
319   LPTIMx->CFGR = tmpCFGR;
320   LPTIMx->OR = tmpOR;
321 
322   /* Exit critical section: restore previous priority mask */
323   __set_PRIMASK(primask_bit);
324 }
325 
326 /**
327   * @}
328   */
329 
330 /**
331   * @}
332   */
333 
334 /**
335   * @}
336   */
337 
338 #endif /* LPTIM1 || LPTIM2 */
339 
340 /**
341   * @}
342   */
343 
344 #endif /* USE_FULL_LL_DRIVER */
345