1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Converter (ADC)
7 * peripheral:
8 * + Peripheral Control functions
9 * Other functions (generic functions) are available in file
10 * "stm32l4xx_hal_adc.c".
11 *
12 ******************************************************************************
13 * @attention
14 *
15 * Copyright (c) 2017 STMicroelectronics.
16 * All rights reserved.
17 *
18 * This software is licensed under terms that can be found in the LICENSE file
19 * in the root directory of this software component.
20 * If no LICENSE file comes with this software, it is provided AS-IS.
21 *
22 ******************************************************************************
23 @verbatim
24 [..]
25 (@) Sections "ADC peripheral features" and "How to use this driver" are
26 available in file of generic functions "stm32l4xx_hal_adc.c".
27 [..]
28 @endverbatim
29 ******************************************************************************
30 */
31
32 /* Includes ------------------------------------------------------------------*/
33 #include "stm32l4xx_hal.h"
34
35 /** @addtogroup STM32L4xx_HAL_Driver
36 * @{
37 */
38
39 /** @defgroup ADCEx ADCEx
40 * @brief ADC Extended HAL module driver
41 * @{
42 */
43
44 #ifdef HAL_ADC_MODULE_ENABLED
45
46 /* Private typedef -----------------------------------------------------------*/
47 /* Private define ------------------------------------------------------------*/
48
49 /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
50 * @{
51 */
52
53 #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
54 ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
55 ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime once the ADC is enabled */
56
57 /* Fixed timeout value for ADC calibration. */
58 /* Values defined to be higher than worst cases: maximum ratio between ADC */
59 /* and CPU clock frequencies. */
60 /* Example of profile low frequency : ADC frequency at 31.25kHz (ADC clock */
61 /* source PLL SAI 8MHz, ADC clock prescaler 256), CPU frequency 80MHz. */
62 /* Calibration time max = 116 / fADC (refer to datasheet) */
63 /* = 296 960 CPU cycles */
64 #define ADC_CALIBRATION_TIMEOUT (296960UL) /*!< ADC calibration time-out value (unit: CPU cycles) */
65
66 /**
67 * @}
68 */
69
70 /* Private macro -------------------------------------------------------------*/
71 /* Private variables ---------------------------------------------------------*/
72 /* Private function prototypes -----------------------------------------------*/
73 /* Exported functions --------------------------------------------------------*/
74
75 /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
76 * @{
77 */
78
79 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
80 * @brief Extended IO operation functions
81 *
82 @verbatim
83 ===============================================================================
84 ##### IO operation functions #####
85 ===============================================================================
86 [..] This section provides functions allowing to:
87
88 (+) Perform the ADC self-calibration for single or differential ending.
89 (+) Get calibration factors for single or differential ending.
90 (+) Set calibration factors for single or differential ending.
91
92 (+) Start conversion of ADC group injected.
93 (+) Stop conversion of ADC group injected.
94 (+) Poll for conversion complete on ADC group injected.
95 (+) Get result of ADC group injected channel conversion.
96 (+) Start conversion of ADC group injected and enable interruptions.
97 (+) Stop conversion of ADC group injected and disable interruptions.
98
99 (+) When multimode feature is available, start multimode and enable DMA transfer.
100 (+) Stop multimode and disable ADC DMA transfer.
101 (+) Get result of multimode conversion.
102
103 @endverbatim
104 * @{
105 */
106
107 /**
108 * @brief Perform an ADC automatic self-calibration
109 * Calibration prerequisite: ADC must be disabled (execute this
110 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
111 * @param hadc ADC handle
112 * @param SingleDiff Selection of single-ended or differential input
113 * This parameter can be one of the following values:
114 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
115 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
116 * @retval HAL status
117 */
HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)118 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
119 {
120 HAL_StatusTypeDef tmp_hal_status;
121 __IO uint32_t wait_loop_index = 0UL;
122
123 /* Check the parameters */
124 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
125 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
126
127 /* Process locked */
128 __HAL_LOCK(hadc);
129
130 /* Calibration prerequisite: ADC must be disabled. */
131
132 /* Disable the ADC (if not already disabled) */
133 tmp_hal_status = ADC_Disable(hadc);
134
135 /* Check if ADC is effectively disabled */
136 if (tmp_hal_status == HAL_OK)
137 {
138 /* Set ADC state */
139 ADC_STATE_CLR_SET(hadc->State,
140 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
141 HAL_ADC_STATE_BUSY_INTERNAL);
142
143 /* Start ADC calibration in mode single-ended or differential */
144 LL_ADC_StartCalibration(hadc->Instance, SingleDiff);
145
146 /* Wait for calibration completion */
147 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
148 {
149 wait_loop_index++;
150 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
151 {
152 /* Update ADC state machine to error */
153 ADC_STATE_CLR_SET(hadc->State,
154 HAL_ADC_STATE_BUSY_INTERNAL,
155 HAL_ADC_STATE_ERROR_INTERNAL);
156
157 /* Process unlocked */
158 __HAL_UNLOCK(hadc);
159
160 return HAL_ERROR;
161 }
162 }
163
164 /* Set ADC state */
165 ADC_STATE_CLR_SET(hadc->State,
166 HAL_ADC_STATE_BUSY_INTERNAL,
167 HAL_ADC_STATE_READY);
168 }
169 else
170 {
171 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
172
173 /* Note: No need to update variable "tmp_hal_status" here: already set */
174 /* to state "HAL_ERROR" by function disabling the ADC. */
175 }
176
177 /* Process unlocked */
178 __HAL_UNLOCK(hadc);
179
180 /* Return function status */
181 return tmp_hal_status;
182 }
183
184 /**
185 * @brief Get the calibration factor.
186 * @param hadc ADC handle.
187 * @param SingleDiff This parameter can be only:
188 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
189 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
190 * @retval Calibration value.
191 */
HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)192 uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
193 {
194 /* Check the parameters */
195 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
196 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
197
198 /* Return the selected ADC calibration value */
199 return LL_ADC_GetCalibrationFactor(hadc->Instance, SingleDiff);
200 }
201
202 /**
203 * @brief Set the calibration factor to overwrite automatic conversion result.
204 * ADC must be enabled and no conversion is ongoing.
205 * @param hadc ADC handle
206 * @param SingleDiff This parameter can be only:
207 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
208 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
209 * @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
210 * @retval HAL state
211 */
HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff,uint32_t CalibrationFactor)212 HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff,
213 uint32_t CalibrationFactor)
214 {
215 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
216 uint32_t tmp_adc_is_conversion_on_going_regular;
217 uint32_t tmp_adc_is_conversion_on_going_injected;
218
219 /* Check the parameters */
220 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
221 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
222 assert_param(IS_ADC_CALFACT(CalibrationFactor));
223
224 /* Process locked */
225 __HAL_LOCK(hadc);
226
227 /* Verification of hardware constraints before modifying the calibration */
228 /* factors register: ADC must be enabled, no conversion on going. */
229 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
230 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
231
232 if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL)
233 && (tmp_adc_is_conversion_on_going_regular == 0UL)
234 && (tmp_adc_is_conversion_on_going_injected == 0UL)
235 )
236 {
237 /* Set the selected ADC calibration value */
238 LL_ADC_SetCalibrationFactor(hadc->Instance, SingleDiff, CalibrationFactor);
239 }
240 else
241 {
242 /* Update ADC state machine */
243 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
244 /* Update ADC error code */
245 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
246
247 /* Update ADC state machine to error */
248 tmp_hal_status = HAL_ERROR;
249 }
250
251 /* Process unlocked */
252 __HAL_UNLOCK(hadc);
253
254 /* Return function status */
255 return tmp_hal_status;
256 }
257
258 /**
259 * @brief Enable ADC, start conversion of injected group.
260 * @note Interruptions enabled in this function: None.
261 * @note Case of multimode enabled when multimode feature is available:
262 * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
263 * then for ADC master.
264 * For ADC slave, ADC is enabled only (conversion is not started).
265 * For ADC master, ADC is enabled and multimode conversion is started.
266 * @param hadc ADC handle.
267 * @retval HAL status
268 */
HAL_ADCEx_InjectedStart(ADC_HandleTypeDef * hadc)269 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc)
270 {
271 HAL_StatusTypeDef tmp_hal_status;
272 uint32_t tmp_config_injected_queue;
273 #if defined(ADC_MULTIMODE_SUPPORT)
274 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
275 #endif
276
277 /* Check the parameters */
278 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
279
280 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
281 {
282 return HAL_BUSY;
283 }
284 else
285 {
286 /* In case of software trigger detection enabled, JQDIS must be set
287 (which can be done only if ADSTART and JADSTART are both cleared).
288 If JQDIS is not set at that point, returns an error
289 - since software trigger detection is disabled. User needs to
290 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
291 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
292 the queue is empty */
293 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
294
295 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
296 && (tmp_config_injected_queue == 0UL)
297 )
298 {
299 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
300 return HAL_ERROR;
301 }
302
303 /* Process locked */
304 __HAL_LOCK(hadc);
305
306 /* Enable the ADC peripheral */
307 tmp_hal_status = ADC_Enable(hadc);
308
309 /* Start conversion if ADC is effectively enabled */
310 if (tmp_hal_status == HAL_OK)
311 {
312 /* Check if a regular conversion is ongoing */
313 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
314 {
315 /* Reset ADC error code field related to injected conversions only */
316 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
317 }
318 else
319 {
320 /* Set ADC error code to none */
321 ADC_CLEAR_ERRORCODE(hadc);
322 }
323
324 /* Set ADC state */
325 /* - Clear state bitfield related to injected group conversion results */
326 /* - Set state bitfield related to injected operation */
327 ADC_STATE_CLR_SET(hadc->State,
328 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
329 HAL_ADC_STATE_INJ_BUSY);
330
331 #if defined(ADC_MULTIMODE_SUPPORT)
332 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
333 - if ADC instance is master or if multimode feature is not available
334 - if multimode setting is disabled (ADC instance slave in independent mode) */
335 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
336 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
337 )
338 {
339 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
340 }
341 #endif
342
343 /* Clear ADC group injected group conversion flag */
344 /* (To ensure of no unknown state from potential previous ADC operations) */
345 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
346
347 /* Process unlocked */
348 /* Unlock before starting ADC conversions: in case of potential */
349 /* interruption, to let the process to ADC IRQ Handler. */
350 __HAL_UNLOCK(hadc);
351
352 /* Enable conversion of injected group, if automatic injected conversion */
353 /* is disabled. */
354 /* If software start has been selected, conversion starts immediately. */
355 /* If external trigger has been selected, conversion will start at next */
356 /* trigger event. */
357 /* Case of multimode enabled (when multimode feature is available): */
358 /* if ADC is slave, */
359 /* - ADC is enabled only (conversion is not started), */
360 /* - if multimode only concerns regular conversion, ADC is enabled */
361 /* and conversion is started. */
362 /* If ADC is master or independent, */
363 /* - ADC is enabled and conversion is started. */
364 #if defined(ADC_MULTIMODE_SUPPORT)
365 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
366 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
367 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
368 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
369 )
370 {
371 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
372 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
373 {
374 LL_ADC_INJ_StartConversion(hadc->Instance);
375 }
376 }
377 else
378 {
379 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
380 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
381 }
382 #else
383 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
384 {
385 /* Start ADC group injected conversion */
386 LL_ADC_INJ_StartConversion(hadc->Instance);
387 }
388 #endif
389
390 }
391 else
392 {
393 /* Process unlocked */
394 __HAL_UNLOCK(hadc);
395 }
396
397 /* Return function status */
398 return tmp_hal_status;
399 }
400 }
401
402 /**
403 * @brief Stop conversion of injected channels. Disable ADC peripheral if
404 * no regular conversion is on going.
405 * @note If ADC must be disabled and if conversion is on going on
406 * regular group, function HAL_ADC_Stop must be used to stop both
407 * injected and regular groups, and disable the ADC.
408 * @note If injected group mode auto-injection is enabled,
409 * function HAL_ADC_Stop must be used.
410 * @note In case of multimode enabled (when multimode feature is available),
411 * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
412 * For ADC master, conversion is stopped and ADC is disabled.
413 * For ADC slave, ADC is disabled only (conversion stop of ADC master
414 * has already stopped conversion of ADC slave).
415 * @param hadc ADC handle.
416 * @retval HAL status
417 */
HAL_ADCEx_InjectedStop(ADC_HandleTypeDef * hadc)418 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc)
419 {
420 HAL_StatusTypeDef tmp_hal_status;
421
422 /* Check the parameters */
423 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
424
425 /* Process locked */
426 __HAL_LOCK(hadc);
427
428 /* 1. Stop potential conversion on going on injected group only. */
429 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
430
431 /* Disable ADC peripheral if injected conversions are effectively stopped */
432 /* and if no conversion on regular group is on-going */
433 if (tmp_hal_status == HAL_OK)
434 {
435 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
436 {
437 /* 2. Disable the ADC peripheral */
438 tmp_hal_status = ADC_Disable(hadc);
439
440 /* Check if ADC is effectively disabled */
441 if (tmp_hal_status == HAL_OK)
442 {
443 /* Set ADC state */
444 ADC_STATE_CLR_SET(hadc->State,
445 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
446 HAL_ADC_STATE_READY);
447 }
448 }
449 /* Conversion on injected group is stopped, but ADC not disabled since */
450 /* conversion on regular group is still running. */
451 else
452 {
453 /* Set ADC state */
454 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
455 }
456 }
457
458 /* Process unlocked */
459 __HAL_UNLOCK(hadc);
460
461 /* Return function status */
462 return tmp_hal_status;
463 }
464
465 /**
466 * @brief Wait for injected group conversion to be completed.
467 * @param hadc ADC handle
468 * @param Timeout Timeout value in millisecond.
469 * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
470 * checked and cleared depending on AUTDLY bit status.
471 * @retval HAL status
472 */
HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)473 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
474 {
475 uint32_t tickstart;
476 uint32_t tmp_Flag_End;
477 uint32_t tmp_adc_inj_is_trigger_source_sw_start;
478 uint32_t tmp_adc_reg_is_trigger_source_sw_start;
479 uint32_t tmp_cfgr;
480 #if defined(ADC_MULTIMODE_SUPPORT)
481 const ADC_TypeDef *tmpADC_Master;
482 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
483 #endif
484
485 /* Check the parameters */
486 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
487
488 /* If end of sequence selected */
489 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
490 {
491 tmp_Flag_End = ADC_FLAG_JEOS;
492 }
493 else /* end of conversion selected */
494 {
495 tmp_Flag_End = ADC_FLAG_JEOC;
496 }
497
498 /* Get timeout */
499 tickstart = HAL_GetTick();
500
501 /* Wait until End of Conversion or Sequence flag is raised */
502 while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL)
503 {
504 /* Check if timeout is disabled (set to infinite wait) */
505 if (Timeout != HAL_MAX_DELAY)
506 {
507 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
508 {
509 /* New check to avoid false timeout detection in case of preemption */
510 if ((hadc->Instance->ISR & tmp_Flag_End) == 0UL)
511 {
512 /* Update ADC state machine to timeout */
513 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
514
515 /* Process unlocked */
516 __HAL_UNLOCK(hadc);
517
518 return HAL_TIMEOUT;
519 }
520 }
521 }
522 }
523
524 /* Retrieve ADC configuration */
525 tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance);
526 tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance);
527 /* Get relevant register CFGR in ADC instance of ADC master or slave */
528 /* in function of multimode state (for devices with multimode */
529 /* available). */
530 #if defined(ADC_MULTIMODE_SUPPORT)
531 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
532 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
533 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
534 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
535 )
536 {
537 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
538 }
539 else
540 {
541 tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance);
542 tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
543 }
544 #else
545 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
546 #endif
547
548 /* Update ADC state machine */
549 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
550
551 /* Determine whether any further conversion upcoming on group injected */
552 /* by external trigger or by automatic injected conversion */
553 /* from group regular. */
554 if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) ||
555 ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) &&
556 ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) &&
557 (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL))))
558 {
559 /* Check whether end of sequence is reached */
560 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
561 {
562 /* Particular case if injected contexts queue is enabled: */
563 /* when the last context has been fully processed, JSQR is reset */
564 /* by the hardware. Even if no injected conversion is planned to come */
565 /* (queue empty, triggers are ignored), it can start again */
566 /* immediately after setting a new context (JADSTART is still set). */
567 /* Therefore, state of HAL ADC injected group is kept to busy. */
568 if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL)
569 {
570 /* Set ADC state */
571 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
572
573 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL)
574 {
575 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
576 }
577 }
578 }
579 }
580
581 /* Clear polled flag */
582 if (tmp_Flag_End == ADC_FLAG_JEOS)
583 {
584 /* Clear end of sequence JEOS flag of injected group if low power feature */
585 /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
586 /* For injected groups, no new conversion will start before JEOS is */
587 /* cleared. */
588 if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL)
589 {
590 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
591 }
592 }
593 else
594 {
595 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
596 }
597
598 /* Return API HAL status */
599 return HAL_OK;
600 }
601
602 /**
603 * @brief Enable ADC, start conversion of injected group with interruption.
604 * @note Interruptions enabled in this function according to initialization
605 * setting : JEOC (end of conversion) or JEOS (end of sequence)
606 * @note Case of multimode enabled (when multimode feature is enabled):
607 * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
608 * then for ADC master.
609 * For ADC slave, ADC is enabled only (conversion is not started).
610 * For ADC master, ADC is enabled and multimode conversion is started.
611 * @param hadc ADC handle.
612 * @retval HAL status.
613 */
HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef * hadc)614 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc)
615 {
616 HAL_StatusTypeDef tmp_hal_status;
617 uint32_t tmp_config_injected_queue;
618 #if defined(ADC_MULTIMODE_SUPPORT)
619 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
620 #endif
621
622 /* Check the parameters */
623 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
624
625 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
626 {
627 return HAL_BUSY;
628 }
629 else
630 {
631 /* In case of software trigger detection enabled, JQDIS must be set
632 (which can be done only if ADSTART and JADSTART are both cleared).
633 If JQDIS is not set at that point, returns an error
634 - since software trigger detection is disabled. User needs to
635 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
636 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
637 the queue is empty */
638 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
639
640 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
641 && (tmp_config_injected_queue == 0UL)
642 )
643 {
644 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
645 return HAL_ERROR;
646 }
647
648 /* Process locked */
649 __HAL_LOCK(hadc);
650
651 /* Enable the ADC peripheral */
652 tmp_hal_status = ADC_Enable(hadc);
653
654 /* Start conversion if ADC is effectively enabled */
655 if (tmp_hal_status == HAL_OK)
656 {
657 /* Check if a regular conversion is ongoing */
658 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
659 {
660 /* Reset ADC error code field related to injected conversions only */
661 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
662 }
663 else
664 {
665 /* Set ADC error code to none */
666 ADC_CLEAR_ERRORCODE(hadc);
667 }
668
669 /* Set ADC state */
670 /* - Clear state bitfield related to injected group conversion results */
671 /* - Set state bitfield related to injected operation */
672 ADC_STATE_CLR_SET(hadc->State,
673 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
674 HAL_ADC_STATE_INJ_BUSY);
675
676 #if defined(ADC_MULTIMODE_SUPPORT)
677 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
678 - if ADC instance is master or if multimode feature is not available
679 - if multimode setting is disabled (ADC instance slave in independent mode) */
680 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
681 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
682 )
683 {
684 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
685 }
686 #endif
687
688 /* Clear ADC group injected group conversion flag */
689 /* (To ensure of no unknown state from potential previous ADC operations) */
690 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
691
692 /* Process unlocked */
693 /* Unlock before starting ADC conversions: in case of potential */
694 /* interruption, to let the process to ADC IRQ Handler. */
695 __HAL_UNLOCK(hadc);
696
697 /* Enable ADC Injected context queue overflow interrupt if this feature */
698 /* is enabled. */
699 if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL)
700 {
701 __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
702 }
703
704 /* Enable ADC end of conversion interrupt */
705 switch (hadc->Init.EOCSelection)
706 {
707 case ADC_EOC_SEQ_CONV:
708 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
709 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
710 break;
711 /* case ADC_EOC_SINGLE_CONV */
712 default:
713 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
714 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
715 break;
716 }
717
718 /* Enable conversion of injected group, if automatic injected conversion */
719 /* is disabled. */
720 /* If software start has been selected, conversion starts immediately. */
721 /* If external trigger has been selected, conversion will start at next */
722 /* trigger event. */
723 /* Case of multimode enabled (when multimode feature is available): */
724 /* if ADC is slave, */
725 /* - ADC is enabled only (conversion is not started), */
726 /* - if multimode only concerns regular conversion, ADC is enabled */
727 /* and conversion is started. */
728 /* If ADC is master or independent, */
729 /* - ADC is enabled and conversion is started. */
730 #if defined(ADC_MULTIMODE_SUPPORT)
731 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
732 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
733 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
734 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
735 )
736 {
737 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
738 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
739 {
740 LL_ADC_INJ_StartConversion(hadc->Instance);
741 }
742 }
743 else
744 {
745 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
746 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
747 }
748 #else
749 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
750 {
751 /* Start ADC group injected conversion */
752 LL_ADC_INJ_StartConversion(hadc->Instance);
753 }
754 #endif
755
756 }
757 else
758 {
759 /* Process unlocked */
760 __HAL_UNLOCK(hadc);
761 }
762
763 /* Return function status */
764 return tmp_hal_status;
765 }
766 }
767
768 /**
769 * @brief Stop conversion of injected channels, disable interruption of
770 * end-of-conversion. Disable ADC peripheral if no regular conversion
771 * is on going.
772 * @note If ADC must be disabled and if conversion is on going on
773 * regular group, function HAL_ADC_Stop must be used to stop both
774 * injected and regular groups, and disable the ADC.
775 * @note If injected group mode auto-injection is enabled,
776 * function HAL_ADC_Stop must be used.
777 * @note Case of multimode enabled (when multimode feature is available):
778 * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
779 * then for ADC slave.
780 * For ADC master, conversion is stopped and ADC is disabled.
781 * For ADC slave, ADC is disabled only (conversion stop of ADC master
782 * has already stopped conversion of ADC slave).
783 * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
784 * @param hadc ADC handle
785 * @retval HAL status
786 */
HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef * hadc)787 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
788 {
789 HAL_StatusTypeDef tmp_hal_status;
790
791 /* Check the parameters */
792 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
793
794 /* Process locked */
795 __HAL_LOCK(hadc);
796
797 /* 1. Stop potential conversion on going on injected group only. */
798 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
799
800 /* Disable ADC peripheral if injected conversions are effectively stopped */
801 /* and if no conversion on the other group (regular group) is intended to */
802 /* continue. */
803 if (tmp_hal_status == HAL_OK)
804 {
805 /* Disable ADC end of conversion interrupt for injected channels */
806 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF));
807
808 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
809 {
810 /* 2. Disable the ADC peripheral */
811 tmp_hal_status = ADC_Disable(hadc);
812
813 /* Check if ADC is effectively disabled */
814 if (tmp_hal_status == HAL_OK)
815 {
816 /* Set ADC state */
817 ADC_STATE_CLR_SET(hadc->State,
818 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
819 HAL_ADC_STATE_READY);
820 }
821 }
822 /* Conversion on injected group is stopped, but ADC not disabled since */
823 /* conversion on regular group is still running. */
824 else
825 {
826 /* Set ADC state */
827 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
828 }
829 }
830
831 /* Process unlocked */
832 __HAL_UNLOCK(hadc);
833
834 /* Return function status */
835 return tmp_hal_status;
836 }
837
838 #if defined(ADC_MULTIMODE_SUPPORT)
839 /**
840 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
841 * @note Multimode must have been previously configured using
842 * HAL_ADCEx_MultiModeConfigChannel() function.
843 * Interruptions enabled in this function:
844 * overrun, DMA half transfer, DMA transfer complete.
845 * Each of these interruptions has its dedicated callback function.
846 * @note State field of Slave ADC handle is not updated in this configuration:
847 * user should not rely on it for information related to Slave regular
848 * conversions.
849 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
850 * @param pData Destination Buffer address.
851 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
852 * @retval HAL status
853 */
HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef * hadc,uint32_t * pData,uint32_t Length)854 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
855 {
856 HAL_StatusTypeDef tmp_hal_status;
857 ADC_HandleTypeDef tmphadcSlave;
858 ADC_Common_TypeDef *tmpADC_Common;
859
860 /* Check the parameters */
861 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
862 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
863 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
864 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
865
866 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
867 {
868 return HAL_BUSY;
869 }
870 else
871 {
872 /* Process locked */
873 __HAL_LOCK(hadc);
874
875 /* Temporary handle minimum initialization */
876 __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave);
877 ADC_CLEAR_ERRORCODE(&tmphadcSlave);
878
879 /* Set a temporary handle of the ADC slave associated to the ADC master */
880 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
881
882 if (tmphadcSlave.Instance == NULL)
883 {
884 /* Set ADC state */
885 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
886
887 /* Process unlocked */
888 __HAL_UNLOCK(hadc);
889
890 return HAL_ERROR;
891 }
892
893 /* Enable the ADC peripherals: master and slave (in case if not already */
894 /* enabled previously) */
895 tmp_hal_status = ADC_Enable(hadc);
896 if (tmp_hal_status == HAL_OK)
897 {
898 tmp_hal_status = ADC_Enable(&tmphadcSlave);
899 }
900
901 /* Start multimode conversion of ADCs pair */
902 if (tmp_hal_status == HAL_OK)
903 {
904 /* Set ADC state */
905 ADC_STATE_CLR_SET(hadc->State,
906 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP),
907 HAL_ADC_STATE_REG_BUSY);
908
909 /* Set ADC error code to none */
910 ADC_CLEAR_ERRORCODE(hadc);
911
912 /* Set the DMA transfer complete callback */
913 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
914
915 /* Set the DMA half transfer complete callback */
916 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
917
918 /* Set the DMA error callback */
919 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
920
921 /* Pointer to the common control register */
922 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
923
924 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
925 /* start (in case of SW start): */
926
927 /* Clear regular group conversion flag and overrun flag */
928 /* (To ensure of no unknown state from potential previous ADC operations) */
929 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
930
931 /* Process unlocked */
932 /* Unlock before starting ADC conversions: in case of potential */
933 /* interruption, to let the process to ADC IRQ Handler. */
934 __HAL_UNLOCK(hadc);
935
936 /* Enable ADC overrun interrupt */
937 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
938
939 /* Start the DMA channel */
940 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
941
942 /* Enable conversion of regular group. */
943 /* If software start has been selected, conversion starts immediately. */
944 /* If external trigger has been selected, conversion will start at next */
945 /* trigger event. */
946 /* Start ADC group regular conversion */
947 LL_ADC_REG_StartConversion(hadc->Instance);
948 }
949 else
950 {
951 /* Process unlocked */
952 __HAL_UNLOCK(hadc);
953 }
954
955 /* Return function status */
956 return tmp_hal_status;
957 }
958 }
959
960 /**
961 * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
962 * @note Multimode is kept enabled after this function. MultiMode DMA bits
963 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
964 * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
965 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
966 * resort to HAL_ADCEx_DisableMultiMode() API.
967 * @note In case of DMA configured in circular mode, function
968 * HAL_ADC_Stop_DMA() must be called after this function with handle of
969 * ADC slave, to properly disable the DMA channel.
970 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
971 * @retval HAL status
972 */
HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef * hadc)973 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc)
974 {
975 HAL_StatusTypeDef tmp_hal_status;
976 uint32_t tickstart;
977 ADC_HandleTypeDef tmphadcSlave;
978 uint32_t tmphadcSlave_conversion_on_going;
979 HAL_StatusTypeDef tmphadcSlave_disable_status;
980
981 /* Check the parameters */
982 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
983
984 /* Process locked */
985 __HAL_LOCK(hadc);
986
987
988 /* 1. Stop potential multimode conversion on going, on regular and injected groups */
989 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
990
991 /* Disable ADC peripheral if conversions are effectively stopped */
992 if (tmp_hal_status == HAL_OK)
993 {
994 /* Temporary handle minimum initialization */
995 __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave);
996 ADC_CLEAR_ERRORCODE(&tmphadcSlave);
997
998 /* Set a temporary handle of the ADC slave associated to the ADC master */
999 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1000
1001 if (tmphadcSlave.Instance == NULL)
1002 {
1003 /* Update ADC state machine to error */
1004 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1005
1006 /* Process unlocked */
1007 __HAL_UNLOCK(hadc);
1008
1009 return HAL_ERROR;
1010 }
1011
1012 /* Procedure to disable the ADC peripheral: wait for conversions */
1013 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1014
1015 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1016 tickstart = HAL_GetTick();
1017
1018 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1019 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1020 || (tmphadcSlave_conversion_on_going == 1UL)
1021 )
1022 {
1023 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1024 {
1025 /* New check to avoid false timeout detection in case of preemption */
1026 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1027 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1028 || (tmphadcSlave_conversion_on_going == 1UL)
1029 )
1030 {
1031 /* Update ADC state machine to error */
1032 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1033
1034 /* Process unlocked */
1035 __HAL_UNLOCK(hadc);
1036
1037 return HAL_ERROR;
1038 }
1039 }
1040
1041 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1042 }
1043
1044 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1045 /* while DMA transfer is on going) */
1046 /* Note: DMA channel of ADC slave should be stopped after this function */
1047 /* with HAL_ADC_Stop_DMA() API. */
1048 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1049
1050 /* Check if DMA channel effectively disabled */
1051 if (tmp_hal_status == HAL_ERROR)
1052 {
1053 /* Update ADC state machine to error */
1054 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1055 }
1056
1057 /* Disable ADC overrun interrupt */
1058 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1059
1060 /* 2. Disable the ADC peripherals: master and slave */
1061 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1062 /* memory a potential failing status. */
1063 if (tmp_hal_status == HAL_OK)
1064 {
1065 tmphadcSlave_disable_status = ADC_Disable(&tmphadcSlave);
1066 if ((ADC_Disable(hadc) == HAL_OK) &&
1067 (tmphadcSlave_disable_status == HAL_OK))
1068 {
1069 tmp_hal_status = HAL_OK;
1070 }
1071 }
1072 else
1073 {
1074 /* In case of error, attempt to disable ADC master and slave without status assert */
1075 (void) ADC_Disable(hadc);
1076 (void) ADC_Disable(&tmphadcSlave);
1077 }
1078
1079 /* Set ADC state (ADC master) */
1080 ADC_STATE_CLR_SET(hadc->State,
1081 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1082 HAL_ADC_STATE_READY);
1083 }
1084
1085 /* Process unlocked */
1086 __HAL_UNLOCK(hadc);
1087
1088 /* Return function status */
1089 return tmp_hal_status;
1090 }
1091
1092 /**
1093 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
1094 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1095 * @retval The converted data values.
1096 */
HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef * hadc)1097 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc)
1098 {
1099 const ADC_Common_TypeDef *tmpADC_Common;
1100
1101 /* Check the parameters */
1102 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1103
1104 /* Prevent unused argument(s) compilation warning if no assert_param check */
1105 /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1106 UNUSED(hadc);
1107
1108 /* Pointer to the common control register */
1109 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1110
1111 /* Return the multi mode conversion value */
1112 return tmpADC_Common->CDR;
1113 }
1114 #endif /* ADC_MULTIMODE_SUPPORT */
1115
1116 /**
1117 * @brief Get ADC injected group conversion result.
1118 * @note Reading register JDRx automatically clears ADC flag JEOC
1119 * (ADC group injected end of unitary conversion).
1120 * @note This function does not clear ADC flag JEOS
1121 * (ADC group injected end of sequence conversion)
1122 * Occurrence of flag JEOS rising:
1123 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
1124 * to flag JEOC.
1125 * - If sequencer is composed of several ranks, during the scan
1126 * sequence flag JEOC only is raised, at the end of the scan sequence
1127 * both flags JEOC and EOS are raised.
1128 * Flag JEOS must not be cleared by this function because
1129 * it would not be compliant with low power features
1130 * (feature low power auto-wait, not available on all STM32 families).
1131 * To clear this flag, either use function:
1132 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1133 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
1134 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
1135 * @param hadc ADC handle
1136 * @param InjectedRank the converted ADC injected rank.
1137 * This parameter can be one of the following values:
1138 * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
1139 * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
1140 * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
1141 * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
1142 * @retval ADC group injected conversion data
1143 */
HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef * hadc,uint32_t InjectedRank)1144 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank)
1145 {
1146 uint32_t tmp_jdr;
1147
1148 /* Check the parameters */
1149 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1150 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
1151
1152 /* Get ADC converted value */
1153 switch (InjectedRank)
1154 {
1155 case ADC_INJECTED_RANK_4:
1156 tmp_jdr = hadc->Instance->JDR4;
1157 break;
1158 case ADC_INJECTED_RANK_3:
1159 tmp_jdr = hadc->Instance->JDR3;
1160 break;
1161 case ADC_INJECTED_RANK_2:
1162 tmp_jdr = hadc->Instance->JDR2;
1163 break;
1164 case ADC_INJECTED_RANK_1:
1165 default:
1166 tmp_jdr = hadc->Instance->JDR1;
1167 break;
1168 }
1169
1170 /* Return ADC converted value */
1171 return tmp_jdr;
1172 }
1173
1174 /**
1175 * @brief Injected conversion complete callback in non-blocking mode.
1176 * @param hadc ADC handle
1177 * @retval None
1178 */
HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef * hadc)1179 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc)
1180 {
1181 /* Prevent unused argument(s) compilation warning */
1182 UNUSED(hadc);
1183
1184 /* NOTE : This function should not be modified. When the callback is needed,
1185 function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
1186 */
1187 }
1188
1189 /**
1190 * @brief Injected context queue overflow callback.
1191 * @note This callback is called if injected context queue is enabled
1192 (parameter "QueueInjectedContext" in injected channel configuration)
1193 and if a new injected context is set when queue is full (maximum 2
1194 contexts).
1195 * @param hadc ADC handle
1196 * @retval None
1197 */
HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef * hadc)1198 __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc)
1199 {
1200 /* Prevent unused argument(s) compilation warning */
1201 UNUSED(hadc);
1202
1203 /* NOTE : This function should not be modified. When the callback is needed,
1204 function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
1205 */
1206 }
1207
1208 /**
1209 * @brief Analog watchdog 2 callback in non-blocking mode.
1210 * @param hadc ADC handle
1211 * @retval None
1212 */
HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef * hadc)1213 __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc)
1214 {
1215 /* Prevent unused argument(s) compilation warning */
1216 UNUSED(hadc);
1217
1218 /* NOTE : This function should not be modified. When the callback is needed,
1219 function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
1220 */
1221 }
1222
1223 /**
1224 * @brief Analog watchdog 3 callback in non-blocking mode.
1225 * @param hadc ADC handle
1226 * @retval None
1227 */
HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef * hadc)1228 __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc)
1229 {
1230 /* Prevent unused argument(s) compilation warning */
1231 UNUSED(hadc);
1232
1233 /* NOTE : This function should not be modified. When the callback is needed,
1234 function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
1235 */
1236 }
1237
1238
1239 /**
1240 * @brief End Of Sampling callback in non-blocking mode.
1241 * @param hadc ADC handle
1242 * @retval None
1243 */
HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef * hadc)1244 __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc)
1245 {
1246 /* Prevent unused argument(s) compilation warning */
1247 UNUSED(hadc);
1248
1249 /* NOTE : This function should not be modified. When the callback is needed,
1250 function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
1251 */
1252 }
1253
1254 /**
1255 * @brief Stop ADC conversion of regular group (and injected channels in
1256 * case of auto_injection mode), disable ADC peripheral if no
1257 * conversion is on going on injected group.
1258 * @param hadc ADC handle
1259 * @retval HAL status.
1260 */
HAL_ADCEx_RegularStop(ADC_HandleTypeDef * hadc)1261 HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc)
1262 {
1263 HAL_StatusTypeDef tmp_hal_status;
1264
1265 /* Check the parameters */
1266 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1267
1268 /* Process locked */
1269 __HAL_LOCK(hadc);
1270
1271 /* 1. Stop potential regular conversion on going */
1272 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1273
1274 /* Disable ADC peripheral if regular conversions are effectively stopped
1275 and if no injected conversions are on-going */
1276 if (tmp_hal_status == HAL_OK)
1277 {
1278 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1279 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1280
1281 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1282 {
1283 /* 2. Disable the ADC peripheral */
1284 tmp_hal_status = ADC_Disable(hadc);
1285
1286 /* Check if ADC is effectively disabled */
1287 if (tmp_hal_status == HAL_OK)
1288 {
1289 /* Set ADC state */
1290 ADC_STATE_CLR_SET(hadc->State,
1291 HAL_ADC_STATE_INJ_BUSY,
1292 HAL_ADC_STATE_READY);
1293 }
1294 }
1295 /* Conversion on injected group is stopped, but ADC not disabled since */
1296 /* conversion on regular group is still running. */
1297 else
1298 {
1299 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1300 }
1301 }
1302
1303 /* Process unlocked */
1304 __HAL_UNLOCK(hadc);
1305
1306 /* Return function status */
1307 return tmp_hal_status;
1308 }
1309
1310
1311 /**
1312 * @brief Stop ADC conversion of ADC groups regular and injected,
1313 * disable interrution of end-of-conversion,
1314 * disable ADC peripheral if no conversion is on going
1315 * on injected group.
1316 * @param hadc ADC handle
1317 * @retval HAL status.
1318 */
HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef * hadc)1319 HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc)
1320 {
1321 HAL_StatusTypeDef tmp_hal_status;
1322
1323 /* Check the parameters */
1324 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1325
1326 /* Process locked */
1327 __HAL_LOCK(hadc);
1328
1329 /* 1. Stop potential regular conversion on going */
1330 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1331
1332 /* Disable ADC peripheral if conversions are effectively stopped
1333 and if no injected conversion is on-going */
1334 if (tmp_hal_status == HAL_OK)
1335 {
1336 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1337 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1338
1339 /* Disable all regular-related interrupts */
1340 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1341
1342 /* 2. Disable ADC peripheral if no injected conversions are on-going */
1343 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1344 {
1345 tmp_hal_status = ADC_Disable(hadc);
1346 /* if no issue reported */
1347 if (tmp_hal_status == HAL_OK)
1348 {
1349 /* Set ADC state */
1350 ADC_STATE_CLR_SET(hadc->State,
1351 HAL_ADC_STATE_INJ_BUSY,
1352 HAL_ADC_STATE_READY);
1353 }
1354 }
1355 else
1356 {
1357 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1358 }
1359 }
1360
1361 /* Process unlocked */
1362 __HAL_UNLOCK(hadc);
1363
1364 /* Return function status */
1365 return tmp_hal_status;
1366 }
1367
1368 /**
1369 * @brief Stop ADC conversion of regular group (and injected group in
1370 * case of auto_injection mode), disable ADC DMA transfer, disable
1371 * ADC peripheral if no conversion is on going
1372 * on injected group.
1373 * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
1374 * For multimode (when multimode feature is available),
1375 * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
1376 * @param hadc ADC handle
1377 * @retval HAL status.
1378 */
HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef * hadc)1379 HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc)
1380 {
1381 HAL_StatusTypeDef tmp_hal_status;
1382
1383 /* Check the parameters */
1384 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1385
1386 /* Process locked */
1387 __HAL_LOCK(hadc);
1388
1389 /* 1. Stop potential regular conversion on going */
1390 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1391
1392 /* Disable ADC peripheral if conversions are effectively stopped
1393 and if no injected conversion is on-going */
1394 if (tmp_hal_status == HAL_OK)
1395 {
1396 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1397 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1398
1399 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1400 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN);
1401
1402 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1403 /* while DMA transfer is on going) */
1404 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1405
1406 /* Check if DMA channel effectively disabled */
1407 if (tmp_hal_status != HAL_OK)
1408 {
1409 /* Update ADC state machine to error */
1410 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1411 }
1412
1413 /* Disable ADC overrun interrupt */
1414 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1415
1416 /* 2. Disable the ADC peripheral */
1417 /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1418 /* to keep in memory a potential failing status. */
1419 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1420 {
1421 if (tmp_hal_status == HAL_OK)
1422 {
1423 tmp_hal_status = ADC_Disable(hadc);
1424 }
1425 else
1426 {
1427 (void)ADC_Disable(hadc);
1428 }
1429
1430 /* Check if ADC is effectively disabled */
1431 if (tmp_hal_status == HAL_OK)
1432 {
1433 /* Set ADC state */
1434 ADC_STATE_CLR_SET(hadc->State,
1435 HAL_ADC_STATE_INJ_BUSY,
1436 HAL_ADC_STATE_READY);
1437 }
1438 }
1439 else
1440 {
1441 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1442 }
1443 }
1444
1445 /* Process unlocked */
1446 __HAL_UNLOCK(hadc);
1447
1448 /* Return function status */
1449 return tmp_hal_status;
1450 }
1451
1452 #if defined(ADC_MULTIMODE_SUPPORT)
1453 /**
1454 * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going.
1455 * @note Multimode is kept enabled after this function. Multimode DMA bits
1456 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1457 * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1458 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1459 * resort to HAL_ADCEx_DisableMultiMode() API.
1460 * @note In case of DMA configured in circular mode, function
1461 * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
1462 * ADC slave, to properly disable the DMA channel.
1463 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1464 * @retval HAL status
1465 */
HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef * hadc)1466 HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1467 {
1468 HAL_StatusTypeDef tmp_hal_status;
1469 uint32_t tickstart;
1470 ADC_HandleTypeDef tmphadcSlave;
1471 uint32_t tmphadcSlave_conversion_on_going;
1472
1473 /* Check the parameters */
1474 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1475
1476 /* Process locked */
1477 __HAL_LOCK(hadc);
1478
1479
1480 /* 1. Stop potential multimode conversion on going, on regular groups */
1481 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1482
1483 /* Disable ADC peripheral if conversions are effectively stopped */
1484 if (tmp_hal_status == HAL_OK)
1485 {
1486 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1487 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1488
1489 /* Temporary handle minimum initialization */
1490 __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave);
1491 ADC_CLEAR_ERRORCODE(&tmphadcSlave);
1492
1493 /* Set a temporary handle of the ADC slave associated to the ADC master */
1494 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1495
1496 if (tmphadcSlave.Instance == NULL)
1497 {
1498 /* Update ADC state machine to error */
1499 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1500
1501 /* Process unlocked */
1502 __HAL_UNLOCK(hadc);
1503
1504 return HAL_ERROR;
1505 }
1506
1507 /* Procedure to disable the ADC peripheral: wait for conversions */
1508 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1509
1510 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1511 tickstart = HAL_GetTick();
1512
1513 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1514 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1515 || (tmphadcSlave_conversion_on_going == 1UL)
1516 )
1517 {
1518 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1519 {
1520 /* New check to avoid false timeout detection in case of preemption */
1521 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1522 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1523 || (tmphadcSlave_conversion_on_going == 1UL)
1524 )
1525 {
1526 /* Update ADC state machine to error */
1527 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1528
1529 /* Process unlocked */
1530 __HAL_UNLOCK(hadc);
1531
1532 return HAL_ERROR;
1533 }
1534 }
1535
1536 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1537 }
1538
1539 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1540 /* while DMA transfer is on going) */
1541 /* Note: DMA channel of ADC slave should be stopped after this function */
1542 /* with HAL_ADCEx_RegularStop_DMA() API. */
1543 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1544
1545 /* Check if DMA channel effectively disabled */
1546 if (tmp_hal_status != HAL_OK)
1547 {
1548 /* Update ADC state machine to error */
1549 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1550 }
1551
1552 /* Disable ADC overrun interrupt */
1553 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1554
1555 /* 2. Disable the ADC peripherals: master and slave if no injected */
1556 /* conversion is on-going. */
1557 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1558 /* memory a potential failing status. */
1559 if (tmp_hal_status == HAL_OK)
1560 {
1561 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1562 {
1563 tmp_hal_status = ADC_Disable(hadc);
1564 if (tmp_hal_status == HAL_OK)
1565 {
1566 if (LL_ADC_INJ_IsConversionOngoing((&tmphadcSlave)->Instance) == 0UL)
1567 {
1568 tmp_hal_status = ADC_Disable(&tmphadcSlave);
1569 }
1570 }
1571 }
1572
1573 if (tmp_hal_status == HAL_OK)
1574 {
1575 /* Both Master and Slave ADC's could be disabled. Update Master State */
1576 /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
1577 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1578 }
1579 else
1580 {
1581 /* injected (Master or Slave) conversions are still on-going,
1582 no Master State change */
1583 }
1584 }
1585 }
1586
1587 /* Process unlocked */
1588 __HAL_UNLOCK(hadc);
1589
1590 /* Return function status */
1591 return tmp_hal_status;
1592 }
1593 #endif /* ADC_MULTIMODE_SUPPORT */
1594
1595 /**
1596 * @}
1597 */
1598
1599 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
1600 * @brief ADC Extended Peripheral Control functions
1601 *
1602 @verbatim
1603 ===============================================================================
1604 ##### Peripheral Control functions #####
1605 ===============================================================================
1606 [..] This section provides functions allowing to:
1607 (+) Configure channels on injected group
1608 (+) Configure multimode when multimode feature is available
1609 (+) Enable or Disable Injected Queue
1610 (+) Disable ADC voltage regulator
1611 (+) Enter ADC deep-power-down mode
1612
1613 @endverbatim
1614 * @{
1615 */
1616
1617 /**
1618 * @brief Configure a channel to be assigned to ADC group injected.
1619 * @note Possibility to update parameters on the fly:
1620 * This function initializes injected group, following calls to this
1621 * function can be used to reconfigure some parameters of structure
1622 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
1623 * The setting of these parameters is conditioned to ADC state:
1624 * Refer to comments of structure "ADC_InjectionConfTypeDef".
1625 * @note In case of usage of internal measurement channels:
1626 * Vbat/VrefInt/TempSensor.
1627 * These internal paths can be disabled using function
1628 * HAL_ADC_DeInit().
1629 * @note Caution: For Injected Context Queue use, a context must be fully
1630 * defined before start of injected conversion. All channels are configured
1631 * consecutively for the same ADC instance. Therefore, the number of calls to
1632 * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
1633 * InjectedNbrOfConversion for each context.
1634 * - Example 1: If 1 context is intended to be used (or if there is no use of the
1635 * Injected Queue Context feature) and if the context contains 3 injected ranks
1636 * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
1637 * called once for each channel (i.e. 3 times) before starting a conversion.
1638 * This function must not be called to configure a 4th injected channel:
1639 * it would start a new context into context queue.
1640 * - Example 2: If 2 contexts are intended to be used and each of them contains
1641 * 3 injected ranks (InjectedNbrOfConversion = 3),
1642 * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
1643 * for each context (3 channels x 2 contexts = 6 calls). Conversion can
1644 * start once the 1st context is set, that is after the first three
1645 * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
1646 * @param hadc ADC handle
1647 * @param sConfigInjected Structure of ADC injected group and ADC channel for
1648 * injected group.
1649 * @retval HAL status
1650 */
HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef * hadc,ADC_InjectionConfTypeDef * sConfigInjected)1651 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef *sConfigInjected)
1652 {
1653 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1654 uint32_t tmpOffsetShifted;
1655 uint32_t tmp_config_internal_channel;
1656 uint32_t tmp_adc_is_conversion_on_going_regular;
1657 uint32_t tmp_adc_is_conversion_on_going_injected;
1658 __IO uint32_t wait_loop_index = 0;
1659
1660 uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U;
1661
1662 /* Check the parameters */
1663 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1664 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
1665 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
1666 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
1667 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
1668 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
1669 assert_param(IS_ADC_EXTTRIGINJEC(hadc, sConfigInjected->ExternalTrigInjecConv));
1670 assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
1671 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
1672 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode));
1673
1674 if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
1675 {
1676 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
1677 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
1678 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
1679 }
1680
1681
1682 /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
1683 ignored (considered as reset) */
1684 assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->InjecOversamplingMode == ENABLE)));
1685
1686 /* JDISCEN and JAUTO bits can't be set at the same time */
1687 assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1688
1689 /* DISCEN and JAUTO bits can't be set at the same time */
1690 assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1691
1692 /* Verification of channel number */
1693 if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
1694 {
1695 assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel));
1696 }
1697 else
1698 {
1699 assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel));
1700 }
1701
1702 /* Process locked */
1703 __HAL_LOCK(hadc);
1704
1705 /* Configuration of injected group sequencer: */
1706 /* Hardware constraint: Must fully define injected context register JSQR */
1707 /* before make it entering into injected sequencer queue. */
1708 /* */
1709 /* - if scan mode is disabled: */
1710 /* * Injected channels sequence length is set to 0x00: 1 channel */
1711 /* converted (channel on injected rank 1) */
1712 /* Parameter "InjectedNbrOfConversion" is discarded. */
1713 /* * Injected context register JSQR setting is simple: register is fully */
1714 /* defined on one call of this function (for injected rank 1) and can */
1715 /* be entered into queue directly. */
1716 /* - if scan mode is enabled: */
1717 /* * Injected channels sequence length is set to parameter */
1718 /* "InjectedNbrOfConversion". */
1719 /* * Injected context register JSQR setting more complex: register is */
1720 /* fully defined over successive calls of this function, for each */
1721 /* injected channel rank. It is entered into queue only when all */
1722 /* injected ranks have been set. */
1723 /* Note: Scan mode is not present by hardware on this device, but used */
1724 /* by software for alignment over all STM32 devices. */
1725
1726 if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
1727 (sConfigInjected->InjectedNbrOfConversion == 1U))
1728 {
1729 /* Configuration of context register JSQR: */
1730 /* - number of ranks in injected group sequencer: fixed to 1st rank */
1731 /* (scan mode disabled, only rank 1 used) */
1732 /* - external trigger to start conversion */
1733 /* - external trigger polarity */
1734 /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
1735
1736 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1737 {
1738 /* Enable external trigger if trigger selection is different of */
1739 /* software start. */
1740 /* Note: This configuration keeps the hardware feature of parameter */
1741 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1742 /* software start. */
1743 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1744 {
1745 tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1)
1746 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1747 | sConfigInjected->ExternalTrigInjecConvEdge
1748 );
1749 }
1750 else
1751 {
1752 tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1));
1753 }
1754
1755 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt);
1756 /* For debug and informative reasons, hadc handle saves JSQR setting */
1757 hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt;
1758
1759 }
1760 }
1761 else
1762 {
1763 /* Case of scan mode enabled, several channels to set into injected group */
1764 /* sequencer. */
1765 /* */
1766 /* Procedure to define injected context register JSQR over successive */
1767 /* calls of this function, for each injected channel rank: */
1768 /* 1. Start new context and set parameters related to all injected */
1769 /* channels: injected sequence length and trigger. */
1770
1771 /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
1772 /* call of the context under setting */
1773 if (hadc->InjectionConfig.ChannelCount == 0U)
1774 {
1775 /* Initialize number of channels that will be configured on the context */
1776 /* being built */
1777 hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion;
1778 /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
1779 call, this context will be written in JSQR register at the last call.
1780 At this point, the context is merely reset */
1781 hadc->InjectionConfig.ContextQueue = 0x00000000U;
1782
1783 /* Configuration of context register JSQR: */
1784 /* - number of ranks in injected group sequencer */
1785 /* - external trigger to start conversion */
1786 /* - external trigger polarity */
1787
1788 /* Enable external trigger if trigger selection is different of */
1789 /* software start. */
1790 /* Note: This configuration keeps the hardware feature of parameter */
1791 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1792 /* software start. */
1793 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1794 {
1795 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U)
1796 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1797 | sConfigInjected->ExternalTrigInjecConvEdge
1798 );
1799 }
1800 else
1801 {
1802 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U));
1803 }
1804
1805 }
1806
1807 /* 2. Continue setting of context under definition with parameter */
1808 /* related to each channel: channel rank sequence */
1809 /* Clear the old JSQx bits for the selected rank */
1810 tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
1811
1812 /* Set the JSQx bits for the selected rank */
1813 tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
1814
1815 /* Decrease channel count */
1816 hadc->InjectionConfig.ChannelCount--;
1817
1818 /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel()
1819 call, aggregate the setting to those already built during the previous
1820 HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
1821 hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt;
1822
1823 /* 4. End of context setting: if this is the last channel set, then write context
1824 into register JSQR and make it enter into queue */
1825 if (hadc->InjectionConfig.ChannelCount == 0U)
1826 {
1827 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
1828 }
1829 }
1830
1831 /* Parameters update conditioned to ADC state: */
1832 /* Parameters that can be updated when ADC is disabled or enabled without */
1833 /* conversion on going on injected group: */
1834 /* - Injected context queue: Queue disable (active context is kept) or */
1835 /* enable (context decremented, up to 2 contexts queued) */
1836 /* - Injected discontinuous mode: can be enabled only if auto-injected */
1837 /* mode is disabled. */
1838 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1839 {
1840 /* If auto-injected mode is disabled: no constraint */
1841 if (sConfigInjected->AutoInjectedConv == DISABLE)
1842 {
1843 MODIFY_REG(hadc->Instance->CFGR,
1844 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1845 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) |
1846 ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousConvMode));
1847 }
1848 /* If auto-injected mode is enabled: Injected discontinuous setting is */
1849 /* discarded. */
1850 else
1851 {
1852 MODIFY_REG(hadc->Instance->CFGR,
1853 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1854 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext));
1855 }
1856
1857 }
1858
1859 /* Parameters update conditioned to ADC state: */
1860 /* Parameters that can be updated when ADC is disabled or enabled without */
1861 /* conversion on going on regular and injected groups: */
1862 /* - Automatic injected conversion: can be enabled if injected group */
1863 /* external triggers are disabled. */
1864 /* - Channel sampling time */
1865 /* - Channel offset */
1866 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
1867 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
1868
1869 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
1870 && (tmp_adc_is_conversion_on_going_injected == 0UL)
1871 )
1872 {
1873 /* If injected group external triggers are disabled (set to injected */
1874 /* software start): no constraint */
1875 if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
1876 || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
1877 {
1878 if (sConfigInjected->AutoInjectedConv == ENABLE)
1879 {
1880 SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1881 }
1882 else
1883 {
1884 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1885 }
1886 }
1887 /* If Automatic injected conversion was intended to be set and could not */
1888 /* due to injected group external triggers enabled, error is reported. */
1889 else
1890 {
1891 if (sConfigInjected->AutoInjectedConv == ENABLE)
1892 {
1893 /* Update ADC state machine to error */
1894 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1895
1896 tmp_hal_status = HAL_ERROR;
1897 }
1898 else
1899 {
1900 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1901 }
1902 }
1903
1904 if (sConfigInjected->InjecOversamplingMode == ENABLE)
1905 {
1906 assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
1907 assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift));
1908
1909 /* JOVSE must be reset in case of triggered regular mode */
1910 assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS)));
1911
1912 /* Configuration of Injected Oversampler: */
1913 /* - Oversampling Ratio */
1914 /* - Right bit shift */
1915
1916 /* Enable OverSampling mode */
1917 MODIFY_REG(hadc->Instance->CFGR2,
1918 ADC_CFGR2_JOVSE |
1919 ADC_CFGR2_OVSR |
1920 ADC_CFGR2_OVSS,
1921 ADC_CFGR2_JOVSE |
1922 sConfigInjected->InjecOversampling.Ratio |
1923 sConfigInjected->InjecOversampling.RightBitShift
1924 );
1925 }
1926 else
1927 {
1928 /* Disable Regular OverSampling */
1929 CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
1930 }
1931
1932 #if defined(ADC_SMPR1_SMPPLUS)
1933 /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */
1934 if (sConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5)
1935 {
1936 /* Set sampling time of the selected ADC channel */
1937 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, LL_ADC_SAMPLINGTIME_2CYCLES_5);
1938
1939 /* Set ADC sampling time common configuration */
1940 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5);
1941 }
1942 else
1943 {
1944 /* Set sampling time of the selected ADC channel */
1945 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
1946
1947 /* Set ADC sampling time common configuration */
1948 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT);
1949 }
1950 #else
1951 /* Set sampling time of the selected ADC channel */
1952 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
1953 #endif
1954
1955 /* Configure the offset: offset enable/disable, channel, offset value */
1956
1957 /* Shift the offset with respect to the selected ADC resolution. */
1958 /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
1959 tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
1960
1961 if (sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
1962 {
1963 /* Set ADC selected offset number */
1964 LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->InjectedChannel,
1965 tmpOffsetShifted);
1966
1967 }
1968 else
1969 {
1970 /* Scan each offset register to check if the selected channel is targeted. */
1971 /* If this is the case, the corresponding offset number is disabled. */
1972 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1))
1973 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1974 {
1975 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE);
1976 }
1977 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2))
1978 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1979 {
1980 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE);
1981 }
1982 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3))
1983 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1984 {
1985 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE);
1986 }
1987 if (__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4))
1988 == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1989 {
1990 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE);
1991 }
1992 }
1993
1994 }
1995
1996 /* Parameters update conditioned to ADC state: */
1997 /* Parameters that can be updated only when ADC is disabled: */
1998 /* - Single or differential mode */
1999 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2000 {
2001 /* Set mode single-ended or differential input of the selected ADC channel */
2002 LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSingleDiff);
2003
2004 /* Configuration of differential mode */
2005 /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */
2006 if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
2007 {
2008 /* Set sampling time of the selected ADC channel */
2009 LL_ADC_SetChannelSamplingTime(hadc->Instance,
2010 (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfigInjected->InjectedChannel)
2011 + 1UL) & 0x1FUL)), sConfigInjected->InjectedSamplingTime);
2012 }
2013
2014 }
2015
2016 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
2017 /* internal measurement paths enable: If internal channel selected, */
2018 /* enable dedicated internal buffers and path. */
2019 /* Note: these internal measurement paths can be disabled using */
2020 /* HAL_ADC_DeInit(). */
2021
2022 if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel))
2023 {
2024 tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
2025
2026 /* If the requested internal measurement path has already been enabled, */
2027 /* bypass the configuration processing. */
2028 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
2029 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL))
2030 {
2031 if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
2032 {
2033 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2034 LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel);
2035
2036 /* Delay for temperature sensor stabilization time */
2037 /* Wait loop initialization and execution */
2038 /* Note: Variable divided by 2 to compensate partially */
2039 /* CPU processing cycles, scaling in us split to not */
2040 /* exceed 32 bits register capacity and handle low frequency. */
2041 wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (((SystemCoreClock / (100000UL * 2UL)) + 1UL) + 1UL));
2042 while (wait_loop_index != 0UL)
2043 {
2044 wait_loop_index--;
2045 }
2046 }
2047 }
2048 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
2049 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL))
2050 {
2051 if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
2052 {
2053 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2054 LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel);
2055 }
2056 }
2057 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
2058 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL))
2059 {
2060 if (ADC_VREFINT_INSTANCE(hadc))
2061 {
2062 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2063 LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel);
2064 }
2065 }
2066 else
2067 {
2068 /* nothing to do */
2069 }
2070 }
2071
2072 /* Process unlocked */
2073 __HAL_UNLOCK(hadc);
2074
2075 /* Return function status */
2076 return tmp_hal_status;
2077 }
2078
2079 #if defined(ADC_MULTIMODE_SUPPORT)
2080 /**
2081 * @brief Enable ADC multimode and configure multimode parameters
2082 * @note Possibility to update parameters on the fly:
2083 * This function initializes multimode parameters, following
2084 * calls to this function can be used to reconfigure some parameters
2085 * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
2086 * the ADCs.
2087 * The setting of these parameters is conditioned to ADC state.
2088 * For parameters constraints, see comments of structure
2089 * "ADC_MultiModeTypeDef".
2090 * @note To move back configuration from multimode to single mode, ADC must
2091 * be reset (using function HAL_ADC_Init() ).
2092 * @param hadc Master ADC handle
2093 * @param multimode Structure of ADC multimode configuration
2094 * @retval HAL status
2095 */
HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef * hadc,ADC_MultiModeTypeDef * multimode)2096 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode)
2097 {
2098 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2099 ADC_Common_TypeDef *tmpADC_Common;
2100 ADC_HandleTypeDef tmphadcSlave;
2101 uint32_t tmphadcSlave_conversion_on_going;
2102
2103 /* Check the parameters */
2104 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2105 assert_param(IS_ADC_MULTIMODE(multimode->Mode));
2106 if (multimode->Mode != ADC_MODE_INDEPENDENT)
2107 {
2108 assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode));
2109 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
2110 }
2111
2112 /* Process locked */
2113 __HAL_LOCK(hadc);
2114
2115 /* Temporary handle minimum initialization */
2116 __HAL_ADC_RESET_HANDLE_STATE(&tmphadcSlave);
2117 ADC_CLEAR_ERRORCODE(&tmphadcSlave);
2118
2119 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
2120
2121 if (tmphadcSlave.Instance == NULL)
2122 {
2123 /* Update ADC state machine to error */
2124 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2125
2126 /* Process unlocked */
2127 __HAL_UNLOCK(hadc);
2128
2129 return HAL_ERROR;
2130 }
2131
2132 /* Parameters update conditioned to ADC state: */
2133 /* Parameters that can be updated when ADC is disabled or enabled without */
2134 /* conversion on going on regular group: */
2135 /* - Multimode DMA configuration */
2136 /* - Multimode DMA mode */
2137 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
2138 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
2139 && (tmphadcSlave_conversion_on_going == 0UL))
2140 {
2141 /* Pointer to the common control register */
2142 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
2143
2144 /* If multimode is selected, configure all multimode parameters. */
2145 /* Otherwise, reset multimode parameters (can be used in case of */
2146 /* transition from multimode to independent mode). */
2147 if (multimode->Mode != ADC_MODE_INDEPENDENT)
2148 {
2149 MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG,
2150 multimode->DMAAccessMode |
2151 ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests));
2152
2153 /* Parameters that can be updated only when ADC is disabled: */
2154 /* - Multimode mode selection */
2155 /* - Multimode delay */
2156 /* Note: Delay range depends on selected resolution: */
2157 /* from 1 to 12 clock cycles for 12 bits */
2158 /* from 1 to 10 clock cycles for 10 bits, */
2159 /* from 1 to 8 clock cycles for 8 bits */
2160 /* from 1 to 6 clock cycles for 6 bits */
2161 /* If a higher delay is selected, it will be clipped to maximum delay */
2162 /* range */
2163 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2164 {
2165 MODIFY_REG(tmpADC_Common->CCR,
2166 ADC_CCR_DUAL |
2167 ADC_CCR_DELAY,
2168 multimode->Mode |
2169 multimode->TwoSamplingDelay
2170 );
2171 }
2172 }
2173 else /* ADC_MODE_INDEPENDENT */
2174 {
2175 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG);
2176
2177 /* Parameters that can be updated only when ADC is disabled: */
2178 /* - Multimode mode selection */
2179 /* - Multimode delay */
2180 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2181 {
2182 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
2183 }
2184 }
2185 }
2186 /* If one of the ADC sharing the same common group is enabled, no update */
2187 /* could be done on neither of the multimode structure parameters. */
2188 else
2189 {
2190 /* Update ADC state machine to error */
2191 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2192
2193 tmp_hal_status = HAL_ERROR;
2194 }
2195
2196 /* Process unlocked */
2197 __HAL_UNLOCK(hadc);
2198
2199 /* Return function status */
2200 return tmp_hal_status;
2201 }
2202 #endif /* ADC_MULTIMODE_SUPPORT */
2203
2204 /**
2205 * @brief Enable Injected Queue
2206 * @note This function resets CFGR register JQDIS bit in order to enable the
2207 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2208 * are both equal to 0 to ensure that no regular nor injected
2209 * conversion is ongoing.
2210 * @param hadc ADC handle
2211 * @retval HAL status
2212 */
HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef * hadc)2213 HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc)
2214 {
2215 HAL_StatusTypeDef tmp_hal_status;
2216 uint32_t tmp_adc_is_conversion_on_going_regular;
2217 uint32_t tmp_adc_is_conversion_on_going_injected;
2218
2219 /* Check the parameters */
2220 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2221
2222 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2223 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2224
2225 /* Parameter can be set only if no conversion is on-going */
2226 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2227 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2228 )
2229 {
2230 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
2231
2232 /* Update state, clear previous result related to injected queue overflow */
2233 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
2234
2235 tmp_hal_status = HAL_OK;
2236 }
2237 else
2238 {
2239 tmp_hal_status = HAL_ERROR;
2240 }
2241
2242 return tmp_hal_status;
2243 }
2244
2245 /**
2246 * @brief Disable Injected Queue
2247 * @note This function sets CFGR register JQDIS bit in order to disable the
2248 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2249 * are both equal to 0 to ensure that no regular nor injected
2250 * conversion is ongoing.
2251 * @param hadc ADC handle
2252 * @retval HAL status
2253 */
HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef * hadc)2254 HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc)
2255 {
2256 HAL_StatusTypeDef tmp_hal_status;
2257 uint32_t tmp_adc_is_conversion_on_going_regular;
2258 uint32_t tmp_adc_is_conversion_on_going_injected;
2259
2260 /* Check the parameters */
2261 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2262
2263 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2264 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2265
2266 /* Parameter can be set only if no conversion is on-going */
2267 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2268 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2269 )
2270 {
2271 LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE);
2272 tmp_hal_status = HAL_OK;
2273 }
2274 else
2275 {
2276 tmp_hal_status = HAL_ERROR;
2277 }
2278
2279 return tmp_hal_status;
2280 }
2281
2282 /**
2283 * @brief Disable ADC voltage regulator.
2284 * @note Disabling voltage regulator allows to save power. This operation can
2285 * be carried out only when ADC is disabled.
2286 * @note To enable again the voltage regulator, the user is expected to
2287 * resort to HAL_ADC_Init() API.
2288 * @param hadc ADC handle
2289 * @retval HAL status
2290 */
HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef * hadc)2291 HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc)
2292 {
2293 HAL_StatusTypeDef tmp_hal_status;
2294
2295 /* Check the parameters */
2296 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2297
2298 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2299 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2300 {
2301 LL_ADC_DisableInternalRegulator(hadc->Instance);
2302 tmp_hal_status = HAL_OK;
2303 }
2304 else
2305 {
2306 tmp_hal_status = HAL_ERROR;
2307 }
2308
2309 return tmp_hal_status;
2310 }
2311
2312 /**
2313 * @brief Enter ADC deep-power-down mode
2314 * @note This mode is achieved in setting DEEPPWD bit and allows to save power
2315 * in reducing leakage currents. It is particularly interesting before
2316 * entering stop modes.
2317 * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
2318 * ADC voltage regulator. This means that this API encompasses
2319 * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
2320 * calibration is lost.
2321 * @note To exit the ADC deep-power-down mode, the user is expected to
2322 * resort to HAL_ADC_Init() API as well as to relaunch a calibration
2323 * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
2324 * saved calibration factor.
2325 * @param hadc ADC handle
2326 * @retval HAL status
2327 */
HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef * hadc)2328 HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc)
2329 {
2330 HAL_StatusTypeDef tmp_hal_status;
2331
2332 /* Check the parameters */
2333 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2334
2335 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2336 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2337 {
2338 LL_ADC_EnableDeepPowerDown(hadc->Instance);
2339 tmp_hal_status = HAL_OK;
2340 }
2341 else
2342 {
2343 tmp_hal_status = HAL_ERROR;
2344 }
2345
2346 return tmp_hal_status;
2347 }
2348
2349 /**
2350 * @}
2351 */
2352
2353 /**
2354 * @}
2355 */
2356
2357 #endif /* HAL_ADC_MODULE_ENABLED */
2358 /**
2359 * @}
2360 */
2361
2362 /**
2363 * @}
2364 */
2365