1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_usart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of USART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_USART_EX_H 21 #define STM32L4xx_HAL_USART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup USARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /* Exported constants --------------------------------------------------------*/ 40 /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants 41 * @{ 42 */ 43 44 /** @defgroup USARTEx_Word_Length USARTEx Word Length 45 * @{ 46 */ 47 #define USART_WORDLENGTH_7B (USART_CR1_M1) /*!< 7-bit long USART frame */ 48 #define USART_WORDLENGTH_8B (0x00000000U) /*!< 8-bit long USART frame */ 49 #define USART_WORDLENGTH_9B (USART_CR1_M0) /*!< 9-bit long USART frame */ 50 /** 51 * @} 52 */ 53 54 #if defined(USART_CR2_SLVEN) 55 /** @defgroup USARTEx_Slave_Select_management USARTEx Slave Select Management 56 * @{ 57 */ 58 #define USART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ 59 #define USART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ 60 /** 61 * @} 62 */ 63 64 65 /** @defgroup USARTEx_Slave_Mode USARTEx Synchronous Slave mode enable 66 * @brief USART SLAVE mode 67 * @{ 68 */ 69 #define USART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ 70 #define USART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ 71 /** 72 * @} 73 */ 74 #endif /* USART_CR2_SLVEN */ 75 76 #if defined(USART_CR1_FIFOEN) 77 /** @defgroup USARTEx_FIFO_mode USARTEx FIFO mode 78 * @brief USART FIFO mode 79 * @{ 80 */ 81 #define USART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 82 #define USART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 83 /** 84 * @} 85 */ 86 87 /** @defgroup USARTEx_TXFIFO_threshold_level USARTEx TXFIFO threshold level 88 * @brief USART TXFIFO level 89 * @{ 90 */ 91 #define USART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ 92 #define USART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ 93 #define USART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ 94 #define USART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ 95 #define USART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ 96 #define USART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */ 97 /** 98 * @} 99 */ 100 101 /** @defgroup USARTEx_RXFIFO_threshold_level USARTEx RXFIFO threshold level 102 * @brief USART RXFIFO level 103 * @{ 104 */ 105 #define USART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ 106 #define USART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ 107 #define USART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ 108 #define USART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ 109 #define USART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ 110 #define USART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ 111 /** 112 * @} 113 */ 114 115 #endif /* USART_CR1_FIFOEN */ 116 /** 117 * @} 118 */ 119 120 /* Private macros ------------------------------------------------------------*/ 121 /** @defgroup USARTEx_Private_Macros USARTEx Private Macros 122 * @{ 123 */ 124 125 /** @brief Report the USART clock source. 126 * @param __HANDLE__ specifies the USART Handle. 127 * @param __CLOCKSOURCE__ output variable. 128 * @retval the USART clocking source, written in __CLOCKSOURCE__. 129 */ 130 #if defined (STM32L432xx) || defined (STM32L442xx) 131 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 132 do { \ 133 if((__HANDLE__)->Instance == USART1) \ 134 { \ 135 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 136 { \ 137 case RCC_USART1CLKSOURCE_PCLK2: \ 138 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 139 break; \ 140 case RCC_USART1CLKSOURCE_HSI: \ 141 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 142 break; \ 143 case RCC_USART1CLKSOURCE_SYSCLK: \ 144 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 145 break; \ 146 case RCC_USART1CLKSOURCE_LSE: \ 147 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 148 break; \ 149 default: \ 150 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 151 break; \ 152 } \ 153 } \ 154 else if((__HANDLE__)->Instance == USART2) \ 155 { \ 156 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 157 { \ 158 case RCC_USART2CLKSOURCE_PCLK1: \ 159 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 160 break; \ 161 case RCC_USART2CLKSOURCE_HSI: \ 162 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 163 break; \ 164 case RCC_USART2CLKSOURCE_SYSCLK: \ 165 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 166 break; \ 167 case RCC_USART2CLKSOURCE_LSE: \ 168 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 169 break; \ 170 default: \ 171 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 172 break; \ 173 } \ 174 } \ 175 else \ 176 { \ 177 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 178 } \ 179 } while(0) 180 #else 181 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 182 do { \ 183 if((__HANDLE__)->Instance == USART1) \ 184 { \ 185 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 186 { \ 187 case RCC_USART1CLKSOURCE_PCLK2: \ 188 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ 189 break; \ 190 case RCC_USART1CLKSOURCE_HSI: \ 191 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 192 break; \ 193 case RCC_USART1CLKSOURCE_SYSCLK: \ 194 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 195 break; \ 196 case RCC_USART1CLKSOURCE_LSE: \ 197 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 198 break; \ 199 default: \ 200 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 201 break; \ 202 } \ 203 } \ 204 else if((__HANDLE__)->Instance == USART2) \ 205 { \ 206 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 207 { \ 208 case RCC_USART2CLKSOURCE_PCLK1: \ 209 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 210 break; \ 211 case RCC_USART2CLKSOURCE_HSI: \ 212 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 213 break; \ 214 case RCC_USART2CLKSOURCE_SYSCLK: \ 215 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 216 break; \ 217 case RCC_USART2CLKSOURCE_LSE: \ 218 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 219 break; \ 220 default: \ 221 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 222 break; \ 223 } \ 224 } \ 225 else if((__HANDLE__)->Instance == USART3) \ 226 { \ 227 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 228 { \ 229 case RCC_USART3CLKSOURCE_PCLK1: \ 230 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ 231 break; \ 232 case RCC_USART3CLKSOURCE_HSI: \ 233 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 234 break; \ 235 case RCC_USART3CLKSOURCE_SYSCLK: \ 236 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ 237 break; \ 238 case RCC_USART3CLKSOURCE_LSE: \ 239 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 240 break; \ 241 default: \ 242 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 243 break; \ 244 } \ 245 } \ 246 else \ 247 { \ 248 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 249 } \ 250 } while(0) 251 #endif /* STM32L432xx || STM32L442xx */ 252 253 /** @brief Compute the USART mask to apply to retrieve the received data 254 * according to the word length and to the parity bits activation. 255 * @note If PCE = 1, the parity bit is not included in the data extracted 256 * by the reception API(). 257 * This masking operation is not carried out in the case of 258 * DMA transfers. 259 * @param __HANDLE__ specifies the USART Handle. 260 * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. 261 */ 262 #define USART_MASK_COMPUTATION(__HANDLE__) \ 263 do { \ 264 if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ 265 { \ 266 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 267 { \ 268 (__HANDLE__)->Mask = 0x01FFU; \ 269 } \ 270 else \ 271 { \ 272 (__HANDLE__)->Mask = 0x00FFU; \ 273 } \ 274 } \ 275 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ 276 { \ 277 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 278 { \ 279 (__HANDLE__)->Mask = 0x00FFU; \ 280 } \ 281 else \ 282 { \ 283 (__HANDLE__)->Mask = 0x007FU; \ 284 } \ 285 } \ 286 else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \ 287 { \ 288 if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ 289 { \ 290 (__HANDLE__)->Mask = 0x007FU; \ 291 } \ 292 else \ 293 { \ 294 (__HANDLE__)->Mask = 0x003FU; \ 295 } \ 296 } \ 297 else \ 298 { \ 299 (__HANDLE__)->Mask = 0x0000U; \ 300 } \ 301 } while(0U) 302 303 /** 304 * @brief Ensure that USART frame length is valid. 305 * @param __LENGTH__ USART frame length. 306 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 307 */ 308 #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ 309 ((__LENGTH__) == USART_WORDLENGTH_8B) || \ 310 ((__LENGTH__) == USART_WORDLENGTH_9B)) 311 312 #if defined(USART_CR2_SLVEN) 313 /** 314 * @brief Ensure that USART Negative Slave Select (NSS) pin management is valid. 315 * @param __NSS__ USART Negative Slave Select pin management. 316 * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) 317 */ 318 #define IS_USART_NSS(__NSS__) (((__NSS__) == USART_NSS_HARD) || \ 319 ((__NSS__) == USART_NSS_SOFT)) 320 321 /** 322 * @brief Ensure that USART Slave Mode is valid. 323 * @param __STATE__ USART Slave Mode. 324 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 325 */ 326 #define IS_USART_SLAVEMODE(__STATE__) (((__STATE__) == USART_SLAVEMODE_DISABLE ) || \ 327 ((__STATE__) == USART_SLAVEMODE_ENABLE)) 328 #endif /* USART_CR2_SLVEN */ 329 330 #if defined(USART_CR1_FIFOEN) 331 /** 332 * @brief Ensure that USART FIFO mode is valid. 333 * @param __STATE__ USART FIFO mode. 334 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 335 */ 336 #define IS_USART_FIFO_MODE_STATE(__STATE__) (((__STATE__) == USART_FIFOMODE_DISABLE ) || \ 337 ((__STATE__) == USART_FIFOMODE_ENABLE)) 338 339 /** 340 * @brief Ensure that USART TXFIFO threshold level is valid. 341 * @param __THRESHOLD__ USART TXFIFO threshold level. 342 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 343 */ 344 #define IS_USART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_8) || \ 345 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_4) || \ 346 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_2) || \ 347 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_3_4) || \ 348 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_7_8) || \ 349 ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_8_8)) 350 351 /** 352 * @brief Ensure that USART RXFIFO threshold level is valid. 353 * @param __THRESHOLD__ USART RXFIFO threshold level. 354 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 355 */ 356 #define IS_USART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_8) || \ 357 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_4) || \ 358 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_2) || \ 359 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_3_4) || \ 360 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_7_8) || \ 361 ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_8_8)) 362 #endif /* USART_CR1_FIFOEN */ 363 /** 364 * @} 365 */ 366 367 /* Exported functions --------------------------------------------------------*/ 368 /** @addtogroup USARTEx_Exported_Functions 369 * @{ 370 */ 371 372 /** @addtogroup USARTEx_Exported_Functions_Group1 373 * @{ 374 */ 375 376 /* IO operation functions *****************************************************/ 377 #if defined(USART_CR1_FIFOEN) 378 void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart); 379 void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart); 380 #endif /* USART_CR1_FIFOEN */ 381 382 /** 383 * @} 384 */ 385 386 /** @addtogroup USARTEx_Exported_Functions_Group2 387 * @{ 388 */ 389 390 /* Peripheral Control functions ***********************************************/ 391 #if defined(USART_CR2_SLVEN) 392 HAL_StatusTypeDef HAL_USARTEx_EnableSlaveMode(USART_HandleTypeDef *husart); 393 HAL_StatusTypeDef HAL_USARTEx_DisableSlaveMode(USART_HandleTypeDef *husart); 394 HAL_StatusTypeDef HAL_USARTEx_ConfigNSS(USART_HandleTypeDef *husart, uint32_t NSSConfig); 395 #endif /* USART_CR2_SLVEN */ 396 #if defined(USART_CR1_FIFOEN) 397 HAL_StatusTypeDef HAL_USARTEx_EnableFifoMode(USART_HandleTypeDef *husart); 398 HAL_StatusTypeDef HAL_USARTEx_DisableFifoMode(USART_HandleTypeDef *husart); 399 HAL_StatusTypeDef HAL_USARTEx_SetTxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); 400 HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); 401 #endif /* USART_CR1_FIFOEN */ 402 403 /** 404 * @} 405 */ 406 407 /** 408 * @} 409 */ 410 411 /** 412 * @} 413 */ 414 415 /** 416 * @} 417 */ 418 419 #ifdef __cplusplus 420 } 421 #endif 422 423 #endif /* STM32L4xx_HAL_USART_EX_H */ 424 425
