1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_UART_EX_H 21 #define STM32L4xx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 #if defined(USART_CR1_FIFOEN) 88 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 89 * @brief UART FIFO mode 90 * @{ 91 */ 92 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 93 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 94 /** 95 * @} 96 */ 97 98 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 99 * @brief UART TXFIFO threshold level 100 * @{ 101 */ 102 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 107 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 108 /** 109 * @} 110 */ 111 112 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 113 * @brief UART RXFIFO threshold level 114 * @{ 115 */ 116 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 121 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 122 /** 123 * @} 124 */ 125 126 #endif /* USART_CR1_FIFOEN */ 127 /** 128 * @} 129 */ 130 131 /* Exported macros -----------------------------------------------------------*/ 132 /* Exported functions --------------------------------------------------------*/ 133 /** @addtogroup UARTEx_Exported_Functions 134 * @{ 135 */ 136 137 /** @addtogroup UARTEx_Exported_Functions_Group1 138 * @{ 139 */ 140 141 /* Initialization and de-initialization functions ****************************/ 142 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 143 uint32_t DeassertionTime); 144 145 /** 146 * @} 147 */ 148 149 /** @addtogroup UARTEx_Exported_Functions_Group2 150 * @{ 151 */ 152 153 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 154 155 #if defined(USART_CR1_FIFOEN) 156 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 157 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 158 159 #endif /* USART_CR1_FIFOEN */ 160 /** 161 * @} 162 */ 163 164 /** @addtogroup UARTEx_Exported_Functions_Group3 165 * @{ 166 */ 167 168 /* Peripheral Control functions **********************************************/ 169 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 170 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 171 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 172 173 #if defined(USART_CR3_UCESM) 174 HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart); 175 HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart); 176 177 #endif /* USART_CR3_UCESM */ 178 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 179 180 #if defined(USART_CR1_FIFOEN) 181 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 182 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 183 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 184 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 185 #endif /* USART_CR1_FIFOEN */ 186 187 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 188 uint32_t Timeout); 189 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 190 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 191 192 193 /** 194 * @} 195 */ 196 197 /** 198 * @} 199 */ 200 201 /* Private macros ------------------------------------------------------------*/ 202 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 203 * @{ 204 */ 205 206 /** @brief Report the UART clock source. 207 * @param __HANDLE__ specifies the UART Handle. 208 * @param __CLOCKSOURCE__ output variable. 209 * @retval UART clocking source, written in __CLOCKSOURCE__. 210 */ 211 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \ 212 || defined (STM32L496xx) || defined (STM32L4A6xx) \ 213 || defined (STM32L4P5xx) || defined (STM32L4Q5xx) \ 214 || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) 215 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 216 do { \ 217 if((__HANDLE__)->Instance == USART1) \ 218 { \ 219 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 220 { \ 221 case RCC_USART1CLKSOURCE_PCLK2: \ 222 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 223 break; \ 224 case RCC_USART1CLKSOURCE_HSI: \ 225 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 226 break; \ 227 case RCC_USART1CLKSOURCE_SYSCLK: \ 228 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 229 break; \ 230 case RCC_USART1CLKSOURCE_LSE: \ 231 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 232 break; \ 233 default: \ 234 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 235 break; \ 236 } \ 237 } \ 238 else if((__HANDLE__)->Instance == USART2) \ 239 { \ 240 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 241 { \ 242 case RCC_USART2CLKSOURCE_PCLK1: \ 243 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 244 break; \ 245 case RCC_USART2CLKSOURCE_HSI: \ 246 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 247 break; \ 248 case RCC_USART2CLKSOURCE_SYSCLK: \ 249 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 250 break; \ 251 case RCC_USART2CLKSOURCE_LSE: \ 252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 253 break; \ 254 default: \ 255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 256 break; \ 257 } \ 258 } \ 259 else if((__HANDLE__)->Instance == USART3) \ 260 { \ 261 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 262 { \ 263 case RCC_USART3CLKSOURCE_PCLK1: \ 264 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 265 break; \ 266 case RCC_USART3CLKSOURCE_HSI: \ 267 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 268 break; \ 269 case RCC_USART3CLKSOURCE_SYSCLK: \ 270 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 271 break; \ 272 case RCC_USART3CLKSOURCE_LSE: \ 273 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 274 break; \ 275 default: \ 276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 277 break; \ 278 } \ 279 } \ 280 else if((__HANDLE__)->Instance == UART4) \ 281 { \ 282 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 283 { \ 284 case RCC_UART4CLKSOURCE_PCLK1: \ 285 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 286 break; \ 287 case RCC_UART4CLKSOURCE_HSI: \ 288 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 289 break; \ 290 case RCC_UART4CLKSOURCE_SYSCLK: \ 291 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 292 break; \ 293 case RCC_UART4CLKSOURCE_LSE: \ 294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 295 break; \ 296 default: \ 297 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 298 break; \ 299 } \ 300 } \ 301 else if((__HANDLE__)->Instance == UART5) \ 302 { \ 303 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 304 { \ 305 case RCC_UART5CLKSOURCE_PCLK1: \ 306 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 307 break; \ 308 case RCC_UART5CLKSOURCE_HSI: \ 309 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 310 break; \ 311 case RCC_UART5CLKSOURCE_SYSCLK: \ 312 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 313 break; \ 314 case RCC_UART5CLKSOURCE_LSE: \ 315 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 316 break; \ 317 default: \ 318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 319 break; \ 320 } \ 321 } \ 322 else if((__HANDLE__)->Instance == LPUART1) \ 323 { \ 324 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 325 { \ 326 case RCC_LPUART1CLKSOURCE_PCLK1: \ 327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 328 break; \ 329 case RCC_LPUART1CLKSOURCE_HSI: \ 330 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 331 break; \ 332 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 334 break; \ 335 case RCC_LPUART1CLKSOURCE_LSE: \ 336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 337 break; \ 338 default: \ 339 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 340 break; \ 341 } \ 342 } \ 343 else \ 344 { \ 345 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 346 } \ 347 } while(0U) 348 #elif defined (STM32L412xx) || defined (STM32L422xx) \ 349 || defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) 350 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 351 do { \ 352 if((__HANDLE__)->Instance == USART1) \ 353 { \ 354 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 355 { \ 356 case RCC_USART1CLKSOURCE_PCLK2: \ 357 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 358 break; \ 359 case RCC_USART1CLKSOURCE_HSI: \ 360 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 361 break; \ 362 case RCC_USART1CLKSOURCE_SYSCLK: \ 363 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 364 break; \ 365 case RCC_USART1CLKSOURCE_LSE: \ 366 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 367 break; \ 368 default: \ 369 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 370 break; \ 371 } \ 372 } \ 373 else if((__HANDLE__)->Instance == USART2) \ 374 { \ 375 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 376 { \ 377 case RCC_USART2CLKSOURCE_PCLK1: \ 378 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 379 break; \ 380 case RCC_USART2CLKSOURCE_HSI: \ 381 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 382 break; \ 383 case RCC_USART2CLKSOURCE_SYSCLK: \ 384 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 385 break; \ 386 case RCC_USART2CLKSOURCE_LSE: \ 387 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 388 break; \ 389 default: \ 390 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 391 break; \ 392 } \ 393 } \ 394 else if((__HANDLE__)->Instance == USART3) \ 395 { \ 396 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 397 { \ 398 case RCC_USART3CLKSOURCE_PCLK1: \ 399 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 400 break; \ 401 case RCC_USART3CLKSOURCE_HSI: \ 402 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 403 break; \ 404 case RCC_USART3CLKSOURCE_SYSCLK: \ 405 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 406 break; \ 407 case RCC_USART3CLKSOURCE_LSE: \ 408 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 409 break; \ 410 default: \ 411 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 412 break; \ 413 } \ 414 } \ 415 else if((__HANDLE__)->Instance == LPUART1) \ 416 { \ 417 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 418 { \ 419 case RCC_LPUART1CLKSOURCE_PCLK1: \ 420 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 421 break; \ 422 case RCC_LPUART1CLKSOURCE_HSI: \ 423 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 424 break; \ 425 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 426 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 427 break; \ 428 case RCC_LPUART1CLKSOURCE_LSE: \ 429 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 430 break; \ 431 default: \ 432 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 433 break; \ 434 } \ 435 } \ 436 else \ 437 { \ 438 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 439 } \ 440 } while(0U) 441 #elif defined (STM32L432xx) || defined (STM32L442xx) 442 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 443 do { \ 444 if((__HANDLE__)->Instance == USART1) \ 445 { \ 446 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 447 { \ 448 case RCC_USART1CLKSOURCE_PCLK2: \ 449 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 450 break; \ 451 case RCC_USART1CLKSOURCE_HSI: \ 452 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 453 break; \ 454 case RCC_USART1CLKSOURCE_SYSCLK: \ 455 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 456 break; \ 457 case RCC_USART1CLKSOURCE_LSE: \ 458 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 459 break; \ 460 default: \ 461 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 462 break; \ 463 } \ 464 } \ 465 else if((__HANDLE__)->Instance == USART2) \ 466 { \ 467 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 468 { \ 469 case RCC_USART2CLKSOURCE_PCLK1: \ 470 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 471 break; \ 472 case RCC_USART2CLKSOURCE_HSI: \ 473 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 474 break; \ 475 case RCC_USART2CLKSOURCE_SYSCLK: \ 476 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 477 break; \ 478 case RCC_USART2CLKSOURCE_LSE: \ 479 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 480 break; \ 481 default: \ 482 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 483 break; \ 484 } \ 485 } \ 486 else if((__HANDLE__)->Instance == LPUART1) \ 487 { \ 488 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 489 { \ 490 case RCC_LPUART1CLKSOURCE_PCLK1: \ 491 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 492 break; \ 493 case RCC_LPUART1CLKSOURCE_HSI: \ 494 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 495 break; \ 496 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 497 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 498 break; \ 499 case RCC_LPUART1CLKSOURCE_LSE: \ 500 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 501 break; \ 502 default: \ 503 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 504 break; \ 505 } \ 506 } \ 507 else \ 508 { \ 509 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 510 } \ 511 } while(0U) 512 #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 513 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 514 do { \ 515 if((__HANDLE__)->Instance == USART1) \ 516 { \ 517 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 518 { \ 519 case RCC_USART1CLKSOURCE_PCLK2: \ 520 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 521 break; \ 522 case RCC_USART1CLKSOURCE_HSI: \ 523 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 524 break; \ 525 case RCC_USART1CLKSOURCE_SYSCLK: \ 526 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 527 break; \ 528 case RCC_USART1CLKSOURCE_LSE: \ 529 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 530 break; \ 531 default: \ 532 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 533 break; \ 534 } \ 535 } \ 536 else if((__HANDLE__)->Instance == USART2) \ 537 { \ 538 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 539 { \ 540 case RCC_USART2CLKSOURCE_PCLK1: \ 541 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 542 break; \ 543 case RCC_USART2CLKSOURCE_HSI: \ 544 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 545 break; \ 546 case RCC_USART2CLKSOURCE_SYSCLK: \ 547 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 548 break; \ 549 case RCC_USART2CLKSOURCE_LSE: \ 550 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 551 break; \ 552 default: \ 553 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 554 break; \ 555 } \ 556 } \ 557 else if((__HANDLE__)->Instance == USART3) \ 558 { \ 559 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 560 { \ 561 case RCC_USART3CLKSOURCE_PCLK1: \ 562 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 563 break; \ 564 case RCC_USART3CLKSOURCE_HSI: \ 565 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 566 break; \ 567 case RCC_USART3CLKSOURCE_SYSCLK: \ 568 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 569 break; \ 570 case RCC_USART3CLKSOURCE_LSE: \ 571 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 572 break; \ 573 default: \ 574 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 575 break; \ 576 } \ 577 } \ 578 else if((__HANDLE__)->Instance == UART4) \ 579 { \ 580 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 581 { \ 582 case RCC_UART4CLKSOURCE_PCLK1: \ 583 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 584 break; \ 585 case RCC_UART4CLKSOURCE_HSI: \ 586 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 587 break; \ 588 case RCC_UART4CLKSOURCE_SYSCLK: \ 589 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 590 break; \ 591 case RCC_UART4CLKSOURCE_LSE: \ 592 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 593 break; \ 594 default: \ 595 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 596 break; \ 597 } \ 598 } \ 599 else if((__HANDLE__)->Instance == LPUART1) \ 600 { \ 601 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 602 { \ 603 case RCC_LPUART1CLKSOURCE_PCLK1: \ 604 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 605 break; \ 606 case RCC_LPUART1CLKSOURCE_HSI: \ 607 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 608 break; \ 609 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 610 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 611 break; \ 612 case RCC_LPUART1CLKSOURCE_LSE: \ 613 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 614 break; \ 615 default: \ 616 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 617 break; \ 618 } \ 619 } \ 620 else \ 621 { \ 622 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 623 } \ 624 } while(0U) 625 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || 626 * STM32L496xx || STM32L4A6xx || 627 * STM32L4P5xx || STM32L4Q5xx || 628 * STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx 629 */ 630 631 /** @brief Report the UART mask to apply to retrieve the received data 632 * according to the word length and to the parity bits activation. 633 * @note If PCE = 1, the parity bit is not included in the data extracted 634 * by the reception API(). 635 * This masking operation is not carried out in the case of 636 * DMA transfers. 637 * @param __HANDLE__ specifies the UART Handle. 638 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 639 */ 640 #define UART_MASK_COMPUTATION(__HANDLE__) \ 641 do { \ 642 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 643 { \ 644 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 645 { \ 646 (__HANDLE__)->Mask = 0x01FFU ; \ 647 } \ 648 else \ 649 { \ 650 (__HANDLE__)->Mask = 0x00FFU ; \ 651 } \ 652 } \ 653 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 654 { \ 655 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 656 { \ 657 (__HANDLE__)->Mask = 0x00FFU ; \ 658 } \ 659 else \ 660 { \ 661 (__HANDLE__)->Mask = 0x007FU ; \ 662 } \ 663 } \ 664 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 665 { \ 666 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 667 { \ 668 (__HANDLE__)->Mask = 0x007FU ; \ 669 } \ 670 else \ 671 { \ 672 (__HANDLE__)->Mask = 0x003FU ; \ 673 } \ 674 } \ 675 else \ 676 { \ 677 (__HANDLE__)->Mask = 0x0000U; \ 678 } \ 679 } while(0U) 680 681 /** 682 * @brief Ensure that UART frame length is valid. 683 * @param __LENGTH__ UART frame length. 684 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 685 */ 686 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 687 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 688 ((__LENGTH__) == UART_WORDLENGTH_9B)) 689 690 /** 691 * @brief Ensure that UART wake-up address length is valid. 692 * @param __ADDRESS__ UART wake-up address length. 693 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 694 */ 695 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 696 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 697 698 #if defined(USART_CR1_FIFOEN) 699 /** 700 * @brief Ensure that UART TXFIFO threshold level is valid. 701 * @param __THRESHOLD__ UART TXFIFO threshold level. 702 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 703 */ 704 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 705 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 706 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 707 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 708 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 709 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 710 711 /** 712 * @brief Ensure that UART RXFIFO threshold level is valid. 713 * @param __THRESHOLD__ UART RXFIFO threshold level. 714 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 715 */ 716 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 717 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 718 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 719 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 720 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 721 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 722 723 #endif /* USART_CR1_FIFOEN */ 724 /** 725 * @} 726 */ 727 728 /* Private functions ---------------------------------------------------------*/ 729 730 /** 731 * @} 732 */ 733 734 /** 735 * @} 736 */ 737 738 #ifdef __cplusplus 739 } 740 #endif 741 742 #endif /* STM32L4xx_HAL_UART_EX_H */ 743 744
