1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_UART_H 21 #define STM32L4xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock 54 (divided by a prescaler if applicable) 55 UART: 56 ===== 57 - If oversampling is 16 or in LIN mode, 58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 59 - If oversampling is 8, 60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 61 ((huart->Init.BaudRate)))[15:4] 62 Baud Rate Register[3] = 0 63 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 64 ((huart->Init.BaudRate)))[3:0]) >> 1 65 where uart_ker_ck_pres is the UART input clock 66 (divided by a prescaler if applicable) */ 67 68 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 69 This parameter can be a value of @ref UARTEx_Word_Length. */ 70 71 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 72 This parameter can be a value of @ref UART_Stop_Bits. */ 73 74 uint32_t Parity; /*!< Specifies the parity mode. 75 This parameter can be a value of @ref UART_Parity 76 @note When parity is enabled, the computed parity is inserted 77 at the MSB position of the transmitted data (9th bit when 78 the word length is set to 9 data bits; 8th bit when the 79 word length is set to 8 data bits). */ 80 81 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 82 This parameter can be a value of @ref UART_Mode. */ 83 84 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 85 or disabled. 86 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 87 88 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 89 to achieve higher speed (up to f_PCLK/8). 90 This parameter can be a value of @ref UART_Over_Sampling. */ 91 92 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 93 Selecting the single sample method increases the receiver tolerance to clock 94 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 95 96 #if defined(USART_PRESC_PRESCALER) 97 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 98 This parameter can be a value of @ref UART_ClockPrescaler. */ 99 #endif /* USART_PRESC_PRESCALER */ 100 101 } UART_InitTypeDef; 102 103 /** 104 * @brief UART Advanced Features initialization structure definition 105 */ 106 typedef struct 107 { 108 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 109 Advanced Features may be initialized at the same time . 110 This parameter can be a value of 111 @ref UART_Advanced_Features_Initialization_Type. */ 112 113 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 114 This parameter can be a value of @ref UART_Tx_Inv. */ 115 116 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 117 This parameter can be a value of @ref UART_Rx_Inv. */ 118 119 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 120 vs negative/inverted logic). 121 This parameter can be a value of @ref UART_Data_Inv. */ 122 123 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 124 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 125 126 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 127 This parameter can be a value of @ref UART_Overrun_Disable. */ 128 129 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 130 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 131 132 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 133 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 134 135 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 136 detection is carried out. 137 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 138 139 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 140 This parameter can be a value of @ref UART_MSB_First. */ 141 } UART_AdvFeatureInitTypeDef; 142 143 /** 144 * @brief HAL UART State definition 145 * @note HAL UART State value is a combination of 2 different substates: 146 * gState and RxState (see @ref UART_State_Definition). 147 * - gState contains UART state information related to global Handle management 148 * and also information related to Tx operations. 149 * gState value coding follow below described bitmap : 150 * b7-b6 Error information 151 * 00 : No Error 152 * 01 : (Not Used) 153 * 10 : Timeout 154 * 11 : Error 155 * b5 Peripheral initialization status 156 * 0 : Reset (Peripheral not initialized) 157 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 158 * b4-b3 (not used) 159 * xx : Should be set to 00 160 * b2 Intrinsic process state 161 * 0 : Ready 162 * 1 : Busy (Peripheral busy with some configuration or internal operations) 163 * b1 (not used) 164 * x : Should be set to 0 165 * b0 Tx state 166 * 0 : Ready (no Tx operation ongoing) 167 * 1 : Busy (Tx operation ongoing) 168 * - RxState contains information related to Rx operations. 169 * RxState value coding follow below described bitmap : 170 * b7-b6 (not used) 171 * xx : Should be set to 00 172 * b5 Peripheral initialization status 173 * 0 : Reset (Peripheral not initialized) 174 * 1 : Init done (Peripheral initialized) 175 * b4-b2 (not used) 176 * xxx : Should be set to 000 177 * b1 Rx state 178 * 0 : Ready (no Rx operation ongoing) 179 * 1 : Busy (Rx operation ongoing) 180 * b0 (not used) 181 * x : Should be set to 0. 182 */ 183 typedef uint32_t HAL_UART_StateTypeDef; 184 185 /** 186 * @brief UART clock sources definition 187 */ 188 typedef enum 189 { 190 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 191 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 192 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 193 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 194 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 195 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 196 } UART_ClockSourceTypeDef; 197 198 /** 199 * @brief HAL UART Reception type definition 200 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 201 * It is expected to admit following values : 202 * HAL_UART_RECEPTION_STANDARD = 0x00U, 203 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 204 * HAL_UART_RECEPTION_TORTO = 0x02U, 205 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 206 */ 207 typedef uint32_t HAL_UART_RxTypeTypeDef; 208 209 /** 210 * @brief UART handle Structure definition 211 */ 212 typedef struct __UART_HandleTypeDef 213 { 214 USART_TypeDef *Instance; /*!< UART registers base address */ 215 216 UART_InitTypeDef Init; /*!< UART communication parameters */ 217 218 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 219 220 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 221 222 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 223 224 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 225 226 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 227 228 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 229 230 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 231 232 uint16_t Mask; /*!< UART Rx RDR register mask */ 233 234 #if defined(USART_CR1_FIFOEN) 235 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 236 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 237 238 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 239 240 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 241 242 #endif /*USART_CR1_FIFOEN */ 243 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 244 245 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 246 247 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 248 249 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 250 251 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 252 253 HAL_LockTypeDef Lock; /*!< Locking object */ 254 255 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 256 and also related to Tx operations. This parameter 257 can be a value of @ref HAL_UART_StateTypeDef */ 258 259 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 260 parameter can be a value of @ref HAL_UART_StateTypeDef */ 261 262 __IO uint32_t ErrorCode; /*!< UART Error code */ 263 264 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 265 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 266 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 267 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 268 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 269 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 270 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 271 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 272 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 273 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 274 #if defined(USART_CR1_FIFOEN) 275 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 276 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 277 #endif /* USART_CR1_FIFOEN */ 278 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 279 280 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 281 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 282 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 283 284 } UART_HandleTypeDef; 285 286 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 287 /** 288 * @brief HAL UART Callback ID enumeration definition 289 */ 290 typedef enum 291 { 292 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 293 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 294 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 295 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 296 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 297 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 298 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 299 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 300 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 301 #if defined(USART_CR1_FIFOEN) 302 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 303 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 304 #endif /* USART_CR1_FIFOEN */ 305 306 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 307 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 308 309 } HAL_UART_CallbackIDTypeDef; 310 311 /** 312 * @brief HAL UART Callback pointer definition 313 */ 314 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 315 typedef void (*pUART_RxEventCallbackTypeDef) 316 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 317 318 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 319 320 /** 321 * @} 322 */ 323 324 /* Exported constants --------------------------------------------------------*/ 325 /** @defgroup UART_Exported_Constants UART Exported Constants 326 * @{ 327 */ 328 329 /** @defgroup UART_State_Definition UART State Code Definition 330 * @{ 331 */ 332 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 333 Value is allowed for gState and RxState */ 334 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 335 Value is allowed for gState and RxState */ 336 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 337 Value is allowed for gState only */ 338 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 339 Value is allowed for gState only */ 340 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 341 Value is allowed for RxState only */ 342 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 343 Not to be used for neither gState nor RxState.Value is result 344 of combination (Or) between gState and RxState values */ 345 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 346 Value is allowed for gState only */ 347 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 348 Value is allowed for gState only */ 349 /** 350 * @} 351 */ 352 353 /** @defgroup UART_Error_Definition UART Error Definition 354 * @{ 355 */ 356 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 357 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 358 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 359 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 360 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 361 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 362 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 363 364 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 365 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 366 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 367 /** 368 * @} 369 */ 370 371 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 372 * @{ 373 */ 374 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 375 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 376 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 377 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 378 /** 379 * @} 380 */ 381 382 /** @defgroup UART_Parity UART Parity 383 * @{ 384 */ 385 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 386 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 387 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 388 /** 389 * @} 390 */ 391 392 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 393 * @{ 394 */ 395 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 396 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 397 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 398 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 399 /** 400 * @} 401 */ 402 403 /** @defgroup UART_Mode UART Transfer Mode 404 * @{ 405 */ 406 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 407 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 408 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 409 /** 410 * @} 411 */ 412 413 /** @defgroup UART_State UART State 414 * @{ 415 */ 416 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 417 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 418 /** 419 * @} 420 */ 421 422 /** @defgroup UART_Over_Sampling UART Over Sampling 423 * @{ 424 */ 425 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 426 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 427 /** 428 * @} 429 */ 430 431 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 432 * @{ 433 */ 434 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 435 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 436 /** 437 * @} 438 */ 439 440 #if defined(USART_PRESC_PRESCALER) 441 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 442 * @{ 443 */ 444 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 445 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 446 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 447 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 448 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 449 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 450 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 451 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 452 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 453 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 454 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 455 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 456 /** 457 * @} 458 */ 459 460 #endif /* USART_PRESC_PRESCALER */ 461 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 462 * @{ 463 */ 464 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 465 on start bit */ 466 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 467 on falling edge */ 468 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 469 on 0x7F frame detection */ 470 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 471 on 0x55 frame detection */ 472 /** 473 * @} 474 */ 475 476 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 477 * @{ 478 */ 479 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 480 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 481 /** 482 * @} 483 */ 484 485 /** @defgroup UART_LIN UART Local Interconnection Network mode 486 * @{ 487 */ 488 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 489 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 490 /** 491 * @} 492 */ 493 494 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 495 * @{ 496 */ 497 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 498 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 499 /** 500 * @} 501 */ 502 503 /** @defgroup UART_DMA_Tx UART DMA Tx 504 * @{ 505 */ 506 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 507 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 508 /** 509 * @} 510 */ 511 512 /** @defgroup UART_DMA_Rx UART DMA Rx 513 * @{ 514 */ 515 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 516 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 517 /** 518 * @} 519 */ 520 521 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 522 * @{ 523 */ 524 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 525 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 526 /** 527 * @} 528 */ 529 530 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 531 * @{ 532 */ 533 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 534 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 535 /** 536 * @} 537 */ 538 539 /** @defgroup UART_Request_Parameters UART Request Parameters 540 * @{ 541 */ 542 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 543 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 544 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 545 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 546 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 547 /** 548 * @} 549 */ 550 551 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 552 * @{ 553 */ 554 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 555 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 556 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 557 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 558 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 559 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 560 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 561 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 562 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 563 /** 564 * @} 565 */ 566 567 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 568 * @{ 569 */ 570 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 571 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 572 /** 573 * @} 574 */ 575 576 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 577 * @{ 578 */ 579 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 580 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 581 /** 582 * @} 583 */ 584 585 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 586 * @{ 587 */ 588 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 589 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 590 /** 591 * @} 592 */ 593 594 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 595 * @{ 596 */ 597 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 598 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 599 /** 600 * @} 601 */ 602 603 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 604 * @{ 605 */ 606 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 607 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 608 /** 609 * @} 610 */ 611 612 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 613 * @{ 614 */ 615 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 616 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 617 /** 618 * @} 619 */ 620 621 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 622 * @{ 623 */ 624 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 625 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 626 /** 627 * @} 628 */ 629 630 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 631 * @{ 632 */ 633 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 634 first disable */ 635 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 636 first enable */ 637 /** 638 * @} 639 */ 640 641 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 642 * @{ 643 */ 644 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 645 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 646 /** 647 * @} 648 */ 649 650 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 651 * @{ 652 */ 653 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 654 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 655 /** 656 * @} 657 */ 658 659 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 660 * @{ 661 */ 662 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 663 /** 664 * @} 665 */ 666 667 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 668 * @{ 669 */ 670 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 671 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 672 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 673 not empty or RXFIFO is not empty */ 674 /** 675 * @} 676 */ 677 678 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 679 * @{ 680 */ 681 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 682 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 683 /** 684 * @} 685 */ 686 687 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 688 * @{ 689 */ 690 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 691 position in CR1 register */ 692 /** 693 * @} 694 */ 695 696 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 697 * @{ 698 */ 699 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 700 position in CR1 register */ 701 /** 702 * @} 703 */ 704 705 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 706 * @{ 707 */ 708 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 709 /** 710 * @} 711 */ 712 713 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 714 * @{ 715 */ 716 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 717 /** 718 * @} 719 */ 720 721 /** @defgroup UART_Flags UART Status Flags 722 * Elements values convention: 0xXXXX 723 * - 0xXXXX : Flag mask in the ISR register 724 * @{ 725 */ 726 #if defined(USART_CR1_FIFOEN) 727 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 728 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 729 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 730 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 731 #endif /* USART_CR1_FIFOEN */ 732 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 733 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 734 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 735 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 736 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 737 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 738 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 739 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 740 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 741 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 742 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 743 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 744 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 745 #if defined(USART_CR1_FIFOEN) 746 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 747 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 748 #else 749 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 750 #endif /* USART_CR1_FIFOEN */ 751 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 752 #if defined(USART_CR1_FIFOEN) 753 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 754 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 755 #else 756 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 757 #endif /* USART_CR1_FIFOEN */ 758 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 759 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 760 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 761 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 762 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 763 /** 764 * @} 765 */ 766 767 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 768 * Elements values convention: 000ZZZZZ0XXYYYYYb 769 * - YYYYY : Interrupt source position in the XX register (5bits) 770 * - XX : Interrupt source register (2bits) 771 * - 01: CR1 register 772 * - 10: CR2 register 773 * - 11: CR3 register 774 * - ZZZZZ : Flag position in the ISR register(5bits) 775 * Elements values convention: 000000000XXYYYYYb 776 * - YYYYY : Interrupt source position in the XX register (5bits) 777 * - XX : Interrupt source register (2bits) 778 * - 01: CR1 register 779 * - 10: CR2 register 780 * - 11: CR3 register 781 * Elements values convention: 0000ZZZZ00000000b 782 * - ZZZZ : Flag position in the ISR register(4bits) 783 * @{ 784 */ 785 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 786 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 787 #if defined(USART_CR1_FIFOEN) 788 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 789 #endif /* USART_CR1_FIFOEN */ 790 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 791 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 792 #if defined(USART_CR1_FIFOEN) 793 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 794 #endif /* USART_CR1_FIFOEN */ 795 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 796 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 797 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 798 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 799 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 800 #if defined(USART_CR1_FIFOEN) 801 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 802 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 803 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 804 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 805 #endif /* USART_CR1_FIFOEN */ 806 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 807 808 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 809 810 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 811 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 812 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 813 /** 814 * @} 815 */ 816 817 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 818 * @{ 819 */ 820 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 821 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 822 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 823 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 824 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 825 #if defined(USART_CR1_FIFOEN) 826 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 827 #endif /* USART_CR1_FIFOEN */ 828 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 829 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 830 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 831 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 832 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 833 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 834 /** 835 * @} 836 */ 837 838 /** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values 839 * @{ 840 */ 841 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 842 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 843 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 844 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 845 /** 846 * @} 847 */ 848 849 /** 850 * @} 851 */ 852 853 /* Exported macros -----------------------------------------------------------*/ 854 /** @defgroup UART_Exported_Macros UART Exported Macros 855 * @{ 856 */ 857 858 /** @brief Reset UART handle states. 859 * @param __HANDLE__ UART handle. 860 * @retval None 861 */ 862 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 863 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 864 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 865 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 866 (__HANDLE__)->MspInitCallback = NULL; \ 867 (__HANDLE__)->MspDeInitCallback = NULL; \ 868 } while(0U) 869 #else 870 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 871 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 872 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 873 } while(0U) 874 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 875 876 /** @brief Flush the UART Data registers. 877 * @param __HANDLE__ specifies the UART Handle. 878 * @retval None 879 */ 880 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 881 do{ \ 882 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 883 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 884 } while(0U) 885 886 /** @brief Clear the specified UART pending flag. 887 * @param __HANDLE__ specifies the UART Handle. 888 * @param __FLAG__ specifies the flag to check. 889 * This parameter can be any combination of the following values: 890 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 891 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 892 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 893 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 894 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 895 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 896 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 897 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 898 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 899 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 900 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 901 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 902 * @retval None 903 */ 904 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 905 906 /** @brief Clear the UART PE pending flag. 907 * @param __HANDLE__ specifies the UART Handle. 908 * @retval None 909 */ 910 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 911 912 /** @brief Clear the UART FE pending flag. 913 * @param __HANDLE__ specifies the UART Handle. 914 * @retval None 915 */ 916 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 917 918 /** @brief Clear the UART NE pending flag. 919 * @param __HANDLE__ specifies the UART Handle. 920 * @retval None 921 */ 922 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 923 924 /** @brief Clear the UART ORE pending flag. 925 * @param __HANDLE__ specifies the UART Handle. 926 * @retval None 927 */ 928 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 929 930 /** @brief Clear the UART IDLE pending flag. 931 * @param __HANDLE__ specifies the UART Handle. 932 * @retval None 933 */ 934 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 935 936 #if defined(USART_CR1_FIFOEN) 937 /** @brief Clear the UART TX FIFO empty clear flag. 938 * @param __HANDLE__ specifies the UART Handle. 939 * @retval None 940 */ 941 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 942 #endif /* USART_CR1_FIFOEN */ 943 944 /** @brief Check whether the specified UART flag is set or not. 945 * @param __HANDLE__ specifies the UART Handle. 946 * @param __FLAG__ specifies the flag to check. 947 * This parameter can be one of the following values: 948 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 949 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 950 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 951 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 952 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 953 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 954 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 955 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 956 * @arg @ref UART_FLAG_SBKF Send Break flag 957 * @arg @ref UART_FLAG_CMF Character match flag 958 * @arg @ref UART_FLAG_BUSY Busy flag 959 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 960 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 961 * @arg @ref UART_FLAG_CTS CTS Change flag 962 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 963 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 964 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 965 * @arg @ref UART_FLAG_TC Transmission Complete flag 966 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 967 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 968 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 969 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 970 * @arg @ref UART_FLAG_ORE Overrun Error flag 971 * @arg @ref UART_FLAG_NE Noise Error flag 972 * @arg @ref UART_FLAG_FE Framing Error flag 973 * @arg @ref UART_FLAG_PE Parity Error flag 974 * @retval The new state of __FLAG__ (TRUE or FALSE). 975 */ 976 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 977 978 /** @brief Enable the specified UART interrupt. 979 * @param __HANDLE__ specifies the UART Handle. 980 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 981 * This parameter can be one of the following values: 982 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 983 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 984 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 985 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 986 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 987 * @arg @ref UART_IT_CM Character match interrupt 988 * @arg @ref UART_IT_CTS CTS change interrupt 989 * @arg @ref UART_IT_LBD LIN Break detection interrupt 990 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 991 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 992 * @arg @ref UART_IT_TC Transmission complete interrupt 993 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 994 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 995 * @arg @ref UART_IT_RTO Receive Timeout interrupt 996 * @arg @ref UART_IT_IDLE Idle line detection interrupt 997 * @arg @ref UART_IT_PE Parity Error interrupt 998 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 999 * @retval None 1000 */ 1001 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1002 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1003 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 1004 ((__INTERRUPT__) & UART_IT_MASK))): \ 1005 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1006 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1007 ((__INTERRUPT__) & UART_IT_MASK))): \ 1008 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1009 ((__INTERRUPT__) & UART_IT_MASK)))) 1010 1011 /** @brief Disable the specified UART interrupt. 1012 * @param __HANDLE__ specifies the UART Handle. 1013 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1014 * This parameter can be one of the following values: 1015 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1016 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1017 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1018 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1019 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1020 * @arg @ref UART_IT_CM Character match interrupt 1021 * @arg @ref UART_IT_CTS CTS change interrupt 1022 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1023 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1024 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1025 * @arg @ref UART_IT_TC Transmission complete interrupt 1026 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1027 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1028 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1029 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1030 * @arg @ref UART_IT_PE Parity Error interrupt 1031 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1032 * @retval None 1033 */ 1034 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1035 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1036 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1037 ((__INTERRUPT__) & UART_IT_MASK))): \ 1038 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1039 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1040 ((__INTERRUPT__) & UART_IT_MASK))): \ 1041 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1042 ((__INTERRUPT__) & UART_IT_MASK)))) 1043 1044 /** @brief Check whether the specified UART interrupt has occurred or not. 1045 * @param __HANDLE__ specifies the UART Handle. 1046 * @param __INTERRUPT__ specifies the UART interrupt to check. 1047 * This parameter can be one of the following values: 1048 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1049 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1050 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1051 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1052 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1053 * @arg @ref UART_IT_CM Character match interrupt 1054 * @arg @ref UART_IT_CTS CTS change interrupt 1055 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1056 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1057 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1058 * @arg @ref UART_IT_TC Transmission complete interrupt 1059 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1060 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1061 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1062 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1063 * @arg @ref UART_IT_PE Parity Error interrupt 1064 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1065 * @retval The new state of __INTERRUPT__ (SET or RESET). 1066 */ 1067 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1068 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1069 1070 /** @brief Check whether the specified UART interrupt source is enabled or not. 1071 * @param __HANDLE__ specifies the UART Handle. 1072 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1073 * This parameter can be one of the following values: 1074 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1075 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1076 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1077 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1078 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1079 * @arg @ref UART_IT_CM Character match interrupt 1080 * @arg @ref UART_IT_CTS CTS change interrupt 1081 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1082 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1083 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1084 * @arg @ref UART_IT_TC Transmission complete interrupt 1085 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1086 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1087 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1088 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1089 * @arg @ref UART_IT_PE Parity Error interrupt 1090 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1091 * @retval The new state of __INTERRUPT__ (SET or RESET). 1092 */ 1093 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1094 (__HANDLE__)->Instance->CR1 : \ 1095 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1096 (__HANDLE__)->Instance->CR2 : \ 1097 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1098 (((uint16_t)(__INTERRUPT__)) &\ 1099 UART_IT_MASK))) != RESET) ? SET : RESET) 1100 1101 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1102 * @param __HANDLE__ specifies the UART Handle. 1103 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1104 * to clear the corresponding interrupt 1105 * This parameter can be one of the following values: 1106 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1107 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1108 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1109 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1110 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1111 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1112 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1113 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1114 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1115 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1116 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1117 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1118 * @retval None 1119 */ 1120 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1121 1122 /** @brief Set a specific UART request flag. 1123 * @param __HANDLE__ specifies the UART Handle. 1124 * @param __REQ__ specifies the request flag to set 1125 * This parameter can be one of the following values: 1126 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1127 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1128 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1129 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1130 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1131 * @retval None 1132 */ 1133 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1134 1135 /** @brief Enable the UART one bit sample method. 1136 * @param __HANDLE__ specifies the UART Handle. 1137 * @retval None 1138 */ 1139 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1140 1141 /** @brief Disable the UART one bit sample method. 1142 * @param __HANDLE__ specifies the UART Handle. 1143 * @retval None 1144 */ 1145 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1146 1147 /** @brief Enable UART. 1148 * @param __HANDLE__ specifies the UART Handle. 1149 * @retval None 1150 */ 1151 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1152 1153 /** @brief Disable UART. 1154 * @param __HANDLE__ specifies the UART Handle. 1155 * @retval None 1156 */ 1157 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1158 1159 /** @brief Enable CTS flow control. 1160 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1161 * without need to call HAL_UART_Init() function. 1162 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1163 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1164 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1165 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1166 * - macro could only be called when corresponding UART instance is disabled 1167 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1168 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1169 * @param __HANDLE__ specifies the UART Handle. 1170 * @retval None 1171 */ 1172 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1173 do{ \ 1174 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1175 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1176 } while(0U) 1177 1178 /** @brief Disable CTS flow control. 1179 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1180 * without need to call HAL_UART_Init() function. 1181 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1182 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1183 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1184 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1185 * - macro could only be called when corresponding UART instance is disabled 1186 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1187 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1188 * @param __HANDLE__ specifies the UART Handle. 1189 * @retval None 1190 */ 1191 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1192 do{ \ 1193 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1194 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1195 } while(0U) 1196 1197 /** @brief Enable RTS flow control. 1198 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1199 * without need to call HAL_UART_Init() function. 1200 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1201 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1202 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1203 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1204 * - macro could only be called when corresponding UART instance is disabled 1205 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1206 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1207 * @param __HANDLE__ specifies the UART Handle. 1208 * @retval None 1209 */ 1210 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1211 do{ \ 1212 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1213 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1214 } while(0U) 1215 1216 /** @brief Disable RTS flow control. 1217 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1218 * without need to call HAL_UART_Init() function. 1219 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1220 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1221 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1222 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1223 * - macro could only be called when corresponding UART instance is disabled 1224 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1225 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1226 * @param __HANDLE__ specifies the UART Handle. 1227 * @retval None 1228 */ 1229 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1230 do{ \ 1231 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1232 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1233 } while(0U) 1234 /** 1235 * @} 1236 */ 1237 1238 /* Private macros --------------------------------------------------------*/ 1239 /** @defgroup UART_Private_Macros UART Private Macros 1240 * @{ 1241 */ 1242 #if defined(USART_PRESC_PRESCALER) 1243 /** @brief Get UART clok division factor from clock prescaler value. 1244 * @param __CLOCKPRESCALER__ UART prescaler value. 1245 * @retval UART clock division factor 1246 */ 1247 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1248 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1249 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1250 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1251 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1252 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1253 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1254 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1255 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1256 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1257 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1258 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1259 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1260 1261 /** @brief BRR division operation to set BRR register with LPUART. 1262 * @param __PCLK__ LPUART clock. 1263 * @param __BAUD__ Baud rate set by the user. 1264 * @param __CLOCKPRESCALER__ UART prescaler value. 1265 * @retval Division result 1266 */ 1267 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1268 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1269 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1270 ) 1271 1272 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1273 * @param __PCLK__ UART clock. 1274 * @param __BAUD__ Baud rate set by the user. 1275 * @param __CLOCKPRESCALER__ UART prescaler value. 1276 * @retval Division result 1277 */ 1278 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1279 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1280 1281 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1282 * @param __PCLK__ UART clock. 1283 * @param __BAUD__ Baud rate set by the user. 1284 * @param __CLOCKPRESCALER__ UART prescaler value. 1285 * @retval Division result 1286 */ 1287 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1288 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1289 #else 1290 1291 /** @brief BRR division operation to set BRR register with LPUART. 1292 * @param __PCLK__ LPUART clock. 1293 * @param __BAUD__ Baud rate set by the user. 1294 * @retval Division result 1295 */ 1296 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1297 1298 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1299 * @param __PCLK__ UART clock. 1300 * @param __BAUD__ Baud rate set by the user. 1301 * @retval Division result 1302 */ 1303 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1304 1305 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1306 * @param __PCLK__ UART clock. 1307 * @param __BAUD__ Baud rate set by the user. 1308 * @retval Division result 1309 */ 1310 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1311 #endif /* USART_PRESC_PRESCALER */ 1312 1313 /** @brief Check whether or not UART instance is Low Power UART. 1314 * @param __HANDLE__ specifies the UART Handle. 1315 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1316 */ 1317 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1318 1319 /** @brief Check UART Baud rate. 1320 * @param __BAUDRATE__ Baudrate specified by the user. 1321 * The maximum Baud Rate is derived from the maximum clock on L4 1322 * divided by the smallest oversampling used on the USART (i.e. 8) 1323 * (i.e. 120 MHz on STM32L4Rx/L4Sx, 80 Mhz otherwise) 1324 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1325 */ 1326 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 1327 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U) 1328 #else 1329 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U) 1330 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 1331 1332 /** @brief Check UART assertion time. 1333 * @param __TIME__ 5-bit value assertion time. 1334 * @retval Test result (TRUE or FALSE). 1335 */ 1336 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1337 1338 /** @brief Check UART deassertion time. 1339 * @param __TIME__ 5-bit value deassertion time. 1340 * @retval Test result (TRUE or FALSE). 1341 */ 1342 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1343 1344 /** 1345 * @brief Ensure that UART frame number of stop bits is valid. 1346 * @param __STOPBITS__ UART frame number of stop bits. 1347 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1348 */ 1349 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1350 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1351 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1352 ((__STOPBITS__) == UART_STOPBITS_2)) 1353 1354 /** 1355 * @brief Ensure that LPUART frame number of stop bits is valid. 1356 * @param __STOPBITS__ LPUART frame number of stop bits. 1357 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1358 */ 1359 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1360 ((__STOPBITS__) == UART_STOPBITS_2)) 1361 1362 /** 1363 * @brief Ensure that UART frame parity is valid. 1364 * @param __PARITY__ UART frame parity. 1365 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1366 */ 1367 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1368 ((__PARITY__) == UART_PARITY_EVEN) || \ 1369 ((__PARITY__) == UART_PARITY_ODD)) 1370 1371 /** 1372 * @brief Ensure that UART hardware flow control is valid. 1373 * @param __CONTROL__ UART hardware flow control. 1374 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1375 */ 1376 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1377 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1378 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1379 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1380 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1381 1382 /** 1383 * @brief Ensure that UART communication mode is valid. 1384 * @param __MODE__ UART communication mode. 1385 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1386 */ 1387 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1388 1389 /** 1390 * @brief Ensure that UART state is valid. 1391 * @param __STATE__ UART state. 1392 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1393 */ 1394 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1395 ((__STATE__) == UART_STATE_ENABLE)) 1396 1397 /** 1398 * @brief Ensure that UART oversampling is valid. 1399 * @param __SAMPLING__ UART oversampling. 1400 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1401 */ 1402 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1403 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1404 1405 /** 1406 * @brief Ensure that UART frame sampling is valid. 1407 * @param __ONEBIT__ UART frame sampling. 1408 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1409 */ 1410 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1411 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1412 1413 /** 1414 * @brief Ensure that UART auto Baud rate detection mode is valid. 1415 * @param __MODE__ UART auto Baud rate detection mode. 1416 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1417 */ 1418 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1419 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1420 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1421 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1422 1423 /** 1424 * @brief Ensure that UART receiver timeout setting is valid. 1425 * @param __TIMEOUT__ UART receiver timeout setting. 1426 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1427 */ 1428 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1429 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1430 1431 /** @brief Check the receiver timeout value. 1432 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1433 * @param __TIMEOUTVALUE__ receiver timeout value. 1434 * @retval Test result (TRUE or FALSE) 1435 */ 1436 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1437 1438 /** 1439 * @brief Ensure that UART LIN state is valid. 1440 * @param __LIN__ UART LIN state. 1441 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1442 */ 1443 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1444 ((__LIN__) == UART_LIN_ENABLE)) 1445 1446 /** 1447 * @brief Ensure that UART LIN break detection length is valid. 1448 * @param __LENGTH__ UART LIN break detection length. 1449 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1450 */ 1451 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1452 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1453 1454 /** 1455 * @brief Ensure that UART DMA TX state is valid. 1456 * @param __DMATX__ UART DMA TX state. 1457 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1458 */ 1459 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1460 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1461 1462 /** 1463 * @brief Ensure that UART DMA RX state is valid. 1464 * @param __DMARX__ UART DMA RX state. 1465 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1466 */ 1467 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1468 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1469 1470 /** 1471 * @brief Ensure that UART half-duplex state is valid. 1472 * @param __HDSEL__ UART half-duplex state. 1473 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1474 */ 1475 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1476 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1477 1478 /** 1479 * @brief Ensure that UART wake-up method is valid. 1480 * @param __WAKEUP__ UART wake-up method . 1481 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1482 */ 1483 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1484 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1485 1486 /** 1487 * @brief Ensure that UART request parameter is valid. 1488 * @param __PARAM__ UART request parameter. 1489 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1490 */ 1491 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1492 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1493 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1494 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1495 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1496 1497 /** 1498 * @brief Ensure that UART advanced features initialization is valid. 1499 * @param __INIT__ UART advanced features initialization. 1500 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1501 */ 1502 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1503 UART_ADVFEATURE_TXINVERT_INIT | \ 1504 UART_ADVFEATURE_RXINVERT_INIT | \ 1505 UART_ADVFEATURE_DATAINVERT_INIT | \ 1506 UART_ADVFEATURE_SWAP_INIT | \ 1507 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1508 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1509 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1510 UART_ADVFEATURE_MSBFIRST_INIT)) 1511 1512 /** 1513 * @brief Ensure that UART frame TX inversion setting is valid. 1514 * @param __TXINV__ UART frame TX inversion setting. 1515 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1516 */ 1517 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1518 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1519 1520 /** 1521 * @brief Ensure that UART frame RX inversion setting is valid. 1522 * @param __RXINV__ UART frame RX inversion setting. 1523 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1524 */ 1525 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1526 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1527 1528 /** 1529 * @brief Ensure that UART frame data inversion setting is valid. 1530 * @param __DATAINV__ UART frame data inversion setting. 1531 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1532 */ 1533 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1534 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1535 1536 /** 1537 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1538 * @param __SWAP__ UART frame RX/TX pins swap setting. 1539 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1540 */ 1541 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1542 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1543 1544 /** 1545 * @brief Ensure that UART frame overrun setting is valid. 1546 * @param __OVERRUN__ UART frame overrun setting. 1547 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1548 */ 1549 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1550 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1551 1552 /** 1553 * @brief Ensure that UART auto Baud rate state is valid. 1554 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1555 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1556 */ 1557 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1558 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1559 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1560 1561 /** 1562 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1563 * @param __DMA__ UART DMA enabling or disabling on error setting. 1564 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1565 */ 1566 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1567 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1568 1569 /** 1570 * @brief Ensure that UART frame MSB first setting is valid. 1571 * @param __MSBFIRST__ UART frame MSB first setting. 1572 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1573 */ 1574 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1575 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1576 1577 /** 1578 * @brief Ensure that UART stop mode state is valid. 1579 * @param __STOPMODE__ UART stop mode state. 1580 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1581 */ 1582 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1583 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1584 1585 /** 1586 * @brief Ensure that UART mute mode state is valid. 1587 * @param __MUTE__ UART mute mode state. 1588 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1589 */ 1590 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1591 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1592 1593 /** 1594 * @brief Ensure that UART wake-up selection is valid. 1595 * @param __WAKE__ UART wake-up selection. 1596 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1597 */ 1598 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1599 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1600 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1601 1602 /** 1603 * @brief Ensure that UART driver enable polarity is valid. 1604 * @param __POLARITY__ UART driver enable polarity. 1605 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1606 */ 1607 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1608 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1609 1610 #if defined(USART_PRESC_PRESCALER) 1611 /** 1612 * @brief Ensure that UART Prescaler is valid. 1613 * @param __CLOCKPRESCALER__ UART Prescaler value. 1614 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1615 */ 1616 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1617 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1618 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1619 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1620 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1621 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1622 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1623 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1624 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1625 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1626 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1627 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1628 #endif /* USART_PRESC_PRESCALER */ 1629 1630 /** 1631 * @} 1632 */ 1633 1634 /* Include UART HAL Extended module */ 1635 #include "stm32l4xx_hal_uart_ex.h" 1636 1637 /* Exported functions --------------------------------------------------------*/ 1638 /** @addtogroup UART_Exported_Functions UART Exported Functions 1639 * @{ 1640 */ 1641 1642 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1643 * @{ 1644 */ 1645 1646 /* Initialization and de-initialization functions ****************************/ 1647 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1648 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1649 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1650 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1651 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1652 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1653 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1654 1655 /* Callbacks Register/UnRegister functions ***********************************/ 1656 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1657 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1658 pUART_CallbackTypeDef pCallback); 1659 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1660 1661 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1662 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1663 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1664 1665 /** 1666 * @} 1667 */ 1668 1669 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1670 * @{ 1671 */ 1672 1673 /* IO operation functions *****************************************************/ 1674 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1675 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1676 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1677 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1678 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1679 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1680 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1681 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1682 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1683 /* Transfer Abort functions */ 1684 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1685 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1686 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1687 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1688 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1689 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1690 1691 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1692 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1693 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1694 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1695 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1696 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1697 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1698 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1699 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1700 1701 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1702 1703 /** 1704 * @} 1705 */ 1706 1707 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1708 * @{ 1709 */ 1710 1711 /* Peripheral Control functions ************************************************/ 1712 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1713 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1714 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1715 1716 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1717 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1718 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1719 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1720 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1721 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1722 1723 /** 1724 * @} 1725 */ 1726 1727 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1728 * @{ 1729 */ 1730 1731 /* Peripheral State and Errors functions **************************************************/ 1732 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1733 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1734 1735 /** 1736 * @} 1737 */ 1738 1739 /** 1740 * @} 1741 */ 1742 1743 /* Private functions -----------------------------------------------------------*/ 1744 /** @addtogroup UART_Private_Functions UART Private Functions 1745 * @{ 1746 */ 1747 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1748 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1749 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1750 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1751 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1752 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1753 uint32_t Tickstart, uint32_t Timeout); 1754 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1755 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1756 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1757 1758 /** 1759 * @} 1760 */ 1761 1762 /* Private variables -----------------------------------------------------------*/ 1763 #if defined(USART_PRESC_PRESCALER) 1764 /** @defgroup UART_Private_variables UART Private variables 1765 * @{ 1766 */ 1767 /* Prescaler Table used in BRR computation macros. 1768 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1769 extern const uint16_t UARTPrescTable[12]; 1770 /** 1771 * @} 1772 */ 1773 1774 #endif /* USART_PRESC_PRESCALER */ 1775 /** 1776 * @} 1777 */ 1778 1779 /** 1780 * @} 1781 */ 1782 1783 #ifdef __cplusplus 1784 } 1785 #endif 1786 1787 #endif /* STM32L4xx_HAL_UART_H */ 1788 1789
