1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_tim_ex.h 4 * @author MCD Application Team 5 * @brief Header file of TIM HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_TIM_EX_H 21 #define STM32L4xx_HAL_TIM_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup TIMEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief TIM Hall sensor Configuration Structure definition 45 */ 46 47 typedef struct 48 { 49 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 50 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 51 52 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 53 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 54 55 uint32_t IC1Filter; /*!< Specifies the input capture filter. 56 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 57 58 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 59 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 60 } TIM_HallSensor_InitTypeDef; 61 62 /** 63 * @brief TIM Break/Break2 input configuration 64 */ 65 typedef struct 66 { 67 uint32_t Source; /*!< Specifies the source of the timer break input. 68 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 69 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 70 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 71 uint32_t Polarity; /*!< Specifies the break input source polarity. 72 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity 73 Not relevant when analog watchdog output of the DFSDM1 used as break input source */ 74 } TIMEx_BreakInputConfigTypeDef; 75 76 /** 77 * @} 78 */ 79 /* End of exported types -----------------------------------------------------*/ 80 81 /* Exported constants --------------------------------------------------------*/ 82 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 83 * @{ 84 */ 85 86 /** @defgroup TIMEx_Remap TIM Extended Remapping 87 * @{ 88 */ 89 #define TIM_TIM1_ETR_ADC1_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ 90 #define TIM_TIM1_ETR_ADC1_AWD1 TIM1_OR1_ETR_ADC1_RMP_0 /* !< TIM1_ETR is connected to ADC1 AWD1 */ 91 #define TIM_TIM1_ETR_ADC1_AWD2 TIM1_OR1_ETR_ADC1_RMP_1 /* !< TIM1_ETR is connected to ADC1 AWD2 */ 92 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ 93 #if defined (ADC3) 94 #define TIM_TIM1_ETR_ADC3_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ 95 #define TIM_TIM1_ETR_ADC3_AWD1 TIM1_OR1_ETR_ADC3_RMP_0 /* !< TIM1_ETR is connected to ADC3 AWD1 */ 96 #define TIM_TIM1_ETR_ADC3_AWD2 TIM1_OR1_ETR_ADC3_RMP_1 /* !< TIM1_ETR is connected to ADC3 AWD2 */ 97 #define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */ 98 #endif /* ADC3 */ 99 #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1 TI1 is connected to GPIO */ 100 #define TIM_TIM1_TI1_COMP1 TIM1_OR1_TI1_RMP /* !< TIM1 TI1 is connected to COMP1 */ 101 #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */ 102 #define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 output */ 103 #if defined(COMP2) 104 #define TIM_TIM1_ETR_COMP2 TIM1_OR2_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 output */ 105 #endif /* COMP2 */ 106 107 #if defined (USB_OTG_FS) 108 #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */ 109 #define TIM_TIM2_ITR1_OTG_FS_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to OTG_FS SOF */ 110 #else 111 #if defined(STM32L471xx) 112 #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */ 113 #define TIM_TIM2_ITR1_NONE TIM2_OR1_ITR1_RMP /* !< No internal trigger on TIM2_ITR1 */ 114 #else 115 #define TIM_TIM2_ITR1_NONE 0x00000000U /* !< No internal trigger on TIM2_ITR1 */ 116 #define TIM_TIM2_ITR1_USB_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to USB SOF */ 117 #endif /* STM32L471xx */ 118 #endif /* USB_OTG_FS */ 119 #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */ 120 #define TIM_TIM2_ETR_LSE TIM2_OR1_ETR1_RMP /* !< TIM2_ETR is connected to LSE */ 121 #define TIM_TIM2_ETR_COMP1 TIM2_OR2_ETRSEL_0 /* !< TIM2_ETR is connected to COMP1 output */ 122 #if defined(COMP2) 123 #define TIM_TIM2_ETR_COMP2 TIM2_OR2_ETRSEL_1 /* !< TIM2_ETR is connected to COMP2 output */ 124 #endif /* COMP2 */ 125 #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2 TI4 is connected to GPIO */ 126 #define TIM_TIM2_TI4_COMP1 TIM2_OR1_TI4_RMP_0 /* !< TIM2 TI4 is connected to COMP1 output */ 127 #if defined(COMP2) 128 #define TIM_TIM2_TI4_COMP2 TIM2_OR1_TI4_RMP_1 /* !< TIM2 TI4 is connected to COMP2 output */ 129 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */ 130 #endif /* COMP2 */ 131 132 #if defined (TIM3) 133 #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3 TI1 is connected to GPIO */ 134 #define TIM_TIM3_TI1_COMP1 TIM3_OR1_TI1_RMP_0 /* !< TIM3 TI1 is connected to COMP1 output */ 135 #define TIM_TIM3_TI1_COMP2 TIM3_OR1_TI1_RMP_1 /* !< TIM3 TI1 is connected to COMP2 output */ 136 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */ 137 #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */ 138 #define TIM_TIM3_ETR_COMP1 TIM3_OR2_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 output */ 139 #endif /* TIM3 */ 140 141 #if defined (TIM8) 142 #if defined(ADC2) && defined(ADC3) 143 #define TIM_TIM8_ETR_ADC2_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ 144 #define TIM_TIM8_ETR_ADC2_AWD1 TIM8_OR1_ETR_ADC2_RMP_0 /* !< TIM8_ETR is connected to ADC2 AWD1 */ 145 #define TIM_TIM8_ETR_ADC2_AWD2 TIM8_OR1_ETR_ADC2_RMP_1 /* !< TIM8_ETR is connected to ADC2 AWD2 */ 146 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ 147 #define TIM_TIM8_ETR_ADC3_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ 148 #define TIM_TIM8_ETR_ADC3_AWD1 TIM8_OR1_ETR_ADC3_RMP_0 /* !< TIM8_ETR is connected to ADC3 AWD1 */ 149 #define TIM_TIM8_ETR_ADC3_AWD2 TIM8_OR1_ETR_ADC3_RMP_1 /* !< TIM8_ETR is connected to ADC3 AWD2 */ 150 #define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */ 151 #endif /* ADC2 && ADC3 */ 152 153 #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8 TI1 is connected to GPIO */ 154 #define TIM_TIM8_TI1_COMP2 TIM8_OR1_TI1_RMP /* !< TIM8 TI1 is connected to COMP1 */ 155 #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */ 156 #define TIM_TIM8_ETR_COMP1 TIM8_OR2_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 output */ 157 #define TIM_TIM8_ETR_COMP2 TIM8_OR2_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 output */ 158 #endif /* TIM8 */ 159 160 #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15 TI1 is connected to GPIO */ 161 #define TIM_TIM15_TI1_LSE TIM15_OR1_TI1_RMP /* !< TIM15 TI1 is connected to LSE */ 162 #define TIM_TIM15_ENCODERMODE_NONE 0x00000000U /* !< No redirection */ 163 #define TIM_TIM15_ENCODERMODE_TIM2 TIM15_OR1_ENCODER_MODE_0 /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 164 #if defined (TIM3) 165 #define TIM_TIM15_ENCODERMODE_TIM3 TIM15_OR1_ENCODER_MODE_1 /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 166 #endif /* TIM3 */ 167 #if defined (TIM4) 168 #define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 169 #endif /* TIM4 */ 170 171 #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */ 172 #define TIM_TIM16_TI1_LSI TIM16_OR1_TI1_RMP_0 /* !< TIM16 TI1 is connected to LSI */ 173 #define TIM_TIM16_TI1_LSE TIM16_OR1_TI1_RMP_1 /* !< TIM16 TI1 is connected to LSE */ 174 #define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */ 175 #if defined (TIM16_OR1_TI1_RMP_2) 176 #define TIM_TIM16_TI1_MSI TIM16_OR1_TI1_RMP_2 /* !< TIM16 TI1 is connected to MSI */ 177 #define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */ 178 #define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */ 179 #endif /* TIM16_OR1_TI1_RMP_2 */ 180 181 #if defined (TIM17) 182 #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */ 183 #define TIM_TIM17_TI1_MSI TIM17_OR1_TI1_RMP_0 /* !< TIM17 TI1 is connected to MSI */ 184 #define TIM_TIM17_TI1_HSE_32 TIM17_OR1_TI1_RMP_1 /* !< TIM17 TI1 is connected to HSE div 32 */ 185 #define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */ 186 #endif /* TIM17 */ 187 /** 188 * @} 189 */ 190 191 /** @defgroup TIMEx_Break_Input TIM Extended Break input 192 * @{ 193 */ 194 #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ 195 #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ 196 /** 197 * @} 198 */ 199 200 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 201 * @{ 202 */ 203 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */ 204 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */ 205 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */ 206 #if defined (DFSDM1_Channel0) 207 #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ 208 #endif /* DFSDM1_Channel0 */ 209 /** 210 * @} 211 */ 212 213 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 214 * @{ 215 */ 216 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ 217 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ 218 /** 219 * @} 220 */ 221 222 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 223 * @{ 224 */ 225 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ 226 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ 227 /** 228 * @} 229 */ 230 231 /** 232 * @} 233 */ 234 /* End of exported constants -------------------------------------------------*/ 235 236 /* Exported macro ------------------------------------------------------------*/ 237 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 238 * @{ 239 */ 240 241 /** 242 * @} 243 */ 244 /* End of exported macro -----------------------------------------------------*/ 245 246 /* Private macro -------------------------------------------------------------*/ 247 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 248 * @{ 249 */ 250 #define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F)) 251 252 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 253 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 254 255 #if defined (DFSDM1_Channel0) 256 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 257 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 258 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 259 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) 260 #else 261 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 262 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 263 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2)) 264 #endif /* DFSDM1_Channel0 */ 265 266 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 267 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 268 269 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 270 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 271 272 /** 273 * @} 274 */ 275 /* End of private macro ------------------------------------------------------*/ 276 277 /* Exported functions --------------------------------------------------------*/ 278 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 279 * @{ 280 */ 281 282 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 283 * @brief Timer Hall Sensor functions 284 * @{ 285 */ 286 /* Timer Hall Sensor functions **********************************************/ 287 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig); 288 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 289 290 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 291 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 292 293 /* Blocking mode: Polling */ 294 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 295 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 296 /* Non-Blocking mode: Interrupt */ 297 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 298 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 299 /* Non-Blocking mode: DMA */ 300 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 301 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 302 /** 303 * @} 304 */ 305 306 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 307 * @brief Timer Complementary Output Compare functions 308 * @{ 309 */ 310 /* Timer Complementary Output Compare functions *****************************/ 311 /* Blocking mode: Polling */ 312 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 313 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 314 315 /* Non-Blocking mode: Interrupt */ 316 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 317 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 318 319 /* Non-Blocking mode: DMA */ 320 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 321 uint16_t Length); 322 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 323 /** 324 * @} 325 */ 326 327 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 328 * @brief Timer Complementary PWM functions 329 * @{ 330 */ 331 /* Timer Complementary PWM functions ****************************************/ 332 /* Blocking mode: Polling */ 333 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 334 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 335 336 /* Non-Blocking mode: Interrupt */ 337 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 338 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 339 /* Non-Blocking mode: DMA */ 340 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, 341 uint16_t Length); 342 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 343 /** 344 * @} 345 */ 346 347 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 348 * @brief Timer Complementary One Pulse functions 349 * @{ 350 */ 351 /* Timer Complementary One Pulse functions **********************************/ 352 /* Blocking mode: Polling */ 353 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 354 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 355 356 /* Non-Blocking mode: Interrupt */ 357 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 358 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 359 /** 360 * @} 361 */ 362 363 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 364 * @brief Peripheral Control functions 365 * @{ 366 */ 367 /* Extended Control functions ************************************************/ 368 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 369 uint32_t CommutationSource); 370 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 371 uint32_t CommutationSource); 372 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 373 uint32_t CommutationSource); 374 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 375 const TIM_MasterConfigTypeDef *sMasterConfig); 376 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 377 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 378 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 379 const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 380 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 381 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 382 /** 383 * @} 384 */ 385 386 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 387 * @brief Extended Callbacks functions 388 * @{ 389 */ 390 /* Extended Callback **********************************************************/ 391 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 392 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 393 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 394 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 395 /** 396 * @} 397 */ 398 399 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 400 * @brief Extended Peripheral State functions 401 * @{ 402 */ 403 /* Extended Peripheral State functions ***************************************/ 404 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim); 405 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN); 406 /** 407 * @} 408 */ 409 410 /** 411 * @} 412 */ 413 /* End of exported functions -------------------------------------------------*/ 414 415 /* Private functions----------------------------------------------------------*/ 416 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 417 * @{ 418 */ 419 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 420 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 421 /** 422 * @} 423 */ 424 /* End of private functions --------------------------------------------------*/ 425 426 /** 427 * @} 428 */ 429 430 /** 431 * @} 432 */ 433 434 #ifdef __cplusplus 435 } 436 #endif 437 438 439 #endif /* STM32L4xx_HAL_TIM_EX_H */ 440
