1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_sd.h 4 * @author MCD Application Team 5 * @brief Header file of SD HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_SD_H 21 #define STM32L4xx_HAL_SD_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 #if defined(SDMMC1) 31 #include "stm32l4xx_ll_sdmmc.h" 32 33 /** @addtogroup STM32L4xx_HAL_Driver 34 * @{ 35 */ 36 37 /** @defgroup SD SD 38 * @brief SD HAL module driver 39 * @{ 40 */ 41 42 /* Exported types ------------------------------------------------------------*/ 43 /** @defgroup SD_Exported_Types SD Exported Types 44 * @{ 45 */ 46 47 /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure 48 * @{ 49 */ 50 typedef enum 51 { 52 HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */ 53 HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */ 54 HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */ 55 HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */ 56 HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */ 57 HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */ 58 HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfer State */ 59 HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */ 60 }HAL_SD_StateTypeDef; 61 /** 62 * @} 63 */ 64 65 /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure 66 * @{ 67 */ 68 typedef uint32_t HAL_SD_CardStateTypeDef; 69 70 #define HAL_SD_CARD_READY 0x00000001U /*!< Card state is ready */ 71 #define HAL_SD_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ 72 #define HAL_SD_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 73 #define HAL_SD_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 74 #define HAL_SD_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 75 #define HAL_SD_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 76 #define HAL_SD_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 77 #define HAL_SD_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 78 #define HAL_SD_CARD_ERROR 0x000000FFU /*!< Card response Error */ 79 /** 80 * @} 81 */ 82 83 /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition 84 * @{ 85 */ 86 #define SD_InitTypeDef SDMMC_InitTypeDef 87 #define SD_TypeDef SDMMC_TypeDef 88 89 /** 90 * @brief SD Card Information Structure definition 91 */ 92 typedef struct 93 { 94 uint32_t CardType; /*!< Specifies the card Type */ 95 96 uint32_t CardVersion; /*!< Specifies the card version */ 97 98 uint32_t Class; /*!< Specifies the class of the card class */ 99 100 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 101 102 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 103 104 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 105 106 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 107 108 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 109 110 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 111 112 uint32_t CardSpeed; /*!< Specifies the card Speed */ 113 114 #endif /* STM32L4P5xx || STM32L4Q5xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 115 }HAL_SD_CardInfoTypeDef; 116 117 /** 118 * @brief SD handle Structure definition 119 */ 120 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 121 typedef struct __SD_HandleTypeDef 122 #else 123 typedef struct 124 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 125 { 126 SD_TypeDef *Instance; /*!< SD registers base address */ 127 128 SD_InitTypeDef Init; /*!< SD required parameters */ 129 130 HAL_LockTypeDef Lock; /*!< SD locking object */ 131 132 uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ 133 134 uint32_t TxXferSize; /*!< SD Tx Transfer size */ 135 136 uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ 137 138 uint32_t RxXferSize; /*!< SD Rx Transfer size */ 139 140 __IO uint32_t Context; /*!< SD transfer context */ 141 142 __IO HAL_SD_StateTypeDef State; /*!< SD card State */ 143 144 __IO uint32_t ErrorCode; /*!< SD Card Error codes */ 145 146 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 147 148 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ 149 150 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ 151 152 #endif /* !STM32L4P5xx && !STM32L4Q5xx && !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */ 153 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ 154 155 uint32_t CSD[4]; /*!< SD card specific data table */ 156 157 uint32_t CID[4]; /*!< SD card identification number table */ 158 159 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 160 void (* TxCpltCallback) (struct __SD_HandleTypeDef *hsd); 161 void (* RxCpltCallback) (struct __SD_HandleTypeDef *hsd); 162 void (* ErrorCallback) (struct __SD_HandleTypeDef *hsd); 163 void (* AbortCpltCallback) (struct __SD_HandleTypeDef *hsd); 164 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 165 void (* Read_DMADblBuf0CpltCallback) (struct __SD_HandleTypeDef *hsd); 166 void (* Read_DMADblBuf1CpltCallback) (struct __SD_HandleTypeDef *hsd); 167 void (* Write_DMADblBuf0CpltCallback) (struct __SD_HandleTypeDef *hsd); 168 void (* Write_DMADblBuf1CpltCallback) (struct __SD_HandleTypeDef *hsd); 169 170 void (* DriveTransceiver_1_8V_Callback) (FlagStatus status); 171 #endif 172 173 void (* MspInitCallback) (struct __SD_HandleTypeDef *hsd); 174 void (* MspDeInitCallback) (struct __SD_HandleTypeDef *hsd); 175 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 176 }SD_HandleTypeDef; 177 178 /** 179 * @} 180 */ 181 182 /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register 183 * @{ 184 */ 185 typedef struct 186 { 187 __IO uint8_t CSDStruct; /*!< CSD structure */ 188 __IO uint8_t SysSpecVersion; /*!< System specification version */ 189 __IO uint8_t Reserved1; /*!< Reserved */ 190 __IO uint8_t TAAC; /*!< Data read access time 1 */ 191 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 192 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 193 __IO uint16_t CardComdClasses; /*!< Card command classes */ 194 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 195 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 196 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 197 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 198 __IO uint8_t DSRImpl; /*!< DSR implemented */ 199 __IO uint8_t Reserved2; /*!< Reserved */ 200 __IO uint32_t DeviceSize; /*!< Device Size */ 201 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 202 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 203 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 204 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 205 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 206 __IO uint8_t EraseGrSize; /*!< Erase group size */ 207 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 208 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 209 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 210 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 211 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 212 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 213 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 214 __IO uint8_t Reserved3; /*!< Reserved */ 215 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 216 __IO uint8_t FileFormatGroup; /*!< File format group */ 217 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 218 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 219 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 220 __IO uint8_t FileFormat; /*!< File format */ 221 __IO uint8_t ECC; /*!< ECC code */ 222 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 223 __IO uint8_t Reserved4; /*!< Always 1 */ 224 }HAL_SD_CardCSDTypeDef; 225 /** 226 * @} 227 */ 228 229 /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register 230 * @{ 231 */ 232 typedef struct 233 { 234 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 235 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 236 __IO uint32_t ProdName1; /*!< Product Name part1 */ 237 __IO uint8_t ProdName2; /*!< Product Name part2 */ 238 __IO uint8_t ProdRev; /*!< Product Revision */ 239 __IO uint32_t ProdSN; /*!< Product Serial Number */ 240 __IO uint8_t Reserved1; /*!< Reserved1 */ 241 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 242 __IO uint8_t CID_CRC; /*!< CID CRC */ 243 __IO uint8_t Reserved2; /*!< Always 1 */ 244 245 }HAL_SD_CardCIDTypeDef; 246 /** 247 * @} 248 */ 249 250 /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13 251 * @{ 252 */ 253 typedef struct 254 { 255 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ 256 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ 257 __IO uint16_t CardType; /*!< Carries information about card type */ 258 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ 259 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ 260 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ 261 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ 262 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ 263 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ 264 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ 265 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 266 __IO uint8_t UhsSpeedGrade; /*!< Carries information about the speed grade of UHS card */ 267 __IO uint8_t UhsAllocationUnitSize; /*!< Carries information about the UHS card's allocation unit size */ 268 __IO uint8_t VideoSpeedClass; /*!< Carries information about the Video Speed Class of UHS card */ 269 #endif 270 }HAL_SD_CardStatusTypeDef; 271 /** 272 * @} 273 */ 274 275 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 276 /** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition 277 * @{ 278 */ 279 typedef enum 280 { 281 HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */ 282 HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */ 283 HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */ 284 HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */ 285 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 286 HAL_SD_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< SD Rx DMA Double Buffer 0 Complete Callback ID */ 287 HAL_SD_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< SD Rx DMA Double Buffer 1 Complete Callback ID */ 288 HAL_SD_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< SD Tx DMA Double Buffer 0 Complete Callback ID */ 289 HAL_SD_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< SD Tx DMA Double Buffer 1 Complete Callback ID */ 290 #endif 291 292 HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */ 293 HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */ 294 }HAL_SD_CallbackIDTypeDef; 295 /** 296 * @} 297 */ 298 299 /** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition 300 * @{ 301 */ 302 typedef void (*pSD_CallbackTypeDef) (SD_HandleTypeDef *hsd); 303 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 304 typedef void (*pSD_TransceiverCallbackTypeDef)(FlagStatus status); 305 #endif 306 /** 307 * @} 308 */ 309 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 310 /** 311 * @} 312 */ 313 314 /* Exported constants --------------------------------------------------------*/ 315 /** @defgroup SD_Exported_Constants Exported Constants 316 * @{ 317 */ 318 319 #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 320 321 /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition 322 * @{ 323 */ 324 #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 325 #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 326 #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 327 #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 328 #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 329 #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 330 #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 331 #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 332 #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the 333 number of transferred bytes does not match the block length */ 334 #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 335 #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 336 #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 337 #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock 338 command or if there was an attempt to access a locked card */ 339 #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 340 #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 341 #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 342 #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 343 #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 344 #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 345 #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 346 #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 347 #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 348 #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 349 #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out 350 of erase sequence command was received */ 351 #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 352 #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 353 #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 354 #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 355 #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 356 #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 357 #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 358 #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 359 #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 360 361 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 362 #define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 363 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 364 /** 365 * @} 366 */ 367 368 /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration 369 * @{ 370 */ 371 #define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 372 #define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 373 #define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 374 #define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 375 #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 376 #define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 377 #define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 378 379 /** 380 * @} 381 */ 382 383 /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards 384 * @{ 385 */ 386 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 387 #define CARD_NORMAL_SPEED ((uint32_t)0x00000000U) /*!< Normal Speed Card <12.5Mo/s , Spec Version 1.01 */ 388 #define CARD_HIGH_SPEED ((uint32_t)0x00000100U) /*!< High Speed Card <25Mo/s , Spec version 2.00 */ 389 #define CARD_ULTRA_HIGH_SPEED ((uint32_t)0x00000200U) /*!< UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards 390 and <104Mo/s for SDR104, Spec version 3.01 */ 391 #endif /* STM32L4P5xx || STM32L4Q5xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 392 393 #define CARD_SDSC ((uint32_t)0x00000000U) /*!< SD Standard Capacity <2Go */ 394 #define CARD_SDHC_SDXC ((uint32_t)0x00000001U) /*!< SD High Capacity <32Go, SD Extended Capacity <2To */ 395 #define CARD_SECURED ((uint32_t)0x00000003U) 396 397 /** 398 * @} 399 */ 400 401 /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version 402 * @{ 403 */ 404 #define CARD_V1_X ((uint32_t)0x00000000U) 405 #define CARD_V2_X ((uint32_t)0x00000001U) 406 /** 407 * @} 408 */ 409 410 /** 411 * @} 412 */ 413 414 /* Exported macro ------------------------------------------------------------*/ 415 /** @defgroup SD_Exported_macros SD Exported Macros 416 * @brief macros to handle interrupts and specific clock configurations 417 * @{ 418 */ 419 /** @brief Reset SD handle state. 420 * @param __HANDLE__ : SD handle. 421 * @retval None 422 */ 423 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 424 #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \ 425 (__HANDLE__)->State = HAL_SD_STATE_RESET; \ 426 (__HANDLE__)->MspInitCallback = NULL; \ 427 (__HANDLE__)->MspDeInitCallback = NULL; \ 428 } while(0) 429 #else 430 #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET) 431 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 432 433 #if !defined(STM32L4P5xx) && !defined(STM32L4Q5xx) && !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 434 /** 435 * @brief Enable the SD device. 436 * @retval None 437 */ 438 #define __HAL_SD_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance) 439 440 /** 441 * @brief Disable the SD device. 442 * @retval None 443 */ 444 #define __HAL_SD_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance) 445 446 /** 447 * @brief Enable the SDMMC DMA transfer. 448 * @retval None 449 */ 450 #define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance) 451 452 /** 453 * @brief Disable the SDMMC DMA transfer. 454 * @retval None 455 */ 456 #define __HAL_SD_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance) 457 #endif /* !STM32L4P5xx && !STM32L4Q5xx && !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */ 458 459 /** 460 * @brief Enable the SD device interrupt. 461 * @param __HANDLE__ SD Handle 462 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 463 * This parameter can be one or a combination of the following values: 464 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 465 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 466 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 467 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 468 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 469 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 470 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 471 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 472 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 473 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 474 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 475 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 476 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 477 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 478 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 479 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 480 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 481 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 482 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 483 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 484 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 485 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 486 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 487 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 488 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 489 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 490 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 491 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 492 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 493 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 494 * @retval None 495 */ 496 #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 497 498 /** 499 * @brief Disable the SD device interrupt. 500 * @param __HANDLE__ SD Handle 501 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 502 * This parameter can be one or a combination of the following values: 503 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 504 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 505 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 506 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 507 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 508 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 509 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 510 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 511 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 512 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 513 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 514 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 515 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 516 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 517 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 518 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 519 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 520 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 521 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 522 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 523 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 524 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 525 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 526 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 527 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 528 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 529 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 530 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 531 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 532 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 533 * @retval None 534 */ 535 #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 536 537 /** 538 * @brief Check whether the specified SD flag is set or not. 539 * @param __HANDLE__ SD Handle 540 * @param __FLAG__ specifies the flag to check. 541 * This parameter can be one of the following values: 542 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 543 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 544 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 545 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 546 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 547 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 548 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 549 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 550 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 551 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 552 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 553 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 554 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 555 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 556 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress 557 * @arg SDMMC_FLAG_TXACT: Data transmit in progress 558 * @arg SDMMC_FLAG_RXACT: Data receive in progress 559 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 560 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 561 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 562 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 563 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 564 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 565 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 566 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 567 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO 568 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO 569 * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received 570 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 571 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 572 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 573 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 574 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 575 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 576 * @retval The new state of SD FLAG (SET or RESET). 577 */ 578 #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 579 580 /** 581 * @brief Clear the SD's pending flags. 582 * @param __HANDLE__ SD Handle 583 * @param __FLAG__ specifies the flag to clear. 584 * This parameter can be one or a combination of the following values: 585 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 586 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 587 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 588 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 589 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 590 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 591 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 592 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 593 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 594 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 595 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 596 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 597 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 598 * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received 599 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 600 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 601 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 602 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 603 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 604 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 605 * @retval None 606 */ 607 #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 608 609 /** 610 * @brief Check whether the specified SD interrupt has occurred or not. 611 * @param __HANDLE__ SD Handle 612 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 613 * This parameter can be one of the following values: 614 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 615 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 616 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 617 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 618 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 619 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 620 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 621 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 622 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 623 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 624 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 625 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 626 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 627 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 628 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 629 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 630 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 631 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 632 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 633 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 634 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 635 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 636 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 637 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 638 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 639 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 640 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 641 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 642 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 643 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 644 * @retval The new state of SD IT (SET or RESET). 645 */ 646 #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 647 648 /** 649 * @brief Clear the SD's interrupt pending bits. 650 * @param __HANDLE__ SD Handle 651 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 652 * This parameter can be one or a combination of the following values: 653 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 654 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 655 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 656 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 657 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 658 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 659 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 660 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 661 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 662 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 663 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 664 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 665 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 666 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt 667 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 668 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 669 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 670 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 671 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 672 * @retval None 673 */ 674 #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 675 676 /** 677 * @} 678 */ 679 680 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 681 /* Include SD HAL Extension module */ 682 #include "stm32l4xx_hal_sd_ex.h" 683 #endif /* STM32L4P5xx || STM32L4Q5xx || STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 684 685 /* Exported functions --------------------------------------------------------*/ 686 /** @defgroup SD_Exported_Functions SD Exported Functions 687 * @{ 688 */ 689 690 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions 691 * @{ 692 */ 693 HAL_StatusTypeDef HAL_SD_Init (SD_HandleTypeDef *hsd); 694 HAL_StatusTypeDef HAL_SD_InitCard (SD_HandleTypeDef *hsd); 695 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd); 696 void HAL_SD_MspInit (SD_HandleTypeDef *hsd); 697 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); 698 /** 699 * @} 700 */ 701 702 /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions 703 * @{ 704 */ 705 /* Blocking mode: Polling */ 706 HAL_StatusTypeDef HAL_SD_ReadBlocks (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 707 HAL_StatusTypeDef HAL_SD_WriteBlocks (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 708 HAL_StatusTypeDef HAL_SD_Erase (SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 709 /* Non-Blocking mode: IT */ 710 HAL_StatusTypeDef HAL_SD_ReadBlocks_IT (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 711 HAL_StatusTypeDef HAL_SD_WriteBlocks_IT (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 712 /* Non-Blocking mode: DMA */ 713 HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 714 HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 715 716 void HAL_SD_IRQHandler (SD_HandleTypeDef *hsd); 717 718 /* Callback in non blocking modes (DMA) */ 719 void HAL_SD_TxCpltCallback (SD_HandleTypeDef *hsd); 720 void HAL_SD_RxCpltCallback (SD_HandleTypeDef *hsd); 721 void HAL_SD_ErrorCallback (SD_HandleTypeDef *hsd); 722 void HAL_SD_AbortCallback (SD_HandleTypeDef *hsd); 723 724 #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) 725 /* SD callback registering/unregistering */ 726 HAL_StatusTypeDef HAL_SD_RegisterCallback (SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID, pSD_CallbackTypeDef pCallback); 727 HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID); 728 729 #if defined(STM32L4P5xx) || defined(STM32L4Q5xx) || defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 730 HAL_StatusTypeDef HAL_SD_RegisterTransceiverCallback (SD_HandleTypeDef *hsd, pSD_TransceiverCallbackTypeDef pCallback); 731 HAL_StatusTypeDef HAL_SD_UnRegisterTransceiverCallback(SD_HandleTypeDef *hsd); 732 #endif 733 #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 734 735 /** 736 * @} 737 */ 738 739 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions 740 * @{ 741 */ 742 HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); 743 HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode); 744 /** 745 * @} 746 */ 747 748 /** @defgroup SD_Exported_Functions_Group4 SD card related functions 749 * @{ 750 */ 751 HAL_StatusTypeDef HAL_SD_SendSDStatus (SD_HandleTypeDef *hsd, uint32_t *pSDstatus); 752 HAL_SD_CardStateTypeDef HAL_SD_GetCardState (SD_HandleTypeDef *hsd); 753 HAL_StatusTypeDef HAL_SD_GetCardCID (SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID); 754 HAL_StatusTypeDef HAL_SD_GetCardCSD (SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD); 755 HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus); 756 HAL_StatusTypeDef HAL_SD_GetCardInfo (SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo); 757 /** 758 * @} 759 */ 760 761 /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions 762 * @{ 763 */ 764 HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd); 765 uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd); 766 /** 767 * @} 768 */ 769 770 /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management 771 * @{ 772 */ 773 HAL_StatusTypeDef HAL_SD_Abort (SD_HandleTypeDef *hsd); 774 HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd); 775 /** 776 * @} 777 */ 778 779 /* Private types -------------------------------------------------------------*/ 780 /** @defgroup SD_Private_Types SD Private Types 781 * @{ 782 */ 783 784 /** 785 * @} 786 */ 787 788 /* Private defines -----------------------------------------------------------*/ 789 /** @defgroup SD_Private_Defines SD Private Defines 790 * @{ 791 */ 792 793 /** 794 * @} 795 */ 796 797 /* Private variables ---------------------------------------------------------*/ 798 /** @defgroup SD_Private_Variables SD Private Variables 799 * @{ 800 */ 801 802 /** 803 * @} 804 */ 805 806 /* Private constants ---------------------------------------------------------*/ 807 /** @defgroup SD_Private_Constants SD Private Constants 808 * @{ 809 */ 810 811 /** 812 * @} 813 */ 814 815 /* Private macros ------------------------------------------------------------*/ 816 /** @defgroup SD_Private_Macros SD Private Macros 817 * @{ 818 */ 819 820 /** 821 * @} 822 */ 823 824 /* Private functions prototypes ----------------------------------------------*/ 825 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes 826 * @{ 827 */ 828 829 /** 830 * @} 831 */ 832 833 /* Private functions ---------------------------------------------------------*/ 834 /** @defgroup SD_Private_Functions SD Private Functions 835 * @{ 836 */ 837 838 /** 839 * @} 840 */ 841 842 843 /** 844 * @} 845 */ 846 847 /** 848 * @} 849 */ 850 851 /** 852 * @} 853 */ 854 855 #endif /* SDMMC1 */ 856 857 #ifdef __cplusplus 858 } 859 #endif 860 861 862 #endif /* STM32L4xx_HAL_SD_H */ 863
