1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_pssi.h 4 * @author MCD Application Team 5 * @brief Header file of PSSI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_PSSI_H 21 #define STM32L4xx_HAL_PSSI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 #if defined(PSSI) 34 /** @defgroup PSSI PSSI 35 * @brief PSSI HAL module driver 36 * @{ 37 */ 38 39 #ifdef HAL_PSSI_MODULE_ENABLED 40 41 /* Exported types ------------------------------------------------------------*/ 42 /** @defgroup PSSI_Exported_Types PSSI Exported Types 43 * @{ 44 */ 45 46 47 /** 48 * @brief PSSI Init structure definition 49 */ 50 typedef struct 51 { 52 uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 53 uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 54 uint32_t ControlSignal; /* !< Configures Data enable and Data ready */ 55 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */ 56 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */ 57 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */ 58 59 } PSSI_InitTypeDef; 60 61 62 /** 63 * @brief HAL PSSI State structures definition 64 */ 65 typedef enum 66 { 67 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */ 68 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */ 69 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */ 70 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */ 71 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */ 72 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */ 73 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */ 74 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */ 75 76 } HAL_PSSI_StateTypeDef; 77 78 /** 79 * @brief PSSI handle Structure definition 80 */ 81 typedef struct __PSSI_HandleTypeDef 82 { 83 PSSI_TypeDef *Instance; /*!< PSSI register base address */ 84 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure */ 85 uint32_t *pBuffPtr; /*!< PSSI Data buffer */ 86 uint32_t XferCount; /*!< PSSI transfer count */ 87 uint32_t XferSize; /*!< PSSI transfer size */ 88 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */ 89 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */ 90 91 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */ 92 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */ 93 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */ 94 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback */ 95 96 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback */ 97 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback */ 98 99 HAL_LockTypeDef Lock; /*!< PSSI lock */ 100 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state */ 101 __IO uint32_t ErrorCode; /*!< PSSI error code */ 102 103 } PSSI_HandleTypeDef; 104 105 106 /** 107 * @brief HAL PSSI Callback pointer definition 108 */ 109 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */ 110 111 112 /** 113 * @brief HAL PSSI Callback ID enumeration definition 114 */ 115 typedef enum 116 { 117 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */ 118 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */ 119 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */ 120 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */ 121 122 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */ 123 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */ 124 125 } HAL_PSSI_CallbackIDTypeDef; 126 127 /** 128 * @} 129 */ 130 131 /* Exported constants --------------------------------------------------------*/ 132 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants 133 * @{ 134 */ 135 136 /** @defgroup PSSI_ERROR_CODE PSSI Error Code 137 * @{ 138 */ 139 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */ 140 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */ 141 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */ 142 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */ 143 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */ 144 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */ 145 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */ 146 147 148 /** 149 * @} 150 */ 151 152 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width 153 * @{ 154 */ 155 156 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */ 157 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */ 158 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */ 159 /** 160 * @} 161 */ 162 163 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width 164 * @{ 165 */ 166 167 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */ 168 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */ 169 /** 170 * @} 171 */ 172 /** @defgroup PSSI_MODE PSSI mode 173 * @{ 174 */ 175 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */ 176 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */ 177 /** 178 * @} 179 */ 180 181 /** @defgroup PSSI_CONTROL_SIGNAL PSSI Control Signal Configuration 182 * @{ 183 */ 184 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */ 185 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */ 186 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */ 187 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */ 188 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */ 189 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */ 190 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */ 191 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */ 192 193 /** 194 * @} 195 */ 196 197 198 /** @defgroup PSSI_DATA_ENABLE_POLARITY PSSI Data Enable Polarity 199 * @{ 200 */ 201 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 202 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */ 203 /** 204 * @} 205 */ 206 /** @defgroup PSSI_READY_POLARITY PSSI Ready Polarity 207 * @{ 208 */ 209 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 210 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */ 211 /** 212 * @} 213 */ 214 215 /** @defgroup PSSI_CLOCK_POLARITY PSSI Clock Polarity 216 * @{ 217 */ 218 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Falling Edge */ 219 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */ 220 221 222 /** 223 * @} 224 */ 225 226 227 /** @defgroup PSSI_DEFINITION PSSI definitions 228 * @{ 229 */ 230 231 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */ 232 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */ 233 234 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */ 235 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */ 236 237 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */ 238 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disable */ 239 240 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */ 241 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */ 242 243 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag*/ 244 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/ 245 246 247 248 /** 249 * @} 250 */ 251 252 /** @defgroup PSSI_INTERRUPTS PSSI Interrupts 253 * @{ 254 */ 255 256 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */ 257 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */ 258 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */ 259 /** 260 * @} 261 */ 262 263 264 265 /** 266 * @} 267 */ 268 /* Exported macros ------------------------------------------------------------*/ 269 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros 270 * @{ 271 */ 272 273 /** @brief Reset PSSI handle state 274 * @param __HANDLE__ specifies the PSSI handle. 275 * @retval None 276 */ 277 278 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 279 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\ 280 (__HANDLE__)->MspInitCallback = NULL; \ 281 (__HANDLE__)->MspDeInitCallback = NULL; \ 282 }while(0) 283 284 285 /** 286 * @brief Enable the PSSI. 287 * @param __HANDLE__ PSSI handle 288 * @retval None. 289 */ 290 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE) 291 /** 292 * @brief Disable the PSSI. 293 * @param __HANDLE__ PSSI handle 294 * @retval None. 295 */ 296 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE)) 297 298 /* PSSI pripheral STATUS */ 299 /** 300 * @brief Get the PSSI pending flags. 301 * @param __HANDLE__ PSSI handle 302 * @param __FLAG__ flag to check. 303 * This parameter can be any combination of the following values: 304 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte 305 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes 306 * @retval The state of FLAG. 307 */ 308 309 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__)) 310 311 312 313 /* Interrupt & Flag management */ 314 /** 315 * @brief Get the PSSI pending flags. 316 * @param __HANDLE__ PSSI handle 317 * @param __FLAG__ flag to check. 318 * This parameter can be any combination of the following values: 319 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 320 * @retval The state of FLAG. 321 */ 322 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__)) 323 324 /** 325 * @brief Clear the PSSI pending flags. 326 * @param __HANDLE__ PSSI handle 327 * @param __FLAG__ specifies the flag to clear. 328 * This parameter can be any combination of the following values: 329 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 330 * @retval None 331 */ 332 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 333 334 /** 335 * @brief Enable the specified PSSI interrupts. 336 * @param __HANDLE__ PSSI handle 337 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled. 338 * This parameter can be any combination of the following values: 339 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask 340 * @retval None 341 */ 342 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 343 344 /** 345 * @brief Disable the specified PSSI interrupts. 346 * @param __HANDLE__ PSSI handle 347 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled. 348 * This parameter can be any combination of the following values: 349 * @arg PSSI_IT_OVR_IE: Configuration error mask 350 * @retval None 351 */ 352 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) 353 354 /** 355 * @brief Check whether the specified PSSI interrupt source is enabled or not. 356 * @param __HANDLE__ PSSI handle 357 * @param __INTERRUPT__ specifies the PSSI interrupt source to check. 358 * This parameter can be one of the following values: 359 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask 360 * @retval The state of INTERRUPT source. 361 */ 362 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) 363 364 365 /** 366 * @brief Check whether the PSSI Control signal is valid. 367 * @param __CONTROL__ Control signals configuration 368 * @retval Valid or not. 369 */ 370 371 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \ 372 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \ 373 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \ 374 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \ 375 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \ 376 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \ 377 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \ 378 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE )) 379 380 /** 381 * @brief Check whether the PSSI Bus Width is valid. 382 * @param __BUSWIDTH__ PSSI Bush width 383 * @retval Valid or not. 384 */ 385 386 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \ 387 ((__BUSWIDTH__) == HAL_PSSI_16LINES )) 388 389 390 /** 391 * @brief Check whether the PSSI Clock Polarity is valid. 392 * @param __CLOCKPOL__ PSSI Clock Polarity 393 * @retval Valid or not. 394 */ 395 396 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \ 397 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE )) 398 399 /** 400 * @brief Check whether the PSSI Data Enable Polarity is valid. 401 * @param __DEPOL__ PSSI DE Polarity 402 * @retval Valid or not. 403 */ 404 405 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \ 406 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH )) 407 408 /** 409 * @brief Check whether the PSSI Ready Polarity is valid. 410 * @param __RDYPOL__ PSSI RDY Polarity 411 * @retval Valid or not. 412 */ 413 414 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \ 415 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH )) 416 /** 417 * @} 418 */ 419 420 421 /* Exported functions --------------------------------------------------------*/ 422 /** @defgroup PSSI_Exported_Functions PSSI Exported Functions 423 * @{ 424 */ 425 426 /** @defgroup PSSI_Exported_Functions_Group1 Initialization and de-initialization functions 427 * @{ 428 */ 429 430 /* Initialization and de-initialization functions *******************************/ 431 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi); 432 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi); 433 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi); 434 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi); 435 /* Callbacks Register/UnRegister functions ***********************************/ 436 437 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, pPSSI_CallbackTypeDef pCallback); 438 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID); 439 440 441 /** 442 * @} 443 */ 444 445 446 /** @defgroup PSSI_Exported_Functions_Group2 IO operation functions 447 * @{ 448 */ 449 450 /* IO operation functions *******************************************************/ 451 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 452 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 453 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 454 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 455 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi); 456 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi); 457 458 /** 459 * @} 460 */ 461 462 /** @defgroup PSSI_Exported_Functions_Group3 Peripheral Control functions 463 * @{ 464 */ 465 466 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi); 467 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi); 468 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi); 469 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi); 470 471 472 /** 473 * @} 474 */ 475 476 /** @defgroup PSSI_Exported_Functions_Group4 Peripheral State and Error functions 477 * @{ 478 */ 479 480 /* Peripheral State functions ***************************************************/ 481 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi); 482 uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi); 483 484 /** 485 * @} 486 */ 487 488 /** 489 * @} 490 */ 491 492 /* Private constants ---------------------------------------------------------*/ 493 494 495 /* Private macros ------------------------------------------------------------*/ 496 497 #endif /* HAL_PSSI_MODULE_ENABLED */ 498 /** 499 * @} 500 */ 501 #endif /* PSSI */ 502 503 /** 504 * @} 505 */ 506 507 508 #ifdef __cplusplus 509 } 510 #endif 511 512 #endif /* STM32L4xx_HAL_PSSI_H */ 513
