1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_lptim.h 4 * @author MCD Application Team 5 * @brief Header file of LPTIM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_LPTIM_H 21 #define STM32L4xx_HAL_LPTIM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 #if defined (LPTIM1) || defined (LPTIM2) 35 36 /** @addtogroup LPTIM 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types 42 * @{ 43 */ 44 #define LPTIM_EXTI_LINE_LPTIM1 EXTI_IMR2_IM32 /*!< External interrupt line 32 Connected to the LPTIM1 EXTI Line */ 45 #define LPTIM_EXTI_LINE_LPTIM2 EXTI_IMR2_IM33 /*!< External interrupt line 33 Connected to the LPTIM2 EXTI Line */ 46 47 /** 48 * @brief LPTIM Clock configuration definition 49 */ 50 typedef struct 51 { 52 uint32_t Source; /*!< Selects the clock source. 53 This parameter can be a value of @ref LPTIM_Clock_Source */ 54 55 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. 56 This parameter can be a value of @ref LPTIM_Clock_Prescaler */ 57 58 } LPTIM_ClockConfigTypeDef; 59 60 /** 61 * @brief LPTIM Clock configuration definition 62 */ 63 typedef struct 64 { 65 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit 66 if the ULPTIM input is selected. 67 Note: This parameter is used only when Ultra low power clock source is used. 68 Note: If the polarity is configured on 'both edges', an auxiliary clock 69 (one of the Low power oscillator) must be active. 70 This parameter can be a value of @ref LPTIM_Clock_Polarity */ 71 72 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. 73 Note: This parameter is used only when Ultra low power clock source is used. 74 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ 75 76 } LPTIM_ULPClockConfigTypeDef; 77 78 /** 79 * @brief LPTIM Trigger configuration definition 80 */ 81 typedef struct 82 { 83 uint32_t Source; /*!< Selects the Trigger source. 84 This parameter can be a value of @ref LPTIM_Trigger_Source */ 85 86 uint32_t ActiveEdge; /*!< Selects the Trigger active edge. 87 Note: This parameter is used only when an external trigger is used. 88 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ 89 90 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. 91 Note: This parameter is used only when an external trigger is used. 92 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ 93 } LPTIM_TriggerConfigTypeDef; 94 95 /** 96 * @brief LPTIM Initialization Structure definition 97 */ 98 typedef struct 99 { 100 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ 101 102 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ 103 104 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ 105 106 uint32_t OutputPolarity; /*!< Specifies the Output polarity. 107 This parameter can be a value of @ref LPTIM_Output_Polarity */ 108 109 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare 110 values is done immediately or after the end of current period. 111 This parameter can be a value of @ref LPTIM_Updating_Mode */ 112 113 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event 114 or each external event. 115 This parameter can be a value of @ref LPTIM_Counter_Source */ 116 117 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). 118 This parameter can be a value of @ref LPTIM_Input1_Source */ 119 120 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). 121 Note: This parameter is used only for encoder feature so is used only 122 for LPTIM1 instance. 123 This parameter can be a value of @ref LPTIM_Input2_Source */ 124 125 #if defined(LPTIM_RCR_REP) 126 uint32_t RepetitionCounter;/*!< Specifies the repetition counter value. 127 Each time the RCR downcounter reaches zero, an update event is 128 generated and counting restarts from the RCR value (N). 129 Note: When using repetition counter the UpdateMode field must be 130 set to LPTIM_UPDATE_ENDOFPERIOD otherwise unpredictable 131 behavior may occur. 132 This parameter must be a number between Min_Data = 0x00 and 133 Max_Data = 0xFF. */ 134 #endif 135 } LPTIM_InitTypeDef; 136 137 /** 138 * @brief HAL LPTIM State structure definition 139 */ 140 typedef enum 141 { 142 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ 143 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 144 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ 145 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 146 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ 147 } HAL_LPTIM_StateTypeDef; 148 149 /** 150 * @brief LPTIM handle Structure definition 151 */ 152 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 153 typedef struct __LPTIM_HandleTypeDef 154 #else 155 typedef struct 156 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 157 { 158 LPTIM_TypeDef *Instance; /*!< Register base address */ 159 160 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ 161 162 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ 163 164 HAL_LockTypeDef Lock; /*!< LPTIM locking object */ 165 166 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ 167 168 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 169 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ 170 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ 171 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ 172 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ 173 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ 174 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ 175 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ 176 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ 177 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ 178 #if defined(LPTIM_RCR_REP) 179 void (* UpdateEventCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Update event detection Callback */ 180 void (* RepCounterWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Repetition counter register write complete Callback */ 181 #endif 182 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 183 } LPTIM_HandleTypeDef; 184 185 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 186 /** 187 * @brief HAL LPTIM Callback ID enumeration definition 188 */ 189 typedef enum 190 { 191 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ 192 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ 193 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ 194 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ 195 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ 196 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ 197 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ 198 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ 199 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ 200 #if defined(LPTIM_RCR_REP) 201 HAL_LPTIM_UPDATE_EVENT_CB_ID = 0x09U, /*!< Update event detection Callback ID */ 202 HAL_LPTIM_REP_COUNTER_WRITE_CB_ID = 0x0AU, /*!< Repetition counter register write complete Callback ID */ 203 #endif 204 } HAL_LPTIM_CallbackIDTypeDef; 205 206 /** 207 * @brief HAL TIM Callback pointer definition 208 */ 209 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ 210 211 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 212 /** 213 * @} 214 */ 215 216 /* Exported constants --------------------------------------------------------*/ 217 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants 218 * @{ 219 */ 220 221 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source 222 * @{ 223 */ 224 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U 225 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL 226 /** 227 * @} 228 */ 229 230 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler 231 * @{ 232 */ 233 #define LPTIM_PRESCALER_DIV1 0x00000000U 234 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 235 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 236 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) 237 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 238 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) 239 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) 240 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC 241 /** 242 * @} 243 */ 244 245 /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity 246 * @{ 247 */ 248 249 #define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U 250 #define LPTIM_OUTPUTPOLARITY_LOW LPTIM_CFGR_WAVPOL 251 /** 252 * @} 253 */ 254 255 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time 256 * @{ 257 */ 258 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U 259 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 260 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 261 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT 262 /** 263 * @} 264 */ 265 266 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity 267 * @{ 268 */ 269 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U 270 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 271 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 272 /** 273 * @} 274 */ 275 276 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source 277 * @{ 278 */ 279 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU 280 #define LPTIM_TRIGSOURCE_0 0x00000000U 281 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 282 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 283 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) 284 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 285 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) 286 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) 287 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL 288 /** 289 * @} 290 */ 291 292 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity 293 * @{ 294 */ 295 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 296 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 297 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN 298 /** 299 * @} 300 */ 301 302 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time 303 * @{ 304 */ 305 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U 306 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 307 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 308 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT 309 /** 310 * @} 311 */ 312 313 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode 314 * @{ 315 */ 316 317 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U 318 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD 319 /** 320 * @} 321 */ 322 323 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source 324 * @{ 325 */ 326 327 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U 328 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE 329 /** 330 * @} 331 */ 332 333 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source 334 * @{ 335 */ 336 337 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */ 338 #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_OR_OR_0 /*!< For LPTIM1 and LPTIM2 */ 339 #define LPTIM_INPUT1SOURCE_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM2 */ 340 #define LPTIM_INPUT1SOURCE_COMP1_COMP2 LPTIM_OR_OR /*!< For LPTIM2 */ 341 /** 342 * @} 343 */ 344 345 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source 346 * @{ 347 */ 348 349 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000U /*!< For LPTIM1 */ 350 #define LPTIM_INPUT2SOURCE_COMP2 LPTIM_OR_OR_1 /*!< For LPTIM1 */ 351 /** 352 * @} 353 */ 354 355 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition 356 * @{ 357 */ 358 359 #if defined(LPTIM_RCR_REP) 360 #define LPTIM_FLAG_REPOK LPTIM_ISR_REPOK 361 #define LPTIM_FLAG_UPDATE LPTIM_ISR_UE 362 #endif 363 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN 364 #define LPTIM_FLAG_UP LPTIM_ISR_UP 365 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK 366 #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK 367 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG 368 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM 369 #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM 370 /** 371 * @} 372 */ 373 374 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition 375 * @{ 376 */ 377 #if defined(LPTIM_RCR_REP) 378 #define LPTIM_IT_REPOK LPTIM_IER_REPOKIE 379 #define LPTIM_IT_UPDATE LPTIM_IER_UEIE 380 #endif 381 #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE 382 #define LPTIM_IT_UP LPTIM_IER_UPIE 383 #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE 384 #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE 385 #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE 386 #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE 387 #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE 388 /** 389 * @} 390 */ 391 392 /** 393 * @} 394 */ 395 396 /* Exported macros -----------------------------------------------------------*/ 397 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros 398 * @{ 399 */ 400 401 /** @brief Reset LPTIM handle state. 402 * @param __HANDLE__ LPTIM handle 403 * @retval None 404 */ 405 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 406 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 407 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 408 (__HANDLE__)->MspInitCallback = NULL; \ 409 (__HANDLE__)->MspDeInitCallback = NULL; \ 410 } while(0) 411 #else 412 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET) 413 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 414 415 /** 416 * @brief Enable the LPTIM peripheral. 417 * @param __HANDLE__ LPTIM handle 418 * @retval None 419 */ 420 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) 421 422 /** 423 * @brief Disable the LPTIM peripheral. 424 * @param __HANDLE__ LPTIM handle 425 * @note The following sequence is required to solve LPTIM disable HW limitation. 426 * Please check Errata Sheet ES0335 for more details under "MCU may remain 427 * stuck in LPTIM interrupt when entering Stop mode" section. 428 * @note Please call @ref HAL_LPTIM_GetState() after a call to __HAL_LPTIM_DISABLE to 429 * check for TIMEOUT. 430 * @retval None 431 */ 432 #define __HAL_LPTIM_DISABLE(__HANDLE__) LPTIM_Disable(__HANDLE__) 433 434 /** 435 * @brief Start the LPTIM peripheral in Continuous mode. 436 * @param __HANDLE__ LPTIM handle 437 * @retval None 438 */ 439 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) 440 /** 441 * @brief Start the LPTIM peripheral in single mode. 442 * @param __HANDLE__ LPTIM handle 443 * @retval None 444 */ 445 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) 446 447 #if defined(LPTIM_CR_COUNTRST) 448 /** 449 * @brief Reset the LPTIM Counter register in synchronous mode. 450 * @param __HANDLE__ LPTIM handle 451 * @retval None 452 */ 453 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST) 454 #endif /* LPTIM_CR_COUNTRST */ 455 456 #if defined(LPTIM_CR_RSTARE) 457 /** 458 * @brief Reset after read of the LPTIM Counter register in asynchronous mode. 459 * @param __HANDLE__ LPTIM handle 460 * @retval None 461 */ 462 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE) 463 #endif /* LPTIM_CR_RSTARE */ 464 465 /** 466 * @brief Write the passed parameter in the Autoreload register. 467 * @param __HANDLE__ LPTIM handle 468 * @param __VALUE__ Autoreload value 469 * @retval None 470 * @note The ARR register can only be modified when the LPTIM instance is enabled. 471 */ 472 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) 473 474 /** 475 * @brief Write the passed parameter in the Compare register. 476 * @param __HANDLE__ LPTIM handle 477 * @param __VALUE__ Compare value 478 * @retval None 479 * @note The CMP register can only be modified when the LPTIM instance is enabled. 480 */ 481 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__)) 482 483 #if defined(LPTIM_RCR_REP) 484 /** 485 * @brief Write the passed parameter in the Repetition register. 486 * @param __HANDLE__ LPTIM handle 487 * @param __VALUE__ Repetition value 488 * @retval None 489 */ 490 #define __HAL_LPTIM_REPETITIONCOUNTER_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->RCR = (__VALUE__)) 491 492 /** 493 * @brief Return the current Repetition value. 494 * @param __HANDLE__ LPTIM handle 495 * @retval Repetition register value 496 * @note The RCR register can only be modified when the LPTIM instance is enabled. 497 */ 498 #define __HAL_LPTIM_REPETITIONCOUNTER_GET(__HANDLE__) ((__HANDLE__)->Instance->RCR) 499 #endif 500 501 /** 502 * @brief Check whether the specified LPTIM flag is set or not. 503 * @param __HANDLE__ LPTIM handle 504 * @param __FLAG__ LPTIM flag to check 505 * This parameter can be a value of: 506 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag (when available). 507 * @arg LPTIM_FLAG_UPDATE : Update event Flag (when available). 508 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 509 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 510 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 511 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. 512 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 513 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 514 * @arg LPTIM_FLAG_CMPM : Compare match Flag. 515 * @retval The state of the specified flag (SET or RESET). 516 */ 517 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) 518 519 /** 520 * @brief Clear the specified LPTIM flag. 521 * @param __HANDLE__ LPTIM handle. 522 * @param __FLAG__ LPTIM flag to clear. 523 * This parameter can be a value of: 524 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag (when available). 525 * @arg LPTIM_FLAG_UPDATE : Update event Flag (when available). 526 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 527 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 528 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 529 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag. 530 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 531 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 532 * @arg LPTIM_FLAG_CMPM : Compare match Flag. 533 * @retval None. 534 */ 535 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 536 537 /** 538 * @brief Enable the specified LPTIM interrupt. 539 * @param __HANDLE__ LPTIM handle. 540 * @param __INTERRUPT__ LPTIM interrupt to set. 541 * This parameter can be a value of: 542 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt (when available). 543 * @arg LPTIM_IT_UPDATE : Update event register Interrupt (when available). 544 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 545 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 546 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 547 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. 548 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 549 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 550 * @arg LPTIM_IT_CMPM : Compare match Interrupt. 551 * @retval None. 552 * @note The LPTIM interrupts can only be enabled when the LPTIM instance is disabled. 553 */ 554 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 555 556 /** 557 * @brief Disable the specified LPTIM interrupt. 558 * @param __HANDLE__ LPTIM handle. 559 * @param __INTERRUPT__ LPTIM interrupt to set. 560 * This parameter can be a value of: 561 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt (when available). 562 * @arg LPTIM_IT_UPDATE : Update event register Interrupt (when available). 563 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 564 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 565 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 566 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. 567 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 568 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 569 * @arg LPTIM_IT_CMPM : Compare match Interrupt. 570 * @retval None. 571 * @note The LPTIM interrupts can only be disabled when the LPTIM instance is disabled. 572 */ 573 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) 574 575 /** 576 * @brief Check whether the specified LPTIM interrupt source is enabled or not. 577 * @param __HANDLE__ LPTIM handle. 578 * @param __INTERRUPT__ LPTIM interrupt to check. 579 * This parameter can be a value of: 580 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt (when available). 581 * @arg LPTIM_IT_UPDATE : Update event register Interrupt (when available). 582 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 583 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 584 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 585 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt. 586 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 587 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 588 * @arg LPTIM_IT_CMPM : Compare match Interrupt. 589 * @retval Interrupt status. 590 */ 591 592 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\ 593 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 594 595 /** 596 * @brief Enable the LPTIM1 EXTI line in interrupt mode. 597 * @retval None 598 */ 599 #define __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() (EXTI->IMR2 |= LPTIM_EXTI_LINE_LPTIM1) 600 601 /** 602 * @brief Disable the LPTIM1 EXTI line in interrupt mode. 603 * @retval None 604 */ 605 #define __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() (EXTI->IMR2\ 606 &= ~(LPTIM_EXTI_LINE_LPTIM1)) 607 608 /** 609 * @brief Enable the LPTIM1 EXTI line in event mode. 610 * @retval None 611 */ 612 #define __HAL_LPTIM_LPTIM1_EXTI_ENABLE_EVENT() (EXTI->EMR2 |= LPTIM_EXTI_LINE_LPTIM1) 613 614 /** 615 * @brief Disable the LPTIM1 EXTI line in event mode. 616 * @retval None 617 */ 618 #define __HAL_LPTIM_LPTIM1_EXTI_DISABLE_EVENT() (EXTI->EMR2\ 619 &= ~(LPTIM_EXTI_LINE_LPTIM1)) 620 621 /** 622 * @brief Enable the LPTIM2 EXTI line in interrupt mode. 623 * @retval None 624 */ 625 #define __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT() (EXTI->IMR2 |= LPTIM_EXTI_LINE_LPTIM2) 626 627 /** 628 * @brief Disable the LPTIM2 EXTI line in interrupt mode. 629 * @retval None 630 */ 631 #define __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT() (EXTI->IMR2\ 632 &= ~(LPTIM_EXTI_LINE_LPTIM2)) 633 634 /** 635 * @brief Enable the LPTIM2 EXTI line in event mode. 636 * @retval None 637 */ 638 #define __HAL_LPTIM_LPTIM2_EXTI_ENABLE_EVENT() (EXTI->EMR2 |= LPTIM_EXTI_LINE_LPTIM2) 639 640 /** 641 * @brief Disable the LPTIM2 EXTI line in event mode. 642 * @retval None 643 */ 644 #define __HAL_LPTIM_LPTIM2_EXTI_DISABLE_EVENT() (EXTI->EMR2\ 645 &= ~(LPTIM_EXTI_LINE_LPTIM2)) 646 647 /** 648 * @} 649 */ 650 651 /* Exported functions --------------------------------------------------------*/ 652 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions 653 * @{ 654 */ 655 656 /** @addtogroup LPTIM_Exported_Functions_Group1 657 * @brief Initialization and Configuration functions. 658 * @{ 659 */ 660 /* Initialization/de-initialization functions ********************************/ 661 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); 662 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); 663 664 /* MSP functions *************************************************************/ 665 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); 666 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); 667 /** 668 * @} 669 */ 670 671 /** @addtogroup LPTIM_Exported_Functions_Group2 672 * @brief Start-Stop operation functions. 673 * @{ 674 */ 675 /* Start/Stop operation functions *********************************************/ 676 /* ################################# PWM Mode ################################*/ 677 /* Blocking mode: Polling */ 678 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 679 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim); 680 /* Non-Blocking mode: Interrupt */ 681 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 682 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim); 683 684 /* ############################# One Pulse Mode ##############################*/ 685 /* Blocking mode: Polling */ 686 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 687 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim); 688 /* Non-Blocking mode: Interrupt */ 689 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 690 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim); 691 692 /* ############################## Set once Mode ##############################*/ 693 /* Blocking mode: Polling */ 694 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 695 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim); 696 /* Non-Blocking mode: Interrupt */ 697 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse); 698 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim); 699 700 /* ############################### Encoder Mode ##############################*/ 701 /* Blocking mode: Polling */ 702 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 703 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); 704 /* Non-Blocking mode: Interrupt */ 705 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 706 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); 707 708 /* ############################# Time out Mode ##############################*/ 709 /* Blocking mode: Polling */ 710 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); 711 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); 712 /* Non-Blocking mode: Interrupt */ 713 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout); 714 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); 715 716 /* ############################## Counter Mode ###############################*/ 717 /* Blocking mode: Polling */ 718 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 719 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); 720 /* Non-Blocking mode: Interrupt */ 721 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); 722 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); 723 /** 724 * @} 725 */ 726 727 /** @addtogroup LPTIM_Exported_Functions_Group3 728 * @brief Read operation functions. 729 * @{ 730 */ 731 /* Reading operation functions ************************************************/ 732 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim); 733 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim); 734 uint32_t HAL_LPTIM_ReadCompare(const LPTIM_HandleTypeDef *hlptim); 735 /** 736 * @} 737 */ 738 739 /** @addtogroup LPTIM_Exported_Functions_Group4 740 * @brief LPTIM IRQ handler and callback functions. 741 * @{ 742 */ 743 /* LPTIM IRQ functions *******************************************************/ 744 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); 745 746 /* CallBack functions ********************************************************/ 747 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); 748 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); 749 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); 750 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); 751 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); 752 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); 753 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); 754 #if defined(LPTIM_RCR_REP) 755 void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim); 756 void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim); 757 #endif 758 759 /* Callbacks Register/UnRegister functions ***********************************/ 760 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 761 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, 762 pLPTIM_CallbackTypeDef pCallback); 763 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); 764 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 765 /** 766 * @} 767 */ 768 769 /** @addtogroup LPTIM_Group5 770 * @brief Peripheral State functions. 771 * @{ 772 */ 773 /* Peripheral State functions ************************************************/ 774 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); 775 /** 776 * @} 777 */ 778 779 /** 780 * @} 781 */ 782 783 /* Private types -------------------------------------------------------------*/ 784 /** @defgroup LPTIM_Private_Types LPTIM Private Types 785 * @{ 786 */ 787 788 /** 789 * @} 790 */ 791 792 /* Private variables ---------------------------------------------------------*/ 793 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables 794 * @{ 795 */ 796 797 /** 798 * @} 799 */ 800 801 /* Private constants ---------------------------------------------------------*/ 802 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants 803 * @{ 804 */ 805 806 /** 807 * @} 808 */ 809 810 /* Private macros ------------------------------------------------------------*/ 811 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros 812 * @{ 813 */ 814 815 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ 816 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) 817 818 819 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ 820 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ 821 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ 822 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ 823 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ 824 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ 825 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ 826 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) 827 828 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) 829 830 #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \ 831 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH)) 832 833 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ 834 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ 835 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ 836 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) 837 838 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ 839 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ 840 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) 841 842 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ 843 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ 844 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ 845 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ 846 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ 847 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ 848 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ 849 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ 850 ((__TRIG__) == LPTIM_TRIGSOURCE_7)) 851 852 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ 853 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ 854 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) 855 856 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ 857 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ 858 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ 859 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) 860 861 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ 862 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) 863 864 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ 865 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) 866 867 #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((0x00000001UL <= (__AUTORELOAD__)) &&\ 868 ((__AUTORELOAD__) <= 0x0000FFFFUL)) 869 870 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) 871 872 #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ 873 ((__PERIOD__) <= 0x0000FFFFUL)) 874 875 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) 876 877 #if defined(LPTIM_RCR_REP) 878 #define IS_LPTIM_REPETITION(__REPETITION__) ((__REPETITION__) <= 0x000000FFUL) 879 #endif 880 881 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 882 ((((__INSTANCE__) == LPTIM1) && \ 883 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 884 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) \ 885 || \ 886 (((__INSTANCE__) == LPTIM2) && \ 887 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 888 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \ 889 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP2) || \ 890 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1_COMP2)))) 891 892 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 893 (((__INSTANCE__) == LPTIM1) && \ 894 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ 895 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) 896 897 /** 898 * @} 899 */ 900 901 /* Private functions ---------------------------------------------------------*/ 902 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 903 * @{ 904 */ 905 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim); 906 /** 907 * @} 908 */ 909 910 /** 911 * @} 912 */ 913 914 #endif /* LPTIM1 || LPTIM2 */ 915 /** 916 * @} 917 */ 918 919 #ifdef __cplusplus 920 } 921 #endif 922 923 #endif /* STM32L4xx_HAL_LPTIM_H */ 924
