1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_dac.h 4 * @author MCD Application Team 5 * @brief Header file of DAC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_DAC_H 21 #define STM32L4xx_HAL_DAC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** @addtogroup STM32L4xx_HAL_Driver 28 * @{ 29 */ 30 31 /* Includes ------------------------------------------------------------------*/ 32 #include "stm32l4xx_hal_def.h" 33 34 #if defined(DAC1) 35 36 /** @addtogroup DAC 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 42 /** @defgroup DAC_Exported_Types DAC Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief HAL State structures definition 48 */ 49 typedef enum 50 { 51 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ 52 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ 53 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ 54 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ 55 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ 56 57 } HAL_DAC_StateTypeDef; 58 59 /** 60 * @brief DAC handle Structure definition 61 */ 62 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 63 typedef struct __DAC_HandleTypeDef 64 #else 65 typedef struct 66 #endif 67 { 68 DAC_TypeDef *Instance; /*!< Register base address */ 69 70 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ 71 72 HAL_LockTypeDef Lock; /*!< DAC locking object */ 73 74 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ 75 76 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ 77 78 __IO uint32_t ErrorCode; /*!< DAC Error code */ 79 80 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 81 void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 82 void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 83 void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 84 void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); 85 void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 86 void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 87 void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 88 void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac); 89 90 void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); 91 void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef *hdac); 92 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 93 94 } DAC_HandleTypeDef; 95 96 /** 97 * @brief DAC Configuration sample and hold Channel structure definition 98 */ 99 typedef struct 100 { 101 uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. 102 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 103 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 104 105 uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel 106 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 107 This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ 108 109 uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel 110 This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. 111 This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ 112 } DAC_SampleAndHoldConfTypeDef; 113 114 /** 115 * @brief DAC Configuration regular Channel structure definition 116 */ 117 typedef struct 118 { 119 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 120 uint32_t DAC_HighFrequency; /*!< Specifies the frequency interface mode 121 This parameter can be a value of @ref DAC_HighFrequency */ 122 #endif /* STM32L4P5xx STM32L4Q5xx STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 123 124 uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. 125 This parameter can be a value of @ref DAC_SampleAndHold */ 126 127 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. 128 This parameter can be a value of @ref DAC_trigger_selection */ 129 130 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. 131 This parameter can be a value of @ref DAC_output_buffer */ 132 133 uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . 134 This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ 135 136 uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode 137 This parameter must be a value of @ref DAC_UserTrimming 138 DAC_UserTrimming is either factory or user trimming */ 139 140 uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value 141 i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. 142 This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ 143 144 DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ 145 146 } DAC_ChannelConfTypeDef; 147 148 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 149 /** 150 * @brief HAL DAC Callback ID enumeration definition 151 */ 152 typedef enum 153 { 154 HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ 155 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ 156 HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ 157 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ 158 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ 159 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ 160 HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ 161 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ 162 HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ 163 HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ 164 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ 165 } HAL_DAC_CallbackIDTypeDef; 166 167 /** 168 * @brief HAL DAC Callback pointer definition 169 */ 170 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); 171 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 172 173 /** 174 * @} 175 */ 176 177 /* Exported constants --------------------------------------------------------*/ 178 179 /** @defgroup DAC_Exported_Constants DAC Exported Constants 180 * @{ 181 */ 182 183 /** @defgroup DAC_Error_Code DAC Error Code 184 * @{ 185 */ 186 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ 187 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ 188 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ 189 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ 190 #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ 191 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 192 #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ 193 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 194 195 /** 196 * @} 197 */ 198 199 /** @defgroup DAC_trigger_selection DAC trigger selection 200 * @{ 201 */ 202 203 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) 204 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register 205 has been loaded, and not by external trigger */ 206 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 207 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 208 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 209 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 210 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 211 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 212 213 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 214 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register 215 has been loaded, and not by external trigger */ 216 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 217 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 218 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 219 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 220 #endif /* STM32L451xx STM32L452xx STM32L462xx */ 221 222 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) 223 #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register 224 has been loaded, and not by external trigger */ 225 #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 226 #define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 227 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 228 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 229 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 230 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 231 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 232 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ 233 #endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx*/ 234 235 236 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 237 #define DAC_TRIGGER_NONE 0x00000000U /*!< conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ 238 #define DAC_TRIGGER_SOFTWARE ( DAC_CR_TEN1) /*!< conversion started by software trigger for DAC channel */ 239 #define DAC_TRIGGER_T1_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel. */ 240 #define DAC_TRIGGER_T2_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ 241 #define DAC_TRIGGER_T4_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ 242 #define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ 243 #define DAC_TRIGGER_T6_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ 244 #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ 245 #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ 246 #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ 247 #define DAC_TRIGGER_LPTIM1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LPTIM1 OUT TRGO selected as external conversion trigger for DAC channel */ 248 #define DAC_TRIGGER_LPTIM2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LPTIM2 OUT TRGO selected as external conversion trigger for DAC channel */ 249 #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ 250 251 #endif /* STM32L4P5xx STM32L4Q5xx STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 252 253 254 /** 255 * @} 256 */ 257 258 /** @defgroup DAC_output_buffer DAC output buffer 259 * @{ 260 */ 261 #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U 262 #define DAC_OUTPUTBUFFER_DISABLE (DAC_MCR_MODE1_1) 263 264 /** 265 * @} 266 */ 267 268 /** @defgroup DAC_Channel_selection DAC Channel selection 269 * @{ 270 */ 271 #define DAC_CHANNEL_1 0x00000000U 272 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ 273 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ 274 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ 275 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 276 #define DAC_CHANNEL_2 0x00000010U 277 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 278 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ 279 /* STM32L4P5xx STM32L4Q5xx */ 280 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 281 282 /** 283 * @} 284 */ 285 286 /** @defgroup DAC_data_alignment DAC data alignment 287 * @{ 288 */ 289 #define DAC_ALIGN_12B_R 0x00000000U 290 #define DAC_ALIGN_12B_L 0x00000004U 291 #define DAC_ALIGN_8B_R 0x00000008U 292 293 /** 294 * @} 295 */ 296 297 /** @defgroup DAC_flags_definition DAC flags definition 298 * @{ 299 */ 300 #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) 301 #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) 302 303 /** 304 * @} 305 */ 306 307 /** @defgroup DAC_IT_definition DAC IT definition 308 * @{ 309 */ 310 #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) 311 #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) 312 313 /** 314 * @} 315 */ 316 317 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral 318 * @{ 319 */ 320 #define DAC_CHIPCONNECT_DISABLE 0x00000000U 321 #define DAC_CHIPCONNECT_ENABLE (DAC_MCR_MODE1_0) 322 323 /** 324 * @} 325 */ 326 327 /** @defgroup DAC_UserTrimming DAC User Trimming 328 * @{ 329 */ 330 #define DAC_TRIMMING_FACTORY 0x00000000U /*!< Factory trimming */ 331 #define DAC_TRIMMING_USER 0x00000001U /*!< User trimming */ 332 333 /** 334 * @} 335 */ 336 337 /** @defgroup DAC_SampleAndHold DAC power mode 338 * @{ 339 */ 340 #define DAC_SAMPLEANDHOLD_DISABLE 0x00000000U 341 #define DAC_SAMPLEANDHOLD_ENABLE (DAC_MCR_MODE1_2) 342 343 /** 344 * @} 345 */ 346 #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 347 /** @defgroup DAC_HighFrequency DAC high frequency interface mode 348 * @{ 349 */ 350 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE 0x00000000U /*!< High frequency interface mode disabled */ 351 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ (DAC_CR_HFSEL) /*!< High frequency interface mode compatible to AHB>80MHz enabled */ 352 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC 0x00000002U /*!< High frequency interface mode automatic */ 353 354 /** 355 * @} 356 */ 357 #endif /* STM32L4P5xx STM32L4Q5xx STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 358 359 /** 360 * @} 361 */ 362 363 /* Exported macro ------------------------------------------------------------*/ 364 365 /** @defgroup DAC_Exported_Macros DAC Exported Macros 366 * @{ 367 */ 368 369 /** @brief Reset DAC handle state. 370 * @param __HANDLE__ specifies the DAC handle. 371 * @retval None 372 */ 373 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 374 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ 375 (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ 376 (__HANDLE__)->MspInitCallback = NULL; \ 377 (__HANDLE__)->MspDeInitCallback = NULL; \ 378 } while(0) 379 #else 380 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) 381 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 382 383 /** @brief Enable the DAC channel. 384 * @param __HANDLE__ specifies the DAC handle. 385 * @param __DAC_Channel__ specifies the DAC channel 386 * @retval None 387 */ 388 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ 389 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 390 391 /** @brief Disable the DAC channel. 392 * @param __HANDLE__ specifies the DAC handle 393 * @param __DAC_Channel__ specifies the DAC channel. 394 * @retval None 395 */ 396 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ 397 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) 398 399 /** @brief Set DHR12R1 alignment. 400 * @param __ALIGNMENT__ specifies the DAC alignment 401 * @retval None 402 */ 403 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__)) 404 405 /** @brief Set DHR12R2 alignment. 406 * @param __ALIGNMENT__ specifies the DAC alignment 407 * @retval None 408 */ 409 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__)) 410 411 /** @brief Set DHR12RD alignment. 412 * @param __ALIGNMENT__ specifies the DAC alignment 413 * @retval None 414 */ 415 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__)) 416 417 /** @brief Enable the DAC interrupt. 418 * @param __HANDLE__ specifies the DAC handle 419 * @param __INTERRUPT__ specifies the DAC interrupt. 420 * This parameter can be any combination of the following values: 421 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 422 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 423 * @retval None 424 */ 425 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) 426 427 /** @brief Disable the DAC interrupt. 428 * @param __HANDLE__ specifies the DAC handle 429 * @param __INTERRUPT__ specifies the DAC interrupt. 430 * This parameter can be any combination of the following values: 431 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 432 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 433 * @retval None 434 */ 435 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) 436 437 /** @brief Check whether the specified DAC interrupt source is enabled or not. 438 * @param __HANDLE__ DAC handle 439 * @param __INTERRUPT__ DAC interrupt source to check 440 * This parameter can be any combination of the following values: 441 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt 442 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt 443 * @retval State of interruption (SET or RESET) 444 */ 445 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) 446 447 /** @brief Get the selected DAC's flag status. 448 * @param __HANDLE__ specifies the DAC handle. 449 * @param __FLAG__ specifies the DAC flag to get. 450 * This parameter can be any combination of the following values: 451 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 452 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 453 * @retval None 454 */ 455 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 456 457 /** @brief Clear the DAC's flag. 458 * @param __HANDLE__ specifies the DAC handle. 459 * @param __FLAG__ specifies the DAC flag to clear. 460 * This parameter can be any combination of the following values: 461 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag 462 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag 463 * @retval None 464 */ 465 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) 466 467 /** 468 * @} 469 */ 470 471 /* Private macro -------------------------------------------------------------*/ 472 473 /** @defgroup DAC_Private_Macros DAC Private Macros 474 * @{ 475 */ 476 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ 477 ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) 478 479 #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ 480 defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ 481 defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ 482 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) 483 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ 484 ((CHANNEL) == DAC_CHANNEL_2)) 485 #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ 486 /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ 487 /* STM32L4P5xx STM32L4Q5xx */ 488 /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ 489 490 #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 491 #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) 492 #endif /* STM32L451xx STM32L452xx STM32L462xx */ 493 494 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ 495 ((ALIGN) == DAC_ALIGN_12B_L) || \ 496 ((ALIGN) == DAC_ALIGN_8B_R)) 497 498 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) 499 500 #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFU) 501 502 /** 503 * @} 504 */ 505 506 /* Include DAC HAL Extended module */ 507 #include "stm32l4xx_hal_dac_ex.h" 508 509 /* Exported functions --------------------------------------------------------*/ 510 511 /** @addtogroup DAC_Exported_Functions 512 * @{ 513 */ 514 515 /** @addtogroup DAC_Exported_Functions_Group1 516 * @{ 517 */ 518 /* Initialization and de-initialization functions *****************************/ 519 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); 520 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); 521 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); 522 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); 523 524 /** 525 * @} 526 */ 527 528 /** @addtogroup DAC_Exported_Functions_Group2 529 * @{ 530 */ 531 /* IO operation functions *****************************************************/ 532 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); 533 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); 534 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, 535 uint32_t Alignment); 536 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); 537 538 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); 539 540 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); 541 542 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); 543 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); 544 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); 545 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); 546 547 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) 548 /* DAC callback registering/unregistering */ 549 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, 550 pDAC_CallbackTypeDef pCallback); 551 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); 552 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ 553 554 /** 555 * @} 556 */ 557 558 /** @addtogroup DAC_Exported_Functions_Group3 559 * @{ 560 */ 561 /* Peripheral Control functions ***********************************************/ 562 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel); 563 564 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); 565 /** 566 * @} 567 */ 568 569 /** @addtogroup DAC_Exported_Functions_Group4 570 * @{ 571 */ 572 /* Peripheral State and Error functions ***************************************/ 573 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac); 574 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); 575 576 /** 577 * @} 578 */ 579 580 /** 581 * @} 582 */ 583 584 /** @defgroup DAC_Private_Functions DAC Private Functions 585 * @{ 586 */ 587 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); 588 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); 589 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); 590 /** 591 * @} 592 */ 593 594 /** 595 * @} 596 */ 597 598 #endif /* DAC1 */ 599 600 /** 601 * @} 602 */ 603 604 #ifdef __cplusplus 605 } 606 #endif 607 608 609 #endif /*STM32L4xx_HAL_DAC_H */ 610 611 612
