1 /** 2 ****************************************************************************** 3 * @file stm32l0xx_ll_lptim.c 4 * @author MCD Application Team 5 * @brief LPTIM LL module driver. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 #if defined(USE_FULL_LL_DRIVER) 19 20 /* Includes ------------------------------------------------------------------*/ 21 #include "stm32l0xx_ll_lptim.h" 22 #include "stm32l0xx_ll_bus.h" 23 #include "stm32l0xx_ll_rcc.h" 24 25 26 #ifdef USE_FULL_ASSERT 27 #include "stm32_assert.h" 28 #else 29 #define assert_param(expr) ((void)0U) 30 #endif /* USE_FULL_ASSERT */ 31 32 /** @addtogroup STM32L0xx_LL_Driver 33 * @{ 34 */ 35 36 #if defined (LPTIM1) 37 38 /** @addtogroup LPTIM_LL 39 * @{ 40 */ 41 42 /* Private types -------------------------------------------------------------*/ 43 /* Private variables ---------------------------------------------------------*/ 44 /* Private constants ---------------------------------------------------------*/ 45 /* Private macros ------------------------------------------------------------*/ 46 /** @addtogroup LPTIM_LL_Private_Macros 47 * @{ 48 */ 49 #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ 50 || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 51 52 #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ 53 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 54 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 55 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 56 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 57 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 58 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 59 || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) 60 61 #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \ 62 || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE)) 63 64 #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \ 65 || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE)) 66 /** 67 * @} 68 */ 69 70 71 /* Private function prototypes -----------------------------------------------*/ 72 /* Private functions ---------------------------------------------------------*/ 73 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 74 * @{ 75 */ 76 /** 77 * @} 78 */ 79 /* Exported functions --------------------------------------------------------*/ 80 /** @addtogroup LPTIM_LL_Exported_Functions 81 * @{ 82 */ 83 84 /** @addtogroup LPTIM_LL_EF_Init 85 * @{ 86 */ 87 88 /** 89 * @brief Set LPTIMx registers to their reset values. 90 * @param LPTIMx LP Timer instance 91 * @retval An ErrorStatus enumeration value: 92 * - SUCCESS: LPTIMx registers are de-initialized 93 * - ERROR: invalid LPTIMx instance 94 */ LL_LPTIM_DeInit(const LPTIM_TypeDef * LPTIMx)95ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx) 96 { 97 ErrorStatus result = SUCCESS; 98 99 /* Check the parameters */ 100 assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 101 102 if (LPTIMx == LPTIM1) 103 { 104 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1); 105 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1); 106 } 107 else 108 { 109 result = ERROR; 110 } 111 112 return result; 113 } 114 115 /** 116 * @brief Set each fields of the LPTIM_InitStruct structure to its default 117 * value. 118 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 119 * @retval None 120 */ LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef * LPTIM_InitStruct)121void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 122 { 123 /* Set the default configuration */ 124 LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL; 125 LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1; 126 LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM; 127 LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR; 128 } 129 130 /** 131 * @brief Configure the LPTIMx peripheral according to the specified parameters. 132 * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled. 133 * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable(). 134 * @param LPTIMx LP Timer Instance 135 * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 136 * @retval An ErrorStatus enumeration value: 137 * - SUCCESS: LPTIMx instance has been initialized 138 * - ERROR: LPTIMx instance hasn't been initialized 139 */ LL_LPTIM_Init(LPTIM_TypeDef * LPTIMx,const LL_LPTIM_InitTypeDef * LPTIM_InitStruct)140ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 141 { 142 ErrorStatus result = SUCCESS; 143 /* Check the parameters */ 144 assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 145 assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource)); 146 assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler)); 147 assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform)); 148 assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity)); 149 150 /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled 151 (ENABLE bit is reset to 0). 152 */ 153 if (LL_LPTIM_IsEnabled(LPTIMx) == 1UL) 154 { 155 result = ERROR; 156 } 157 else 158 { 159 /* Set CKSEL bitfield according to ClockSource value */ 160 /* Set PRESC bitfield according to Prescaler value */ 161 /* Set WAVE bitfield according to Waveform value */ 162 /* Set WAVEPOL bitfield according to Polarity value */ 163 MODIFY_REG(LPTIMx->CFGR, 164 (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL), 165 LPTIM_InitStruct->ClockSource | \ 166 LPTIM_InitStruct->Prescaler | \ 167 LPTIM_InitStruct->Waveform | \ 168 LPTIM_InitStruct->Polarity); 169 } 170 171 return result; 172 } 173 174 /** 175 * @brief Disable the LPTIM instance 176 * @rmtoll CR ENABLE LL_LPTIM_Disable 177 * @param LPTIMx Low-Power Timer instance 178 * @note The following sequence is required to solve LPTIM disable HW limitation. 179 * Please check Errata Sheet ES0335 for more details under "MCU may remain 180 * stuck in LPTIM interrupt when entering Stop mode" section. 181 * @retval None 182 */ LL_LPTIM_Disable(LPTIM_TypeDef * LPTIMx)183void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) 184 { 185 LL_RCC_ClocksTypeDef rcc_clock; 186 uint32_t tmpclksource = 0; 187 uint32_t tmpIER; 188 uint32_t tmpCFGR; 189 uint32_t tmpCMP; 190 uint32_t tmpARR; 191 uint32_t primask_bit; 192 193 /* Check the parameters */ 194 assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 195 196 /* Enter critical section */ 197 primask_bit = __get_PRIMASK(); 198 __set_PRIMASK(1) ; 199 200 /********** Save LPTIM Config *********/ 201 /* Save LPTIM source clock */ 202 switch ((uint32_t)LPTIMx) 203 { 204 case LPTIM1_BASE: 205 tmpclksource = LL_RCC_GetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE); 206 break; 207 default: 208 break; 209 } 210 211 /* Save LPTIM configuration registers */ 212 tmpIER = LPTIMx->IER; 213 tmpCFGR = LPTIMx->CFGR; 214 tmpCMP = LPTIMx->CMP; 215 tmpARR = LPTIMx->ARR; 216 217 /************* Reset LPTIM ************/ 218 (void)LL_LPTIM_DeInit(LPTIMx); 219 220 /********* Restore LPTIM Config *******/ 221 LL_RCC_GetSystemClocksFreq(&rcc_clock); 222 223 if ((tmpCMP != 0UL) || (tmpARR != 0UL)) 224 { 225 /* Force LPTIM source kernel clock from APB */ 226 switch ((uint32_t)LPTIMx) 227 { 228 case LPTIM1_BASE: 229 LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_PCLK1); 230 break; 231 default: 232 break; 233 } 234 235 if (tmpCMP != 0UL) 236 { 237 /* Restore CMP and ARR registers (LPTIM should be enabled first) */ 238 LPTIMx->CR |= LPTIM_CR_ENABLE; 239 LPTIMx->CMP = tmpCMP; 240 241 /* Polling on CMP write ok status after above restore operation */ 242 do 243 { 244 rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 245 } while (((LL_LPTIM_IsActiveFlag_CMPOK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 246 247 LL_LPTIM_ClearFlag_CMPOK(LPTIMx); 248 } 249 250 if (tmpARR != 0UL) 251 { 252 LPTIMx->CR |= LPTIM_CR_ENABLE; 253 LPTIMx->ARR = tmpARR; 254 255 LL_RCC_GetSystemClocksFreq(&rcc_clock); 256 /* Polling on ARR write ok status after above restore operation */ 257 do 258 { 259 rcc_clock.SYSCLK_Frequency--; /* Used for timeout */ 260 } while (((LL_LPTIM_IsActiveFlag_ARROK(LPTIMx) != 1UL)) && ((rcc_clock.SYSCLK_Frequency) > 0UL)); 261 262 LL_LPTIM_ClearFlag_ARROK(LPTIMx); 263 } 264 265 266 /* Restore LPTIM source kernel clock */ 267 LL_RCC_SetLPTIMClockSource(tmpclksource); 268 } 269 270 /* Restore configuration registers (LPTIM should be disabled first) */ 271 LPTIMx->CR &= ~(LPTIM_CR_ENABLE); 272 LPTIMx->IER = tmpIER; 273 LPTIMx->CFGR = tmpCFGR; 274 275 /* Exit critical section: restore previous priority mask */ 276 __set_PRIMASK(primask_bit); 277 } 278 279 /** 280 * @} 281 */ 282 283 /** 284 * @} 285 */ 286 287 /** 288 * @} 289 */ 290 291 #endif /* LPTIM1 */ 292 293 /** 294 * @} 295 */ 296 297 #endif /* USE_FULL_LL_DRIVER */ 298
