1 /**
2 ******************************************************************************
3 * @file stm32l0xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L0xx_LL_LPTIM_H
21 #define STM32L0xx_LL_LPTIM_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l0xx.h"
29
30 /** @addtogroup STM32L0xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPTIM1)
35
36 /** @defgroup LPTIM_LL LPTIM
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42
43 /* Private constants ---------------------------------------------------------*/
44
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
58 * @{
59 */
60
61 /**
62 * @brief LPTIM Init structure definition
63 */
64 typedef struct
65 {
66 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
67 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
68
69 This feature can be modified afterwards using unitary
70 function @ref LL_LPTIM_SetClockSource().*/
71
72 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
73 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
74
75 This feature can be modified afterwards using using unitary
76 function @ref LL_LPTIM_SetPrescaler().*/
77
78 uint32_t Waveform; /*!< Specifies the waveform shape.
79 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
80
81 This feature can be modified afterwards using unitary
82 function @ref LL_LPTIM_ConfigOutput().*/
83
84 uint32_t Polarity; /*!< Specifies waveform polarity.
85 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
86
87 This feature can be modified afterwards using unitary
88 function @ref LL_LPTIM_ConfigOutput().*/
89 } LL_LPTIM_InitTypeDef;
90
91 /**
92 * @}
93 */
94 #endif /* USE_FULL_LL_DRIVER */
95
96 /* Exported constants --------------------------------------------------------*/
97 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
98 * @{
99 */
100
101 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
102 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
103 * @{
104 */
105 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
106 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
107 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
108 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
109 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
110 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
111 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
112 /**
113 * @}
114 */
115
116 /** @defgroup LPTIM_LL_EC_IT IT Defines
117 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
118 * @{
119 */
120 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match */
121 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK */
122 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match */
123 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger edge event */
124 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK */
125 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Counter direction change down to up */
126 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Counter direction change up to down */
127 /**
128 * @}
129 */
130
131 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
132 * @{
133 */
134 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
135 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
136 /**
137 * @}
138 */
139
140 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
141 * @{
142 */
143 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
144 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
145 /**
146 * @}
147 */
148
149 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
150 * @{
151 */
152 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
153 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
154 /**
155 * @}
156 */
157
158 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
159 * @{
160 */
161 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINUOUS or SINGLE*/
162 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
163 /**
164 * @}
165 */
166
167 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
168 * @{
169 */
170 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
171 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
172 /**
173 * @}
174 */
175
176 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
177 * @{
178 */
179 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
180 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
181 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
182 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
183 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
184 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
185 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
186 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
187 /**
188 * @}
189 */
190
191 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
192 * @{
193 */
194 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
195 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
196 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
197 #if defined(RTC_TAMPER1_SUPPORT)
198 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
199 #endif /* RTC_TAMPER1_SUPPORT */
200 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to RTC Tamper 2*/
201 #if defined(RTC_TAMPER3_SUPPORT)
202 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 3*/
203 #endif /* RTC_TAMPER3_SUPPORT */
204 #define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_1) /*!<External input trigger is connected to COMP1 output*/
205 #define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /*!<External input trigger is connected to COMP2 output*/
206 /**
207 * @}
208 */
209
210 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
211 * @{
212 */
213 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
214 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
215 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
216 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
217 /**
218 * @}
219 */
220
221 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
222 * @{
223 */
224 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
225 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
226 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
227 /**
228 * @}
229 */
230
231 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
232 * @{
233 */
234 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
235 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
236 /**
237 * @}
238 */
239
240 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
241 * @{
242 */
243 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
244 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
245 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
246 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
247 /**
248 * @}
249 */
250
251 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
252 * @{
253 */
254 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
255 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
256 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
257 /**
258 * @}
259 */
260
261 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
262 * @{
263 */
264 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
265 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
266 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
267 /**
268 * @}
269 */
270
271 /**
272 * @}
273 */
274
275 /* Exported macro ------------------------------------------------------------*/
276 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
277 * @{
278 */
279
280 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
281 * @{
282 */
283
284 /**
285 * @brief Write a value in LPTIM register
286 * @param __INSTANCE__ LPTIM Instance
287 * @param __REG__ Register to be written
288 * @param __VALUE__ Value to be written in the register
289 * @retval None
290 */
291 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
292
293 /**
294 * @brief Read a value in LPTIM register
295 * @param __INSTANCE__ LPTIM Instance
296 * @param __REG__ Register to be read
297 * @retval Register value
298 */
299 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
300 /**
301 * @}
302 */
303
304 /**
305 * @}
306 */
307
308 /* Exported functions --------------------------------------------------------*/
309 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
310 * @{
311 */
312
313 /** Legacy definitions for compatibility purpose
314 @cond 0
315 */
316 #define LL_LPTIM_ClearFLAG_CMPM LL_LPTIM_ClearFlag_CMPM
317 #define LL_LPTIM_ClearFLAG_CC1 LL_LPTIM_ClearFlag_CC1
318 #define LL_LPTIM_ClearFLAG_CC2 LL_LPTIM_ClearFlag_CC2
319 #define LL_LPTIM_ClearFLAG_CC1O LL_LPTIM_ClearFlag_CC1O
320 #define LL_LPTIM_ClearFLAG_CC2O LL_LPTIM_ClearFlag_CC2O
321 #define LL_LPTIM_ClearFLAG_ARRM LL_LPTIM_ClearFlag_ARRM
322 /**
323 @endcond
324 */
325
326 #if defined(USE_FULL_LL_DRIVER)
327 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
328 * @{
329 */
330
331 ErrorStatus LL_LPTIM_DeInit(const LPTIM_TypeDef *LPTIMx);
332 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
333 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, const LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
334 void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
335 /**
336 * @}
337 */
338 #endif /* USE_FULL_LL_DRIVER */
339
340 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
341 * @{
342 */
343
344 /**
345 * @brief Enable the LPTIM instance
346 * @note After setting the ENABLE bit, a delay of two counter clock is needed
347 * before the LPTIM instance is actually enabled.
348 * @rmtoll CR ENABLE LL_LPTIM_Enable
349 * @param LPTIMx Low-Power Timer instance
350 * @retval None
351 */
LL_LPTIM_Enable(LPTIM_TypeDef * LPTIMx)352 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
353 {
354 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
355 }
356
357 /**
358 * @brief Indicates whether the LPTIM instance is enabled.
359 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
360 * @param LPTIMx Low-Power Timer instance
361 * @retval State of bit (1 or 0).
362 */
LL_LPTIM_IsEnabled(const LPTIM_TypeDef * LPTIMx)363 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(const LPTIM_TypeDef *LPTIMx)
364 {
365 return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE) ? 1UL : 0UL));
366 }
367
368 /**
369 * @brief Starts the LPTIM counter in the desired mode.
370 * @note LPTIM instance must be enabled before starting the counter.
371 * @note It is possible to change on the fly from One Shot mode to
372 * Continuous mode.
373 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
374 * CR SNGSTRT LL_LPTIM_StartCounter
375 * @param LPTIMx Low-Power Timer instance
376 * @param OperatingMode This parameter can be one of the following values:
377 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
378 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
379 * @retval None
380 */
LL_LPTIM_StartCounter(LPTIM_TypeDef * LPTIMx,uint32_t OperatingMode)381 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
382 {
383 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
384 }
385
386 /**
387 * @brief Set the LPTIM registers update mode (enable/disable register preload)
388 * @note This function must be called when the LPTIM instance is disabled.
389 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
390 * @param LPTIMx Low-Power Timer instance
391 * @param UpdateMode This parameter can be one of the following values:
392 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
393 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
394 * @retval None
395 */
LL_LPTIM_SetUpdateMode(LPTIM_TypeDef * LPTIMx,uint32_t UpdateMode)396 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
397 {
398 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
399 }
400
401 /**
402 * @brief Get the LPTIM registers update mode
403 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
404 * @param LPTIMx Low-Power Timer instance
405 * @retval Returned value can be one of the following values:
406 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
407 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
408 */
LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef * LPTIMx)409 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(const LPTIM_TypeDef *LPTIMx)
410 {
411 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
412 }
413
414 /**
415 * @brief Set the auto reload value
416 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
417 * @note After a write to the LPTIMx_ARR register a new write operation to the
418 * same register can only be performed when the previous write operation
419 * is completed. Any successive write before the ARROK flag is set, will
420 * lead to unpredictable results.
421 * @note autoreload value be strictly greater than the compare value.
422 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
423 * @param LPTIMx Low-Power Timer instance
424 * @param AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
425 * @retval None
426 */
LL_LPTIM_SetAutoReload(LPTIM_TypeDef * LPTIMx,uint32_t AutoReload)427 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
428 {
429 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
430 }
431
432 /**
433 * @brief Get actual auto reload value
434 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
435 * @param LPTIMx Low-Power Timer instance
436 * @retval AutoReload Value between Min_Data=0x0001 and Max_Data=0xFFFF
437 */
LL_LPTIM_GetAutoReload(const LPTIM_TypeDef * LPTIMx)438 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(const LPTIM_TypeDef *LPTIMx)
439 {
440 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
441 }
442
443 /**
444 * @brief Set the compare value
445 * @note After a write to the LPTIMx_CMP register a new write operation to the
446 * same register can only be performed when the previous write operation
447 * is completed. Any successive write before the CMPOK flag is set, will
448 * lead to unpredictable results.
449 * @rmtoll CMP CMP LL_LPTIM_SetCompare
450 * @param LPTIMx Low-Power Timer instance
451 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
452 * @retval None
453 */
LL_LPTIM_SetCompare(LPTIM_TypeDef * LPTIMx,uint32_t CompareValue)454 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
455 {
456 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
457 }
458
459 /**
460 * @brief Get actual compare value
461 * @rmtoll CMP CMP LL_LPTIM_GetCompare
462 * @param LPTIMx Low-Power Timer instance
463 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
464 */
LL_LPTIM_GetCompare(const LPTIM_TypeDef * LPTIMx)465 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(const LPTIM_TypeDef *LPTIMx)
466 {
467 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
468 }
469
470 /**
471 * @brief Get actual counter value
472 * @note When the LPTIM instance is running with an asynchronous clock, reading
473 * the LPTIMx_CNT register may return unreliable values. So in this case
474 * it is necessary to perform two consecutive read accesses and verify
475 * that the two returned values are identical.
476 * @rmtoll CNT CNT LL_LPTIM_GetCounter
477 * @param LPTIMx Low-Power Timer instance
478 * @retval Counter value
479 */
LL_LPTIM_GetCounter(const LPTIM_TypeDef * LPTIMx)480 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(const LPTIM_TypeDef *LPTIMx)
481 {
482 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
483 }
484
485 /**
486 * @brief Set the counter mode (selection of the LPTIM counter clock source).
487 * @note The counter mode can be set only when the LPTIM instance is disabled.
488 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
489 * @param LPTIMx Low-Power Timer instance
490 * @param CounterMode This parameter can be one of the following values:
491 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
492 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
493 * @retval None
494 */
LL_LPTIM_SetCounterMode(LPTIM_TypeDef * LPTIMx,uint32_t CounterMode)495 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
496 {
497 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
498 }
499
500 /**
501 * @brief Get the counter mode
502 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
503 * @param LPTIMx Low-Power Timer instance
504 * @retval Returned value can be one of the following values:
505 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
506 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
507 */
LL_LPTIM_GetCounterMode(const LPTIM_TypeDef * LPTIMx)508 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(const LPTIM_TypeDef *LPTIMx)
509 {
510 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
511 }
512
513 /**
514 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
515 * @note This function must be called when the LPTIM instance is disabled.
516 * @note Regarding the LPTIM output polarity the change takes effect
517 * immediately, so the output default value will change immediately after
518 * the polarity is re-configured, even before the timer is enabled.
519 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
520 * CFGR WAVPOL LL_LPTIM_ConfigOutput
521 * @param LPTIMx Low-Power Timer instance
522 * @param Waveform This parameter can be one of the following values:
523 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
524 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
525 * @param Polarity This parameter can be one of the following values:
526 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
527 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
528 * @retval None
529 */
LL_LPTIM_ConfigOutput(LPTIM_TypeDef * LPTIMx,uint32_t Waveform,uint32_t Polarity)530 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
531 {
532 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
533 }
534
535 /**
536 * @brief Set waveform shape
537 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
538 * @param LPTIMx Low-Power Timer instance
539 * @param Waveform This parameter can be one of the following values:
540 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
541 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
542 * @retval None
543 */
LL_LPTIM_SetWaveform(LPTIM_TypeDef * LPTIMx,uint32_t Waveform)544 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
545 {
546 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
547 }
548
549 /**
550 * @brief Get actual waveform shape
551 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
552 * @param LPTIMx Low-Power Timer instance
553 * @retval Returned value can be one of the following values:
554 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
555 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
556 */
LL_LPTIM_GetWaveform(const LPTIM_TypeDef * LPTIMx)557 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(const LPTIM_TypeDef *LPTIMx)
558 {
559 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
560 }
561
562 /**
563 * @brief Set output polarity
564 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
565 * @param LPTIMx Low-Power Timer instance
566 * @param Polarity This parameter can be one of the following values:
567 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
568 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
569 * @retval None
570 */
LL_LPTIM_SetPolarity(LPTIM_TypeDef * LPTIMx,uint32_t Polarity)571 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
572 {
573 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
574 }
575
576 /**
577 * @brief Get actual output polarity
578 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
579 * @param LPTIMx Low-Power Timer instance
580 * @retval Returned value can be one of the following values:
581 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
582 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
583 */
LL_LPTIM_GetPolarity(const LPTIM_TypeDef * LPTIMx)584 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(const LPTIM_TypeDef *LPTIMx)
585 {
586 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
587 }
588
589 /**
590 * @brief Set actual prescaler division ratio.
591 * @note This function must be called when the LPTIM instance is disabled.
592 * @note When the LPTIM is configured to be clocked by an internal clock source
593 * and the LPTIM counter is configured to be updated by active edges
594 * detected on the LPTIM external Input1, the internal clock provided to
595 * the LPTIM must be not be prescaled.
596 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
597 * @param LPTIMx Low-Power Timer instance
598 * @param Prescaler This parameter can be one of the following values:
599 * @arg @ref LL_LPTIM_PRESCALER_DIV1
600 * @arg @ref LL_LPTIM_PRESCALER_DIV2
601 * @arg @ref LL_LPTIM_PRESCALER_DIV4
602 * @arg @ref LL_LPTIM_PRESCALER_DIV8
603 * @arg @ref LL_LPTIM_PRESCALER_DIV16
604 * @arg @ref LL_LPTIM_PRESCALER_DIV32
605 * @arg @ref LL_LPTIM_PRESCALER_DIV64
606 * @arg @ref LL_LPTIM_PRESCALER_DIV128
607 * @retval None
608 */
LL_LPTIM_SetPrescaler(LPTIM_TypeDef * LPTIMx,uint32_t Prescaler)609 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
610 {
611 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
612 }
613
614 /**
615 * @brief Get actual prescaler division ratio.
616 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
617 * @param LPTIMx Low-Power Timer instance
618 * @retval Returned value can be one of the following values:
619 * @arg @ref LL_LPTIM_PRESCALER_DIV1
620 * @arg @ref LL_LPTIM_PRESCALER_DIV2
621 * @arg @ref LL_LPTIM_PRESCALER_DIV4
622 * @arg @ref LL_LPTIM_PRESCALER_DIV8
623 * @arg @ref LL_LPTIM_PRESCALER_DIV16
624 * @arg @ref LL_LPTIM_PRESCALER_DIV32
625 * @arg @ref LL_LPTIM_PRESCALER_DIV64
626 * @arg @ref LL_LPTIM_PRESCALER_DIV128
627 */
LL_LPTIM_GetPrescaler(const LPTIM_TypeDef * LPTIMx)628 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(const LPTIM_TypeDef *LPTIMx)
629 {
630 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
631 }
632
633 /**
634 * @}
635 */
636
637 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
638 * @{
639 */
640
641 /**
642 * @brief Enable the timeout function
643 * @note This function must be called when the LPTIM instance is disabled.
644 * @note The first trigger event will start the timer, any successive trigger
645 * event will reset the counter and the timer will restart.
646 * @note The timeout value corresponds to the compare value; if no trigger
647 * occurs within the expected time frame, the MCU is waked-up by the
648 * compare match event.
649 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
650 * @param LPTIMx Low-Power Timer instance
651 * @retval None
652 */
LL_LPTIM_EnableTimeout(LPTIM_TypeDef * LPTIMx)653 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
654 {
655 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
656 }
657
658 /**
659 * @brief Disable the timeout function
660 * @note This function must be called when the LPTIM instance is disabled.
661 * @note A trigger event arriving when the timer is already started will be
662 * ignored.
663 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
664 * @param LPTIMx Low-Power Timer instance
665 * @retval None
666 */
LL_LPTIM_DisableTimeout(LPTIM_TypeDef * LPTIMx)667 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
668 {
669 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
670 }
671
672 /**
673 * @brief Indicate whether the timeout function is enabled.
674 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
675 * @param LPTIMx Low-Power Timer instance
676 * @retval State of bit (1 or 0).
677 */
LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef * LPTIMx)678 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(const LPTIM_TypeDef *LPTIMx)
679 {
680 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT) ? 1UL : 0UL));
681 }
682
683 /**
684 * @brief Start the LPTIM counter
685 * @note This function must be called when the LPTIM instance is disabled.
686 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
687 * @param LPTIMx Low-Power Timer instance
688 * @retval None
689 */
LL_LPTIM_TrigSw(LPTIM_TypeDef * LPTIMx)690 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
691 {
692 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
693 }
694
695 /**
696 * @brief Configure the external trigger used as a trigger event for the LPTIM.
697 * @note This function must be called when the LPTIM instance is disabled.
698 * @note An internal clock source must be present when a digital filter is
699 * required for the trigger.
700 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
701 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
702 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
703 * @param LPTIMx Low-Power Timer instance
704 * @param Source This parameter can be one of the following values:
705 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
706 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
707 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
708 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (*)
709 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
710 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
711 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
712 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
713 *
714 * (*) Value not defined in all devices. \n
715 *
716 * @param Filter This parameter can be one of the following values:
717 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
718 * @arg @ref LL_LPTIM_TRIG_FILTER_2
719 * @arg @ref LL_LPTIM_TRIG_FILTER_4
720 * @arg @ref LL_LPTIM_TRIG_FILTER_8
721 * @param Polarity This parameter can be one of the following values:
722 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
723 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
724 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
725 * @retval None
726 */
LL_LPTIM_ConfigTrigger(LPTIM_TypeDef * LPTIMx,uint32_t Source,uint32_t Filter,uint32_t Polarity)727 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
728 {
729 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
730 }
731
732 /**
733 * @brief Get actual external trigger source.
734 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
735 * @param LPTIMx Low-Power Timer instance
736 * @retval Returned value can be one of the following values:
737 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
738 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
739 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
740 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (*)
741 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
742 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (*)
743 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
744 * @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
745 *
746 * (*) Value not defined in all devices. \n
747 *
748 */
LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef * LPTIMx)749 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(const LPTIM_TypeDef *LPTIMx)
750 {
751 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
752 }
753
754 /**
755 * @brief Get actual external trigger filter.
756 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
757 * @param LPTIMx Low-Power Timer instance
758 * @retval Returned value can be one of the following values:
759 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
760 * @arg @ref LL_LPTIM_TRIG_FILTER_2
761 * @arg @ref LL_LPTIM_TRIG_FILTER_4
762 * @arg @ref LL_LPTIM_TRIG_FILTER_8
763 */
LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef * LPTIMx)764 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(const LPTIM_TypeDef *LPTIMx)
765 {
766 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
767 }
768
769 /**
770 * @brief Get actual external trigger polarity.
771 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
772 * @param LPTIMx Low-Power Timer instance
773 * @retval Returned value can be one of the following values:
774 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
775 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
776 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
777 */
LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef * LPTIMx)778 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(const LPTIM_TypeDef *LPTIMx)
779 {
780 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
781 }
782
783 /**
784 * @}
785 */
786
787 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
788 * @{
789 */
790
791 /**
792 * @brief Set the source of the clock used by the LPTIM instance.
793 * @note This function must be called when the LPTIM instance is disabled.
794 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
795 * @param LPTIMx Low-Power Timer instance
796 * @param ClockSource This parameter can be one of the following values:
797 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
798 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
799 * @retval None
800 */
LL_LPTIM_SetClockSource(LPTIM_TypeDef * LPTIMx,uint32_t ClockSource)801 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
802 {
803 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
804 }
805
806 /**
807 * @brief Get actual LPTIM instance clock source.
808 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
809 * @param LPTIMx Low-Power Timer instance
810 * @retval Returned value can be one of the following values:
811 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
812 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
813 */
LL_LPTIM_GetClockSource(const LPTIM_TypeDef * LPTIMx)814 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(const LPTIM_TypeDef *LPTIMx)
815 {
816 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
817 }
818
819 /**
820 * @brief Configure the active edge or edges used by the counter when
821 the LPTIM is clocked by an external clock source.
822 * @note This function must be called when the LPTIM instance is disabled.
823 * @note When both external clock signal edges are considered active ones,
824 * the LPTIM must also be clocked by an internal clock source with a
825 * frequency equal to at least four times the external clock frequency.
826 * @note An internal clock source must be present when a digital filter is
827 * required for external clock.
828 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
829 * CFGR CKPOL LL_LPTIM_ConfigClock
830 * @param LPTIMx Low-Power Timer instance
831 * @param ClockFilter This parameter can be one of the following values:
832 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
833 * @arg @ref LL_LPTIM_CLK_FILTER_2
834 * @arg @ref LL_LPTIM_CLK_FILTER_4
835 * @arg @ref LL_LPTIM_CLK_FILTER_8
836 * @param ClockPolarity This parameter can be one of the following values:
837 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
838 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
839 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
840 * @retval None
841 */
LL_LPTIM_ConfigClock(LPTIM_TypeDef * LPTIMx,uint32_t ClockFilter,uint32_t ClockPolarity)842 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
843 {
844 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
845 }
846
847 /**
848 * @brief Get actual clock polarity
849 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
850 * @param LPTIMx Low-Power Timer instance
851 * @retval Returned value can be one of the following values:
852 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
853 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
854 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
855 */
LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef * LPTIMx)856 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(const LPTIM_TypeDef *LPTIMx)
857 {
858 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
859 }
860
861 /**
862 * @brief Get actual clock digital filter
863 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
864 * @param LPTIMx Low-Power Timer instance
865 * @retval Returned value can be one of the following values:
866 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
867 * @arg @ref LL_LPTIM_CLK_FILTER_2
868 * @arg @ref LL_LPTIM_CLK_FILTER_4
869 * @arg @ref LL_LPTIM_CLK_FILTER_8
870 */
LL_LPTIM_GetClockFilter(const LPTIM_TypeDef * LPTIMx)871 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(const LPTIM_TypeDef *LPTIMx)
872 {
873 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
874 }
875
876 /**
877 * @}
878 */
879
880 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
881 * @{
882 */
883
884 /**
885 * @brief Configure the encoder mode.
886 * @note This function must be called when the LPTIM instance is disabled.
887 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
888 * @param LPTIMx Low-Power Timer instance
889 * @param EncoderMode This parameter can be one of the following values:
890 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
891 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
892 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
893 * @retval None
894 */
LL_LPTIM_SetEncoderMode(LPTIM_TypeDef * LPTIMx,uint32_t EncoderMode)895 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
896 {
897 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
898 }
899
900 /**
901 * @brief Get actual encoder mode.
902 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
903 * @param LPTIMx Low-Power Timer instance
904 * @retval Returned value can be one of the following values:
905 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
906 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
907 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
908 */
LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef * LPTIMx)909 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(const LPTIM_TypeDef *LPTIMx)
910 {
911 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
912 }
913
914 /**
915 * @brief Enable the encoder mode
916 * @note This function must be called when the LPTIM instance is disabled.
917 * @note In this mode the LPTIM instance must be clocked by an internal clock
918 * source. Also, the prescaler division ratio must be equal to 1.
919 * @note LPTIM instance must be configured in continuous mode prior enabling
920 * the encoder mode.
921 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
922 * @param LPTIMx Low-Power Timer instance
923 * @retval None
924 */
LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef * LPTIMx)925 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
926 {
927 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
928 }
929
930 /**
931 * @brief Disable the encoder mode
932 * @note This function must be called when the LPTIM instance is disabled.
933 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
934 * @param LPTIMx Low-Power Timer instance
935 * @retval None
936 */
LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef * LPTIMx)937 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
938 {
939 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
940 }
941
942 /**
943 * @brief Indicates whether the LPTIM operates in encoder mode.
944 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
945 * @param LPTIMx Low-Power Timer instance
946 * @retval State of bit (1 or 0).
947 */
LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef * LPTIMx)948 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(const LPTIM_TypeDef *LPTIMx)
949 {
950 return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC) ? 1UL : 0UL));
951 }
952
953 /**
954 * @}
955 */
956
957 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
958 * @{
959 */
960
961
962 /**
963 * @brief Clear the compare match flag (CMPMCF)
964 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFlag_CMPM
965 * @param LPTIMx Low-Power Timer instance
966 * @retval None
967 */
LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef * LPTIMx)968 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPM(LPTIM_TypeDef *LPTIMx)
969 {
970 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
971 }
972
973 /**
974 * @brief Inform application whether a compare match interrupt has occurred.
975 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
976 * @param LPTIMx Low-Power Timer instance
977 * @retval State of bit (1 or 0).
978 */
LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef * LPTIMx)979 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(const LPTIM_TypeDef *LPTIMx)
980 {
981 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM) ? 1UL : 0UL));
982 }
983
984 /**
985 * @brief Clear the autoreload match flag (ARRMCF)
986 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFlag_ARRM
987 * @param LPTIMx Low-Power Timer instance
988 * @retval None
989 */
LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef * LPTIMx)990 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARRM(LPTIM_TypeDef *LPTIMx)
991 {
992 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
993 }
994
995 /**
996 * @brief Inform application whether a autoreload match interrupt has occurred.
997 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
998 * @param LPTIMx Low-Power Timer instance
999 * @retval State of bit (1 or 0).
1000 */
LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef * LPTIMx)1001 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(const LPTIM_TypeDef *LPTIMx)
1002 {
1003 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM) ? 1UL : 0UL));
1004 }
1005
1006 /**
1007 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
1008 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
1009 * @param LPTIMx Low-Power Timer instance
1010 * @retval None
1011 */
LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef * LPTIMx)1012 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1013 {
1014 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
1015 }
1016
1017 /**
1018 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1019 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1020 * @param LPTIMx Low-Power Timer instance
1021 * @retval State of bit (1 or 0).
1022 */
LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1023 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1024 {
1025 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG) ? 1UL : 0UL));
1026 }
1027
1028 /**
1029 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1030 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1031 * @param LPTIMx Low-Power Timer instance
1032 * @retval None
1033 */
LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef * LPTIMx)1034 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1035 {
1036 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1037 }
1038
1039 /**
1040 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully
1041 completed. If so, a new one can be initiated.
1042 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1043 * @param LPTIMx Low-Power Timer instance
1044 * @retval State of bit (1 or 0).
1045 */
LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef * LPTIMx)1046 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(const LPTIM_TypeDef *LPTIMx)
1047 {
1048 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK) ? 1UL : 0UL));
1049 }
1050
1051 /**
1052 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1053 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1054 * @param LPTIMx Low-Power Timer instance
1055 * @retval None
1056 */
LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef * LPTIMx)1057 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1058 {
1059 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1060 }
1061
1062 /**
1063 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully
1064 completed. If so, a new one can be initiated.
1065 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1066 * @param LPTIMx Low-Power Timer instance
1067 * @retval State of bit (1 or 0).
1068 */
LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef * LPTIMx)1069 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(const LPTIM_TypeDef *LPTIMx)
1070 {
1071 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK) ? 1UL : 0UL));
1072 }
1073
1074 /**
1075 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1076 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1077 * @param LPTIMx Low-Power Timer instance
1078 * @retval None
1079 */
LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef * LPTIMx)1080 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1081 {
1082 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1083 }
1084
1085 /**
1086 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance
1087 operates in encoder mode).
1088 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1089 * @param LPTIMx Low-Power Timer instance
1090 * @retval State of bit (1 or 0).
1091 */
LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef * LPTIMx)1092 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(const LPTIM_TypeDef *LPTIMx)
1093 {
1094 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP) ? 1UL : 0UL));
1095 }
1096
1097 /**
1098 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1099 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1100 * @param LPTIMx Low-Power Timer instance
1101 * @retval None
1102 */
LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef * LPTIMx)1103 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1104 {
1105 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1106 }
1107
1108 /**
1109 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance
1110 operates in encoder mode).
1111 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1112 * @param LPTIMx Low-Power Timer instance
1113 * @retval State of bit (1 or 0).
1114 */
LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef * LPTIMx)1115 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(const LPTIM_TypeDef *LPTIMx)
1116 {
1117 return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN) ? 1UL : 0UL));
1118 }
1119
1120 /**
1121 * @}
1122 */
1123
1124 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1125 * @{
1126 */
1127
1128 /**
1129 * @brief Enable compare match interrupt (CMPMIE).
1130 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1131 * @param LPTIMx Low-Power Timer instance
1132 * @retval None
1133 */
LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef * LPTIMx)1134 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1135 {
1136 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1137 }
1138
1139 /**
1140 * @brief Disable compare match interrupt (CMPMIE).
1141 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1142 * @param LPTIMx Low-Power Timer instance
1143 * @retval None
1144 */
LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef * LPTIMx)1145 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1146 {
1147 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1148 }
1149
1150 /**
1151 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1152 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1153 * @param LPTIMx Low-Power Timer instance
1154 * @retval State of bit (1 or 0).
1155 */
LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef * LPTIMx)1156 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(const LPTIM_TypeDef *LPTIMx)
1157 {
1158 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE) ? 1UL : 0UL));
1159 }
1160
1161 /**
1162 * @brief Enable autoreload match interrupt (ARRMIE).
1163 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1164 * @param LPTIMx Low-Power Timer instance
1165 * @retval None
1166 */
LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef * LPTIMx)1167 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1168 {
1169 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1170 }
1171
1172 /**
1173 * @brief Disable autoreload match interrupt (ARRMIE).
1174 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1175 * @param LPTIMx Low-Power Timer instance
1176 * @retval None
1177 */
LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef * LPTIMx)1178 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1179 {
1180 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1181 }
1182
1183 /**
1184 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1185 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1186 * @param LPTIMx Low-Power Timer instance
1187 * @retval State of bit (1 or 0).
1188 */
LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef * LPTIMx)1189 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(const LPTIM_TypeDef *LPTIMx)
1190 {
1191 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE) ? 1UL : 0UL));
1192 }
1193
1194 /**
1195 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1196 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1197 * @param LPTIMx Low-Power Timer instance
1198 * @retval None
1199 */
LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1200 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1201 {
1202 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1203 }
1204
1205 /**
1206 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1207 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1208 * @param LPTIMx Low-Power Timer instance
1209 * @retval None
1210 */
LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef * LPTIMx)1211 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1212 {
1213 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1214 }
1215
1216 /**
1217 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1218 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1219 * @param LPTIMx Low-Power Timer instance
1220 * @retval State of bit (1 or 0).
1221 */
LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef * LPTIMx)1222 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(const LPTIM_TypeDef *LPTIMx)
1223 {
1224 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE) ? 1UL : 0UL));
1225 }
1226
1227 /**
1228 * @brief Enable compare register write completed interrupt (CMPOKIE).
1229 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1230 * @param LPTIMx Low-Power Timer instance
1231 * @retval None
1232 */
LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1233 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1234 {
1235 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1236 }
1237
1238 /**
1239 * @brief Disable compare register write completed interrupt (CMPOKIE).
1240 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1241 * @param LPTIMx Low-Power Timer instance
1242 * @retval None
1243 */
LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef * LPTIMx)1244 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1245 {
1246 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1247 }
1248
1249 /**
1250 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1251 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1252 * @param LPTIMx Low-Power Timer instance
1253 * @retval State of bit (1 or 0).
1254 */
LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef * LPTIMx)1255 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(const LPTIM_TypeDef *LPTIMx)
1256 {
1257 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE) ? 1UL : 0UL));
1258 }
1259
1260 /**
1261 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1262 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1263 * @param LPTIMx Low-Power Timer instance
1264 * @retval None
1265 */
LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef * LPTIMx)1266 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1267 {
1268 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1269 }
1270
1271 /**
1272 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1273 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1274 * @param LPTIMx Low-Power Timer instance
1275 * @retval None
1276 */
LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef * LPTIMx)1277 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1278 {
1279 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1280 }
1281
1282 /**
1283 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1284 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1285 * @param LPTIMx Low-Power Timer instance
1286 * @retval State of bit(1 or 0).
1287 */
LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef * LPTIMx)1288 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(const LPTIM_TypeDef *LPTIMx)
1289 {
1290 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE) ? 1UL : 0UL));
1291 }
1292
1293 /**
1294 * @brief Enable direction change to up interrupt (UPIE).
1295 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1296 * @param LPTIMx Low-Power Timer instance
1297 * @retval None
1298 */
LL_LPTIM_EnableIT_UP(LPTIM_TypeDef * LPTIMx)1299 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1300 {
1301 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1302 }
1303
1304 /**
1305 * @brief Disable direction change to up interrupt (UPIE).
1306 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1307 * @param LPTIMx Low-Power Timer instance
1308 * @retval None
1309 */
LL_LPTIM_DisableIT_UP(LPTIM_TypeDef * LPTIMx)1310 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1311 {
1312 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1313 }
1314
1315 /**
1316 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1317 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1318 * @param LPTIMx Low-Power Timer instance
1319 * @retval State of bit(1 or 0).
1320 */
LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef * LPTIMx)1321 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(const LPTIM_TypeDef *LPTIMx)
1322 {
1323 return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE) ? 1UL : 0UL));
1324 }
1325
1326 /**
1327 * @brief Enable direction change to down interrupt (DOWNIE).
1328 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1329 * @param LPTIMx Low-Power Timer instance
1330 * @retval None
1331 */
LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef * LPTIMx)1332 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1333 {
1334 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1335 }
1336
1337 /**
1338 * @brief Disable direction change to down interrupt (DOWNIE).
1339 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1340 * @param LPTIMx Low-Power Timer instance
1341 * @retval None
1342 */
LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef * LPTIMx)1343 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1344 {
1345 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1346 }
1347
1348 /**
1349 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1350 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1351 * @param LPTIMx Low-Power Timer instance
1352 * @retval State of bit(1 or 0).
1353 */
LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef * LPTIMx)1354 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(const LPTIM_TypeDef *LPTIMx)
1355 {
1356 return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE) ? 1UL : 0UL);
1357 }
1358
1359 /**
1360 * @}
1361 */
1362
1363 /**
1364 * @}
1365 */
1366
1367 /**
1368 * @}
1369 */
1370
1371 #endif /* LPTIM1 */
1372
1373 /**
1374 * @}
1375 */
1376
1377 #ifdef __cplusplus
1378 }
1379 #endif
1380
1381 #endif /* STM32L0xx_LL_LPTIM_H */
1382
