1 /** 2 ****************************************************************************** 3 * @file stm32l0xx_hal_lcd.h 4 * @author MCD Application Team 5 * @brief Header file of LCD Controller HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32L0xx_HAL_LCD_H 22 #define __STM32L0xx_HAL_LCD_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx) 29 30 /* Includes ------------------------------------------------------------------*/ 31 #include "stm32l0xx_hal_def.h" 32 33 /** @addtogroup STM32L0xx_HAL_Driver 34 * @{ 35 */ 36 37 /** @defgroup LCD LCD 38 * @{ 39 */ 40 41 /* Exported types ------------------------------------------------------------*/ 42 /** @defgroup LCD_Exported_Types LCD Exported Types 43 * @{ 44 */ 45 46 /** 47 * @brief LCD Init structure definition 48 */ 49 50 typedef struct 51 { 52 uint32_t Prescaler; /*!< Configures the LCD Prescaler. 53 This parameter can be one value of @ref LCD_Prescaler */ 54 uint32_t Divider; /*!< Configures the LCD Divider. 55 This parameter can be one value of @ref LCD_Divider */ 56 uint32_t Duty; /*!< Configures the LCD Duty. 57 This parameter can be one value of @ref LCD_Duty */ 58 uint32_t Bias; /*!< Configures the LCD Bias. 59 This parameter can be one value of @ref LCD_Bias */ 60 uint32_t VoltageSource; /*!< Selects the LCD Voltage source. 61 This parameter can be one value of @ref LCD_Voltage_Source */ 62 uint32_t Contrast; /*!< Configures the LCD Contrast. 63 This parameter can be one value of @ref LCD_Contrast */ 64 uint32_t DeadTime; /*!< Configures the LCD Dead Time. 65 This parameter can be one value of @ref LCD_DeadTime */ 66 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration. 67 This parameter can be one value of @ref LCD_PulseOnDuration */ 68 uint32_t HighDrive; /*!< Configures the LCD High Drive. 69 This parameter can be one value of @ref LCD_HighDrive */ 70 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode. 71 This parameter can be one value of @ref LCD_BlinkMode */ 72 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency. 73 This parameter can be one value of @ref LCD_BlinkFrequency */ 74 uint32_t MuxSegment; /*!< Enable or disable mux segment. 75 This parameter can be one value of @ref LCD_MuxSegment */ 76 }LCD_InitTypeDef; 77 78 /** 79 * @brief HAL LCD State structures definition 80 */ 81 typedef enum 82 { 83 HAL_LCD_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 84 HAL_LCD_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 85 HAL_LCD_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 86 HAL_LCD_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 87 HAL_LCD_STATE_ERROR = 0x04U /*!< Error */ 88 }HAL_LCD_StateTypeDef; 89 90 /** 91 * @brief UART handle Structure definition 92 */ 93 typedef struct 94 { 95 LCD_TypeDef *Instance; /* LCD registers base address */ 96 97 LCD_InitTypeDef Init; /* LCD communication parameters */ 98 99 HAL_LockTypeDef Lock; /* Locking object */ 100 101 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */ 102 103 __IO uint32_t ErrorCode; /* LCD Error code */ 104 105 }LCD_HandleTypeDef; 106 107 /** 108 * @} 109 */ 110 111 /* Exported constants --------------------------------------------------------*/ 112 113 /** @defgroup LCD_Exported_Constants LCD Exported Constants 114 * @{ 115 */ 116 117 /** @defgroup LCD_ErrorCode LCD Error Code 118 * @{ 119 */ 120 #define HAL_LCD_ERROR_NONE (0x00U) /*!< No error */ 121 #define HAL_LCD_ERROR_FCRSF (0x01U) /*!< Synchro flag timeout error */ 122 #define HAL_LCD_ERROR_UDR (0x02U) /*!< Update display request flag timeout error */ 123 #define HAL_LCD_ERROR_UDD (0x04U) /*!< Update display done flag timeout error */ 124 #define HAL_LCD_ERROR_ENS (0x08U) /*!< LCD enabled status flag timeout error */ 125 #define HAL_LCD_ERROR_RDY (0x10U) /*!< LCD Booster ready timeout error */ 126 /** 127 * @} 128 */ 129 130 /** @defgroup LCD_Prescaler LCD Prescaler 131 * @{ 132 */ 133 134 #define LCD_PRESCALER_1 (0x00000000U) /*!< CLKPS = LCDCLK */ 135 #define LCD_PRESCALER_2 (0x00400000U) /*!< CLKPS = LCDCLK/2 */ 136 #define LCD_PRESCALER_4 (0x00800000U) /*!< CLKPS = LCDCLK/4 */ 137 #define LCD_PRESCALER_8 (0x00C00000U) /*!< CLKPS = LCDCLK/8 */ 138 #define LCD_PRESCALER_16 (0x01000000U) /*!< CLKPS = LCDCLK/16 */ 139 #define LCD_PRESCALER_32 (0x01400000U) /*!< CLKPS = LCDCLK/32 */ 140 #define LCD_PRESCALER_64 (0x01800000U) /*!< CLKPS = LCDCLK/64 */ 141 #define LCD_PRESCALER_128 (0x01C00000U) /*!< CLKPS = LCDCLK/128 */ 142 #define LCD_PRESCALER_256 (0x02000000U) /*!< CLKPS = LCDCLK/256 */ 143 #define LCD_PRESCALER_512 (0x02400000U) /*!< CLKPS = LCDCLK/512 */ 144 #define LCD_PRESCALER_1024 (0x02800000U) /*!< CLKPS = LCDCLK/1024 */ 145 #define LCD_PRESCALER_2048 (0x02C00000U) /*!< CLKPS = LCDCLK/2048 */ 146 #define LCD_PRESCALER_4096 (0x03000000U) /*!< CLKPS = LCDCLK/4096 */ 147 #define LCD_PRESCALER_8192 (0x03400000U) /*!< CLKPS = LCDCLK/8192 */ 148 #define LCD_PRESCALER_16384 (0x03800000U) /*!< CLKPS = LCDCLK/16384 */ 149 #define LCD_PRESCALER_32768 (LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */ 150 151 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \ 152 ((__PRESCALER__) == LCD_PRESCALER_2) || \ 153 ((__PRESCALER__) == LCD_PRESCALER_4) || \ 154 ((__PRESCALER__) == LCD_PRESCALER_8) || \ 155 ((__PRESCALER__) == LCD_PRESCALER_16) || \ 156 ((__PRESCALER__) == LCD_PRESCALER_32) || \ 157 ((__PRESCALER__) == LCD_PRESCALER_64) || \ 158 ((__PRESCALER__) == LCD_PRESCALER_128) || \ 159 ((__PRESCALER__) == LCD_PRESCALER_256) || \ 160 ((__PRESCALER__) == LCD_PRESCALER_512) || \ 161 ((__PRESCALER__) == LCD_PRESCALER_1024) || \ 162 ((__PRESCALER__) == LCD_PRESCALER_2048) || \ 163 ((__PRESCALER__) == LCD_PRESCALER_4096) || \ 164 ((__PRESCALER__) == LCD_PRESCALER_8192) || \ 165 ((__PRESCALER__) == LCD_PRESCALER_16384) || \ 166 ((__PRESCALER__) == LCD_PRESCALER_32768)) 167 168 /** 169 * @} 170 */ 171 172 /** @defgroup LCD_Divider LCD Divider 173 * @{ 174 */ 175 176 #define LCD_DIVIDER_16 (0x00000000U) /*!< LCD frequency = CLKPS/16 */ 177 #define LCD_DIVIDER_17 (0x00040000U) /*!< LCD frequency = CLKPS/17 */ 178 #define LCD_DIVIDER_18 (0x00080000U) /*!< LCD frequency = CLKPS/18 */ 179 #define LCD_DIVIDER_19 (0x000C0000U) /*!< LCD frequency = CLKPS/19 */ 180 #define LCD_DIVIDER_20 (0x00100000U) /*!< LCD frequency = CLKPS/20 */ 181 #define LCD_DIVIDER_21 (0x00140000U) /*!< LCD frequency = CLKPS/21 */ 182 #define LCD_DIVIDER_22 (0x00180000U) /*!< LCD frequency = CLKPS/22 */ 183 #define LCD_DIVIDER_23 (0x001C0000U) /*!< LCD frequency = CLKPS/23 */ 184 #define LCD_DIVIDER_24 (0x00200000U) /*!< LCD frequency = CLKPS/24 */ 185 #define LCD_DIVIDER_25 (0x00240000U) /*!< LCD frequency = CLKPS/25 */ 186 #define LCD_DIVIDER_26 (0x00280000U) /*!< LCD frequency = CLKPS/26 */ 187 #define LCD_DIVIDER_27 (0x002C0000U) /*!< LCD frequency = CLKPS/27 */ 188 #define LCD_DIVIDER_28 (0x00300000U) /*!< LCD frequency = CLKPS/28 */ 189 #define LCD_DIVIDER_29 (0x00340000U) /*!< LCD frequency = CLKPS/29 */ 190 #define LCD_DIVIDER_30 (0x00380000U) /*!< LCD frequency = CLKPS/30 */ 191 #define LCD_DIVIDER_31 (LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */ 192 193 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \ 194 ((__DIVIDER__) == LCD_DIVIDER_17) || \ 195 ((__DIVIDER__) == LCD_DIVIDER_18) || \ 196 ((__DIVIDER__) == LCD_DIVIDER_19) || \ 197 ((__DIVIDER__) == LCD_DIVIDER_20) || \ 198 ((__DIVIDER__) == LCD_DIVIDER_21) || \ 199 ((__DIVIDER__) == LCD_DIVIDER_22) || \ 200 ((__DIVIDER__) == LCD_DIVIDER_23) || \ 201 ((__DIVIDER__) == LCD_DIVIDER_24) || \ 202 ((__DIVIDER__) == LCD_DIVIDER_25) || \ 203 ((__DIVIDER__) == LCD_DIVIDER_26) || \ 204 ((__DIVIDER__) == LCD_DIVIDER_27) || \ 205 ((__DIVIDER__) == LCD_DIVIDER_28) || \ 206 ((__DIVIDER__) == LCD_DIVIDER_29) || \ 207 ((__DIVIDER__) == LCD_DIVIDER_30) || \ 208 ((__DIVIDER__) == LCD_DIVIDER_31)) 209 210 /** 211 * @} 212 */ 213 214 215 /** @defgroup LCD_Duty LCD Duty 216 * @{ 217 */ 218 219 #define LCD_DUTY_STATIC (0x00000000U) /*!< Static duty */ 220 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */ 221 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */ 222 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */ 223 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */ 224 225 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \ 226 ((__DUTY__) == LCD_DUTY_1_2) || \ 227 ((__DUTY__) == LCD_DUTY_1_3) || \ 228 ((__DUTY__) == LCD_DUTY_1_4) || \ 229 ((__DUTY__) == LCD_DUTY_1_8)) 230 231 /** 232 * @} 233 */ 234 235 236 /** @defgroup LCD_Bias LCD Bias 237 * @{ 238 */ 239 240 #define LCD_BIAS_1_4 (0x00000000U) /*!< 1/4 Bias */ 241 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ 242 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ 243 244 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \ 245 ((__BIAS__) == LCD_BIAS_1_2) || \ 246 ((__BIAS__) == LCD_BIAS_1_3)) 247 /** 248 * @} 249 */ 250 251 /** @defgroup LCD_Voltage_Source LCD Voltage Source 252 * @{ 253 */ 254 255 #define LCD_VOLTAGESOURCE_INTERNAL (0x00000000U) /*!< Internal voltage source for the LCD */ 256 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ 257 258 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ 259 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) 260 261 /** 262 * @} 263 */ 264 265 /** @defgroup LCD_Interrupts LCD Interrupts 266 * @{ 267 */ 268 #define LCD_IT_SOF LCD_FCR_SOFIE 269 #define LCD_IT_UDD LCD_FCR_UDDIE 270 271 /** 272 * @} 273 */ 274 275 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration 276 * @{ 277 */ 278 279 #define LCD_PULSEONDURATION_0 (0x00000000U) /*!< Pulse ON duration = 0 pulse */ 280 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */ 281 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */ 282 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */ 283 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */ 284 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */ 285 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */ 286 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */ 287 288 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \ 289 ((__DURATION__) == LCD_PULSEONDURATION_1) || \ 290 ((__DURATION__) == LCD_PULSEONDURATION_2) || \ 291 ((__DURATION__) == LCD_PULSEONDURATION_3) || \ 292 ((__DURATION__) == LCD_PULSEONDURATION_4) || \ 293 ((__DURATION__) == LCD_PULSEONDURATION_5) || \ 294 ((__DURATION__) == LCD_PULSEONDURATION_6) || \ 295 ((__DURATION__) == LCD_PULSEONDURATION_7)) 296 /** 297 * @} 298 */ 299 300 /** @defgroup LCD_HighDrive LCD HighDrive 301 * @{ 302 */ 303 304 #define LCD_HIGHDRIVE_0 (0x00000000U) /*!< Low resistance Drive */ 305 #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */ 306 307 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \ 308 ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1)) 309 /** 310 * @} 311 */ 312 313 /** @defgroup LCD_DeadTime LCD Dead Time 314 * @{ 315 */ 316 317 #define LCD_DEADTIME_0 (0x00000000U) /*!< No dead Time */ 318 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */ 319 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */ 320 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */ 321 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */ 322 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */ 323 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */ 324 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */ 325 326 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \ 327 ((__TIME__) == LCD_DEADTIME_1) || \ 328 ((__TIME__) == LCD_DEADTIME_2) || \ 329 ((__TIME__) == LCD_DEADTIME_3) || \ 330 ((__TIME__) == LCD_DEADTIME_4) || \ 331 ((__TIME__) == LCD_DEADTIME_5) || \ 332 ((__TIME__) == LCD_DEADTIME_6) || \ 333 ((__TIME__) == LCD_DEADTIME_7)) 334 /** 335 * @} 336 */ 337 338 /** @defgroup LCD_BlinkMode LCD Blink Mode 339 * @{ 340 */ 341 342 #define LCD_BLINKMODE_OFF (0x00000000U) /*!< Blink disabled */ 343 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ 344 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to 345 8 pixels according to the programmed duty) */ 346 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */ 347 348 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \ 349 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \ 350 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \ 351 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM)) 352 /** 353 * @} 354 */ 355 356 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency 357 * @{ 358 */ 359 360 #define LCD_BLINKFREQUENCY_DIV8 (0x00000000U) /*!< The Blink frequency = fLCD/8 */ 361 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */ 362 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */ 363 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */ 364 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */ 365 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */ 366 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */ 367 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */ 368 369 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \ 370 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \ 371 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \ 372 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \ 373 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \ 374 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \ 375 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \ 376 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024)) 377 /** 378 * @} 379 */ 380 381 /** @defgroup LCD_Contrast LCD Contrast 382 * @{ 383 */ 384 385 #define LCD_CONTRASTLEVEL_0 (0x00000000U) /*!< Maximum Voltage = 2.60V */ 386 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */ 387 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */ 388 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */ 389 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */ 390 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */ 391 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */ 392 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */ 393 394 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \ 395 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \ 396 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \ 397 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \ 398 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \ 399 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \ 400 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \ 401 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7)) 402 /** 403 * @} 404 */ 405 406 /** @defgroup LCD_MuxSegment LCD Mux Segment 407 * @{ 408 */ 409 410 #define LCD_MUXSEGMENT_DISABLE (0x00000000U) /*!< SEG pin multiplexing disabled */ 411 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */ 412 413 #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \ 414 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE)) 415 /** 416 * @} 417 */ 418 419 /** @defgroup LCD_BUFEN LCD Voltage output buffer enable 420 * @{ 421 */ 422 423 #define LCD_VOLTBUFOUT_DISABLE (0x00000000U) /*!< Voltage output buffer disabled */ 424 #define LCD_VOLTBUFOUT_ENABLE (LCD_CR_BUFEN) /*!< BUFEN[1] Voltage output buffer enabled */ 425 426 #define IS_LCD_VOLTBUFOUT(__VALUE__) (((__VALUE__) == LCD_VOLTBUFOUT_ENABLE) || \ 427 ((__VALUE__) == LCD_VOLTBUFOUT_DISABLE)) 428 /** 429 * @} 430 */ 431 432 /** @defgroup LCD_Flag LCD Flag 433 * @{ 434 */ 435 436 #define LCD_FLAG_ENS LCD_SR_ENS 437 #define LCD_FLAG_SOF LCD_SR_SOF 438 #define LCD_FLAG_UDR LCD_SR_UDR 439 #define LCD_FLAG_UDD LCD_SR_UDD 440 #define LCD_FLAG_RDY LCD_SR_RDY 441 #define LCD_FLAG_FCRSF LCD_SR_FCRSR 442 443 /** 444 * @} 445 */ 446 447 /** @defgroup LCD_RAMRegister LCD RAMRegister 448 * @{ 449 */ 450 451 #define LCD_RAM_REGISTER0 (0x00000000U) /*!< LCD RAM Register 0 */ 452 #define LCD_RAM_REGISTER1 (0x00000001U) /*!< LCD RAM Register 1 */ 453 #define LCD_RAM_REGISTER2 (0x00000002U) /*!< LCD RAM Register 2 */ 454 #define LCD_RAM_REGISTER3 (0x00000003U) /*!< LCD RAM Register 3 */ 455 #define LCD_RAM_REGISTER4 (0x00000004U) /*!< LCD RAM Register 4 */ 456 #define LCD_RAM_REGISTER5 (0x00000005U) /*!< LCD RAM Register 5 */ 457 #define LCD_RAM_REGISTER6 (0x00000006U) /*!< LCD RAM Register 6 */ 458 #define LCD_RAM_REGISTER7 (0x00000007U) /*!< LCD RAM Register 7 */ 459 #define LCD_RAM_REGISTER8 (0x00000008U) /*!< LCD RAM Register 8 */ 460 #define LCD_RAM_REGISTER9 (0x00000009U) /*!< LCD RAM Register 9 */ 461 #define LCD_RAM_REGISTER10 (0x0000000AU) /*!< LCD RAM Register 10 */ 462 #define LCD_RAM_REGISTER11 (0x0000000BU) /*!< LCD RAM Register 11 */ 463 #define LCD_RAM_REGISTER12 (0x0000000CU) /*!< LCD RAM Register 12 */ 464 #define LCD_RAM_REGISTER13 (0x0000000DU) /*!< LCD RAM Register 13 */ 465 #define LCD_RAM_REGISTER14 (0x0000000EU) /*!< LCD RAM Register 14 */ 466 #define LCD_RAM_REGISTER15 (0x0000000FU) /*!< LCD RAM Register 15 */ 467 468 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \ 469 ((__REGISTER__) == LCD_RAM_REGISTER1) || \ 470 ((__REGISTER__) == LCD_RAM_REGISTER2) || \ 471 ((__REGISTER__) == LCD_RAM_REGISTER3) || \ 472 ((__REGISTER__) == LCD_RAM_REGISTER4) || \ 473 ((__REGISTER__) == LCD_RAM_REGISTER5) || \ 474 ((__REGISTER__) == LCD_RAM_REGISTER6) || \ 475 ((__REGISTER__) == LCD_RAM_REGISTER7) || \ 476 ((__REGISTER__) == LCD_RAM_REGISTER8) || \ 477 ((__REGISTER__) == LCD_RAM_REGISTER9) || \ 478 ((__REGISTER__) == LCD_RAM_REGISTER10) || \ 479 ((__REGISTER__) == LCD_RAM_REGISTER11) || \ 480 ((__REGISTER__) == LCD_RAM_REGISTER12) || \ 481 ((__REGISTER__) == LCD_RAM_REGISTER13) || \ 482 ((__REGISTER__) == LCD_RAM_REGISTER14) || \ 483 ((__REGISTER__) == LCD_RAM_REGISTER15)) 484 485 /** 486 * @} 487 */ 488 489 /** 490 * @} 491 */ 492 493 /* Exported macro ------------------------------------------------------------*/ 494 495 /** @defgroup LCD_Exported_Macros LCD Exported Macros 496 * @{ 497 */ 498 499 /** @brief Reset LCD handle state 500 * @param __HANDLE__ specifies the LCD Handle. 501 * @retval None 502 */ 503 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) 504 505 /** @brief macros to enables or disables the LCD 506 * @param __HANDLE__ specifies the LCD Handle. 507 * @retval None 508 */ 509 #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) 510 #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) 511 512 /** @brief macros to enables or disables the Voltage output buffer 513 * @param __HANDLE__ specifies the LCD Handle. 514 * @retval None 515 */ 516 #define __HAL_LCD_VOLTOUTBUFFER_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)) 517 #define __HAL_LCD_VOLTOUTBUFFER_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN)) 518 519 /** @brief Macros to enable or disable the low resistance divider. Displays with high 520 * internal resistance may need a longer drive time to achieve 521 * satisfactory contrast. This function is useful in this case if some 522 * additional power consumption can be tolerated. 523 * @param __HANDLE__ specifies the LCD Handle. 524 * @note When this mode is enabled, the PulseOn Duration (PON) have to be 525 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1). 526 * @retval None 527 */ 528 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ 529 do{ \ 530 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ 531 LCD_WaitForSynchro(__HANDLE__); \ 532 }while(0) 533 534 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ 535 do{ \ 536 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ 537 LCD_WaitForSynchro(__HANDLE__); \ 538 }while(0) 539 540 /** 541 * @brief Macro to configure the LCD pulses on duration. 542 * @param __HANDLE__ specifies the LCD Handle. 543 * @param __DURATION__ specifies the LCD pulse on duration in terms of 544 * CK_PS (prescaled LCD clock period) pulses. 545 * This parameter can be one of the following values: 546 * @arg LCD_PULSEONDURATION_0: 0 pulse 547 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS 548 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS 549 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS 550 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS 551 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS 552 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS 553 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS 554 * @retval None 555 */ 556 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ 557 do{ \ 558 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \ 559 LCD_WaitForSynchro(__HANDLE__); \ 560 }while(0) 561 562 /** 563 * @brief Macro to configure the LCD dead time. 564 * @param __HANDLE__ specifies the LCD Handle. 565 * @param __DEADTIME__ specifies the LCD dead time. 566 * This parameter can be one of the following values: 567 * @arg LCD_DEADTIME_0: No dead Time 568 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame 569 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame 570 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame 571 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame 572 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame 573 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame 574 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame 575 * @retval None 576 */ 577 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ 578 do{ \ 579 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \ 580 LCD_WaitForSynchro(__HANDLE__); \ 581 }while(0) 582 583 /** 584 * @brief Macro to configure the LCD Contrast. 585 * @param __HANDLE__ specifies the LCD Handle. 586 * @param __CONTRAST__ specifies the LCD Contrast. 587 * This parameter can be one of the following values: 588 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V 589 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V 590 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V 591 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V 592 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V 593 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V 594 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V 595 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V 596 * @retval None 597 */ 598 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ 599 do{ \ 600 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \ 601 LCD_WaitForSynchro(__HANDLE__); \ 602 } while(0) 603 604 /** 605 * @brief Macro to configure the LCD Blink mode and Blink frequency. 606 * @param __HANDLE__ specifies the LCD Handle. 607 * @param __BLINKMODE__ specifies the LCD blink mode. 608 * This parameter can be one of the following values: 609 * @arg LCD_BLINKMODE_OFF: Blink disabled 610 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) 611 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8 612 * pixels according to the programmed duty) 613 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM 614 * (all pixels) 615 * @param __BLINKFREQUENCY__ specifies the LCD blink frequency. 616 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 617 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 618 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 619 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64 620 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 621 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 622 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 623 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 624 * @retval None 625 */ 626 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ 627 do{ \ 628 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \ 629 LCD_WaitForSynchro(__HANDLE__); \ 630 }while(0) 631 632 /** @brief Enables or disables the specified LCD interrupt. 633 * @param __HANDLE__ specifies the LCD Handle. 634 * @param __INTERRUPT__ specifies the LCD interrupt source to be enabled or disabled. 635 * This parameter can be one of the following values: 636 * @arg LCD_IT_SOF: Start of Frame Interrupt 637 * @arg LCD_IT_UDD: Update Display Done Interrupt 638 * @retval None 639 */ 640 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ 641 do{ \ 642 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ 643 LCD_WaitForSynchro(__HANDLE__); \ 644 }while(0) 645 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ 646 do{ \ 647 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ 648 LCD_WaitForSynchro(__HANDLE__); \ 649 }while(0) 650 651 /** @brief Checks whether the specified LCD interrupt is enabled or not. 652 * @param __HANDLE__ specifies the LCD Handle. 653 * @param __IT__ specifies the LCD interrupt source to check. 654 * This parameter can be one of the following values: 655 * @arg LCD_IT_SOF: Start of Frame Interrupt 656 * @arg LCD_IT_UDD: Update Display Done Interrupt. 657 * @note If the device is in STOP mode (PCLK not provided) UDD will not 658 * generate an interrupt even if UDDIE = 1. 659 * If the display is not enabled the UDD interrupt will never occur. 660 * @retval The state of __IT__ (TRUE or FALSE). 661 */ 662 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) 663 664 /** @brief Checks whether the specified LCD flag is set or not. 665 * @param __HANDLE__ specifies the LCD Handle. 666 * @param __FLAG__ specifies the flag to check. 667 * This parameter can be one of the following values: 668 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. 669 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR 670 * goes from 0 to 1. On deactivation it reflects the real status of 671 * LCD so it becomes 0 at the end of the last displayed frame. 672 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at 673 * the beginning of a new frame, at the same time as the display data is 674 * updated. 675 * @arg LCD_FLAG_UDR: Update Display Request flag. 676 * @arg LCD_FLAG_UDD: Update Display Done flag. 677 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status 678 * of the step-up converter. 679 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. 680 * This flag is set by hardware each time the LCD_FCR register is updated 681 * in the LCDCLK domain. 682 * @retval The new state of __FLAG__ (TRUE or FALSE). 683 */ 684 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 685 686 /** @brief Clears the specified LCD pending flag. 687 * @param __HANDLE__ specifies the LCD Handle. 688 * @param __FLAG__ specifies the flag to clear. 689 * This parameter can be any combination of the following values: 690 * @arg LCD_FLAG_SOF: Start of Frame Interrupt 691 * @arg LCD_FLAG_UDD: Update Display Done Interrupt 692 * @retval None 693 */ 694 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) 695 696 /** 697 * @} 698 */ 699 700 /* Exported functions ------------------------------------------------------- */ 701 702 /** @defgroup LCD_Exported_Functions LCD Exported Functions 703 * @{ 704 */ 705 706 /** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods 707 * @{ 708 */ 709 710 /* Initialization/de-initialization methods **********************************/ 711 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); 712 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); 713 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); 714 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); 715 716 /** 717 * @} 718 */ 719 720 /** @defgroup LCD_Exported_Functions_Group2 IO operation methods 721 * @{ 722 */ 723 724 /* IO operation methods *******************************************************/ 725 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); 726 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); 727 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); 728 729 /** 730 * @} 731 */ 732 733 /** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods 734 * @{ 735 */ 736 737 /* Peripheral State methods **************************************************/ 738 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); 739 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); 740 741 /** 742 * @} 743 */ 744 745 /** 746 * @} 747 */ 748 749 /** @addtogroup LCD_Private 750 * @{ 751 */ 752 753 /* Private functions ---------------------------------------------------------*/ 754 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); 755 756 /** 757 * @} 758 */ 759 760 /* Define the private group ***********************************/ 761 /**************************************************************/ 762 /** @defgroup LCD_Private LCD Private 763 * @{ 764 */ 765 /** 766 * @} 767 */ 768 /**************************************************************/ 769 770 /** 771 * @} 772 */ 773 774 /** 775 * @} 776 */ 777 778 #endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */ 779 780 #ifdef __cplusplus 781 } 782 #endif 783 784 #endif /* __STM32L0xx_HAL_LCD_H */ 785
