1 /**
2   ******************************************************************************
3   * @file    stm32h7xx_ll_exti.c
4   * @author  MCD Application Team
5   * @brief   EXTI LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2017 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32h7xx_ll_exti.h"
22 #ifdef  USE_FULL_ASSERT
23 #include "stm32_assert.h"
24 #else
25 #define assert_param(expr) ((void)0U)
26 #endif
27 
28 /** @addtogroup STM32H7xx_LL_Driver
29   * @{
30   */
31 
32 #if defined (EXTI)
33 
34 /** @defgroup EXTI_LL EXTI
35   * @{
36   */
37 
38 /* Private types -------------------------------------------------------------*/
39 /* Private variables ---------------------------------------------------------*/
40 /* Private constants ---------------------------------------------------------*/
41 /* Private macros ------------------------------------------------------------*/
42 /** @addtogroup EXTI_LL_Private_Macros
43   * @{
44   */
45 
46 #define IS_LL_EXTI_LINE_0_31(__VALUE__)              (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31)  == 0x00000000U)
47 #define IS_LL_EXTI_LINE_32_63(__VALUE__)             (((__VALUE__) & ~LL_EXTI_LINE_ALL_32_63) == 0x00000000U)
48 #define IS_LL_EXTI_LINE_64_95(__VALUE__)             (((__VALUE__) & ~LL_EXTI_LINE_ALL_64_95) == 0x00000000U)
49 
50 #define IS_LL_EXTI_MODE(__VALUE__)                   (((__VALUE__) == LL_EXTI_MODE_IT)            \
51                                                    || ((__VALUE__) == LL_EXTI_MODE_EVENT)         \
52                                                    || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT))
53 
54 
55 #define IS_LL_EXTI_TRIGGER(__VALUE__)                (((__VALUE__) == LL_EXTI_TRIGGER_NONE)       \
56                                                    || ((__VALUE__) == LL_EXTI_TRIGGER_RISING)     \
57                                                    || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING)    \
58                                                    || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING))
59 
60 /**
61   * @}
62   */
63 
64 /* Private function prototypes -----------------------------------------------*/
65 
66 /* Exported functions --------------------------------------------------------*/
67 /** @addtogroup EXTI_LL_Exported_Functions
68   * @{
69   */
70 
71 /** @addtogroup EXTI_LL_EF_Init
72   * @{
73   */
74 
75 /**
76   * @brief  De-initialize the EXTI registers to their default reset values.
77   * @retval An ErrorStatus enumeration value:
78   *          - SUCCESS: EXTI registers are de-initialized
79   *          - ERROR: not applicable
80   */
LL_EXTI_DeInit(void)81 ErrorStatus LL_EXTI_DeInit(void)
82 {
83   /* Rising Trigger selection register set to default reset values */
84   LL_EXTI_WriteReg(RTSR1,  0x00000000U);
85   LL_EXTI_WriteReg(RTSR2,  0x00000000U);
86   LL_EXTI_WriteReg(RTSR3,  0x00000000U);
87 
88   /* Falling Trigger selection register set to default reset values */
89   LL_EXTI_WriteReg(FTSR1,  0x00000000U);
90   LL_EXTI_WriteReg(FTSR2,  0x00000000U);
91   LL_EXTI_WriteReg(FTSR3,  0x00000000U);
92 
93   /* Software interrupt event register set to default reset values */
94   LL_EXTI_WriteReg(SWIER1, 0x00000000U);
95   LL_EXTI_WriteReg(SWIER2, 0x00000000U);
96   LL_EXTI_WriteReg(SWIER3, 0x00000000U);
97 
98   /* D3 Pending register set to default reset values */
99   LL_EXTI_WriteReg(D3PMR1, 0x00000000U);
100   LL_EXTI_WriteReg(D3PMR2, 0x00000000U);
101   LL_EXTI_WriteReg(D3PMR3, 0x00000000U);
102 
103   /* D3 Pending clear selection register low to default reset values */
104   LL_EXTI_WriteReg(D3PCR1L, 0x00000000U);
105   LL_EXTI_WriteReg(D3PCR2L, 0x00000000U);
106   LL_EXTI_WriteReg(D3PCR3L, 0x00000000U);
107 
108   /* D3 Pending clear selection register high to default reset values */
109   LL_EXTI_WriteReg(D3PCR1H, 0x00000000U);
110   LL_EXTI_WriteReg(D3PCR2H, 0x00000000U);
111   LL_EXTI_WriteReg(D3PCR3H, 0x00000000U);
112 
113   /* Interrupt mask register reset */
114   LL_EXTI_WriteReg(IMR1, 0x00000000U);
115   LL_EXTI_WriteReg(IMR2, 0x00000000U);
116   LL_EXTI_WriteReg(IMR3, 0x00000000U);
117 
118   /*  Event mask register reset */
119   LL_EXTI_WriteReg(EMR1, 0x00000000U);
120   LL_EXTI_WriteReg(EMR2, 0x00000000U);
121   LL_EXTI_WriteReg(EMR3, 0x00000000U);
122 
123   /* Clear Pending requests */
124   LL_EXTI_WriteReg(PR1, EXTI_PR1_PR_Msk);
125   LL_EXTI_WriteReg(PR2, EXTI_PR2_PR_Msk);
126   LL_EXTI_WriteReg(PR3, EXTI_PR3_PR_Msk);
127 
128 #if defined(DUAL_CORE)
129   /* Interrupt mask register set to default reset values  for Core 2 (Coretx-M4)*/
130   LL_EXTI_WriteReg(C2IMR1, 0x00000000U);
131   LL_EXTI_WriteReg(C2IMR2, 0x00000000U);
132   LL_EXTI_WriteReg(C2IMR3, 0x00000000U);
133 
134   /*  Event mask register set to default reset values */
135   LL_EXTI_WriteReg(C2EMR1, 0x00000000U);
136   LL_EXTI_WriteReg(C2EMR2, 0x00000000U);
137   LL_EXTI_WriteReg(C2EMR3, 0x00000000U);
138 
139   /* Clear Pending requests */
140   LL_EXTI_WriteReg(C2PR1, EXTI_PR1_PR_Msk);
141   LL_EXTI_WriteReg(C2PR2, EXTI_PR2_PR_Msk);
142   LL_EXTI_WriteReg(C2PR3, EXTI_PR3_PR_Msk);
143 
144 #endif /* DUAL_CORE*/
145   return SUCCESS;
146 }
147 
148 /**
149   * @brief  Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct.
150   * @param  EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure.
151   * @retval An ErrorStatus enumeration value:
152   *          - SUCCESS: EXTI registers are initialized
153   *          - ERROR: not applicable
154   */
LL_EXTI_Init(LL_EXTI_InitTypeDef * EXTI_InitStruct)155 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct)
156 {
157   ErrorStatus status = SUCCESS;
158   /* Check the parameters */
159   assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31));
160   assert_param(IS_LL_EXTI_LINE_32_63(EXTI_InitStruct->Line_32_63));
161   assert_param(IS_LL_EXTI_LINE_64_95(EXTI_InitStruct->Line_64_95));
162   assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand));
163   assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode));
164 
165   /* ENABLE LineCommand */
166   if (EXTI_InitStruct->LineCommand != DISABLE)
167   {
168     assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger));
169 
170     /* Configure EXTI Lines in range from 0 to 31 */
171     if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE)
172     {
173       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_IT) == LL_EXTI_MODE_IT)
174       {
175         /* Enable IT on provided Lines for Cortex-M7*/
176         LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31);
177       }
178       else
179       {
180         /* Disable IT on provided Lines for Cortex-M7*/
181         LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
182       }
183 
184       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_EVENT) == LL_EXTI_MODE_EVENT)
185       {
186         /* Enable event on provided Lines for Cortex-M7 */
187         LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
188       }
189       else
190       {
191         /* Disable event on provided Lines for Cortex-M7 */
192         LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
193       }
194 #if defined(DUAL_CORE)
195       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_IT) == LL_EXTI_MODE_C2_IT)
196       {
197         /* Enable IT on provided Lines for Cortex-M4 */
198         LL_C2_EXTI_EnableIT_0_31 (EXTI_InitStruct->Line_0_31);
199       }
200       else
201       {
202         /* Disable IT on provided Lines for Cortex-M4*/
203         LL_C2_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
204       }
205 
206       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_EVENT) == LL_EXTI_MODE_C2_EVENT)
207       {
208         /* Enable event on provided Lines for Cortex-M4 */
209         LL_C2_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31);
210       }
211       else
212       {
213         /* Disable event on provided Lines for Cortex-M4*/
214         LL_C2_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
215       }
216 #endif /* DUAL_CORE */
217 
218       if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
219       {
220         switch (EXTI_InitStruct->Trigger)
221         {
222           case LL_EXTI_TRIGGER_RISING:
223             /* First Disable Falling Trigger on provided Lines */
224             LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
225             /* Then Enable Rising Trigger on provided Lines */
226             LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
227             break;
228           case LL_EXTI_TRIGGER_FALLING:
229             /* First Disable Rising Trigger on provided Lines */
230             LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
231             /* Then Enable Falling Trigger on provided Lines */
232             LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
233             break;
234           case LL_EXTI_TRIGGER_RISING_FALLING:
235             LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31);
236             LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31);
237             break;
238           default:
239             status = ERROR;
240             break;
241         }
242       }
243     }
244     /* Configure EXTI Lines in range from 32 to 63 */
245     if (EXTI_InitStruct->Line_32_63 != LL_EXTI_LINE_NONE)
246     {
247       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_IT) == LL_EXTI_MODE_IT)
248       {
249         /* Enable IT on provided Lines for Cortex-M7*/
250         LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63);
251       }
252       else
253       {
254         /* Disable IT on provided Lines for Cortex-M7*/
255         LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
256       }
257 
258       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_EVENT) == LL_EXTI_MODE_EVENT)
259       {
260         /* Enable event on provided Lines for Cortex-M7 */
261         LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
262       }
263       else
264       {
265         /* Disable event on provided Lines for Cortex-M7 */
266         LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
267       }
268 #if defined(DUAL_CORE)
269       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_IT) == LL_EXTI_MODE_C2_IT)
270       {
271         /* Enable IT on provided Lines for Cortex-M4 */
272         LL_C2_EXTI_EnableIT_32_63 (EXTI_InitStruct->Line_32_63);
273       }
274       else
275       {
276         /* Disable IT on provided Lines for Cortex-M4 */
277         LL_C2_EXTI_DisableIT_32_63 (EXTI_InitStruct->Line_32_63);
278       }
279 
280       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_EVENT) == LL_EXTI_MODE_C2_EVENT)
281       {
282         /* Enable event on provided Lines for Cortex-M4 */
283         LL_C2_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63);
284       }
285       else
286       {
287         /* Disable event on provided Lines for Cortex-M4 */
288         LL_C2_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
289       }
290 #endif /* DUAL_CORE */
291 
292       if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
293       {
294         switch (EXTI_InitStruct->Trigger)
295         {
296           case LL_EXTI_TRIGGER_RISING:
297             /* First Disable Falling Trigger on provided Lines */
298             LL_EXTI_DisableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
299             /* Then Enable IT on provided Lines */
300             LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
301             break;
302           case LL_EXTI_TRIGGER_FALLING:
303             /* First Disable Rising Trigger on provided Lines */
304             LL_EXTI_DisableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
305             /* Then Enable Falling Trigger on provided Lines */
306             LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
307             break;
308           case LL_EXTI_TRIGGER_RISING_FALLING:
309             LL_EXTI_EnableRisingTrig_32_63(EXTI_InitStruct->Line_32_63);
310             LL_EXTI_EnableFallingTrig_32_63(EXTI_InitStruct->Line_32_63);
311             break;
312           default:
313             status = ERROR;
314             break;
315         }
316       }
317     }
318     /* Configure EXTI Lines in range from 64 to 95 */
319     if (EXTI_InitStruct->Line_64_95 != LL_EXTI_LINE_NONE)
320     {
321       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_IT) == LL_EXTI_MODE_IT)
322       {
323         /* Enable IT on provided Lines for Cortex-M7*/
324         LL_EXTI_EnableIT_64_95(EXTI_InitStruct->Line_64_95);
325       }
326       else
327       {
328         /* Disable IT on provided Lines for Cortex-M7*/
329         LL_EXTI_DisableIT_64_95(EXTI_InitStruct->Line_64_95);
330       }
331 
332       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_EVENT) == LL_EXTI_MODE_EVENT)
333       {
334         /* Enable event on provided Lines for Cortex-M7 */
335         LL_EXTI_EnableEvent_64_95(EXTI_InitStruct->Line_64_95);
336       }
337       else
338       {
339         /* Disable event on provided Lines for Cortex-M7 */
340         LL_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
341       }
342 
343 #if defined(DUAL_CORE)
344       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_IT) == LL_EXTI_MODE_C2_IT)
345       {
346         /* Enable IT on provided Lines for Cortex-M4 */
347         LL_C2_EXTI_EnableIT_64_95 (EXTI_InitStruct->Line_64_95);
348       }
349       else
350       {
351         /* Disable IT on provided Lines for Cortex-M4 */
352         LL_C2_EXTI_DisableIT_64_95 (EXTI_InitStruct->Line_64_95);
353       }
354 
355       if((EXTI_InitStruct->Mode & LL_EXTI_MODE_C2_EVENT) == LL_EXTI_MODE_C2_EVENT)
356       {
357         /* Enable event on provided Lines for Cortex-M4 */
358         LL_C2_EXTI_EnableEvent_64_95(EXTI_InitStruct->Line_64_95);
359       }
360       else
361       {
362         /* Disable event on provided Lines for Cortex-M4 */
363         LL_C2_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
364       }
365 #endif /* DUAL_CORE */
366 
367       if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE)
368       {
369         switch (EXTI_InitStruct->Trigger)
370         {
371           case LL_EXTI_TRIGGER_RISING:
372             /* First Disable Falling Trigger on provided Lines */
373             LL_EXTI_DisableFallingTrig_64_95(EXTI_InitStruct->Line_64_95);
374             /* Then Enable IT on provided Lines */
375             LL_EXTI_EnableRisingTrig_64_95(EXTI_InitStruct->Line_64_95);
376             break;
377           case LL_EXTI_TRIGGER_FALLING:
378             /* First Disable Rising Trigger on provided Lines */
379             LL_EXTI_DisableRisingTrig_64_95(EXTI_InitStruct->Line_64_95);
380             /* Then Enable Falling Trigger on provided Lines */
381             LL_EXTI_EnableFallingTrig_64_95(EXTI_InitStruct->Line_64_95);
382             break;
383           case LL_EXTI_TRIGGER_RISING_FALLING:
384             LL_EXTI_EnableRisingTrig_64_95(EXTI_InitStruct->Line_64_95);
385             LL_EXTI_EnableFallingTrig_64_95(EXTI_InitStruct->Line_64_95);
386             break;
387           default:
388             status = ERROR;
389             break;
390         }
391       }
392     }
393   }
394   else /* DISABLE LineCommand */
395   {
396     /* Disable IT on provided Lines for Cortex-M7*/
397     LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
398     LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
399     LL_EXTI_DisableIT_64_95(EXTI_InitStruct->Line_64_95);
400 
401     /* Disable event on provided Lines for Cortex-M7 */
402     LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
403     LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
404     LL_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
405 
406 #if defined(DUAL_CORE)
407     /* Disable IT on provided Lines for Cortex-M4*/
408     LL_C2_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31);
409     LL_C2_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63);
410     LL_C2_EXTI_DisableIT_64_95(EXTI_InitStruct->Line_64_95);
411 
412     /* Disable event on provided Lines for Cortex-M4 */
413     LL_C2_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
414     LL_C2_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63);
415     LL_C2_EXTI_DisableEvent_64_95(EXTI_InitStruct->Line_64_95);
416 #endif /* DUAL_CORE */
417   }
418 
419   return status;
420 }
421 
422 /**
423   * @brief  Set each @ref LL_EXTI_InitTypeDef field to default value.
424   * @param  EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure.
425   * @retval None
426   */
LL_EXTI_StructInit(LL_EXTI_InitTypeDef * EXTI_InitStruct)427 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct)
428 {
429   EXTI_InitStruct->Line_0_31      = LL_EXTI_LINE_NONE;
430   EXTI_InitStruct->Line_32_63     = LL_EXTI_LINE_NONE;
431   EXTI_InitStruct->Line_64_95     = LL_EXTI_LINE_NONE;
432   EXTI_InitStruct->LineCommand    = DISABLE;
433   EXTI_InitStruct->Mode           = LL_EXTI_MODE_IT;
434   EXTI_InitStruct->Trigger        = LL_EXTI_TRIGGER_FALLING;
435 }
436 
437 /**
438   * @}
439   */
440 
441 /**
442   * @}
443   */
444 
445 /**
446   * @}
447   */
448 
449 #endif /* defined (EXTI) */
450 
451 /**
452   * @}
453   */
454 
455 #endif /* USE_FULL_LL_DRIVER */
456 
457