1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_spdifrx.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the SPDIFRX audio interface:
7 * + Initialization and Configuration
8 * + Data transfers functions
9 * + DMA transfers management
10 * + Interrupts and flags management
11 *
12 ******************************************************************************
13 * @attention
14 *
15 * Copyright (c) 2017 STMicroelectronics.
16 * All rights reserved.
17 *
18 * This software is licensed under terms that can be found in the LICENSE file
19 * in the root directory of this software component.
20 * If no LICENSE file comes with this software, it is provided AS-IS.
21 *
22 ******************************************************************************
23 @verbatim
24 ===============================================================================
25 ##### How to use this driver #####
26 ===============================================================================
27 [..]
28 The SPDIFRX HAL driver can be used as follow:
29
30 (#) Declare SPDIFRX_HandleTypeDef handle structure.
31 (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
32 (##) Enable the SPDIFRX interface clock.
33 (##) SPDIFRX pins configuration:
34 (+++) Enable the clock for the SPDIFRX GPIOs.
35 (+++) Configure these SPDIFRX pins as alternate function pull-up.
36 (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveCtrlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
37 (+++) Configure the SPDIFRX interrupt priority.
38 (+++) Enable the NVIC SPDIFRX IRQ handle.
39 (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveCtrlFlow_DMA() API's).
40 (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
41 (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
42 (+++) Enable the DMAx interface clock.
43 (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
44 (+++) Configure the DMA Channel.
45 (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
46 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
47 DMA CtrlRx/DataRx channel.
48
49 (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
50 using HAL_SPDIFRX_Init() function.
51
52 -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
53 __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
54 -@- Make sure that ck_spdif clock is configured.
55
56 (#) Three operation modes are available within this driver :
57
58 *** Polling mode for reception operation (for debug purpose) ***
59 ================================================================
60 [..]
61 (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
62 (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveCtrlFlow()
63
64 *** Interrupt mode for reception operation ***
65 =========================================
66 [..]
67 (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
68 (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveCtrlFlow_IT()
69 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
70 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
71 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
73 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
74 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
75
76 *** DMA mode for reception operation ***
77 ========================================
78 [..]
79 (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
80 (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveCtrlFlow_DMA()
81 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
82 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
83 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
84 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
85 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
86 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
87 (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
88
89 *** SPDIFRX HAL driver macros list ***
90 =============================================
91 [..]
92 Below the list of most used macros in SPDIFRX HAL driver.
93 (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
94 (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
95 (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
96 (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
97 (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
98 (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
99
100 [..]
101 (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
102
103 *** Callback registration ***
104 =============================================
105
106 The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS when set to 1
107 allows the user to configure dynamically the driver callbacks.
108 Use HAL_SPDIFRX_RegisterCallback() function to register an interrupt callback.
109
110 The HAL_SPDIFRX_RegisterCallback() function allows to register the following callbacks:
111 (+) RxHalfCpltCallback : SPDIFRX Data flow half completed callback.
112 (+) RxCpltCallback : SPDIFRX Data flow completed callback.
113 (+) CxHalfCpltCallback : SPDIFRX Control flow half completed callback.
114 (+) CxCpltCallback : SPDIFRX Control flow completed callback.
115 (+) ErrorCallback : SPDIFRX error callback.
116 (+) MspInitCallback : SPDIFRX MspInit.
117 (+) MspDeInitCallback : SPDIFRX MspDeInit.
118 This function takes as parameters the HAL peripheral handle, the Callback ID
119 and a pointer to the user callback function.
120
121 Use HAL_SPDIFRX_UnRegisterCallback() function to reset a callback to the default
122 weak function.
123 The HAL_SPDIFRX_UnRegisterCallback() function takes as parameters the HAL peripheral handle,
124 and the Callback ID.
125 This function allows to reset the following callbacks:
126 (+) RxHalfCpltCallback : SPDIFRX Data flow half completed callback.
127 (+) RxCpltCallback : SPDIFRX Data flow completed callback.
128 (+) CxHalfCpltCallback : SPDIFRX Control flow half completed callback.
129 (+) CxCpltCallback : SPDIFRX Control flow completed callback.
130 (+) ErrorCallback : SPDIFRX error callback.
131 (+) MspInitCallback : SPDIFRX MspInit.
132 (+) MspDeInitCallback : SPDIFRX MspDeInit.
133
134 By default, after the HAL_SPDIFRX_Init() and when the state is HAL_SPDIFRX_STATE_RESET
135 all callbacks are set to the corresponding weak functions :
136 HAL_SPDIFRX_RxHalfCpltCallback() , HAL_SPDIFRX_RxCpltCallback(), HAL_SPDIFRX_CxHalfCpltCallback(),
137 HAL_SPDIFRX_CxCpltCallback() and HAL_SPDIFRX_ErrorCallback()
138 Exception done for MspInit and MspDeInit functions that are
139 reset to the legacy weak function in the HAL_SPDIFRX_Init()/ HAL_SPDIFRX_DeInit() only when
140 these callbacks pointers are NULL (not registered beforehand).
141 If not, MspInit or MspDeInit callbacks pointers are not null, the HAL_SPDIFRX_Init() / HAL_SPDIFRX_DeInit()
142 keep and use the user MspInit/MspDeInit functions (registered beforehand)
143
144 Callbacks can be registered/unregistered in HAL_SPDIFRX_STATE_READY state only.
145 Exception done MspInit/MspDeInit callbacks that can be registered/unregistered
146 in HAL_SPDIFRX_STATE_READY or HAL_SPDIFRX_STATE_RESET state,
147 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
148 In that case first register the MspInit/MspDeInit user callbacks
149 using HAL_SPDIFRX_RegisterCallback() before calling HAL_SPDIFRX_DeInit()
150 or HAL_SPDIFRX_Init() function.
151
152 When The compilation define USE_HAL_SPDIFRX_REGISTER_CALLBACKS is set to 0 or
153 not defined, the callback registration feature is not available and all callbacks
154 are set to the corresponding weak functions.
155
156 @endverbatim
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32h7xx_hal.h"
161
162 /** @addtogroup STM32H7xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup SPDIFRX SPDIFRX
167 * @brief SPDIFRX HAL module driver
168 * @{
169 */
170
171 #ifdef HAL_SPDIFRX_MODULE_ENABLED
172 #if defined (SPDIFRX)
173
174 /* Private typedef -----------------------------------------------------------*/
175 /* Private define ------------------------------------------------------------*/
176 #define SPDIFRX_TIMEOUT_VALUE 0xFFFFU
177
178 /* Private macro -------------------------------------------------------------*/
179 /* Private variables ---------------------------------------------------------*/
180 /* Private function prototypes -----------------------------------------------*/
181 /** @addtogroup SPDIFRX_Private_Functions
182 * @{
183 */
184 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
185 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
186 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
187 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
188 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
189 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
190 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
191 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag,
192 FlagStatus Status, uint32_t Timeout, uint32_t tickstart);
193 /**
194 * @}
195 */
196 /* Exported functions ---------------------------------------------------------*/
197
198 /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
199 * @{
200 */
201
202 /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
203 * @brief Initialization and Configuration functions
204 *
205 @verbatim
206 ===============================================================================
207 ##### Initialization and de-initialization functions #####
208 ===============================================================================
209 [..] This subsection provides a set of functions allowing to initialize and
210 de-initialize the SPDIFRX peripheral:
211
212 (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
213 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
214
215 (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
216 the selected configuration:
217 (++) Input Selection (IN0, IN1,...)
218 (++) Maximum allowed re-tries during synchronization phase
219 (++) Wait for activity on SPDIF selected input
220 (++) Channel status selection (from channel A or B)
221 (++) Data format (LSB, MSB, ...)
222 (++) Stereo mode
223 (++) User bits masking (PT,C,U,V,...)
224
225 (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
226 of the selected SPDIFRXx peripheral.
227 @endverbatim
228 * @{
229 */
230
231 /**
232 * @brief Initializes the SPDIFRX according to the specified parameters
233 * in the SPDIFRX_InitTypeDef and create the associated handle.
234 * @param hspdif SPDIFRX handle
235 * @retval HAL status
236 */
HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef * hspdif)237 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
238 {
239 uint32_t tmpreg;
240
241 /* Check the SPDIFRX handle allocation */
242 if (hspdif == NULL)
243 {
244 return HAL_ERROR;
245 }
246
247 /* Check the SPDIFRX parameters */
248 assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
249 assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
250 assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
251 assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
252 assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
253 assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
254 assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
255 assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
256 assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
257 assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
258 assert_param(IS_SYMBOL_CLOCK_GEN(hspdif->Init.SymbolClockGen));
259 assert_param(IS_SYMBOL_CLOCK_GEN(hspdif->Init.BackupSymbolClockGen));
260
261 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
262 if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
263 {
264 /* Allocate lock resource and initialize it */
265 hspdif->Lock = HAL_UNLOCKED;
266
267 hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
268 hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback; /* Legacy weak RxCpltCallback */
269 hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback; /* Legacy weak CxHalfCpltCallback */
270 hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback; /* Legacy weak CxCpltCallback */
271 hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback; /* Legacy weak ErrorCallback */
272
273 if (hspdif->MspInitCallback == NULL)
274 {
275 hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */
276 }
277
278 /* Init the low level hardware */
279 hspdif->MspInitCallback(hspdif);
280 }
281 #else
282 if (hspdif->State == HAL_SPDIFRX_STATE_RESET)
283 {
284 /* Allocate lock resource and initialize it */
285 hspdif->Lock = HAL_UNLOCKED;
286 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
287 HAL_SPDIFRX_MspInit(hspdif);
288 }
289 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
290
291 /* SPDIFRX peripheral state is BUSY */
292 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
293
294 /* Disable SPDIFRX interface (IDLE State) */
295 __HAL_SPDIFRX_IDLE(hspdif);
296
297 /* Reset the old SPDIFRX CR configuration */
298 tmpreg = hspdif->Instance->CR;
299
300 tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
301 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
302 SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
303 SPDIFRX_CR_CKSEN | SPDIFRX_CR_CKSBKPEN |
304 SPDIFRX_CR_INSEL);
305
306 /* Sets the new configuration of the SPDIFRX peripheral */
307 tmpreg |= (hspdif->Init.StereoMode |
308 hspdif->Init.InputSelection |
309 hspdif->Init.Retries |
310 hspdif->Init.WaitForActivity |
311 hspdif->Init.ChannelSelection |
312 hspdif->Init.DataFormat |
313 hspdif->Init.PreambleTypeMask |
314 hspdif->Init.ChannelStatusMask |
315 hspdif->Init.ValidityBitMask |
316 hspdif->Init.ParityErrorMask
317 );
318
319 if (hspdif->Init.SymbolClockGen == ENABLE)
320 {
321 tmpreg |= SPDIFRX_CR_CKSEN;
322 }
323
324 if (hspdif->Init.BackupSymbolClockGen == ENABLE)
325 {
326 tmpreg |= SPDIFRX_CR_CKSBKPEN;
327 }
328
329 hspdif->Instance->CR = tmpreg;
330
331 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
332
333 /* SPDIFRX peripheral state is READY*/
334 hspdif->State = HAL_SPDIFRX_STATE_READY;
335
336 return HAL_OK;
337 }
338
339 /**
340 * @brief DeInitializes the SPDIFRX peripheral
341 * @param hspdif SPDIFRX handle
342 * @retval HAL status
343 */
HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef * hspdif)344 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
345 {
346 /* Check the SPDIFRX handle allocation */
347 if (hspdif == NULL)
348 {
349 return HAL_ERROR;
350 }
351
352 /* Check the parameters */
353 assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
354
355 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
356
357 /* Disable SPDIFRX interface (IDLE state) */
358 __HAL_SPDIFRX_IDLE(hspdif);
359
360 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
361 if (hspdif->MspDeInitCallback == NULL)
362 {
363 hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspDeInit */
364 }
365
366 /* DeInit the low level hardware */
367 hspdif->MspDeInitCallback(hspdif);
368 #else
369 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
370 HAL_SPDIFRX_MspDeInit(hspdif);
371 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
372
373 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
374
375 /* SPDIFRX peripheral state is RESET*/
376 hspdif->State = HAL_SPDIFRX_STATE_RESET;
377
378 /* Release Lock */
379 __HAL_UNLOCK(hspdif);
380
381 return HAL_OK;
382 }
383
384 /**
385 * @brief SPDIFRX MSP Init
386 * @param hspdif SPDIFRX handle
387 * @retval None
388 */
HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef * hspdif)389 __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
390 {
391 /* Prevent unused argument(s) compilation warning */
392 UNUSED(hspdif);
393
394 /* NOTE : This function Should not be modified, when the callback is needed,
395 the HAL_SPDIFRX_MspInit could be implemented in the user file
396 */
397 }
398
399 /**
400 * @brief SPDIFRX MSP DeInit
401 * @param hspdif SPDIFRX handle
402 * @retval None
403 */
HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef * hspdif)404 __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
405 {
406 /* Prevent unused argument(s) compilation warning */
407 UNUSED(hspdif);
408
409 /* NOTE : This function Should not be modified, when the callback is needed,
410 the HAL_SPDIFRX_MspDeInit could be implemented in the user file
411 */
412 }
413
414 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
415 /**
416 * @brief Register a User SPDIFRX Callback
417 * To be used instead of the weak predefined callback
418 * @param hspdif SPDIFRX handle
419 * @param CallbackID ID of the callback to be registered
420 * This parameter can be one of the following values:
421 * @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID SPDIFRX Data flow half completed callback ID
422 * @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID SPDIFRX Data flow completed callback ID
423 * @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID SPDIFRX Control flow half completed callback ID
424 * @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID SPDIFRX Control flow completed callback ID
425 * @arg @ref HAL_SPDIFRX_ERROR_CB_ID SPDIFRX error callback ID
426 * @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID MspInit callback ID
427 * @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID MspDeInit callback ID
428 * @param pCallback pointer to the Callback function
429 * @retval HAL status
430 */
HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef * hspdif,HAL_SPDIFRX_CallbackIDTypeDef CallbackID,pSPDIFRX_CallbackTypeDef pCallback)431 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID,
432 pSPDIFRX_CallbackTypeDef pCallback)
433 {
434 HAL_StatusTypeDef status = HAL_OK;
435
436 if (pCallback == NULL)
437 {
438 /* Update the error code */
439 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
440 return HAL_ERROR;
441 }
442 /* Process locked */
443 __HAL_LOCK(hspdif);
444
445 if (HAL_SPDIFRX_STATE_READY == hspdif->State)
446 {
447 switch (CallbackID)
448 {
449 case HAL_SPDIFRX_RX_HALF_CB_ID :
450 hspdif->RxHalfCpltCallback = pCallback;
451 break;
452
453 case HAL_SPDIFRX_RX_CPLT_CB_ID :
454 hspdif->RxCpltCallback = pCallback;
455 break;
456
457 case HAL_SPDIFRX_CX_HALF_CB_ID :
458 hspdif->CxHalfCpltCallback = pCallback;
459 break;
460
461 case HAL_SPDIFRX_CX_CPLT_CB_ID :
462 hspdif->CxCpltCallback = pCallback;
463 break;
464
465 case HAL_SPDIFRX_ERROR_CB_ID :
466 hspdif->ErrorCallback = pCallback;
467 break;
468
469 case HAL_SPDIFRX_MSPINIT_CB_ID :
470 hspdif->MspInitCallback = pCallback;
471 break;
472
473 case HAL_SPDIFRX_MSPDEINIT_CB_ID :
474 hspdif->MspDeInitCallback = pCallback;
475 break;
476
477 default :
478 /* Update the error code */
479 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
480 /* Return error status */
481 status = HAL_ERROR;
482 break;
483 }
484 }
485 else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
486 {
487 switch (CallbackID)
488 {
489 case HAL_SPDIFRX_MSPINIT_CB_ID :
490 hspdif->MspInitCallback = pCallback;
491 break;
492
493 case HAL_SPDIFRX_MSPDEINIT_CB_ID :
494 hspdif->MspDeInitCallback = pCallback;
495 break;
496
497 default :
498 /* Update the error code */
499 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
500 /* Return error status */
501 status = HAL_ERROR;
502 break;
503 }
504 }
505 else
506 {
507 /* Update the error code */
508 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
509 /* Return error status */
510 status = HAL_ERROR;
511 }
512
513 /* Release Lock */
514 __HAL_UNLOCK(hspdif);
515 return status;
516 }
517
518 /**
519 * @brief Unregister a SPDIFRX Callback
520 * SPDIFRX callback is redirected to the weak predefined callback
521 * @param hspdif SPDIFRX handle
522 * @param CallbackID ID of the callback to be unregistered
523 * This parameter can be one of the following values:
524 * @arg @ref HAL_SPDIFRX_RX_HALF_CB_ID SPDIFRX Data flow half completed callback ID
525 * @arg @ref HAL_SPDIFRX_RX_CPLT_CB_ID SPDIFRX Data flow completed callback ID
526 * @arg @ref HAL_SPDIFRX_CX_HALF_CB_ID SPDIFRX Control flow half completed callback ID
527 * @arg @ref HAL_SPDIFRX_CX_CPLT_CB_ID SPDIFRX Control flow completed callback ID
528 * @arg @ref HAL_SPDIFRX_ERROR_CB_ID SPDIFRX error callback ID
529 * @arg @ref HAL_SPDIFRX_MSPINIT_CB_ID MspInit callback ID
530 * @arg @ref HAL_SPDIFRX_MSPDEINIT_CB_ID MspDeInit callback ID
531 * @retval HAL status
532 */
HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef * hspdif,HAL_SPDIFRX_CallbackIDTypeDef CallbackID)533 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif,
534 HAL_SPDIFRX_CallbackIDTypeDef CallbackID)
535 {
536 HAL_StatusTypeDef status = HAL_OK;
537
538 /* Process locked */
539 __HAL_LOCK(hspdif);
540
541 if (HAL_SPDIFRX_STATE_READY == hspdif->State)
542 {
543 switch (CallbackID)
544 {
545 case HAL_SPDIFRX_RX_HALF_CB_ID :
546 hspdif->RxHalfCpltCallback = HAL_SPDIFRX_RxHalfCpltCallback;
547 break;
548
549 case HAL_SPDIFRX_RX_CPLT_CB_ID :
550 hspdif->RxCpltCallback = HAL_SPDIFRX_RxCpltCallback;
551 break;
552
553 case HAL_SPDIFRX_CX_HALF_CB_ID :
554 hspdif->CxHalfCpltCallback = HAL_SPDIFRX_CxHalfCpltCallback;
555 break;
556
557 case HAL_SPDIFRX_CX_CPLT_CB_ID :
558 hspdif->CxCpltCallback = HAL_SPDIFRX_CxCpltCallback;
559 break;
560
561 case HAL_SPDIFRX_ERROR_CB_ID :
562 hspdif->ErrorCallback = HAL_SPDIFRX_ErrorCallback;
563 break;
564
565 default :
566 /* Update the error code */
567 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
568 /* Return error status */
569 status = HAL_ERROR;
570 break;
571 }
572 }
573 else if (HAL_SPDIFRX_STATE_RESET == hspdif->State)
574 {
575 switch (CallbackID)
576 {
577 case HAL_SPDIFRX_MSPINIT_CB_ID :
578 hspdif->MspInitCallback = HAL_SPDIFRX_MspInit; /* Legacy weak MspInit */
579 break;
580
581 case HAL_SPDIFRX_MSPDEINIT_CB_ID :
582 hspdif->MspDeInitCallback = HAL_SPDIFRX_MspDeInit; /* Legacy weak MspInit */
583 break;
584
585 default :
586 /* Update the error code */
587 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
588 /* Return error status */
589 status = HAL_ERROR;
590 break;
591 }
592 }
593 else
594 {
595 /* Update the error code */
596 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_INVALID_CALLBACK;
597 /* Return error status */
598 status = HAL_ERROR;
599 }
600
601 /* Release Lock */
602 __HAL_UNLOCK(hspdif);
603 return status;
604 }
605
606 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
607
608 /**
609 * @brief Set the SPDIFRX data format according to the specified parameters in the SPDIFRX_InitTypeDef.
610 * @param hspdif SPDIFRX handle
611 * @param sDataFormat SPDIFRX data format
612 * @retval HAL status
613 */
HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef * hspdif,SPDIFRX_SetDataFormatTypeDef sDataFormat)614 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
615 {
616 uint32_t tmpreg;
617
618 /* Check the SPDIFRX handle allocation */
619 if (hspdif == NULL)
620 {
621 return HAL_ERROR;
622 }
623
624 /* Check the SPDIFRX parameters */
625 assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
626 assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
627 assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
628 assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
629 assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
630 assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
631
632 /* Reset the old SPDIFRX CR configuration */
633 tmpreg = hspdif->Instance->CR;
634
635 if (((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
636 (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
637 ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
638 {
639 return HAL_ERROR;
640 }
641
642 tmpreg &= ~(SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
643 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
644
645 /* Configure the new data format */
646 tmpreg |= (sDataFormat.StereoMode |
647 sDataFormat.DataFormat |
648 sDataFormat.PreambleTypeMask |
649 sDataFormat.ChannelStatusMask |
650 sDataFormat.ValidityBitMask |
651 sDataFormat.ParityErrorMask);
652
653 hspdif->Instance->CR = tmpreg;
654
655 return HAL_OK;
656 }
657
658 /**
659 * @}
660 */
661
662 /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
663 * @brief Data transfers functions
664 *
665 @verbatim
666 ===============================================================================
667 ##### IO operation functions #####
668 ===============================================================================
669 [..]
670 This subsection provides a set of functions allowing to manage the SPDIFRX data
671 transfers.
672
673 (#) There is two mode of transfer:
674 (++) Blocking mode : The communication is performed in the polling mode.
675 The status of all data processing is returned by the same function
676 after finishing transfer.
677 (++) No-Blocking mode : The communication is performed using Interrupts
678 or DMA. These functions return the status of the transfer start-up.
679 The end of the data processing will be indicated through the
680 dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
681 using DMA mode.
682
683 (#) Blocking mode functions are :
684 (++) HAL_SPDIFRX_ReceiveDataFlow()
685 (++) HAL_SPDIFRX_ReceiveCtrlFlow()
686 (+@) Do not use blocking mode to receive both control and data flow at the same time.
687
688 (#) No-Blocking mode functions with Interrupt are :
689 (++) HAL_SPDIFRX_ReceiveCtrlFlow_IT()
690 (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
691
692 (#) No-Blocking mode functions with DMA are :
693 (++) HAL_SPDIFRX_ReceiveCtrlFlow_DMA()
694 (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
695
696 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
697 (++) HAL_SPDIFRX_RxCpltCallback()
698 (++) HAL_SPDIFRX_CxCpltCallback()
699
700 @endverbatim
701 * @{
702 */
703
704 /**
705 * @brief Receives an amount of data (Data Flow) in blocking mode.
706 * @param hspdif pointer to SPDIFRX_HandleTypeDef structure that contains
707 * the configuration information for SPDIFRX module.
708 * @param pData Pointer to data buffer
709 * @param Size Amount of data to be received
710 * @param Timeout Timeout duration
711 * @retval HAL status
712 */
HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size,uint32_t Timeout)713 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
714 uint32_t Timeout)
715 {
716 uint32_t tickstart;
717 uint16_t sizeCounter = Size;
718 uint32_t *pTmpBuf = pData;
719
720 if ((pData == NULL) || (Size == 0U))
721 {
722 return HAL_ERROR;
723 }
724
725 if (hspdif->State == HAL_SPDIFRX_STATE_READY)
726 {
727 /* Process Locked */
728 __HAL_LOCK(hspdif);
729
730 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
731
732 /* Start synchronisation */
733 __HAL_SPDIFRX_SYNC(hspdif);
734
735 /* Get tick */
736 tickstart = HAL_GetTick();
737
738 /* Wait until SYNCD flag is set */
739 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
740 {
741 return HAL_TIMEOUT;
742 }
743
744 /* Start reception */
745 __HAL_SPDIFRX_RCV(hspdif);
746
747 /* Receive data flow */
748 while (sizeCounter > 0U)
749 {
750 /* Get tick */
751 tickstart = HAL_GetTick();
752
753 /* Wait until RXNE flag is set */
754 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)
755 {
756 return HAL_TIMEOUT;
757 }
758
759 (*pTmpBuf) = hspdif->Instance->DR;
760 pTmpBuf++;
761 sizeCounter--;
762 }
763
764 /* SPDIFRX ready */
765 hspdif->State = HAL_SPDIFRX_STATE_READY;
766
767 /* Process Unlocked */
768 __HAL_UNLOCK(hspdif);
769
770 return HAL_OK;
771 }
772 else
773 {
774 return HAL_BUSY;
775 }
776 }
777
778 /**
779 * @brief Receives an amount of data (Control Flow) in blocking mode.
780 * @param hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains
781 * the configuration information for SPDIFRX module.
782 * @param pData Pointer to data buffer
783 * @param Size Amount of data to be received
784 * @param Timeout Timeout duration
785 * @retval HAL status
786 */
HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size,uint32_t Timeout)787 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size,
788 uint32_t Timeout)
789 {
790 uint32_t tickstart;
791 uint16_t sizeCounter = Size;
792 uint32_t *pTmpBuf = pData;
793
794 if ((pData == NULL) || (Size == 0U))
795 {
796 return HAL_ERROR;
797 }
798
799 if (hspdif->State == HAL_SPDIFRX_STATE_READY)
800 {
801 /* Process Locked */
802 __HAL_LOCK(hspdif);
803
804 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
805
806 /* Start synchronization */
807 __HAL_SPDIFRX_SYNC(hspdif);
808
809 /* Get tick */
810 tickstart = HAL_GetTick();
811
812 /* Wait until SYNCD flag is set */
813 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout, tickstart) != HAL_OK)
814 {
815 return HAL_TIMEOUT;
816 }
817
818 /* Start reception */
819 __HAL_SPDIFRX_RCV(hspdif);
820
821 /* Receive control flow */
822 while (sizeCounter > 0U)
823 {
824 /* Get tick */
825 tickstart = HAL_GetTick();
826
827 /* Wait until CSRNE flag is set */
828 if (SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout, tickstart) != HAL_OK)
829 {
830 return HAL_TIMEOUT;
831 }
832
833 (*pTmpBuf) = hspdif->Instance->CSR;
834 pTmpBuf++;
835 sizeCounter--;
836 }
837
838 /* SPDIFRX ready */
839 hspdif->State = HAL_SPDIFRX_STATE_READY;
840
841 /* Process Unlocked */
842 __HAL_UNLOCK(hspdif);
843
844 return HAL_OK;
845 }
846 else
847 {
848 return HAL_BUSY;
849 }
850 }
851
852 /**
853 * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
854 * @param hspdif SPDIFRX handle
855 * @param pData a 32-bit pointer to the Receive data buffer.
856 * @param Size number of data sample to be received .
857 * @retval HAL status
858 */
HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)859 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
860 {
861 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
862
863 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
864
865 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
866 {
867 if ((pData == NULL) || (Size == 0U))
868 {
869 return HAL_ERROR;
870 }
871
872 /* Process Locked */
873 __HAL_LOCK(hspdif);
874
875 hspdif->pRxBuffPtr = pData;
876 hspdif->RxXferSize = Size;
877 hspdif->RxXferCount = Size;
878
879 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
880
881 /* Check if a receive process is ongoing or not */
882 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
883
884 /* Enable the SPDIFRX PE Error Interrupt */
885 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
886
887 /* Enable the SPDIFRX OVR Error Interrupt */
888 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
889
890 /* Enable the SPDIFRX RXNE interrupt */
891 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
892
893 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
894 {
895 /* Start synchronization */
896 __HAL_SPDIFRX_SYNC(hspdif);
897
898 /* Wait until SYNCD flag is set */
899 do
900 {
901 if (count == 0U)
902 {
903 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
904 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
905 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
906 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
907 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
908 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
909 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
910 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
911
912 hspdif->State = HAL_SPDIFRX_STATE_READY;
913
914 /* Process Unlocked */
915 __HAL_UNLOCK(hspdif);
916
917 return HAL_TIMEOUT;
918 }
919 count--;
920 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
921
922 /* Start reception */
923 __HAL_SPDIFRX_RCV(hspdif);
924 }
925
926 /* Process Unlocked */
927 __HAL_UNLOCK(hspdif);
928
929 return HAL_OK;
930 }
931 else
932 {
933 return HAL_BUSY;
934 }
935 }
936
937 /**
938 * @brief Receive an amount of data (Control Flow) with Interrupt
939 * @param hspdif SPDIFRX handle
940 * @param pData a 32-bit pointer to the Receive data buffer.
941 * @param Size number of data sample (Control Flow) to be received
942 * @retval HAL status
943 */
HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)944 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
945 {
946 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
947
948 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
949
950 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
951 {
952 if ((pData == NULL) || (Size == 0U))
953 {
954 return HAL_ERROR;
955 }
956
957 /* Process Locked */
958 __HAL_LOCK(hspdif);
959
960 hspdif->pCsBuffPtr = pData;
961 hspdif->CsXferSize = Size;
962 hspdif->CsXferCount = Size;
963
964 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
965
966 /* Check if a receive process is ongoing or not */
967 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
968
969 /* Enable the SPDIFRX PE Error Interrupt */
970 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
971
972 /* Enable the SPDIFRX OVR Error Interrupt */
973 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
974
975 /* Enable the SPDIFRX CSRNE interrupt */
976 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
977
978 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
979 {
980 /* Start synchronization */
981 __HAL_SPDIFRX_SYNC(hspdif);
982
983 /* Wait until SYNCD flag is set */
984 do
985 {
986 if (count == 0U)
987 {
988 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
989 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
990 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
991 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
992 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
993 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
994 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
995 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
996
997 hspdif->State = HAL_SPDIFRX_STATE_READY;
998
999 /* Process Unlocked */
1000 __HAL_UNLOCK(hspdif);
1001
1002 return HAL_TIMEOUT;
1003 }
1004 count--;
1005 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1006
1007 /* Start reception */
1008 __HAL_SPDIFRX_RCV(hspdif);
1009 }
1010
1011 /* Process Unlocked */
1012 __HAL_UNLOCK(hspdif);
1013
1014 return HAL_OK;
1015 }
1016 else
1017 {
1018 return HAL_BUSY;
1019 }
1020 }
1021
1022 /**
1023 * @brief Receive an amount of data (Data Flow) mode with DMA
1024 * @param hspdif SPDIFRX handle
1025 * @param pData a 32-bit pointer to the Receive data buffer.
1026 * @param Size number of data sample to be received
1027 * @retval HAL status
1028 */
HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)1029 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1030 {
1031 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1032
1033 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1034
1035 if ((pData == NULL) || (Size == 0U))
1036 {
1037 return HAL_ERROR;
1038 }
1039
1040 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_CX))
1041 {
1042 /* Process Locked */
1043 __HAL_LOCK(hspdif);
1044
1045 hspdif->pRxBuffPtr = pData;
1046 hspdif->RxXferSize = Size;
1047 hspdif->RxXferCount = Size;
1048
1049 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1050 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
1051
1052 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1053 hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
1054
1055 /* Set the SPDIFRX Rx DMA transfer complete callback */
1056 hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
1057
1058 /* Set the DMA error callback */
1059 hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
1060
1061 /* Enable the DMA request */
1062 if (HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size) != HAL_OK)
1063 {
1064 /* Set SPDIFRX error */
1065 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1066
1067 /* Set SPDIFRX state */
1068 hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1069
1070 /* Process Unlocked */
1071 __HAL_UNLOCK(hspdif);
1072
1073 return HAL_ERROR;
1074 }
1075
1076 /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
1077 hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
1078
1079 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1080 {
1081 /* Start synchronization */
1082 __HAL_SPDIFRX_SYNC(hspdif);
1083
1084 /* Wait until SYNCD flag is set */
1085 do
1086 {
1087 if (count == 0U)
1088 {
1089 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1090 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1091 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1092 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1093 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1094 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1095 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1096 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1097
1098 hspdif->State = HAL_SPDIFRX_STATE_READY;
1099
1100 /* Process Unlocked */
1101 __HAL_UNLOCK(hspdif);
1102
1103 return HAL_TIMEOUT;
1104 }
1105 count--;
1106 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1107
1108 /* Start reception */
1109 __HAL_SPDIFRX_RCV(hspdif);
1110 }
1111
1112 /* Process Unlocked */
1113 __HAL_UNLOCK(hspdif);
1114
1115 return HAL_OK;
1116 }
1117 else
1118 {
1119 return HAL_BUSY;
1120 }
1121 }
1122
1123 /**
1124 * @brief Receive an amount of data (Control Flow) with DMA
1125 * @param hspdif SPDIFRX handle
1126 * @param pData a 32-bit pointer to the Receive data buffer.
1127 * @param Size number of data (Control Flow) sample to be received
1128 * @retval HAL status
1129 */
HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef * hspdif,uint32_t * pData,uint16_t Size)1130 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
1131 {
1132 uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
1133
1134 const HAL_SPDIFRX_StateTypeDef tempState = hspdif->State;
1135
1136 if ((pData == NULL) || (Size == 0U))
1137 {
1138 return HAL_ERROR;
1139 }
1140
1141 if ((tempState == HAL_SPDIFRX_STATE_READY) || (tempState == HAL_SPDIFRX_STATE_BUSY_RX))
1142 {
1143 hspdif->pCsBuffPtr = pData;
1144 hspdif->CsXferSize = Size;
1145 hspdif->CsXferCount = Size;
1146
1147 /* Process Locked */
1148 __HAL_LOCK(hspdif);
1149
1150 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
1151 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
1152
1153 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
1154 hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
1155
1156 /* Set the SPDIFRX Rx DMA transfer complete callback */
1157 hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
1158
1159 /* Set the DMA error callback */
1160 hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
1161
1162 /* Enable the DMA request */
1163 if (HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size) != HAL_OK)
1164 {
1165 /* Set SPDIFRX error */
1166 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_DMA;
1167
1168 /* Set SPDIFRX state */
1169 hspdif->State = HAL_SPDIFRX_STATE_ERROR;
1170
1171 /* Process Unlocked */
1172 __HAL_UNLOCK(hspdif);
1173
1174 return HAL_ERROR;
1175 }
1176
1177 /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
1178 hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
1179
1180 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_RCV)
1181 {
1182 /* Start synchronization */
1183 __HAL_SPDIFRX_SYNC(hspdif);
1184
1185 /* Wait until SYNCD flag is set */
1186 do
1187 {
1188 if (count == 0U)
1189 {
1190 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1191 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1192 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1193 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1194 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1195 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1196 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1197 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1198
1199 hspdif->State = HAL_SPDIFRX_STATE_READY;
1200
1201 /* Process Unlocked */
1202 __HAL_UNLOCK(hspdif);
1203
1204 return HAL_TIMEOUT;
1205 }
1206 count--;
1207 } while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
1208
1209 /* Start reception */
1210 __HAL_SPDIFRX_RCV(hspdif);
1211 }
1212
1213 /* Process Unlocked */
1214 __HAL_UNLOCK(hspdif);
1215
1216 return HAL_OK;
1217 }
1218 else
1219 {
1220 return HAL_BUSY;
1221 }
1222 }
1223
1224 /**
1225 * @brief stop the audio stream receive from the Media.
1226 * @param hspdif SPDIFRX handle
1227 * @retval None
1228 */
HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef * hspdif)1229 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
1230 {
1231 /* Process Locked */
1232 __HAL_LOCK(hspdif);
1233
1234 /* Disable the SPDIFRX DMA requests */
1235 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1236 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1237
1238 /* Disable the SPDIFRX DMA channel */
1239 __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
1240 __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
1241
1242 /* Disable SPDIFRX peripheral */
1243 __HAL_SPDIFRX_IDLE(hspdif);
1244
1245 hspdif->State = HAL_SPDIFRX_STATE_READY;
1246
1247 /* Process Unlocked */
1248 __HAL_UNLOCK(hspdif);
1249
1250 return HAL_OK;
1251 }
1252
1253 /**
1254 * @brief This function handles SPDIFRX interrupt request.
1255 * @param hspdif SPDIFRX handle
1256 * @retval HAL status
1257 */
HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef * hspdif)1258 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
1259 {
1260 uint32_t itFlag = hspdif->Instance->SR;
1261 uint32_t itSource = hspdif->Instance->IMR;
1262
1263 /* SPDIFRX in mode Data Flow Reception */
1264 if (((itFlag & SPDIFRX_FLAG_RXNE) == SPDIFRX_FLAG_RXNE) && ((itSource & SPDIFRX_IT_RXNE) == SPDIFRX_IT_RXNE))
1265 {
1266 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
1267 SPDIFRX_ReceiveDataFlow_IT(hspdif);
1268 }
1269
1270 /* SPDIFRX in mode Control Flow Reception */
1271 if (((itFlag & SPDIFRX_FLAG_CSRNE) == SPDIFRX_FLAG_CSRNE) && ((itSource & SPDIFRX_IT_CSRNE) == SPDIFRX_IT_CSRNE))
1272 {
1273 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
1274 SPDIFRX_ReceiveControlFlow_IT(hspdif);
1275 }
1276
1277 /* SPDIFRX Overrun error interrupt occurred */
1278 if (((itFlag & SPDIFRX_FLAG_OVR) == SPDIFRX_FLAG_OVR) && ((itSource & SPDIFRX_IT_OVRIE) == SPDIFRX_IT_OVRIE))
1279 {
1280 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_OVRIE);
1281
1282 /* Change the SPDIFRX error code */
1283 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
1284
1285 /* the transfer is not stopped */
1286 HAL_SPDIFRX_ErrorCallback(hspdif);
1287 }
1288
1289 /* SPDIFRX Parity error interrupt occurred */
1290 if (((itFlag & SPDIFRX_FLAG_PERR) == SPDIFRX_FLAG_PERR) && ((itSource & SPDIFRX_IT_PERRIE) == SPDIFRX_IT_PERRIE))
1291 {
1292 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_PERRIE);
1293
1294 /* Change the SPDIFRX error code */
1295 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
1296
1297 /* the transfer is not stopped */
1298 HAL_SPDIFRX_ErrorCallback(hspdif);
1299 }
1300 }
1301
1302 /**
1303 * @brief Rx Transfer (Data flow) half completed callbacks
1304 * @param hspdif SPDIFRX handle
1305 * @retval None
1306 */
HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1307 __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1308 {
1309 /* Prevent unused argument(s) compilation warning */
1310 UNUSED(hspdif);
1311
1312 /* NOTE : This function Should not be modified, when the callback is needed,
1313 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1314 */
1315 }
1316
1317 /**
1318 * @brief Rx Transfer (Data flow) completed callbacks
1319 * @param hspdif SPDIFRX handle
1320 * @retval None
1321 */
HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1322 __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1323 {
1324 /* Prevent unused argument(s) compilation warning */
1325 UNUSED(hspdif);
1326
1327 /* NOTE : This function Should not be modified, when the callback is needed,
1328 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1329 */
1330 }
1331
1332 /**
1333 * @brief Rx (Control flow) Transfer half completed callbacks
1334 * @param hspdif SPDIFRX handle
1335 * @retval None
1336 */
HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1337 __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1338 {
1339 /* Prevent unused argument(s) compilation warning */
1340 UNUSED(hspdif);
1341
1342 /* NOTE : This function Should not be modified, when the callback is needed,
1343 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1344 */
1345 }
1346
1347 /**
1348 * @brief Rx Transfer (Control flow) completed callbacks
1349 * @param hspdif SPDIFRX handle
1350 * @retval None
1351 */
HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef * hspdif)1352 __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
1353 {
1354 /* Prevent unused argument(s) compilation warning */
1355 UNUSED(hspdif);
1356
1357 /* NOTE : This function Should not be modified, when the callback is needed,
1358 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
1359 */
1360 }
1361
1362 /**
1363 * @brief SPDIFRX error callbacks
1364 * @param hspdif SPDIFRX handle
1365 * @retval None
1366 */
HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef * hspdif)1367 __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
1368 {
1369 /* Prevent unused argument(s) compilation warning */
1370 UNUSED(hspdif);
1371
1372 /* NOTE : This function Should not be modified, when the callback is needed,
1373 the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
1374 */
1375 }
1376
1377 /**
1378 * @}
1379 */
1380
1381 /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
1382 * @brief Peripheral State functions
1383 *
1384 @verbatim
1385 ===============================================================================
1386 ##### Peripheral State and Errors functions #####
1387 ===============================================================================
1388 [..]
1389 This subsection permit to get in run-time the status of the peripheral
1390 and the data flow.
1391
1392 @endverbatim
1393 * @{
1394 */
1395
1396 /**
1397 * @brief Return the SPDIFRX state
1398 * @param hspdif SPDIFRX handle
1399 * @retval HAL state
1400 */
HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const * const hspdif)1401 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif)
1402 {
1403 return hspdif->State;
1404 }
1405
1406 /**
1407 * @brief Return the SPDIFRX error code
1408 * @param hspdif SPDIFRX handle
1409 * @retval SPDIFRX Error Code
1410 */
HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const * const hspdif)1411 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif)
1412 {
1413 return hspdif->ErrorCode;
1414 }
1415
1416 /**
1417 * @}
1418 */
1419
1420 /**
1421 * @brief DMA SPDIFRX receive process (Data flow) complete callback
1422 * @param hdma DMA handle
1423 * @retval None
1424 */
SPDIFRX_DMARxCplt(DMA_HandleTypeDef * hdma)1425 static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
1426 {
1427 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1428
1429 /* Disable Rx DMA Request */
1430 if (hdma->Init.Mode != DMA_CIRCULAR)
1431 {
1432 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1433 hspdif->RxXferCount = 0;
1434 hspdif->State = HAL_SPDIFRX_STATE_READY;
1435 }
1436 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1437 hspdif->RxCpltCallback(hspdif);
1438 #else
1439 HAL_SPDIFRX_RxCpltCallback(hspdif);
1440 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1441 }
1442
1443 /**
1444 * @brief DMA SPDIFRX receive process (Data flow) half complete callback
1445 * @param hdma DMA handle
1446 * @retval None
1447 */
SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef * hdma)1448 static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1449 {
1450 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1451
1452 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1453 hspdif->RxHalfCpltCallback(hspdif);
1454 #else
1455 HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
1456 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1457 }
1458
1459
1460 /**
1461 * @brief DMA SPDIFRX receive process (Control flow) complete callback
1462 * @param hdma DMA handle
1463 * @retval None
1464 */
SPDIFRX_DMACxCplt(DMA_HandleTypeDef * hdma)1465 static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1466 {
1467 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1468
1469 /* Disable Cb DMA Request */
1470 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1471 hspdif->CsXferCount = 0;
1472
1473 hspdif->State = HAL_SPDIFRX_STATE_READY;
1474 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1475 hspdif->CxCpltCallback(hspdif);
1476 #else
1477 HAL_SPDIFRX_CxCpltCallback(hspdif);
1478 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1479 }
1480
1481 /**
1482 * @brief DMA SPDIFRX receive process (Control flow) half complete callback
1483 * @param hdma DMA handle
1484 * @retval None
1485 */
SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef * hdma)1486 static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1487 {
1488 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1489
1490 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1491 hspdif->CxHalfCpltCallback(hspdif);
1492 #else
1493 HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
1494 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1495 }
1496
1497 /**
1498 * @brief DMA SPDIFRX communication error callback
1499 * @param hdma DMA handle
1500 * @retval None
1501 */
SPDIFRX_DMAError(DMA_HandleTypeDef * hdma)1502 static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1503 {
1504 SPDIFRX_HandleTypeDef *hspdif = (SPDIFRX_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1505
1506 /* Disable Rx and Cb DMA Request */
1507 hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1508 hspdif->RxXferCount = 0;
1509
1510 hspdif->State = HAL_SPDIFRX_STATE_READY;
1511
1512 /* Set the error code and execute error callback*/
1513 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1514
1515 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1516 /* The transfer is not stopped */
1517 hspdif->ErrorCallback(hspdif);
1518 #else
1519 /* The transfer is not stopped */
1520 HAL_SPDIFRX_ErrorCallback(hspdif);
1521 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1522 }
1523
1524 /**
1525 * @brief Receive an amount of data (Data Flow) with Interrupt
1526 * @param hspdif SPDIFRX handle
1527 * @retval None
1528 */
SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef * hspdif)1529 static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1530 {
1531 /* Receive data */
1532 (*hspdif->pRxBuffPtr) = hspdif->Instance->DR;
1533 hspdif->pRxBuffPtr++;
1534 hspdif->RxXferCount--;
1535
1536 if (hspdif->RxXferCount == 0U)
1537 {
1538 /* Disable RXNE/PE and OVR interrupts */
1539 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
1540
1541 hspdif->State = HAL_SPDIFRX_STATE_READY;
1542
1543 /* Process Unlocked */
1544 __HAL_UNLOCK(hspdif);
1545
1546 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1547 hspdif->RxCpltCallback(hspdif);
1548 #else
1549 HAL_SPDIFRX_RxCpltCallback(hspdif);
1550 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1551 }
1552 }
1553
1554 /**
1555 * @brief Receive an amount of data (Control Flow) with Interrupt
1556 * @param hspdif SPDIFRX handle
1557 * @retval None
1558 */
SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef * hspdif)1559 static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1560 {
1561 /* Receive data */
1562 (*hspdif->pCsBuffPtr) = hspdif->Instance->CSR;
1563 hspdif->pCsBuffPtr++;
1564 hspdif->CsXferCount--;
1565
1566 if (hspdif->CsXferCount == 0U)
1567 {
1568 /* Disable CSRNE interrupt */
1569 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1570
1571 hspdif->State = HAL_SPDIFRX_STATE_READY;
1572
1573 /* Process Unlocked */
1574 __HAL_UNLOCK(hspdif);
1575
1576 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1)
1577 hspdif->CxCpltCallback(hspdif);
1578 #else
1579 HAL_SPDIFRX_CxCpltCallback(hspdif);
1580 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */
1581 }
1582 }
1583
1584 /**
1585 * @brief This function handles SPDIFRX Communication Timeout.
1586 * @param hspdif SPDIFRX handle
1587 * @param Flag Flag checked
1588 * @param Status Value of the flag expected
1589 * @param Timeout Duration of the timeout
1590 * @param tickstart Tick start value
1591 * @retval HAL status
1592 */
SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef * hspdif,uint32_t Flag,FlagStatus Status,uint32_t Timeout,uint32_t tickstart)1593 static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status,
1594 uint32_t Timeout, uint32_t tickstart)
1595 {
1596 /* Wait until flag is set */
1597 while (__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == Status)
1598 {
1599 /* Check for the Timeout */
1600 if (Timeout != HAL_MAX_DELAY)
1601 {
1602 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
1603 {
1604 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1605 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1606 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1607 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1608 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1609 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1610 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1611 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1612
1613 hspdif->State = HAL_SPDIFRX_STATE_READY;
1614
1615 /* Process Unlocked */
1616 __HAL_UNLOCK(hspdif);
1617
1618 return HAL_TIMEOUT;
1619 }
1620 }
1621 }
1622
1623 return HAL_OK;
1624 }
1625
1626 /**
1627 * @}
1628 */
1629
1630
1631 #endif /* SPDIFRX */
1632 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
1633 /**
1634 * @}
1635 */
1636
1637 /**
1638 * @}
1639 */
1640
