1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_eth_ex.c
4 * @author MCD Application Team
5 * @brief ETH HAL Extended module driver.
6 *
7 ******************************************************************************
8 * @attention
9 *
10 * Copyright (c) 2017 STMicroelectronics.
11 * All rights reserved.
12 *
13 * This software is licensed under terms that can be found in the LICENSE file
14 * in the root directory of this software component.
15 * If no LICENSE file comes with this software, it is provided AS-IS.
16 *
17 ******************************************************************************
18 */
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32h7xx_hal.h"
22
23 /** @addtogroup STM32H7xx_HAL_Driver
24 * @{
25 */
26
27 #ifdef HAL_ETH_MODULE_ENABLED
28
29 #if defined(ETH)
30
31 /** @defgroup ETHEx ETHEx
32 * @brief ETH HAL Extended module driver
33 * @{
34 */
35
36
37 /* Private typedef -----------------------------------------------------------*/
38 /* Private define ------------------------------------------------------------*/
39 /** @defgroup ETHEx_Private_Constants ETHEx Private Constants
40 * @{
41 */
42 #define ETH_MACL4CR_MASK (ETH_MACL3L4CR_L4PEN | ETH_MACL3L4CR_L4SPM | \
43 ETH_MACL3L4CR_L4SPIM | ETH_MACL3L4CR_L4DPM | \
44 ETH_MACL3L4CR_L4DPIM)
45
46 #define ETH_MACL3CR_MASK (ETH_MACL3L4CR_L3PEN | ETH_MACL3L4CR_L3SAM | \
47 ETH_MACL3L4CR_L3SAIM | ETH_MACL3L4CR_L3DAM | \
48 ETH_MACL3L4CR_L3DAIM | ETH_MACL3L4CR_L3HSBM | \
49 ETH_MACL3L4CR_L3HDBM)
50
51 #define ETH_MACRXVLAN_MASK (ETH_MACVTR_EIVLRXS | ETH_MACVTR_EIVLS | \
52 ETH_MACVTR_ERIVLT | ETH_MACVTR_EDVLP | \
53 ETH_MACVTR_VTHM | ETH_MACVTR_EVLRXS | \
54 ETH_MACVTR_EVLS | ETH_MACVTR_DOVLTC | \
55 ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL | \
56 ETH_MACVTR_VTIM | ETH_MACVTR_ETV)
57
58 #define ETH_MACTXVLAN_MASK (ETH_MACVIR_VLTI | ETH_MACVIR_CSVL | \
59 ETH_MACVIR_VLP | ETH_MACVIR_VLC)
60 /**
61 * @}
62 */
63
64 /* Private macros ------------------------------------------------------------*/
65 /* Private function prototypes -----------------------------------------------*/
66 /* Exported functions ---------------------------------------------------------*/
67 /** @defgroup ETHEx_Exported_Functions ETH Extended Exported Functions
68 * @{
69 */
70
71 /** @defgroup ETHEx_Exported_Functions_Group1 Extended features functions
72 * @brief Extended features functions
73 *
74 @verbatim
75 ===============================================================================
76 ##### Extended features functions #####
77 ===============================================================================
78 [..] This section provides functions allowing to:
79 (+) Configure ARP offload module
80 (+) Configure L3 and L4 filters
81 (+) Configure Extended VLAN features
82 (+) Configure Energy Efficient Ethernet module
83
84 @endverbatim
85 * @{
86 */
87
88 /**
89 * @brief Enables ARP Offload.
90 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
91 * the configuration information for ETHERNET module
92 * @retval None
93 */
HAL_ETHEx_EnableARPOffload(ETH_HandleTypeDef * heth)94 void HAL_ETHEx_EnableARPOffload(ETH_HandleTypeDef *heth)
95 {
96 SET_BIT(heth->Instance->MACCR, ETH_MACCR_ARP);
97 }
98
99 /**
100 * @brief Disables ARP Offload.
101 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
102 * the configuration information for ETHERNET module
103 * @retval None
104 */
HAL_ETHEx_DisableARPOffload(ETH_HandleTypeDef * heth)105 void HAL_ETHEx_DisableARPOffload(ETH_HandleTypeDef *heth)
106 {
107 CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_ARP);
108 }
109
110 /**
111 * @brief Set the ARP Match IP address
112 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
113 * the configuration information for ETHERNET module
114 * @param IpAddress: IP Address to be matched for incoming ARP requests
115 * @retval None
116 */
HAL_ETHEx_SetARPAddressMatch(ETH_HandleTypeDef * heth,uint32_t IpAddress)117 void HAL_ETHEx_SetARPAddressMatch(ETH_HandleTypeDef *heth, uint32_t IpAddress)
118 {
119 WRITE_REG(heth->Instance->MACARPAR, IpAddress);
120 }
121
122 /**
123 * @brief Configures the L4 Filter, this function allow to:
124 * set the layer 4 protocol to be matched (TCP or UDP)
125 * enable/disable L4 source/destination port perfect/inverse match.
126 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
127 * the configuration information for ETHERNET module
128 * @param Filter: L4 filter to configured, this parameter must be one of the following
129 * ETH_L4_FILTER_0
130 * ETH_L4_FILTER_1
131 * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure
132 * that contains L4 filter configuration.
133 * @retval HAL status
134 */
HAL_ETHEx_SetL4FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L4FilterConfigTypeDef * pL4FilterConfig)135 HAL_StatusTypeDef HAL_ETHEx_SetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter,
136 ETH_L4FilterConfigTypeDef *pL4FilterConfig)
137 {
138 __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter));
139
140 if (pL4FilterConfig == NULL)
141 {
142 return HAL_ERROR;
143 }
144
145 /* Write configuration to (MACL3L4C0R + filter )register */
146 MODIFY_REG(*configreg, ETH_MACL4CR_MASK, (pL4FilterConfig->Protocol |
147 pL4FilterConfig->SrcPortFilterMatch |
148 pL4FilterConfig->DestPortFilterMatch));
149
150 configreg = ((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter));
151
152 /* Write configuration to (MACL4A0R + filter )register */
153 MODIFY_REG(*configreg, (ETH_MACL4AR_L4DP | ETH_MACL4AR_L4SP), (pL4FilterConfig->SourcePort |
154 (pL4FilterConfig->DestinationPort << 16)));
155
156 /* Enable L4 filter */
157 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
158
159 return HAL_OK;
160 }
161
162 /**
163 * @brief Configures the L4 Filter, this function allow to:
164 * set the layer 4 protocol to be matched (TCP or UDP)
165 * enable/disable L4 source/destination port perfect/inverse match.
166 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
167 * the configuration information for ETHERNET module
168 * @param Filter: L4 filter to configured, this parameter must be one of the following
169 * ETH_L4_FILTER_0
170 * ETH_L4_FILTER_1
171 * @param pL4FilterConfig: pointer to a ETH_L4FilterConfigTypeDef structure
172 * that contains L4 filter configuration.
173 * @retval HAL status
174 */
HAL_ETHEx_GetL4FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L4FilterConfigTypeDef * pL4FilterConfig)175 HAL_StatusTypeDef HAL_ETHEx_GetL4FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter,
176 ETH_L4FilterConfigTypeDef *pL4FilterConfig)
177 {
178 if (pL4FilterConfig == NULL)
179 {
180 return HAL_ERROR;
181 }
182
183 /* Get configuration to (MACL3L4C0R + filter )register */
184 pL4FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
185 ETH_MACL3L4CR_L4PEN);
186 pL4FilterConfig->DestPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
187 (ETH_MACL3L4CR_L4DPM | ETH_MACL3L4CR_L4DPIM));
188 pL4FilterConfig->SrcPortFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
189 (ETH_MACL3L4CR_L4SPM | ETH_MACL3L4CR_L4SPIM));
190
191 /* Get configuration to (MACL3L4C0R + filter )register */
192 pL4FilterConfig->DestinationPort = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)),
193 ETH_MACL4AR_L4DP) >> 16);
194 pL4FilterConfig->SourcePort = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL4A0R) + Filter)), ETH_MACL4AR_L4SP);
195
196 return HAL_OK;
197 }
198
199 /**
200 * @brief Configures the L3 Filter, this function allow to:
201 * set the layer 3 protocol to be matched (IPv4 or IPv6)
202 * enable/disable L3 source/destination port perfect/inverse match.
203 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
204 * the configuration information for ETHERNET module
205 * @param Filter: L3 filter to configured, this parameter must be one of the following
206 * ETH_L3_FILTER_0
207 * ETH_L3_FILTER_1
208 * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure
209 * that contains L3 filter configuration.
210 * @retval HAL status
211 */
HAL_ETHEx_SetL3FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L3FilterConfigTypeDef * pL3FilterConfig)212 HAL_StatusTypeDef HAL_ETHEx_SetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter,
213 ETH_L3FilterConfigTypeDef *pL3FilterConfig)
214 {
215 __IO uint32_t *configreg = ((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter));
216
217 if (pL3FilterConfig == NULL)
218 {
219 return HAL_ERROR;
220 }
221
222 /* Write configuration to (MACL3L4C0R + filter )register */
223 MODIFY_REG(*configreg, ETH_MACL3CR_MASK, (pL3FilterConfig->Protocol |
224 pL3FilterConfig->SrcAddrFilterMatch |
225 pL3FilterConfig->DestAddrFilterMatch |
226 (pL3FilterConfig->SrcAddrHigherBitsMatch << 6) |
227 (pL3FilterConfig->DestAddrHigherBitsMatch << 11)));
228
229 /* Check if IPv6 protocol is selected */
230 if (pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH)
231 {
232 /* Set the IPv6 address match */
233 /* Set Bits[31:0] of 128-bit IP addr */
234 *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip6Addr[0];
235 /* Set Bits[63:32] of 128-bit IP addr */
236 *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip6Addr[1];
237 /* update Bits[95:64] of 128-bit IP addr */
238 *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter)) = pL3FilterConfig->Ip6Addr[2];
239 /* update Bits[127:96] of 128-bit IP addr */
240 *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter)) = pL3FilterConfig->Ip6Addr[3];
241 }
242 else /* IPv4 protocol is selected */
243 {
244 /* Set the IPv4 source address match */
245 *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter)) = pL3FilterConfig->Ip4SrcAddr;
246 /* Set the IPv4 destination address match */
247 *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter)) = pL3FilterConfig->Ip4DestAddr;
248 }
249
250 return HAL_OK;
251 }
252
253 /**
254 * @brief Configures the L3 Filter, this function allow to:
255 * set the layer 3 protocol to be matched (IPv4 or IPv6)
256 * enable/disable L3 source/destination port perfect/inverse match.
257 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
258 * the configuration information for ETHERNET module
259 * @param Filter: L3 filter to configured, this parameter must be one of the following
260 * ETH_L3_FILTER_0
261 * ETH_L3_FILTER_1
262 * @param pL3FilterConfig: pointer to a ETH_L3FilterConfigTypeDef structure
263 * that will contain the L3 filter configuration.
264 * @retval HAL status
265 */
HAL_ETHEx_GetL3FilterConfig(ETH_HandleTypeDef * heth,uint32_t Filter,ETH_L3FilterConfigTypeDef * pL3FilterConfig)266 HAL_StatusTypeDef HAL_ETHEx_GetL3FilterConfig(ETH_HandleTypeDef *heth, uint32_t Filter,
267 ETH_L3FilterConfigTypeDef *pL3FilterConfig)
268 {
269 if (pL3FilterConfig == NULL)
270 {
271 return HAL_ERROR;
272 }
273
274 pL3FilterConfig->Protocol = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
275 ETH_MACL3L4CR_L3PEN);
276 pL3FilterConfig->SrcAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
277 (ETH_MACL3L4CR_L3SAM | ETH_MACL3L4CR_L3SAIM));
278 pL3FilterConfig->DestAddrFilterMatch = READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
279 (ETH_MACL3L4CR_L3DAM | ETH_MACL3L4CR_L3DAIM));
280 pL3FilterConfig->SrcAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
281 ETH_MACL3L4CR_L3HSBM) >> 6);
282 pL3FilterConfig->DestAddrHigherBitsMatch = (READ_BIT(*((__IO uint32_t *)(&(heth->Instance->MACL3L4C0R) + Filter)),
283 ETH_MACL3L4CR_L3HDBM) >> 11);
284
285 if (pL3FilterConfig->Protocol != ETH_L3_IPV4_MATCH)
286 {
287 pL3FilterConfig->Ip6Addr[0] = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter));
288 pL3FilterConfig->Ip6Addr[1] = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter));
289 pL3FilterConfig->Ip6Addr[2] = *((__IO uint32_t *)(&(heth->Instance->MACL3A2R0R) + Filter));
290 pL3FilterConfig->Ip6Addr[3] = *((__IO uint32_t *)(&(heth->Instance->MACL3A3R0R) + Filter));
291 }
292 else
293 {
294 pL3FilterConfig->Ip4SrcAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A0R0R) + Filter));
295 pL3FilterConfig->Ip4DestAddr = *((__IO uint32_t *)(&(heth->Instance->MACL3A1R0R) + Filter));
296 }
297
298 return HAL_OK;
299 }
300
301 /**
302 * @brief Enables L3 and L4 filtering process.
303 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
304 * the configuration information for ETHERNET module
305 * @retval None.
306 */
HAL_ETHEx_EnableL3L4Filtering(ETH_HandleTypeDef * heth)307 void HAL_ETHEx_EnableL3L4Filtering(ETH_HandleTypeDef *heth)
308 {
309 /* Enable L3/L4 filter */
310 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
311 }
312
313 /**
314 * @brief Disables L3 and L4 filtering process.
315 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
316 * the configuration information for ETHERNET module
317 * @retval None.
318 */
HAL_ETHEx_DisableL3L4Filtering(ETH_HandleTypeDef * heth)319 void HAL_ETHEx_DisableL3L4Filtering(ETH_HandleTypeDef *heth)
320 {
321 /* Disable L3/L4 filter */
322 CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_IPFE);
323 }
324
325 /**
326 * @brief Get the VLAN Configuration for Receive Packets.
327 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
328 * the configuration information for ETHERNET module
329 * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure
330 * that will contain the VLAN filter configuration.
331 * @retval HAL status
332 */
HAL_ETHEx_GetRxVLANConfig(ETH_HandleTypeDef * heth,ETH_RxVLANConfigTypeDef * pVlanConfig)333 HAL_StatusTypeDef HAL_ETHEx_GetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig)
334 {
335 if (pVlanConfig == NULL)
336 {
337 return HAL_ERROR;
338 }
339
340 pVlanConfig->InnerVLANTagInStatus = ((READ_BIT(heth->Instance->MACVTR,
341 ETH_MACVTR_EIVLRXS) >> 31) == 0U) ? DISABLE : ENABLE;
342 pVlanConfig->StripInnerVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EIVLS);
343 pVlanConfig->InnerVLANTag = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_ERIVLT) >> 27) == 0U) ? DISABLE : ENABLE;
344 pVlanConfig->DoubleVLANProcessing = ((READ_BIT(heth->Instance->MACVTR,
345 ETH_MACVTR_EDVLP) >> 26) == 0U) ? DISABLE : ENABLE;
346 pVlanConfig->VLANTagHashTableMatch = ((READ_BIT(heth->Instance->MACVTR,
347 ETH_MACVTR_VTHM) >> 25) == 0U) ? DISABLE : ENABLE;
348 pVlanConfig->VLANTagInStatus = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLRXS) >> 24) == 0U) ? DISABLE : ENABLE;
349 pVlanConfig->StripVLANTag = READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_EVLS);
350 pVlanConfig->VLANTypeCheck = READ_BIT(heth->Instance->MACVTR,
351 (ETH_MACVTR_DOVLTC | ETH_MACVTR_ERSVLM | ETH_MACVTR_ESVL));
352 pVlanConfig->VLANTagInverceMatch = ((READ_BIT(heth->Instance->MACVTR, ETH_MACVTR_VTIM) >> 17) == 0U)
353 ? DISABLE : ENABLE;
354
355 return HAL_OK;
356 }
357
358 /**
359 * @brief Set the VLAN Configuration for Receive Packets.
360 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
361 * the configuration information for ETHERNET module
362 * @param pVlanConfig: pointer to a ETH_RxVLANConfigTypeDef structure
363 * that contains VLAN filter configuration.
364 * @retval HAL status
365 */
HAL_ETHEx_SetRxVLANConfig(ETH_HandleTypeDef * heth,ETH_RxVLANConfigTypeDef * pVlanConfig)366 HAL_StatusTypeDef HAL_ETHEx_SetRxVLANConfig(ETH_HandleTypeDef *heth, ETH_RxVLANConfigTypeDef *pVlanConfig)
367 {
368 if (pVlanConfig == NULL)
369 {
370 return HAL_ERROR;
371 }
372
373 /* Write config to MACVTR */
374 MODIFY_REG(heth->Instance->MACVTR, ETH_MACRXVLAN_MASK, (((uint32_t)pVlanConfig->InnerVLANTagInStatus << 31) |
375 pVlanConfig->StripInnerVLANTag |
376 ((uint32_t)pVlanConfig->InnerVLANTag << 27) |
377 ((uint32_t)pVlanConfig->DoubleVLANProcessing << 26) |
378 ((uint32_t)pVlanConfig->VLANTagHashTableMatch << 25) |
379 ((uint32_t)pVlanConfig->VLANTagInStatus << 24) |
380 pVlanConfig->StripVLANTag |
381 pVlanConfig->VLANTypeCheck |
382 ((uint32_t)pVlanConfig->VLANTagInverceMatch << 17)));
383
384 return HAL_OK;
385 }
386
387 /**
388 * @brief Set the VLAN Hash Table
389 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
390 * the configuration information for ETHERNET module
391 * @param VLANHashTable: VLAN hash table 16 bit value
392 * @retval None
393 */
HAL_ETHEx_SetVLANHashTable(ETH_HandleTypeDef * heth,uint32_t VLANHashTable)394 void HAL_ETHEx_SetVLANHashTable(ETH_HandleTypeDef *heth, uint32_t VLANHashTable)
395 {
396 MODIFY_REG(heth->Instance->MACVHTR, ETH_MACVHTR_VLHT, VLANHashTable);
397 }
398
399 /**
400 * @brief Get the VLAN Configuration for Transmit Packets.
401 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
402 * the configuration information for ETHERNET module
403 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
404 * ETH_OUTER_TX_VLANTAG
405 * ETH_INNER_TX_VLANTAG
406 * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure
407 * that will contain the Tx VLAN filter configuration.
408 * @retval HAL Status.
409 */
HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef * heth,uint32_t VLANTag,ETH_TxVLANConfigTypeDef * pVlanConfig)410 HAL_StatusTypeDef HAL_ETHEx_GetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag,
411 ETH_TxVLANConfigTypeDef *pVlanConfig)
412 {
413 if (pVlanConfig == NULL)
414 {
415 return HAL_ERROR;
416 }
417
418 if (VLANTag == ETH_INNER_TX_VLANTAG)
419 {
420 pVlanConfig->SourceTxDesc = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE;
421 pVlanConfig->SVLANType = ((READ_BIT(heth->Instance->MACIVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE;
422 pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACIVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC));
423 }
424 else
425 {
426 pVlanConfig->SourceTxDesc = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI) >> 20) == 0U) ? DISABLE : ENABLE;
427 pVlanConfig->SVLANType = ((READ_BIT(heth->Instance->MACVIR, ETH_MACVIR_CSVL) >> 19) == 0U) ? DISABLE : ENABLE;
428 pVlanConfig->VLANTagControl = READ_BIT(heth->Instance->MACVIR, (ETH_MACVIR_VLP | ETH_MACVIR_VLC));
429 }
430
431 return HAL_OK;;
432 }
433
434 /**
435 * @brief Set the VLAN Configuration for Transmit Packets.
436 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
437 * the configuration information for ETHERNET module
438 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
439 * ETH_OUTER_TX_VLANTAG
440 * ETH_INNER_TX_VLANTAG
441 * @param pVlanConfig: pointer to a ETH_TxVLANConfigTypeDef structure
442 * that contains Tx VLAN filter configuration.
443 * @retval HAL Status
444 */
HAL_ETHEx_SetTxVLANConfig(ETH_HandleTypeDef * heth,uint32_t VLANTag,ETH_TxVLANConfigTypeDef * pVlanConfig)445 HAL_StatusTypeDef HAL_ETHEx_SetTxVLANConfig(ETH_HandleTypeDef *heth, uint32_t VLANTag,
446 ETH_TxVLANConfigTypeDef *pVlanConfig)
447 {
448 if (VLANTag == ETH_INNER_TX_VLANTAG)
449 {
450 MODIFY_REG(heth->Instance->MACIVIR, ETH_MACTXVLAN_MASK, (((uint32_t)pVlanConfig->SourceTxDesc << 20) |
451 ((uint32_t)pVlanConfig->SVLANType << 19) |
452 pVlanConfig->VLANTagControl));
453 /* Enable Double VLAN processing */
454 SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
455 }
456 else
457 {
458 MODIFY_REG(heth->Instance->MACVIR, ETH_MACTXVLAN_MASK, (((uint32_t)pVlanConfig->SourceTxDesc << 20) |
459 ((uint32_t)pVlanConfig->SVLANType << 19) |
460 pVlanConfig->VLANTagControl));
461 }
462
463 return HAL_OK;
464 }
465
466 /**
467 * @brief Set the VLAN Tag Identifier for Transmit Packets.
468 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
469 * the configuration information for ETHERNET module
470 * @param VLANTag: Selects the vlan tag, this parameter must be one of the following
471 * ETH_OUTER_TX_VLANTAG
472 * ETH_INNER_TX_VLANTAG
473 * @param VLANIdentifier: VLAN Identifier 16 bit value
474 * @retval None
475 */
HAL_ETHEx_SetTxVLANIdentifier(ETH_HandleTypeDef * heth,uint32_t VLANTag,uint32_t VLANIdentifier)476 void HAL_ETHEx_SetTxVLANIdentifier(ETH_HandleTypeDef *heth, uint32_t VLANTag, uint32_t VLANIdentifier)
477 {
478 if (VLANTag == ETH_INNER_TX_VLANTAG)
479 {
480 MODIFY_REG(heth->Instance->MACIVIR, ETH_MACVIR_VLT, VLANIdentifier);
481 }
482 else
483 {
484 MODIFY_REG(heth->Instance->MACVIR, ETH_MACVIR_VLT, VLANIdentifier);
485 }
486 }
487
488 /**
489 * @brief Enables the VLAN Tag Filtering process.
490 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
491 * the configuration information for ETHERNET module
492 * @retval None.
493 */
HAL_ETHEx_EnableVLANProcessing(ETH_HandleTypeDef * heth)494 void HAL_ETHEx_EnableVLANProcessing(ETH_HandleTypeDef *heth)
495 {
496 /* Enable VLAN processing */
497 SET_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE);
498 }
499
500 /**
501 * @brief Disables the VLAN Tag Filtering process.
502 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
503 * the configuration information for ETHERNET module
504 * @retval None.
505 */
HAL_ETHEx_DisableVLANProcessing(ETH_HandleTypeDef * heth)506 void HAL_ETHEx_DisableVLANProcessing(ETH_HandleTypeDef *heth)
507 {
508 /* Disable VLAN processing */
509 CLEAR_BIT(heth->Instance->MACPFR, ETH_MACPFR_VTFE);
510 }
511
512 /**
513 * @brief Enters the Low Power Idle (LPI) mode
514 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
515 * the configuration information for ETHERNET module
516 * @param TxAutomate: Enable/Disable automate enter/exit LPI mode.
517 * @param TxClockStop: Enable/Disable Tx clock stop in LPI mode.
518 * @retval None
519 */
HAL_ETHEx_EnterLPIMode(ETH_HandleTypeDef * heth,FunctionalState TxAutomate,FunctionalState TxClockStop)520 void HAL_ETHEx_EnterLPIMode(ETH_HandleTypeDef *heth, FunctionalState TxAutomate, FunctionalState TxClockStop)
521 {
522 /* Enable LPI Interrupts */
523 __HAL_ETH_MAC_ENABLE_IT(heth, ETH_MACIER_LPIIE);
524
525 /* Write to LPI Control register: Enter low power mode */
526 MODIFY_REG(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE),
527 (((uint32_t)TxAutomate << 19) |
528 ((uint32_t)TxClockStop << 21) |
529 ETH_MACLCSR_LPIEN));
530 }
531
532 /**
533 * @brief Exits the Low Power Idle (LPI) mode.
534 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
535 * the configuration information for ETHERNET module
536 * @retval None
537 */
HAL_ETHEx_ExitLPIMode(ETH_HandleTypeDef * heth)538 void HAL_ETHEx_ExitLPIMode(ETH_HandleTypeDef *heth)
539 {
540 /* Clear the LPI Config and exit low power mode */
541 CLEAR_BIT(heth->Instance->MACLCSR, (ETH_MACLCSR_LPIEN | ETH_MACLCSR_LPITXA | ETH_MACLCSR_LPITCSE));
542
543 /* Enable LPI Interrupts */
544 __HAL_ETH_MAC_DISABLE_IT(heth, ETH_MACIER_LPIIE);
545 }
546
547
548 /**
549 * @brief Returns the ETH MAC LPI event
550 * @param heth: pointer to a ETH_HandleTypeDef structure that contains
551 * the configuration information for ETHERNET module
552 * @retval ETH MAC WakeUp event
553 */
HAL_ETHEx_GetMACLPIEvent(ETH_HandleTypeDef * heth)554 uint32_t HAL_ETHEx_GetMACLPIEvent(ETH_HandleTypeDef *heth)
555 {
556 return heth->MACLPIEvent;
557 }
558
559 /**
560 * @}
561 */
562
563 /**
564 * @}
565 */
566
567 /**
568 * @}
569 */
570
571 #endif /* ETH */
572
573 #endif /* HAL_ETH_MODULE_ENABLED */
574
575 /**
576 * @}
577 */
578
579
