1 /**
2 ******************************************************************************
3 * @file stm32h7xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2017 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### DAC Peripheral features #####
28 ==============================================================================
29 [..]
30 *** DAC Channels ***
31 ====================
32 [..]
33 STM32H7 devices integrate two 12-bit Digital Analog Converters
34
35 The 2 converters (i.e. channel1 & channel2)
36 can be used independently or simultaneously (dual mode):
37 (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip
38 peripherals (ex. OPAMPs, comparators).
39 (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip
40 peripherals (ex. OPAMPs, comparators).
41
42 *** DAC Triggers ***
43 ====================
44 [..]
45 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
46 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
47 [..]
48 Digital to Analog conversion can be triggered by:
49 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
50 The used pin (GPIOx_PIN_9) must be configured in input mode.
51
52 (#) Timers TRGO: TIM1, TIM2, TIM4, TIM5, TIM6, TIM7, TIM8, TIM15, TIM23 and TIM24
53 (DAC_TRIGGER_T1_TRGO, DAC_TRIGGER_T2_TRGO...)
54
55 (#) Low Power Timers TRGO: LPTIM1, LPTIM2 and LPTIM3
56 (DAC_TRIGGER_LPTIM1_OUT, DAC_TRIGGER_LPTIM2_OUT)
57
58 (#) High Resolution Timer TRGO: HRTIM1
59 (DAC_TRIGGER_HR1_TRGO1, DAC_TRIGGER_HR1_TRGO2)
60
61 (#) Software using DAC_TRIGGER_SOFTWARE
62
63 *** DAC Buffer mode feature ***
64 ===============================
65 [..]
66 Each DAC channel integrates an output buffer that can be used to
67 reduce the output impedance, and to drive external loads directly
68 without having to add an external operational amplifier.
69 To enable, the output buffer use
70 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
71 [..]
72 (@) Refer to the device datasheet for more details about output
73 impedance value with and without output buffer.
74
75 *** GPIO configurations guidelines ***
76 =====================
77 [..]
78 When a DAC channel is used (ex channel1 on PA4) and the other is not
79 (ex channel2 on PA5 is configured in Analog and disabled).
80 Channel1 may disturb channel2 as coupling effect.
81 Note that there is no coupling on channel2 as soon as channel2 is turned on.
82 Coupling on adjacent channel could be avoided as follows:
83 when unused PA5 is configured as INPUT PULL-UP or DOWN.
84 PA5 is configured in ANALOG just before it is turned on.
85
86 *** DAC Sample and Hold feature ***
87 ========================
88 [..]
89 For each converter, 2 modes are supported: normal mode and
90 "sample and hold" mode (i.e. low power mode).
91 In the sample and hold mode, the DAC core converts data, then holds the
92 converted voltage on a capacitor. When not converting, the DAC cores and
93 buffer are completely turned off between samples and the DAC output is
94 tri-stated, therefore reducing the overall power consumption. A new
95 stabilization period is needed before each new conversion.
96
97 The sample and hold allow setting internal or external voltage @
98 low power consumption cost (output value can be at any given rate either
99 by CPU or DMA).
100
101 The Sample and hold block and registers uses either LSI & run in
102 several power modes: run mode, sleep mode, low power run, low power sleep
103 mode & stop1 mode.
104
105 Low power stop1 mode allows only static conversion.
106
107 To enable Sample and Hold mode
108 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
109 RCC_LSI_ON parameters.
110
111 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
112 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
113 DAC_HoldTime & DAC_RefreshTime;
114
115 *** DAC calibration feature ***
116 ===================================
117 [..]
118 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
119 (++) Calibration aims at correcting some offset of output buffer.
120 (++) The DAC uses either factory calibration settings OR user defined
121 calibration (trimming) settings (i.e. trimming mode).
122 (++) The user defined settings can be figured out using self calibration
123 handled by HAL_DACEx_SelfCalibrate.
124 (++) HAL_DACEx_SelfCalibrate:
125 (+++) Runs automatically the calibration.
126 (+++) Enables the user trimming mode
127 (+++) Updates a structure with trimming values with fresh calibration
128 results.
129 The user may store the calibration results for larger
130 (ex monitoring the trimming as a function of temperature
131 for instance)
132
133 *** DAC wave generation feature ***
134 ===================================
135 [..]
136 Both DAC channels can be used to generate
137 (#) Noise wave
138 (#) Triangle wave
139
140 *** DAC data format ***
141 =======================
142 [..]
143 The DAC data format can be:
144 (#) 8-bit right alignment using DAC_ALIGN_8B_R
145 (#) 12-bit left alignment using DAC_ALIGN_12B_L
146 (#) 12-bit right alignment using DAC_ALIGN_12B_R
147
148 *** DAC data value to voltage correspondence ***
149 ================================================
150 [..]
151 The analog output voltage on each DAC channel pin is determined
152 by the following equation:
153 [..]
154 DAC_OUTx = VREF+ * DOR / 4095
155 (+) with DOR is the Data Output Register
156 [..]
157 VREF+ is the input voltage reference (refer to the device datasheet)
158 [..]
159 e.g. To set DAC_OUT1 to 0.7V, use
160 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
161
162 *** DMA requests ***
163 =====================
164 [..]
165 A DMA request can be generated when an external trigger (but not a software trigger)
166 occurs if DMA requests are enabled using HAL_DAC_Start_DMA().
167 DMA requests are mapped as following:
168 (#) DAC channel1: mapped on DMA_REQUEST_DAC1_CH1
169 (#) DAC channel2: mapped on DMA_REQUEST_DAC1_CH2
170
171 [..]
172 (@) For Dual mode and specific signal (Triangle and noise) generation please
173 refer to Extended Features Driver description
174
175 ##### How to use this driver #####
176 ==============================================================================
177 [..]
178 (+) DAC APB clock must be enabled to get write access to DAC
179 registers using HAL_DAC_Init()
180 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
181 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
182 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
183
184 *** Calibration mode IO operation ***
185 ======================================
186 [..]
187 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
188 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
189 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
190
191 *** Polling mode IO operation ***
192 =================================
193 [..]
194 (+) Start the DAC peripheral using HAL_DAC_Start()
195 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
196 (+) Stop the DAC peripheral using HAL_DAC_Stop()
197
198 *** DMA mode IO operation ***
199 ==============================
200 [..]
201 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
202 of data to be transferred at each end of conversion
203 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
204 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
205 function is executed and user can add his own code by customization of function pointer
206 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
207 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
208 function is executed and user can add his own code by customization of function pointer
209 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
210 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
211 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
212 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
213 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
214 function is executed and user can add his own code by customization of function pointer
215 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
216 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
217 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
218
219 *** Callback registration ***
220 =============================================
221 [..]
222 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
223 allows the user to configure dynamically the driver callbacks.
224
225 Use Functions HAL_DAC_RegisterCallback() to register a user callback,
226 it allows to register following callbacks:
227 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
228 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
229 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
230 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
231 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
232 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
233 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
234 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
235 (+) MspInitCallback : DAC MspInit.
236 (+) MspDeInitCallback : DAC MspdeInit.
237 This function takes as parameters the HAL peripheral handle, the Callback ID
238 and a pointer to the user callback function.
239
240 Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default
241 weak (surcharged) function. It allows to reset following callbacks:
242 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
243 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
244 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
245 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
246 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
247 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
248 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
249 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
250 (+) MspInitCallback : DAC MspInit.
251 (+) MspDeInitCallback : DAC MspdeInit.
252 (+) All Callbacks
253 This function) takes as parameters the HAL peripheral handle and the Callback ID.
254
255 By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
256 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
257 Exception done for MspInit and MspDeInit callbacks that are respectively
258 reset to the legacy weak (surcharged) functions in the HAL_DAC_Init
259 and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
260 If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit
261 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
262
263 Callbacks can be registered/unregistered in READY state only.
264 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
265 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
266 during the Init/DeInit.
267 In that case first register the MspInit/MspDeInit user callbacks
268 using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit
269 or HAL_DAC_Init function.
270
271 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
272 not defined, the callback registering feature is not available
273 and weak (surcharged) callbacks are used.
274
275 *** DAC HAL driver macros list ***
276 =============================================
277 [..]
278 Below the list of most used macros in DAC HAL driver.
279
280 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
281 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
282 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
283 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
284
285 [..]
286 (@) You can refer to the DAC HAL driver header file for more useful macros
287
288 @endverbatim
289 ******************************************************************************
290 */
291
292 /* Includes ------------------------------------------------------------------*/
293 #include "stm32h7xx_hal.h"
294
295 /** @addtogroup STM32H7xx_HAL_Driver
296 * @{
297 */
298
299 #ifdef HAL_DAC_MODULE_ENABLED
300 #if defined(DAC1) || defined(DAC2)
301
302 /** @defgroup DAC DAC
303 * @brief DAC driver modules
304 * @{
305 */
306
307 /* Private typedef -----------------------------------------------------------*/
308 /* Private define ------------------------------------------------------------*/
309 /* Private constants ---------------------------------------------------------*/
310 /** @addtogroup DAC_Private_Constants DAC Private Constants
311 * @{
312 */
313 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
314
315 /**
316 * @}
317 */
318
319 /* Private macro -------------------------------------------------------------*/
320 /* Private variables ---------------------------------------------------------*/
321 /* Private function prototypes -----------------------------------------------*/
322 /* Exported functions -------------------------------------------------------*/
323
324 /** @defgroup DAC_Exported_Functions DAC Exported Functions
325 * @{
326 */
327
328 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
329 * @brief Initialization and Configuration functions
330 *
331 @verbatim
332 ==============================================================================
333 ##### Initialization and de-initialization functions #####
334 ==============================================================================
335 [..] This section provides functions allowing to:
336 (+) Initialize and configure the DAC.
337 (+) De-initialize the DAC.
338
339 @endverbatim
340 * @{
341 */
342
343 /**
344 * @brief Initialize the DAC peripheral according to the specified parameters
345 * in the DAC_InitStruct and initialize the associated handle.
346 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
347 * the configuration information for the specified DAC.
348 * @retval HAL status
349 */
HAL_DAC_Init(DAC_HandleTypeDef * hdac)350 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
351 {
352 /* Check DAC handle */
353 if (hdac == NULL)
354 {
355 return HAL_ERROR;
356 }
357 /* Check the parameters */
358 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
359
360 if (hdac->State == HAL_DAC_STATE_RESET)
361 {
362 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
363 /* Init the DAC Callback settings */
364 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
365 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
366 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
367 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
368
369 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
370 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
371 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
372 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
373
374 if (hdac->MspInitCallback == NULL)
375 {
376 hdac->MspInitCallback = HAL_DAC_MspInit;
377 }
378 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
379
380 /* Allocate lock resource and initialize it */
381 hdac->Lock = HAL_UNLOCKED;
382
383 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
384 /* Init the low level hardware */
385 hdac->MspInitCallback(hdac);
386 #else
387 /* Init the low level hardware */
388 HAL_DAC_MspInit(hdac);
389 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
390 }
391
392 /* Initialize the DAC state*/
393 hdac->State = HAL_DAC_STATE_BUSY;
394
395 /* Set DAC error code to none */
396 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
397
398 /* Initialize the DAC state*/
399 hdac->State = HAL_DAC_STATE_READY;
400
401 /* Return function status */
402 return HAL_OK;
403 }
404
405 /**
406 * @brief Deinitialize the DAC peripheral registers to their default reset values.
407 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
408 * the configuration information for the specified DAC.
409 * @retval HAL status
410 */
HAL_DAC_DeInit(DAC_HandleTypeDef * hdac)411 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
412 {
413 /* Check DAC handle */
414 if (hdac == NULL)
415 {
416 return HAL_ERROR;
417 }
418
419 /* Check the parameters */
420 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
421
422 /* Change DAC state */
423 hdac->State = HAL_DAC_STATE_BUSY;
424
425 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
426 if (hdac->MspDeInitCallback == NULL)
427 {
428 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
429 }
430 /* DeInit the low level hardware */
431 hdac->MspDeInitCallback(hdac);
432 #else
433 /* DeInit the low level hardware */
434 HAL_DAC_MspDeInit(hdac);
435 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
436
437 /* Set DAC error code to none */
438 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
439
440 /* Change DAC state */
441 hdac->State = HAL_DAC_STATE_RESET;
442
443 /* Release Lock */
444 __HAL_UNLOCK(hdac);
445
446 /* Return function status */
447 return HAL_OK;
448 }
449
450 /**
451 * @brief Initialize the DAC MSP.
452 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
453 * the configuration information for the specified DAC.
454 * @retval None
455 */
HAL_DAC_MspInit(DAC_HandleTypeDef * hdac)456 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
457 {
458 /* Prevent unused argument(s) compilation warning */
459 UNUSED(hdac);
460
461 /* NOTE : This function should not be modified, when the callback is needed,
462 the HAL_DAC_MspInit could be implemented in the user file
463 */
464 }
465
466 /**
467 * @brief DeInitialize the DAC MSP.
468 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
469 * the configuration information for the specified DAC.
470 * @retval None
471 */
HAL_DAC_MspDeInit(DAC_HandleTypeDef * hdac)472 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
473 {
474 /* Prevent unused argument(s) compilation warning */
475 UNUSED(hdac);
476
477 /* NOTE : This function should not be modified, when the callback is needed,
478 the HAL_DAC_MspDeInit could be implemented in the user file
479 */
480 }
481
482 /**
483 * @}
484 */
485
486 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
487 * @brief IO operation functions
488 *
489 @verbatim
490 ==============================================================================
491 ##### IO operation functions #####
492 ==============================================================================
493 [..] This section provides functions allowing to:
494 (+) Start conversion.
495 (+) Stop conversion.
496 (+) Start conversion and enable DMA transfer.
497 (+) Stop conversion and disable DMA transfer.
498 (+) Get result of conversion.
499
500 @endverbatim
501 * @{
502 */
503
504 /**
505 * @brief Enables DAC and starts conversion of channel.
506 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
507 * the configuration information for the specified DAC.
508 * @param Channel The selected DAC channel.
509 * This parameter can be one of the following values:
510 * @arg DAC_CHANNEL_1: DAC Channel1 selected
511 * @arg DAC_CHANNEL_2: DAC Channel2 selected
512 * @retval HAL status
513 */
HAL_DAC_Start(DAC_HandleTypeDef * hdac,uint32_t Channel)514 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
515 {
516 /* Check the parameters */
517 assert_param(IS_DAC_CHANNEL(Channel));
518
519 /* Process locked */
520 __HAL_LOCK(hdac);
521
522 /* Change DAC state */
523 hdac->State = HAL_DAC_STATE_BUSY;
524
525 /* Enable the Peripheral */
526 __HAL_DAC_ENABLE(hdac, Channel);
527
528 if (Channel == DAC_CHANNEL_1)
529 {
530 /* Check if software trigger enabled */
531 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
532 {
533 /* Enable the selected DAC software conversion */
534 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
535 }
536 }
537
538 else
539 {
540 /* Check if software trigger enabled */
541 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL)))
542 {
543 /* Enable the selected DAC software conversion*/
544 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
545 }
546 }
547
548
549 /* Change DAC state */
550 hdac->State = HAL_DAC_STATE_READY;
551
552 /* Process unlocked */
553 __HAL_UNLOCK(hdac);
554
555 /* Return function status */
556 return HAL_OK;
557 }
558
559 /**
560 * @brief Disables DAC and stop conversion of channel.
561 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
562 * the configuration information for the specified DAC.
563 * @param Channel The selected DAC channel.
564 * This parameter can be one of the following values:
565 * @arg DAC_CHANNEL_1: DAC Channel1 selected
566 * @arg DAC_CHANNEL_2: DAC Channel2 selected
567 * @retval HAL status
568 */
HAL_DAC_Stop(DAC_HandleTypeDef * hdac,uint32_t Channel)569 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
570 {
571 /* Check the parameters */
572 assert_param(IS_DAC_CHANNEL(Channel));
573
574 /* Disable the Peripheral */
575 __HAL_DAC_DISABLE(hdac, Channel);
576
577 /* Change DAC state */
578 hdac->State = HAL_DAC_STATE_READY;
579
580 /* Return function status */
581 return HAL_OK;
582 }
583
584 /**
585 * @brief Enables DAC and starts conversion of channel.
586 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
587 * the configuration information for the specified DAC.
588 * @param Channel The selected DAC channel.
589 * This parameter can be one of the following values:
590 * @arg DAC_CHANNEL_1: DAC Channel1 selected
591 * @arg DAC_CHANNEL_2: DAC Channel2 selected
592 * @param pData The source Buffer address.
593 * @param Length The length of data to be transferred from memory to DAC peripheral
594 * @param Alignment Specifies the data alignment for DAC channel.
595 * This parameter can be one of the following values:
596 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
597 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
598 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
599 * @retval HAL status
600 */
HAL_DAC_Start_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)601 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
602 uint32_t Alignment)
603 {
604 HAL_StatusTypeDef status;
605 uint32_t tmpreg = 0U;
606
607 /* Check the parameters */
608 assert_param(IS_DAC_CHANNEL(Channel));
609 assert_param(IS_DAC_ALIGN(Alignment));
610
611 /* Process locked */
612 __HAL_LOCK(hdac);
613
614 /* Change DAC state */
615 hdac->State = HAL_DAC_STATE_BUSY;
616
617 if (Channel == DAC_CHANNEL_1)
618 {
619 /* Set the DMA transfer complete callback for channel1 */
620 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
621
622 /* Set the DMA half transfer complete callback for channel1 */
623 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
624
625 /* Set the DMA error callback for channel1 */
626 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
627
628 /* Enable the selected DAC channel1 DMA request */
629 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
630
631 /* Case of use of channel 1 */
632 switch (Alignment)
633 {
634 case DAC_ALIGN_12B_R:
635 /* Get DHR12R1 address */
636 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
637 break;
638 case DAC_ALIGN_12B_L:
639 /* Get DHR12L1 address */
640 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
641 break;
642 case DAC_ALIGN_8B_R:
643 /* Get DHR8R1 address */
644 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
645 break;
646 default:
647 break;
648 }
649 }
650
651 else
652 {
653 /* Set the DMA transfer complete callback for channel2 */
654 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
655
656 /* Set the DMA half transfer complete callback for channel2 */
657 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
658
659 /* Set the DMA error callback for channel2 */
660 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
661
662 /* Enable the selected DAC channel2 DMA request */
663 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
664
665 /* Case of use of channel 2 */
666 switch (Alignment)
667 {
668 case DAC_ALIGN_12B_R:
669 /* Get DHR12R2 address */
670 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
671 break;
672 case DAC_ALIGN_12B_L:
673 /* Get DHR12L2 address */
674 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
675 break;
676 case DAC_ALIGN_8B_R:
677 /* Get DHR8R2 address */
678 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
679 break;
680 default:
681 break;
682 }
683 }
684
685
686 /* Enable the DMA Stream */
687 if (Channel == DAC_CHANNEL_1)
688 {
689 /* Enable the DAC DMA underrun interrupt */
690 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
691
692 /* Enable the DMA Stream */
693 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
694 }
695
696 else
697 {
698 /* Enable the DAC DMA underrun interrupt */
699 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
700
701 /* Enable the DMA Stream */
702 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
703 }
704
705
706 /* Process Unlocked */
707 __HAL_UNLOCK(hdac);
708
709 if (status == HAL_OK)
710 {
711 /* Enable the Peripheral */
712 __HAL_DAC_ENABLE(hdac, Channel);
713 }
714 else
715 {
716 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
717 }
718
719 /* Return function status */
720 return status;
721 }
722
723 /**
724 * @brief Disables DAC and stop conversion of channel.
725 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
726 * the configuration information for the specified DAC.
727 * @param Channel The selected DAC channel.
728 * This parameter can be one of the following values:
729 * @arg DAC_CHANNEL_1: DAC Channel1 selected
730 * @arg DAC_CHANNEL_2: DAC Channel2 selected
731 * @retval HAL status
732 */
HAL_DAC_Stop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)733 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
734 {
735 /* Check the parameters */
736 assert_param(IS_DAC_CHANNEL(Channel));
737
738 /* Disable the selected DAC channel DMA request */
739 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
740
741 /* Disable the Peripheral */
742 __HAL_DAC_DISABLE(hdac, Channel);
743
744 /* Disable the DMA Stream */
745
746 /* Channel1 is used */
747 if (Channel == DAC_CHANNEL_1)
748 {
749 /* Disable the DMA Stream */
750 (void)HAL_DMA_Abort(hdac->DMA_Handle1);
751
752 /* Disable the DAC DMA underrun interrupt */
753 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
754 }
755
756 else /* Channel2 is used for */
757 {
758 /* Disable the DMA Stream */
759 (void)HAL_DMA_Abort(hdac->DMA_Handle2);
760
761 /* Disable the DAC DMA underrun interrupt */
762 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
763 }
764
765
766 /* Change DAC state */
767 hdac->State = HAL_DAC_STATE_READY;
768
769 /* Return function status */
770 return HAL_OK;
771 }
772
773 /**
774 * @brief Handles DAC interrupt request
775 * This function uses the interruption of DMA
776 * underrun.
777 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
778 * the configuration information for the specified DAC.
779 * @retval None
780 */
HAL_DAC_IRQHandler(DAC_HandleTypeDef * hdac)781 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
782 {
783 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
784 {
785 /* Check underrun flag of DAC channel 1 */
786 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
787 {
788 /* Change DAC state to error state */
789 hdac->State = HAL_DAC_STATE_ERROR;
790
791 /* Set DAC error code to channel1 DMA underrun error */
792 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
793
794 /* Clear the underrun flag */
795 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
796
797 /* Disable the selected DAC channel1 DMA request */
798 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
799
800 /* Error callback */
801 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
802 hdac->DMAUnderrunCallbackCh1(hdac);
803 #else
804 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
805 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
806 }
807 }
808
809
810 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
811 {
812 /* Check underrun flag of DAC channel 2 */
813 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
814 {
815 /* Change DAC state to error state */
816 hdac->State = HAL_DAC_STATE_ERROR;
817
818 /* Set DAC error code to channel2 DMA underrun error */
819 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
820
821 /* Clear the underrun flag */
822 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
823
824 /* Disable the selected DAC channel2 DMA request */
825 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
826
827 /* Error callback */
828 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
829 hdac->DMAUnderrunCallbackCh2(hdac);
830 #else
831 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
832 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
833 }
834 }
835
836 }
837
838 /**
839 * @brief Set the specified data holding register value for DAC channel.
840 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
841 * the configuration information for the specified DAC.
842 * @param Channel The selected DAC channel.
843 * This parameter can be one of the following values:
844 * @arg DAC_CHANNEL_1: DAC Channel1 selected
845 * @arg DAC_CHANNEL_2: DAC Channel2 selected
846 * @param Alignment Specifies the data alignment.
847 * This parameter can be one of the following values:
848 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
849 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
850 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
851 * @param Data Data to be loaded in the selected data holding register.
852 * @retval HAL status
853 */
HAL_DAC_SetValue(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Alignment,uint32_t Data)854 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
855 {
856 __IO uint32_t tmp = 0UL;
857
858 /* Check the parameters */
859 assert_param(IS_DAC_CHANNEL(Channel));
860 assert_param(IS_DAC_ALIGN(Alignment));
861 assert_param(IS_DAC_DATA(Data));
862
863 tmp = (uint32_t)hdac->Instance;
864 if (Channel == DAC_CHANNEL_1)
865 {
866 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
867 }
868
869 else
870 {
871 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
872 }
873
874
875 /* Set the DAC channel selected data holding register */
876 *(__IO uint32_t *) tmp = Data;
877
878 /* Return function status */
879 return HAL_OK;
880 }
881
882 /**
883 * @brief Conversion complete callback in non-blocking mode for Channel1
884 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
885 * the configuration information for the specified DAC.
886 * @retval None
887 */
HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef * hdac)888 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
889 {
890 /* Prevent unused argument(s) compilation warning */
891 UNUSED(hdac);
892
893 /* NOTE : This function should not be modified, when the callback is needed,
894 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
895 */
896 }
897
898 /**
899 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
900 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
901 * the configuration information for the specified DAC.
902 * @retval None
903 */
HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef * hdac)904 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
905 {
906 /* Prevent unused argument(s) compilation warning */
907 UNUSED(hdac);
908
909 /* NOTE : This function should not be modified, when the callback is needed,
910 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
911 */
912 }
913
914 /**
915 * @brief Error DAC callback for Channel1.
916 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
917 * the configuration information for the specified DAC.
918 * @retval None
919 */
HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef * hdac)920 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
921 {
922 /* Prevent unused argument(s) compilation warning */
923 UNUSED(hdac);
924
925 /* NOTE : This function should not be modified, when the callback is needed,
926 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
927 */
928 }
929
930 /**
931 * @brief DMA underrun DAC callback for channel1.
932 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
933 * the configuration information for the specified DAC.
934 * @retval None
935 */
HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef * hdac)936 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
937 {
938 /* Prevent unused argument(s) compilation warning */
939 UNUSED(hdac);
940
941 /* NOTE : This function should not be modified, when the callback is needed,
942 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
943 */
944 }
945
946 /**
947 * @}
948 */
949
950 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
951 * @brief Peripheral Control functions
952 *
953 @verbatim
954 ==============================================================================
955 ##### Peripheral Control functions #####
956 ==============================================================================
957 [..] This section provides functions allowing to:
958 (+) Configure channels.
959 (+) Set the specified data holding register value for DAC channel.
960
961 @endverbatim
962 * @{
963 */
964
965 /**
966 * @brief Returns the last data output value of the selected DAC channel.
967 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
968 * the configuration information for the specified DAC.
969 * @param Channel The selected DAC channel.
970 * This parameter can be one of the following values:
971 * @arg DAC_CHANNEL_1: DAC Channel1 selected
972 * @arg DAC_CHANNEL_2: DAC Channel2 selected
973 * @retval The selected DAC channel data output value.
974 */
HAL_DAC_GetValue(DAC_HandleTypeDef * hdac,uint32_t Channel)975 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
976 {
977 uint32_t result;
978
979 /* Check the parameters */
980 assert_param(IS_DAC_CHANNEL(Channel));
981
982 if (Channel == DAC_CHANNEL_1)
983 {
984 result = hdac->Instance->DOR1;
985 }
986
987 else
988 {
989 result = hdac->Instance->DOR2;
990 }
991
992 /* Returns the DAC channel data output register value */
993 return result;
994 }
995
996 /**
997 * @brief Configures the selected DAC channel.
998 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
999 * the configuration information for the specified DAC.
1000 * @param sConfig DAC configuration structure.
1001 * @param Channel The selected DAC channel.
1002 * This parameter can be one of the following values:
1003 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1004 * @arg DAC_CHANNEL_2: DAC Channel2 selected
1005 * @retval HAL status
1006 */
HAL_DAC_ConfigChannel(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)1007 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1008 {
1009 uint32_t tmpreg1;
1010 uint32_t tmpreg2;
1011 uint32_t tickstart;
1012 uint32_t connectOnChip;
1013
1014 /* Check the DAC parameters */
1015 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
1016 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1017 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1018 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1019 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1020 {
1021 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1022 }
1023 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1024 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1025 {
1026 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1027 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1028 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1029 }
1030 assert_param(IS_DAC_CHANNEL(Channel));
1031
1032 /* Process locked */
1033 __HAL_LOCK(hdac);
1034
1035 /* Change DAC state */
1036 hdac->State = HAL_DAC_STATE_BUSY;
1037
1038 /* Sample and hold configuration */
1039 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1040 {
1041 /* Get timeout */
1042 tickstart = HAL_GetTick();
1043
1044 if (Channel == DAC_CHANNEL_1)
1045 {
1046 /* SHSR1 can be written when BWST1 is cleared */
1047 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1048 {
1049 /* Check for the Timeout */
1050 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1051 {
1052 /* New check to avoid false timeout detection in case of preemption */
1053 if(((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1054 {
1055 /* Update error code */
1056 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1057
1058 /* Change the DMA state */
1059 hdac->State = HAL_DAC_STATE_TIMEOUT;
1060
1061 return HAL_TIMEOUT;
1062 }
1063 }
1064 }
1065 HAL_Delay(1);
1066 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1067 }
1068
1069 else /* Channel 2 */
1070 {
1071 /* SHSR2 can be written when BWST2 is cleared */
1072 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1073 {
1074 /* Check for the Timeout */
1075 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1076 {
1077 /* New check to avoid false timeout detection in case of preemption */
1078 if(((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1079 {
1080 /* Update error code */
1081 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1082
1083 /* Change the DMA state */
1084 hdac->State = HAL_DAC_STATE_TIMEOUT;
1085
1086 return HAL_TIMEOUT;
1087 }
1088 }
1089 }
1090 HAL_Delay(1U);
1091 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1092 }
1093
1094
1095 /* HoldTime */
1096 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL),
1097 (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1098 /* RefreshTime */
1099 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL),
1100 (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1101 }
1102
1103 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1104 /* USER TRIMMING */
1105 {
1106 /* Get the DAC CCR value */
1107 tmpreg1 = hdac->Instance->CCR;
1108 /* Clear trimming value */
1109 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1110 /* Configure for the selected trimming offset */
1111 tmpreg2 = sConfig->DAC_TrimmingValue;
1112 /* Calculate CCR register value depending on DAC_Channel */
1113 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1114 /* Write to DAC CCR */
1115 hdac->Instance->CCR = tmpreg1;
1116 }
1117 /* else factory trimming is used (factory setting are available at reset)*/
1118 /* SW Nothing has nothing to do */
1119
1120 /* Get the DAC MCR value */
1121 tmpreg1 = hdac->Instance->MCR;
1122 /* Clear DAC_MCR_MODEx bits */
1123 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1124 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1125 if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_EXTERNAL)
1126 {
1127 connectOnChip = 0x00000000UL;
1128 }
1129 else if (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_INTERNAL)
1130 {
1131 connectOnChip = DAC_MCR_MODE1_0;
1132 }
1133 else /* (sConfig->DAC_ConnectOnChipPeripheral == DAC_CHIPCONNECT_BOTH) */
1134 {
1135 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE)
1136 {
1137 connectOnChip = DAC_MCR_MODE1_0;
1138 }
1139 else
1140 {
1141 connectOnChip = 0x00000000UL;
1142 }
1143 }
1144 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip);
1145 /* Calculate MCR register value depending on DAC_Channel */
1146 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1147 /* Write to DAC MCR */
1148 hdac->Instance->MCR = tmpreg1;
1149
1150 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1151 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1152
1153 /* Get the DAC CR value */
1154 tmpreg1 = hdac->Instance->CR;
1155 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1156 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1157 /* Configure for the selected DAC channel: trigger */
1158 /* Set TSELx and TENx bits according to DAC_Trigger value */
1159 tmpreg2 = sConfig->DAC_Trigger;
1160 /* Calculate CR register value depending on DAC_Channel */
1161 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1162 /* Write to DAC CR */
1163 hdac->Instance->CR = tmpreg1;
1164 /* Disable wave generation */
1165 CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL)));
1166
1167 /* Change DAC state */
1168 hdac->State = HAL_DAC_STATE_READY;
1169
1170 /* Process unlocked */
1171 __HAL_UNLOCK(hdac);
1172
1173 /* Return function status */
1174 return HAL_OK;
1175 }
1176
1177 /**
1178 * @}
1179 */
1180
1181 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1182 * @brief Peripheral State and Errors functions
1183 *
1184 @verbatim
1185 ==============================================================================
1186 ##### Peripheral State and Errors functions #####
1187 ==============================================================================
1188 [..]
1189 This subsection provides functions allowing to
1190 (+) Check the DAC state.
1191 (+) Check the DAC Errors.
1192
1193 @endverbatim
1194 * @{
1195 */
1196
1197 /**
1198 * @brief return the DAC handle state
1199 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1200 * the configuration information for the specified DAC.
1201 * @retval HAL state
1202 */
HAL_DAC_GetState(DAC_HandleTypeDef * hdac)1203 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1204 {
1205 /* Return DAC handle state */
1206 return hdac->State;
1207 }
1208
1209
1210 /**
1211 * @brief Return the DAC error code
1212 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1213 * the configuration information for the specified DAC.
1214 * @retval DAC Error Code
1215 */
HAL_DAC_GetError(DAC_HandleTypeDef * hdac)1216 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1217 {
1218 return hdac->ErrorCode;
1219 }
1220
1221 /**
1222 * @}
1223 */
1224
1225 /**
1226 * @}
1227 */
1228
1229 /** @addtogroup DAC_Exported_Functions
1230 * @{
1231 */
1232
1233 /** @addtogroup DAC_Exported_Functions_Group1
1234 * @{
1235 */
1236 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1237 /**
1238 * @brief Register a User DAC Callback
1239 * To be used instead of the weak (surcharged) predefined callback
1240 * @param hdac DAC handle
1241 * @param CallbackID ID of the callback to be registered
1242 * This parameter can be one of the following values:
1243 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1244 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1245 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1246 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1247 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1248 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1249 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1250 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1251 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1252 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1253 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1254 *
1255 * @param pCallback pointer to the Callback function
1256 * @retval status
1257 */
HAL_DAC_RegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID,pDAC_CallbackTypeDef pCallback)1258 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1259 pDAC_CallbackTypeDef pCallback)
1260 {
1261 HAL_StatusTypeDef status = HAL_OK;
1262
1263 if (pCallback == NULL)
1264 {
1265 /* Update the error code */
1266 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1267 return HAL_ERROR;
1268 }
1269
1270 /* Process locked */
1271 __HAL_LOCK(hdac);
1272
1273 if (hdac->State == HAL_DAC_STATE_READY)
1274 {
1275 switch (CallbackID)
1276 {
1277 case HAL_DAC_CH1_COMPLETE_CB_ID :
1278 hdac->ConvCpltCallbackCh1 = pCallback;
1279 break;
1280 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1281 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1282 break;
1283 case HAL_DAC_CH1_ERROR_ID :
1284 hdac->ErrorCallbackCh1 = pCallback;
1285 break;
1286 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1287 hdac->DMAUnderrunCallbackCh1 = pCallback;
1288 break;
1289
1290 case HAL_DAC_CH2_COMPLETE_CB_ID :
1291 hdac->ConvCpltCallbackCh2 = pCallback;
1292 break;
1293 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1294 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1295 break;
1296 case HAL_DAC_CH2_ERROR_ID :
1297 hdac->ErrorCallbackCh2 = pCallback;
1298 break;
1299 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1300 hdac->DMAUnderrunCallbackCh2 = pCallback;
1301 break;
1302
1303 case HAL_DAC_MSPINIT_CB_ID :
1304 hdac->MspInitCallback = pCallback;
1305 break;
1306 case HAL_DAC_MSPDEINIT_CB_ID :
1307 hdac->MspDeInitCallback = pCallback;
1308 break;
1309 default :
1310 /* Update the error code */
1311 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1312 /* update return status */
1313 status = HAL_ERROR;
1314 break;
1315 }
1316 }
1317 else if (hdac->State == HAL_DAC_STATE_RESET)
1318 {
1319 switch (CallbackID)
1320 {
1321 case HAL_DAC_MSPINIT_CB_ID :
1322 hdac->MspInitCallback = pCallback;
1323 break;
1324 case HAL_DAC_MSPDEINIT_CB_ID :
1325 hdac->MspDeInitCallback = pCallback;
1326 break;
1327 default :
1328 /* Update the error code */
1329 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1330 /* update return status */
1331 status = HAL_ERROR;
1332 break;
1333 }
1334 }
1335 else
1336 {
1337 /* Update the error code */
1338 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1339 /* update return status */
1340 status = HAL_ERROR;
1341 }
1342
1343 /* Release Lock */
1344 __HAL_UNLOCK(hdac);
1345 return status;
1346 }
1347
1348 /**
1349 * @brief Unregister a User DAC Callback
1350 * DAC Callback is redirected to the weak (surcharged) predefined callback
1351 * @param hdac DAC handle
1352 * @param CallbackID ID of the callback to be unregistered
1353 * This parameter can be one of the following values:
1354 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID
1355 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1356 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1357 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1358 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1359 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1360 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1361 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1362 * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID
1363 * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID
1364 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1365 * @retval status
1366 */
HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef * hdac,HAL_DAC_CallbackIDTypeDef CallbackID)1367 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1368 {
1369 HAL_StatusTypeDef status = HAL_OK;
1370
1371 /* Process locked */
1372 __HAL_LOCK(hdac);
1373
1374 if (hdac->State == HAL_DAC_STATE_READY)
1375 {
1376 switch (CallbackID)
1377 {
1378 case HAL_DAC_CH1_COMPLETE_CB_ID :
1379 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1380 break;
1381 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1382 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1383 break;
1384 case HAL_DAC_CH1_ERROR_ID :
1385 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1386 break;
1387 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1388 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1389 break;
1390
1391 case HAL_DAC_CH2_COMPLETE_CB_ID :
1392 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1393 break;
1394 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1395 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1396 break;
1397 case HAL_DAC_CH2_ERROR_ID :
1398 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1399 break;
1400 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1401 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1402 break;
1403
1404 case HAL_DAC_MSPINIT_CB_ID :
1405 hdac->MspInitCallback = HAL_DAC_MspInit;
1406 break;
1407 case HAL_DAC_MSPDEINIT_CB_ID :
1408 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1409 break;
1410 case HAL_DAC_ALL_CB_ID :
1411 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1412 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1413 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1414 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1415
1416 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1417 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1418 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1419 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1420
1421 hdac->MspInitCallback = HAL_DAC_MspInit;
1422 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1423 break;
1424 default :
1425 /* Update the error code */
1426 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1427 /* update return status */
1428 status = HAL_ERROR;
1429 break;
1430 }
1431 }
1432 else if (hdac->State == HAL_DAC_STATE_RESET)
1433 {
1434 switch (CallbackID)
1435 {
1436 case HAL_DAC_MSPINIT_CB_ID :
1437 hdac->MspInitCallback = HAL_DAC_MspInit;
1438 break;
1439 case HAL_DAC_MSPDEINIT_CB_ID :
1440 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1441 break;
1442 default :
1443 /* Update the error code */
1444 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1445 /* update return status */
1446 status = HAL_ERROR;
1447 break;
1448 }
1449 }
1450 else
1451 {
1452 /* Update the error code */
1453 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1454 /* update return status */
1455 status = HAL_ERROR;
1456 }
1457
1458 /* Release Lock */
1459 __HAL_UNLOCK(hdac);
1460 return status;
1461 }
1462 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1463
1464 /**
1465 * @}
1466 */
1467
1468 /**
1469 * @}
1470 */
1471
1472 /** @addtogroup DAC_Private_Functions
1473 * @{
1474 */
1475
1476 /**
1477 * @brief DMA conversion complete callback.
1478 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1479 * the configuration information for the specified DMA module.
1480 * @retval None
1481 */
DAC_DMAConvCpltCh1(DMA_HandleTypeDef * hdma)1482 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1483 {
1484 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1485
1486 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1487 hdac->ConvCpltCallbackCh1(hdac);
1488 #else
1489 HAL_DAC_ConvCpltCallbackCh1(hdac);
1490 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1491
1492 hdac->State = HAL_DAC_STATE_READY;
1493 }
1494
1495 /**
1496 * @brief DMA half transfer complete callback.
1497 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1498 * the configuration information for the specified DMA module.
1499 * @retval None
1500 */
DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef * hdma)1501 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1502 {
1503 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1504 /* Conversion complete callback */
1505 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1506 hdac->ConvHalfCpltCallbackCh1(hdac);
1507 #else
1508 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1509 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1510 }
1511
1512 /**
1513 * @brief DMA error callback
1514 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1515 * the configuration information for the specified DMA module.
1516 * @retval None
1517 */
DAC_DMAErrorCh1(DMA_HandleTypeDef * hdma)1518 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1519 {
1520 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1521
1522 /* Set DAC error code to DMA error */
1523 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1524
1525 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1526 hdac->ErrorCallbackCh1(hdac);
1527 #else
1528 HAL_DAC_ErrorCallbackCh1(hdac);
1529 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1530
1531 hdac->State = HAL_DAC_STATE_READY;
1532 }
1533
1534 /**
1535 * @}
1536 */
1537
1538 /**
1539 * @}
1540 */
1541
1542 #endif /* DAC1 || DAC2 */
1543
1544 #endif /* HAL_DAC_MODULE_ENABLED */
1545
1546 /**
1547 * @}
1548 */
1549
1550
