1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 ******************************************************************************
7 * @attention
8 * Copyright (c) 2017 STMicroelectronics.
9 * All rights reserved.
10 *
11 * This software is licensed under terms that can be found in the LICENSE file in
12 * the root directory of this software component.
13 * If no LICENSE file comes with this software, it is provided AS-IS.
14 *
15 ******************************************************************************
16 @verbatim
17 ==============================================================================
18 ##### How to use this driver #####
19 ==============================================================================
20 [..]
21 The LL UTILS driver contains a set of generic APIs that can be
22 used by user:
23 (+) Device electronic signature
24 (+) Timing functions
25 (+) PLL configuration functions
26
27 @endverbatim
28 ******************************************************************************
29 */
30
31 /* Define to prevent recursive inclusion -------------------------------------*/
32 #ifndef STM32H7xx_LL_UTILS_H
33 #define STM32H7xx_LL_UTILS_H
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 /* Includes ------------------------------------------------------------------*/
40 #include "stm32h7xx.h"
41 #include "stm32h7xx_ll_system.h"
42 #include "stm32h7xx_ll_bus.h"
43
44 /** @addtogroup STM32H7xx_LL_Driver
45 * @{
46 */
47
48 /** @defgroup UTILS_LL UTILS
49 * @{
50 */
51
52 /* Private types -------------------------------------------------------------*/
53 /* Private variables ---------------------------------------------------------*/
54
55 /* Private constants ---------------------------------------------------------*/
56 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
57 * @{
58 */
59
60 /* Max delay can be used in LL_mDelay */
61 #define LL_MAX_DELAY 0xFFFFFFFFU
62
63 /**
64 * @brief Unique device ID register base address
65 */
66 #define UID_BASE_ADDRESS UID_BASE
67
68 /**
69 * @brief Flash size data register base address
70 */
71 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
72
73 /**
74 * @brief Package data register base address
75 */
76 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
77
78 /**
79 * @}
80 */
81
82 /* Private macros ------------------------------------------------------------*/
83 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
84 * @{
85 */
86 /**
87 * @}
88 */
89 /* Exported types ------------------------------------------------------------*/
90 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
91 * @{
92 */
93 /**
94 * @brief UTILS PLL structure definition
95 */
96 typedef struct
97 {
98 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
99 This parameter must be a number between Min_Data = 0 and Max_Data = 63
100
101 This feature can be modified afterwards using unitary function
102 @ref LL_RCC_PLL1_SetM(). */
103
104 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
105 This parameter must be a number between Min_Data = 4 and Max_Data = 512
106
107 This feature can be modified afterwards using unitary function
108 @ref LL_RCC_PLL1_SetN(). */
109
110 uint32_t PLLP; /*!< Division for the main system clock.
111 This parameter must be a number between Min_Data = 2 and Max_Data = 128
112 odd division factors are not allowed
113
114 This feature can be modified afterwards using unitary function
115 @ref LL_RCC_PLL1_SetP(). */
116
117 uint32_t FRACN; /*!< Fractional part of the multiplication factor for PLL VCO.
118 This parameter can be a value between 0 and 8191
119
120 This feature can be modified afterwards using unitary function
121 @ref LL_RCC_PLL1_SetFRACN(). */
122
123 uint32_t VCO_Input; /*!< PLL clock Input range.
124 This parameter can be a value of @ref RCC_LL_EC_PLLINPUTRANGE
125
126 This feature can be modified afterwards using unitary function
127 @ref LL_RCC_PLL1_SetVCOInputRange(). */
128
129 uint32_t VCO_Output; /*!< PLL clock Output range.
130 This parameter can be a value of @ref RCC_LL_EC_PLLVCORANGE
131
132 This feature can be modified afterwards using unitary function
133 @ref LL_RCC_PLL1_SetVCOOutputRange(). */
134
135 } LL_UTILS_PLLInitTypeDef;
136
137 /**
138 * @brief UTILS System, AHB and APB buses clock configuration structure definition
139 */
140 typedef struct
141 {
142 uint32_t SYSCLKDivider; /*!< The System clock (SYSCLK) divider. This clock is derived from the PLL output.
143 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
144
145 This feature can be modified afterwards using unitary function
146 @ref LL_RCC_SetSysPrescaler(). */
147
148 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
149 This parameter can be a value of @ref RCC_LL_EC_AHB_DIV
150
151 This feature can be modified afterwards using unitary function
152 @ref LL_RCC_SetAHBPrescaler(). */
153
154 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
155 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
156
157 This feature can be modified afterwards using unitary function
158 @ref LL_RCC_SetAPB1Prescaler(). */
159
160 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
161 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
162
163 This feature can be modified afterwards using unitary function
164 @ref LL_RCC_SetAPB2Prescaler(). */
165
166 uint32_t APB3CLKDivider; /*!< The APB2 clock (PCLK3) divider. This clock is derived from the AHB clock (HCLK).
167 This parameter can be a value of @ref RCC_LL_EC_APB3_DIV
168
169 This feature can be modified afterwards using unitary function
170 @ref LL_RCC_SetAPB3Prescaler(). */
171
172 uint32_t APB4CLKDivider; /*!< The APB4 clock (PCLK4) divider. This clock is derived from the AHB clock (HCLK).
173 This parameter can be a value of @ref RCC_LL_EC_APB4_DIV
174
175 This feature can be modified afterwards using unitary function
176 @ref LL_RCC_SetAPB4Prescaler(). */
177
178 } LL_UTILS_ClkInitTypeDef;
179
180 /**
181 * @}
182 */
183
184 /* Exported constants --------------------------------------------------------*/
185 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
186 * @{
187 */
188
189 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
190 * @{
191 */
192 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
193 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
194 /**
195 * @}
196 */
197
198 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
199 * @{
200 */
201 #if (STM32H7_DEV_ID == 0x450UL)
202 #define LL_UTILS_PACKAGETYPE_LQFP100 LL_SYSCFG_LQFP100_PACKAGE /*!< LQFP100 package type */
203 #define LL_UTILS_PACKAGETYPE_TQFP144 LL_SYSCFG_TQFP144_PACKAGE /*!< TQFP144 package type */
204 #define LL_UTILS_PACKAGETYPE_TQFP176_UFBGA176 LL_SYSCFG_TQFP176_UFBGA176_PACKAGE /*!< TQFP176 or UFBGA176 package type */
205 #define LL_UTILS_PACKAGETYPE_LQFP208_TFBGA240 LL_SYSCFG_LQFP208_TFBGA240_PACKAGE /*!< LQFP208 or TFBGA240 package type */
206 #elif (STM32H7_DEV_ID == 0x480UL)
207 #define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000UL /*!< LQFP64 package type */
208 #define LL_UTILS_PACKAGETYPE_TFBGA100_LQFP100 0x00000001UL /*!< TFBGA100 or LQFP100 package type */
209 #define LL_UTILS_PACKAGETYPE_LQFP100_SMPS 0x00000002UL /*!< LQFP100 with SMPS package type */
210 #define LL_UTILS_PACKAGETYPE_TFBGA100_SMPS 0x00000003UL /*!< TFBGA100 with SMPS package type */
211 #define LL_UTILS_PACKAGETYPE_WLCSP132_SMPS 0x00000004UL /*!< WLCSP132 package type */
212 #define LL_UTILS_PACKAGETYPE_LQFP144 0x00000005UL /*!< LQFP144 package type */
213 #define LL_UTILS_PACKAGETYPE_LQFP144_SMPS 0x00000006UL /*!< LQFP144 with SMPS package type */
214 #define LL_UTILS_PACKAGETYPE_UFBGA169 0x00000007UL /*!< UFBGA169 package type */
215 #define LL_UTILS_PACKAGETYPE_UFBGA176_LQFP176 0x00000008UL /*!< UFBGA176 or LQFP176 package type */
216 #define LL_UTILS_PACKAGETYPE_LQFP176_SMPS 0x00000009UL /*!< LQFP176 with SMPS package type */
217 #define LL_UTILS_PACKAGETYPE_UFBGA176_SMPS 0x0000000AUL /*!< UFBGA176 with SMPS package type */
218 #define LL_UTILS_PACKAGETYPE_TFBGA216 0x0000000CUL /*!< TFBGA216 package type */
219 #define LL_UTILS_PACKAGETYPE_TFBGA225 0x0000000EUL /*!< TFBGA225 package type */
220 #elif (STM32H7_DEV_ID == 0x483UL)
221 #define LL_UTILS_PACKAGETYPE_VFQFPN68_INDUS LL_SYSCFG_VFQFPN68_INDUS_PACKAGE /*!< VFQFPN68 Industrial package type */
222 #define LL_UTILS_PACKAGETYPE_TFBGA100_LQFP100 LL_SYSCFG_TFBGA100_LQFP100_PACKAGE /*!< TFBGA100 or LQFP100 Legacy package type */
223 #define LL_UTILS_PACKAGETYPE_LQFP100_INDUS LL_SYSCFG_LQFP100_INDUS_PACKAGE /*!< LQFP100 Industrial package type */
224 #define LL_UTILS_PACKAGETYPE_TFBGA100_INDUS LL_SYSCFG_TFBGA100_INDUS_PACKAGE /*!< TFBGA100 Industrial package type */
225 #define LL_UTILS_PACKAGETYPE_WLCSP115_INDUS LL_SYSCFG_WLCSP115_INDUS_PACKAGE /*!< WLCSP115 Industrial package type */
226 #define LL_UTILS_PACKAGETYPE_LQFP144 LL_SYSCFG_LQFP144_PACKAGE /*!< LQFP144 Legacy package type */
227 #define LL_UTILS_PACKAGETYPE_UFBGA144 LL_SYSCFG_UFBGA144_PACKAGE /*!< UFBGA144 Legacy package type */
228 #define LL_UTILS_PACKAGETYPE_LQFP144_INDUS LL_SYSCFG_LQFP144_INDUS_PACKAGE /*!< LQFP144 Industrial package type */
229 #define LL_UTILS_PACKAGETYPE_UFBGA169_INDUS LL_SYSCFG_UFBGA169_INDUS_PACKAGE /*!< UFBGA169 Industrial package type */
230 #define LL_UTILS_PACKAGETYPE_UFBGA176PLUS25_INDUS LL_SYSCFG_UFBGA176PLUS25_INDUS_PACKAGE /*!< UFBGA176+25 Industrial package type */
231 #define LL_UTILS_PACKAGETYPE_LQFP176_INDUS LL_SYSCFG_LQFP176_INDUS_PACKAGE /*!< LQFP176 Industrial package type */
232 #endif /* STM32H7_DEV_ID == 0x450UL */
233 /**
234 * @}
235 */
236
237 /**
238 * @}
239 */
240
241 /* Exported macro ------------------------------------------------------------*/
242
243 /* Exported functions --------------------------------------------------------*/
244 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
245 * @{
246 */
247
248 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
249 * @{
250 */
251
252 /**
253 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
254 * @retval UID[31:0]
255 */
LL_GetUID_Word0(void)256 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
257 {
258 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
259 }
260
261 /**
262 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
263 * @retval UID[63:32]
264 */
LL_GetUID_Word1(void)265 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
266 {
267 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
268 }
269
270 /**
271 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
272 * @retval UID[95:64]
273 */
LL_GetUID_Word2(void)274 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
275 {
276 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
277 }
278
279 /**
280 * @brief Get Flash memory size
281 * @note This bitfield indicates the size of the device Flash memory expressed in
282 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
283 * @retval FLASH_SIZE[15:0]: Flash memory size
284 */
LL_GetFlashSize(void)285 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
286 {
287 return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
288 }
289
290 /**
291 * @brief Get Package type
292 * @retval Returned value can be one of the following values:
293 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100
294 * @arg @ref LL_UTILS_PACKAGETYPE_TQFP144
295 * @arg @ref LL_UTILS_PACKAGETYPE_TQFP176_UFBGA176
296 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP208_TFBGA240
297 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64 (*)
298 * @arg @ref LL_UTILS_PACKAGETYPE_TFBGA100_LQFP100 (*)
299 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_SMPS (*)
300 * @arg @ref LL_UTILS_PACKAGETYPE_TFBGA100_SMPS (*)
301 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP132_SMPS (*)
302 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144 (*)
303 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_SMPS (*)
304 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA169 (*)
305 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176_LQFP176 (*)
306 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP176_SMPS (*)
307 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176_SMPS (*)
308 * @arg @ref LL_UTILS_PACKAGETYPE_TFBGA216 (*)
309 * @arg @ref LL_UTILS_PACKAGETYPE_TFBGA225 (*)
310 * @arg @ref LL_UTILS_PACKAGETYPE_VFQFPN68_INDUS (*)
311 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_INDUS (*)
312 * @arg @ref LL_UTILS_PACKAGETYPE_TFBGA100_INDUS (*)
313 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP115_INDUS (*)
314 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA144 (*)
315 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_INDUS (*)
316 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA169_INDUS (*)
317 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA176+25_INDUS (*)
318 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP176_INDUS (*)
319 *
320 * (*) Packages available on some STM32H7 lines only.
321 * @note For some SM32H7 lines, enabling the SYSCFG clock is mandatory.
322 the SYSCFG clock enabling is ensured by LL_APB4_GRP1_EnableClock
323 */
LL_GetPackageType(void)324 __STATIC_INLINE uint32_t LL_GetPackageType(void)
325 {
326 #if defined(SYSCFG_PKGR_PKG)
327
328 return LL_SYSCFG_GetPackage();
329 #else
330 return (uint16_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)));
331
332 #endif /* SYSCFG_PKGR_PKG */
333 }
334
335 /**
336 * @}
337 */
338
339 /** @defgroup UTILS_LL_EF_DELAY DELAY
340 * @{
341 */
342
343 /**
344 * @brief This function configures the Cortex-M SysTick source of the time base.
345 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
346 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
347 * configuration by calling this function, for a delay use rather osDelay RTOS service.
348 * @param Ticks Number of ticks
349 * @retval None
350 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)351 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
352 {
353 /* Configure the SysTick to have interrupt in 1ms time base */
354 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
355 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
356 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
357 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
358 }
359
360 void LL_Init1msTick(uint32_t CPU_Frequency);
361 void LL_mDelay(uint32_t Delay);
362
363 /**
364 * @}
365 */
366
367 /** @defgroup UTILS_EF_SYSTEM SYSTEM
368 * @{
369 */
370
371 void LL_SetSystemCoreClock(uint32_t CPU_Frequency);
372 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
373 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
374 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency,
375 uint32_t HSEBypass,
376 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
377 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
378 ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency);
379
380 /**
381 * @}
382 */
383
384 /**
385 * @}
386 */
387
388 /**
389 * @}
390 */
391
392 /**
393 * @}
394 */
395
396 #ifdef __cplusplus
397 }
398 #endif
399
400 #endif /* STM32H7xx_LL_UTILS_H */
401
402
