1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_mdma.h
4 * @author MCD Application Team
5 * @brief Header file of MDMA LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H7xx_LL_MDMA_H
21 #define STM32H7xx_LL_MDMA_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h7xx.h"
29
30 /** @addtogroup STM32H7xx_LL_Driver
31 * @{
32 */
33
34 #if defined (MDMA)
35
36 /** @defgroup MDMA_LL MDMA
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /** @defgroup MDMA_LL_Private_Variables MDMA Private Variables
43 * @{
44 */
45 /* Array used to get the MDMA channel register offset versus channel index LL_MDMA_CHANNEL_x */
46 static const uint32_t LL_MDMA_CH_OFFSET_TAB[] =
47 {
48 (uint32_t)(MDMA_Channel0_BASE - MDMA_BASE),
49 (uint32_t)(MDMA_Channel1_BASE - MDMA_BASE),
50 (uint32_t)(MDMA_Channel2_BASE - MDMA_BASE),
51 (uint32_t)(MDMA_Channel3_BASE - MDMA_BASE),
52 (uint32_t)(MDMA_Channel4_BASE - MDMA_BASE),
53 (uint32_t)(MDMA_Channel5_BASE - MDMA_BASE),
54 (uint32_t)(MDMA_Channel6_BASE - MDMA_BASE),
55 (uint32_t)(MDMA_Channel7_BASE - MDMA_BASE),
56 (uint32_t)(MDMA_Channel8_BASE - MDMA_BASE),
57 (uint32_t)(MDMA_Channel9_BASE - MDMA_BASE),
58 (uint32_t)(MDMA_Channel10_BASE - MDMA_BASE),
59 (uint32_t)(MDMA_Channel11_BASE - MDMA_BASE),
60 (uint32_t)(MDMA_Channel12_BASE - MDMA_BASE),
61 (uint32_t)(MDMA_Channel13_BASE - MDMA_BASE),
62 (uint32_t)(MDMA_Channel14_BASE - MDMA_BASE),
63 (uint32_t)(MDMA_Channel15_BASE - MDMA_BASE)
64 };
65
66 /**
67 * @}
68 */
69
70 /* Private constants ---------------------------------------------------------*/
71 /** @defgroup MDMA_LL_Private_Constants MDMA Private Constants
72 * @{
73 */
74 /**
75 * @}
76 */
77
78
79 /* Private macros ------------------------------------------------------------*/
80 /* Exported types ------------------------------------------------------------*/
81 #if defined(USE_FULL_LL_DRIVER)
82 /** @defgroup MDMA_LL_ES_INIT MDMA Exported Init structure
83 * @{
84 */
85 typedef struct
86 {
87 uint32_t SrcAddress; /*!< Specifies the transfer source address
88 This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF.
89 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceAddress() */
90
91 uint32_t DstAddress; /*!< Specifies the transfer destination address
92 This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF.
93 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationAddress() */
94
95 uint32_t RequestMode; /*!< Specifies the request mode Hardware or Software.
96 This parameter can be a value of @ref MDMA_LL_EC_REQUEST_MODE
97 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetRequestMode() */
98
99 uint32_t TriggerMode; /*!< Specifies the transfer trigger mode.
100 This parameter can be a value of @ref MDMA_LL_EC_TRIGGER_MODE
101 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetTriggerMode() */
102
103 uint32_t HWTrigger; /*!< Specifies the HW transfer trigger used when RequestMode is HW.
104 This parameter can be a value of @ref MDMA_LL_EC_HW_TRIGGER_SELCTION
105 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetHWTrigger() */
106
107 uint32_t BlockDataLength; /*!< Specifies the length of a block transfer in bytes
108 This parameter must be a value between Min_Data = 0 and Max_Data = 0x00010000.
109 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkDataLength() */
110
111 uint32_t BlockRepeatCount; /*!< Specifies the Block Repeat Count
112 This parameter must be a value between Min_Data = 0 and Max_Data = 0x00000FFF.
113 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatCount() */
114
115 uint32_t BlockRepeatDestAddrUpdateMode; /*!< Specifies the block repeat destination address update mode.
116 This parameter can be a value of @ref MDMA_LL_EC_BLK_RPT_DEST_ADDR_UPDATE_MODE
117 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatDestAddrUpdate() */
118
119 uint32_t BlockRepeatSrcAddrUpdateMode; /*!< Specifies the block repeat source address update mode.
120 This parameter can be a value of @ref MDMA_LL_EC_SRC_BLK_RPT_ADDR_UPDATE_MODE
121 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRepeatSrcAddrUpdate() */
122
123 uint32_t BlockRepeatDestAddrUpdateVal; /*!< Specifies the block repeat destination address update value.
124 This parameter can be a value Between 0 to 0x0000FFFF
125 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRptDestAddrUpdateValue() */
126
127 uint32_t BlockRepeatSrcAddrUpdateVal; /*!< Specifies the block repeat source address update value.
128 This parameter can be a value Between 0 to 0x0000FFFF
129 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBlkRptSrcAddrUpdateValue() */
130
131 uint32_t LinkAddress; /*!< Specifies the linked list next transfer node address.
132 This parameter can be a value Between 0 to 0xFFFFFFFF
133 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetLinkAddress() */
134
135 uint32_t WordEndianess; /*!< Specifies the Word transfer endianness
136 This parameter can be a value of @ref MDMA_LL_EC_WORD_ENDIANNESS.
137 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetWordEndianness() */
138
139 uint32_t HalfWordEndianess; /*!< Specifies the Half Word transfer endianness
140 This parameter can be a value of @ref MDMA_LL_EC_HALFWORD_ENDIANNESS.
141 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetHalfWordEndianness() */
142
143 uint32_t ByteEndianess; /*!< Specifies the Byte transfer endianness
144 This parameter can be a value of @ref MDMA_LL_EC_BYTE_ENDIANNESS.
145 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetByteEndianness() */
146
147 uint32_t Priority; /*!< Specifies the channel priority level.
148 This parameter can be a value of @ref MDMA_LL_EC_PRIORITY
149 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetChannelPriorityLevel() */
150
151 uint32_t BufferableWriteMode; /*!< Specifies the transfer Bufferable Write Mode.
152 This parameter can be a value of @ref MDMA_LL_EC_BUFF_WRITE_MODE
153 This feature can be modified afterwards using unitary function @ref LL_MDMA_EnableBufferableWrMode()
154 and LL_MDMA_DisableBufferableWrMode */
155
156
157 uint32_t PaddingAlignment; /*!< Specifies the transfer Padding and Alignment.
158 This parameter can be a value of @ref MDMA_LL_EC_PADDING_ALIGNMENT_MODE
159 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetPaddingAlignment() */
160
161 uint32_t PackMode; /*!< Specifies the transfer Packing enabled or disabled.
162 This parameter can be a value of @ref MDMA_LL_EC_PACKING_MODE
163 This feature can be modified afterwards using unitary function @ref LL_MDMA_EnablePacking()
164 and LL_MDMA_DisablePacking() */
165
166 uint32_t BufferTransferLength; /*!< Specifies the length of a buffer transfer in bytes
167 This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000007F.
168 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetBufferTransferLength() */
169
170 uint32_t DestBurst; /*!< Specifies the destination burst size.
171 This parameter can be a value of @ref MDMA_LL_EC_DEST_BURST
172 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationBurstSize() */
173
174 uint32_t SrctBurst; /*!< Specifies the source burst size.
175 This parameter can be a value of @ref MDMA_LL_EC_SRC_BURST
176 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceBurstSize() */
177
178 uint32_t DestIncSize; /*!< Specifies the destination increment size.
179 This parameter can be a value of @ref MDMA_LL_EC_DEST_INC_OFFSET_SIZE
180 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationIncSize() */
181
182 uint32_t SrcIncSize; /*!< Specifies the source increment size.
183 This parameter can be a value of @ref MDMA_LL_EC_SRC_INC_OFFSET_SIZE
184 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceIncSize() */
185
186 uint32_t DestDataSize; /*!< Specifies the destination data size.
187 This parameter can be a value of @ref MDMA_LL_EC_DEST_DATA_SIZE
188 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationDataSize() */
189
190 uint32_t SrcDataSize; /*!< Specifies the source data size.
191 This parameter can be a value of @ref MDMA_LL_EC_SRC_DATA_SIZE
192 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceDataSize() */
193
194 uint32_t DestIncMode; /*!< Specifies the destination increment mode.
195 This parameter can be a value of @ref MDMA_LL_EC_DEST_INC_MODE
196 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestinationIncMode() */
197
198 uint32_t SrcIncMode; /*!< Specifies the source increment mode.
199 This parameter can be a value of @ref MDMA_LL_EC_SRC_INC_MODE
200 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSourceIncMode() */
201
202
203 uint32_t DestBus; /*!< Specifies the destination transfer bus, System AXI or AHB/TCM bus.
204 This parameter can be a value of @ref MDMA_LL_EC_DEST_BUS
205 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetDestBusSelection() */
206
207 uint32_t SrcBus; /*!< Specifies the source transfer bus, System AXI or AHB/TCM bus.
208 This parameter can be a value of @ref MDMA_LL_EC_SRC_BUS
209 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetSrcBusSelection() */
210
211 uint32_t MaskAddress; /*!< Specifies the address to be updated (written) with MaskData after a request is served.
212 MaskAddress and MaskData could be used to automatically clear a peripheral flag when the request is served
213 This parameter can be a value Between 0 to 0xFFFFFFFF
214 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetMaskAddress() */
215
216 uint32_t MaskData; /*!< Specifies the value to be written to MaskAddress after a request is served.
217 MaskAddress and MaskData could be used to automatically clear a peripheral flag when the request is served
218 This parameter can be a value Between 0 to 0xFFFFFFFF
219 This feature can be modified afterwards using unitary function @ref LL_MDMA_SetMaskData() */
220
221 } LL_MDMA_InitTypeDef;
222
223 /**
224 * @brief LL MDMA linked list node structure definition
225 * @note The Linked list node allows to define a new MDMA configuration
226 * (CTCR ,CBNDTR ,CSAR ,CDAR ,CBRUR, CLAR, CTBR, CMAR and CMDR registers).
227 * When CLAR register is configured to a non NULL value , each time a transfer ends,
228 * a new configuration (linked list node) is automatically loaded from the address given in CLAR register.
229 */
230 typedef struct
231 {
232 __IO uint32_t CTCR; /*!< New CTCR register configuration for the given MDMA linked list node */
233 __IO uint32_t CBNDTR; /*!< New CBNDTR register configuration for the given MDMA linked list node */
234 __IO uint32_t CSAR; /*!< New CSAR register configuration for the given MDMA linked list node */
235 __IO uint32_t CDAR; /*!< New CDAR register configuration for the given MDMA linked list node */
236 __IO uint32_t CBRUR; /*!< New CBRUR register configuration for the given MDMA linked list node */
237 __IO uint32_t CLAR; /*!< New CLAR register configuration for the given MDMA linked list node */
238 __IO uint32_t CTBR; /*!< New CTBR register configuration for the given MDMA linked list node */
239 __IO uint32_t Reserved; /*!< Reserved register*/
240 __IO uint32_t CMAR; /*!< New CMAR register configuration for the given MDMA linked list node */
241 __IO uint32_t CMDR; /*!< New CMDR register configuration for the given MDMA linked list node */
242
243 }LL_MDMA_LinkNodeTypeDef;
244
245 /**
246 * @}
247 */
248 #endif /*USE_FULL_LL_DRIVER*/
249 /* Exported constants --------------------------------------------------------*/
250 /** @defgroup MDMA_LL_Exported_Constants MDMA Exported Constants
251 * @{
252 */
253
254 /** @defgroup MDMA_LL_EC_CHANNEL CHANNEL
255 * @{
256 */
257 #define LL_MDMA_CHANNEL_0 0x00000000U
258 #define LL_MDMA_CHANNEL_1 0x00000001U
259 #define LL_MDMA_CHANNEL_2 0x00000002U
260 #define LL_MDMA_CHANNEL_3 0x00000003U
261 #define LL_MDMA_CHANNEL_4 0x00000004U
262 #define LL_MDMA_CHANNEL_5 0x00000005U
263 #define LL_MDMA_CHANNEL_6 0x00000006U
264 #define LL_MDMA_CHANNEL_7 0x00000007U
265 #define LL_MDMA_CHANNEL_8 0x00000008U
266 #define LL_MDMA_CHANNEL_9 0x00000009U
267 #define LL_MDMA_CHANNEL_10 0x0000000AU
268 #define LL_MDMA_CHANNEL_11 0x0000000BU
269 #define LL_MDMA_CHANNEL_12 0x0000000CU
270 #define LL_MDMA_CHANNEL_13 0x0000000DU
271 #define LL_MDMA_CHANNEL_14 0x0000000EU
272 #define LL_MDMA_CHANNEL_15 0x0000000FU
273 #define LL_MDMA_CHANNEL_ALL 0xFFFF0000U
274 /**
275 * @}
276 */
277
278 /** @defgroup MDMA_LL_EC_WORD_ENDIANNESS Word Endianness
279 * @{
280 */
281 #define LL_MDMA_WORD_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianness preserved for words */
282 #define LL_MDMA_WORD_ENDIANNESS_EXCHANGE MDMA_CCR_WEX /*!< word order exchanged when destination data size is double word */
283
284 /**
285 * @}
286 */
287
288 /** @defgroup MDMA_LL_EC_HALFWORD_ENDIANNESS Half Word Endianness
289 * @{
290 */
291 #define LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianness preserved for half words */
292 #define LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE MDMA_CCR_HEX /*!< half word order exchanged when destination data size is word or double word */
293
294 /**
295 * @}
296 */
297
298 /** @defgroup MDMA_LL_EC_BYTE_ENDIANNESS Byte Endianness
299 * @{
300 */
301 #define LL_MDMA_BYTE_ENDIANNESS_PRESERVE 0x00000000U /*!< Little endianness preserved for bytes */
302 #define LL_MDMA_BYTE_ENDIANNESS_EXCHANGE MDMA_CCR_BEX /*!< byte order exchanged when destination data size is half word , word or double word */
303
304 /**
305 * @}
306 */
307
308 /** @defgroup MDMA_LL_EC_PRIORITY Transfer Priority level
309 * @{
310 */
311 #define LL_MDMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */
312 #define LL_MDMA_PRIORITY_MEDIUM MDMA_CCR_PL_0 /*!< Priority level : Medium */
313 #define LL_MDMA_PRIORITY_HIGH MDMA_CCR_PL_1 /*!< Priority level : High */
314 #define LL_MDMA_PRIORITY_VERYHIGH MDMA_CCR_PL /*!< Priority level : Very_High */
315 /**
316 * @}
317 */
318
319 /** @defgroup MDMA_LL_EC_BUFF_WRITE_MODE Bufferable Write Mode
320 * @{
321 */
322 #define LL_MDMA_BUFF_WRITE_DISABLE 0x00000000U /*!< destination write operation is non-bufferable */
323 #define LL_MDMA_BUFF_WRITE_ENABLE MDMA_CTCR_BWM /*!< destination write operation is bufferable */
324 /**
325 * @}
326 */
327
328 /** @defgroup MDMA_LL_EC_REQUEST_MODE Request Mode
329 * @{
330 */
331 #define LL_MDMA_REQUEST_MODE_HW 0x00000000U /*!< Request mode is Hardware */
332 #define LL_MDMA_REQUEST_MODE_SW MDMA_CTCR_SWRM /*!< Request mode is Software */
333 /**
334 * @}
335 */
336
337 /** @defgroup MDMA_LL_EC_TRIGGER_MODE Trigger Mode
338 * @{
339 */
340 #define LL_MDMA_BUFFER_TRANSFER 0x00000000U /*!< Each MDMA request (SW or HW) triggers a buffer transfer */
341 #define LL_MDMA_BLOCK_TRANSFER MDMA_CTCR_TRGM_0 /*!< Each MDMA request (SW or HW) triggers a block transfer */
342 #define LL_MDMA_REPEAT_BLOCK_TRANSFER MDMA_CTCR_TRGM_1 /*!< Each MDMA request (SW or HW) triggers a repeated block transfer */
343 #define LL_MDMA_FULL_TRANSFER MDMA_CTCR_TRGM /*!< Each MDMA request (SW or HW) triggers a Full transfer or a linked list transfer if any */
344 /**
345 * @}
346 */
347
348 /** @defgroup MDMA_LL_EC_PADDING_ALIGNMENT_MODE Padding Alignment Mode
349 * @{
350 */
351 #define LL_MDMA_DATAALIGN_RIGHT 0x00000000U /*!< Right Aligned, padded w/ 0s (default) */
352 #define LL_MDMA_DATAALIGN_RIGHT_SIGNED MDMA_CTCR_PAM_0 /*!< Right Aligned, Sign extended ,
353 Note : this mode is allowed only if the Source data size smaller than Destination data size */
354 #define LL_MDMA_DATAALIGN_LEFT MDMA_CTCR_PAM_1 /*!< Left Aligned (padded with 0s) */
355 /**
356 * @}
357 */
358
359 /** @defgroup MDMA_LL_EC_PACKING_MODE Transfer Packing
360 * @{
361 */
362 #define LL_MDMA_PACK_DISABLE 0x00000000U /*!< Packing disabled */
363 #define LL_MDMA_PACK_ENABLE MDMA_CTCR_PKE /*!< Packing enabled */
364 /**
365 * @}
366 */
367
368 /** @defgroup MDMA_LL_EC_DEST_BURST Transfer Destination Burst
369 * @{
370 */
371 #define LL_MDMA_DEST_BURST_SINGLE 0x00000000U /*!< Single transfer */
372 #define LL_MDMA_DEST_BURST_2BEATS MDMA_CTCR_DBURST_0 /*!< Burst 2 beats */
373 #define LL_MDMA_DEST_BURST_4BEATS MDMA_CTCR_DBURST_1 /*!< Burst 4 beats */
374 #define LL_MDMA_DEST_BURST_8BEATS (MDMA_CTCR_DBURST_0 | MDMA_CTCR_DBURST_1) /*!< Burst 8 beats */
375 #define LL_MDMA_DEST_BURST_16BEATS MDMA_CTCR_DBURST_2 /*!< Burst 16 beats */
376 #define LL_MDMA_DEST_BURST_32BEATS (MDMA_CTCR_DBURST_0 | MDMA_CTCR_DBURST_2) /*!< Burst 32 beats */
377 #define LL_MDMA_DEST_BURST_64BEATS (MDMA_CTCR_DBURST_1 | MDMA_CTCR_DBURST_2) /*!< Burst 64 beats */
378 #define LL_MDMA_DEST_BURST_128BEATS (MDMA_CTCR_DBURST) /*!< Burst 128 beats */
379 /**
380 * @}
381 */
382
383 /** @defgroup MDMA_LL_EC_SRC_BURST Transfer Source Burst
384 * @{
385 */
386 #define LL_MDMA_SRC_BURST_SINGLE 0x00000000U /*!< Single transfer */
387 #define LL_MDMA_SRC_BURST_2BEATS MDMA_CTCR_SBURST_0 /*!< Burst 2 beats */
388 #define LL_MDMA_SRC_BURST_4BEATS MDMA_CTCR_SBURST_1 /*!< Burst 4 beats */
389 #define LL_MDMA_SRC_BURST_8BEATS (MDMA_CTCR_SBURST_0 | MDMA_CTCR_SBURST_1) /*!< Burst 8 beats */
390 #define LL_MDMA_SRC_BURST_16BEATS MDMA_CTCR_SBURST_2 /*!< Burst 16 beats */
391 #define LL_MDMA_SRC_BURST_32BEATS (MDMA_CTCR_SBURST_0 | MDMA_CTCR_SBURST_2) /*!< Burst 32 beats */
392 #define LL_MDMA_SRC_BURST_64BEATS (MDMA_CTCR_SBURST_1 | MDMA_CTCR_SBURST_2) /*!< Burst 64 beats */
393 #define LL_MDMA_SRC_BURST_128BEATS MDMA_CTCR_SBURST /*!< Burst 128 beats */
394 /**
395 * @}
396 */
397
398 /** @defgroup MDMA_LL_EC_DEST_INC_OFFSET_SIZE Destination Increment Offset Size
399 * @{
400 */
401 #define LL_MDMA_DEST_INC_OFFSET_BYTE 0x00000000U /*!< offset is Byte (8-bit) */
402 #define LL_MDMA_DEST_INC_OFFSET_HALFWORD MDMA_CTCR_DINCOS_0 /*!< offset is Half Word (16-bit) */
403 #define LL_MDMA_DEST_INC_OFFSET_WORD MDMA_CTCR_DINCOS_1 /*!< offset is Word (32-bit) */
404 #define LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD MDMA_CTCR_DINCOS /*!< offset is Double Word (64-bit) */
405 /**
406 * @}
407 */
408
409 /** @defgroup MDMA_LL_EC_SRC_INC_OFFSET_SIZE Source Increment Offset Size
410 * @{
411 */
412 #define LL_MDMA_SRC_INC_OFFSET_BYTE 0x00000000U /*!< offset is Byte (8-bit) */
413 #define LL_MDMA_SRC_INC_OFFSET_HALFWORD MDMA_CTCR_SINCOS_0 /*!< offset is Half Word (16-bit) */
414 #define LL_MDMA_SRC_INC_OFFSET_WORD MDMA_CTCR_SINCOS_1 /*!< offset is Word (32-bit) */
415 #define LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD MDMA_CTCR_SINCOS /*!< offset is Double Word (64-bit) */
416 /**
417 * @}
418 */
419
420 /** @defgroup MDMA_LL_EC_DEST_DATA_SIZE Destination Data Size
421 * @{
422 */
423 #define LL_MDMA_DEST_DATA_SIZE_BYTE 0x00000000U /*!< Destination data size is Byte */
424 #define LL_MDMA_DEST_DATA_SIZE_HALFWORD MDMA_CTCR_DSIZE_0 /*!< Destination data size is half word */
425 #define LL_MDMA_DEST_DATA_SIZE_WORD MDMA_CTCR_DSIZE_1 /*!< Destination data size is word */
426 #define LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD MDMA_CTCR_DSIZE /*!< Destination data size is double word */
427 /**
428 * @}
429 */
430
431 /** @defgroup MDMA_LL_EC_SRC_DATA_SIZE Source Data Size
432 * @{
433 */
434 #define LL_MDMA_SRC_DATA_SIZE_BYTE 0x00000000U /*!< Source data size is Byte */
435 #define LL_MDMA_SRC_DATA_SIZE_HALFWORD MDMA_CTCR_SSIZE_0 /*!< Source data size is half word */
436 #define LL_MDMA_SRC_DATA_SIZE_WORD MDMA_CTCR_SSIZE_1 /*!< Source data size is word */
437 #define LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD MDMA_CTCR_SSIZE /*!< Source data size is double word */
438 /**
439 * @}
440 */
441
442 /** @defgroup MDMA_LL_EC_DEST_INC_MODE Destination Increment Mode
443 * @{
444 */
445 #define LL_MDMA_DEST_FIXED 0x00000000U /*!< Destination address pointer is fixed */
446 #define LL_MDMA_DEST_INCREMENT MDMA_CTCR_DINC_1 /*!< Destination address pointer is incremented after each data transfer */
447 #define LL_MDMA_DEST_DECREMENT MDMA_CTCR_DINC /*!< Destination address pointer is decremented after each data transfer */
448 /**
449 * @}
450 */
451
452 /** @defgroup MDMA_LL_EC_SRC_INC_MODE Source Increment Mode
453 * @{
454 */
455 #define LL_MDMA_SRC_FIXED 0x00000000U /*!< Destination address pointer is fixed */
456 #define LL_MDMA_SRC_INCREMENT MDMA_CTCR_SINC_1 /*!< Destination address pointer is incremented after each data transfer */
457 #define LL_MDMA_SRC_DECREMENT MDMA_CTCR_SINC /*!< Destination address pointer is decremented after each data transfer */
458 /**
459 * @}
460 */
461
462 /** @defgroup MDMA_LL_EC_BLK_RPT_DEST_ADDR_UPDATE_MODE Block Repeat Destination address Update Mode
463 * @{
464 */
465 #define LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT 0x00000000U /*!< Destination address pointer is incremented after each block transfer by Destination Update Value */
466 #define LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT MDMA_CBNDTR_BRDUM /*!< Destination address pointer is decremented after each block transfer by Destination Update Value */
467 /**
468 * @}
469 */
470
471 /** @defgroup MDMA_LL_EC_SRC_BLK_RPT_ADDR_UPDATE_MODE Source Block Repeat address Update Mode
472 * @{
473 */
474 #define LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT 0x00000000U /*!< Source address pointer is incremented after each block transfer by Source Update Value */
475 #define LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT MDMA_CBNDTR_BRSUM /*!< Source address pointer is decremented after each block transfer by Source Update Value */
476 /**
477 * @}
478 */
479
480 /** @defgroup MDMA_LL_EC_DEST_BUS Destination BUS Selection
481 * @{
482 */
483 #define LL_MDMA_DEST_BUS_SYSTEM_AXI 0x00000000U /*!< System/AXI bus is used as destination */
484 #define LL_MDMA_DEST_BUS_AHB_TCM MDMA_CTBR_DBUS /*!< AHB bus/TCM is used as destination */
485 /**
486 * @}
487 */
488
489 /** @defgroup MDMA_LL_EC_SRC_BUS Source BUS Selection
490 * @{
491 */
492 #define LL_MDMA_SRC_BUS_SYSTEM_AXI 0x00000000U /*!< System/AXI bus is used as source */
493 #define LL_MDMA_SRC_BUS_AHB_TCM MDMA_CTBR_SBUS /*!< AHB bus/TCM is used as source */
494 /**
495 * @}
496 */
497
498 /** @defgroup MDMA_LL_EC_HW_TRIGGER_SELCTION HW Trigger Selection
499 * @{
500 */
501 #define LL_MDMA_REQ_DMA1_STREAM0_TC 0x00000000U /*!< MDMA HW Trigger (request) is DMA1 Stream 0 Transfer Complete Flag */
502 #define LL_MDMA_REQ_DMA1_STREAM1_TC 0x00000001U /*!< MDMA HW Trigger (request) is DMA1 Stream 1 Transfer Complete Flag */
503 #define LL_MDMA_REQ_DMA1_STREAM2_TC 0x00000002U /*!< MDMA HW Trigger (request) is DMA1 Stream 2 Transfer Complete Flag */
504 #define LL_MDMA_REQ_DMA1_STREAM3_TC 0x00000003U /*!< MDMA HW Trigger (request) is DMA1 Stream 3 Transfer Complete Flag */
505 #define LL_MDMA_REQ_DMA1_STREAM4_TC 0x00000004U /*!< MDMA HW Trigger (request) is DMA1 Stream 4 Transfer Complete Flag */
506 #define LL_MDMA_REQ_DMA1_STREAM5_TC 0x00000005U /*!< MDMA HW Trigger (request) is DMA1 Stream 5 Transfer Complete Flag */
507 #define LL_MDMA_REQ_DMA1_STREAM6_TC 0x00000006U /*!< MDMA HW Trigger (request) is DMA1 Stream 6 Transfer Complete Flag */
508 #define LL_MDMA_REQ_DMA1_STREAM7_TC 0x00000007U /*!< MDMA HW Trigger (request) is DMA1 Stream 7 Transfer Complete Flag */
509 #define LL_MDMA_REQ_DMA2_STREAM0_TC 0x00000008U /*!< MDMA HW Trigger (request) is DMA2 Stream 0 Transfer Complete Flag */
510 #define LL_MDMA_REQ_DMA2_STREAM1_TC 0x00000009U /*!< MDMA HW Trigger (request) is DMA2 Stream 1 Transfer Complete Flag */
511 #define LL_MDMA_REQ_DMA2_STREAM2_TC 0x0000000AU /*!< MDMA HW Trigger (request) is DMA2 Stream 2 Transfer Complete Flag */
512 #define LL_MDMA_REQ_DMA2_STREAM3_TC 0x0000000BU /*!< MDMA HW Trigger (request) is DMA2 Stream 3 Transfer Complete Flag */
513 #define LL_MDMA_REQ_DMA2_STREAM4_TC 0x0000000CU /*!< MDMA HW Trigger (request) is DMA2 Stream 4 Transfer Complete Flag */
514 #define LL_MDMA_REQ_DMA2_STREAM5_TC 0x0000000DU /*!< MDMA HW Trigger (request) is DMA2 Stream 5 Transfer Complete Flag */
515 #define LL_MDMA_REQ_DMA2_STREAM6_TC 0x0000000EU /*!< MDMA HW Trigger (request) is DMA2 Stream 6 Transfer Complete Flag */
516 #define LL_MDMA_REQ_DMA2_STREAM7_TC 0x0000000FU /*!< MDMA HW Trigger (request) is DMA2 Stream 7 Transfer Complete Flag */
517 #if defined (LTDC)
518 #define LL_MDMA_REQ_LTDC_LINE_IT 0x00000010U /*!< MDMA HW Trigger (request) is LTDC Line interrupt Flag */
519 #endif /* LTDC */
520 #if defined (JPEG)
521 #define LL_MDMA_REQ_JPEG_INFIFO_TH 0x00000011U /*!< MDMA HW Trigger (request) is JPEG Input FIFO threshold Flag */
522 #define LL_MDMA_REQ_JPEG_INFIFO_NF 0x00000012U /*!< MDMA HW Trigger (request) is JPEG Input FIFO not full Flag */
523 #define LL_MDMA_REQ_JPEG_OUTFIFO_TH 0x00000013U /*!< MDMA HW Trigger (request) is JPEG Output FIFO threshold Flag */
524 #define LL_MDMA_REQ_JPEG_OUTFIFO_NE 0x00000014U /*!< MDMA HW Trigger (request) is JPEG Output FIFO not empty Flag */
525 #define LL_MDMA_REQ_JPEG_END_CONVERSION 0x00000015U /*!< MDMA HW Trigger (request) is JPEG End of conversion Flag */
526 #endif /* JPEG */
527 #if defined (QUADSPI)
528 #define LL_MDMA_REQ_QUADSPI_FIFO_TH 0x00000016U /*!< MDMA HW Trigger (request) is QSPI FIFO threshold Flag */
529 #define LL_MDMA_REQ_QUADSPI_TC 0x00000017U /*!< MDMA HW Trigger (request) is QSPI Transfer complete Flag */
530 #endif /* QUADSPI */
531 #if defined (OCTOSPI1)
532 #define LL_MDMA_REQ_OCTOSPI1_FIFO_TH 0x00000016U /*!< MDMA HW Trigger (request) is OCTOSPI1 FIFO threshold Flag */
533 #define LL_MDMA_REQ_OCTOSPI1_TC 0x00000017U /*!< MDMA HW Trigger (request) is OCTOSPI1 Transfer complete Flag */
534 #endif /* OCTOSPI1 */
535 #define LL_MDMA_REQ_DMA2D_CLUT_TC 0x00000018U /*!< MDMA HW Trigger (request) is DMA2D CLUT Transfer Complete Flag */
536 #define LL_MDMA_REQ_DMA2D_TC 0x00000019U /*!< MDMA HW Trigger (request) is DMA2D Transfer Complete Flag */
537 #define LL_MDMA_REQ_DMA2D_TW 0x0000001AU /*!< MDMA HW Trigger (request) is DMA2D Transfer Watermark Flag */
538 #if defined (DSI)
539 #define LL_MDMA_REQ_DSI_TEARING_EFFECT 0x0000001BU /*!< MDMA HW Trigger (request) is DSI Tearing Effect Flag */
540 #define LL_MDMA_REQ_DSI_END_REFRESH 0x0000001CU /*!< MDMA HW Trigger (request) is DSI End of refresh Flag */
541 #endif /* DSI */
542 #define LL_MDMA_REQ_SDMMC1_END_DATA 0x0000001DU /*!< MDMA HW Trigger (request) is SDMMC1 End of Data Flag */
543 #define LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER 0x0000001EU /*!< MDMA HW Trigger (request) is SDMMC1 Internal DMA buffer End Flag : This trigger is available starting from STM32H7 Rev.B devices */
544 #define LL_MDMA_REQ_SDMMC1_COMMAND_END 0x0000001FU /*!< MDMA HW Trigger (request) is SDMMC1 Command End Flag : This trigger is available starting from STM32H7 Rev.B devices */
545 #if defined (OCTOSPI2)
546 #define LL_MDMA_REQ_OCTOSPI2_FIFO_TH 0x00000020U /*!< MDMA HW Trigger (request) is OCTOSPI2 FIFO threshold Flag */
547 #define LL_MDMA_REQ_OCTOSPI2_TC 0x00000021U /*!< MDMA HW Trigger (request) is OCTOSPI2 Transfer complete Flag */
548 #endif /* OCTOSPI2 */
549 /**
550 * @}
551 */
552
553 /** @defgroup MDMA_LL_EC_XFER_ERROR_DIRECTION Transfer Error Direction
554 * @{
555 */
556 #define LL_MDMA_READ_ERROR 0x00000000U /*!< Last transfer error on the channel was a related to a read access */
557 #define LL_MDMA_WRITE_ERROR MDMA_CESR_TED /*!< Last transfer error on the channel was a related to a write access */
558 /**
559 * @}
560 */
561
562 /**
563 * @}
564 */
565
566 /* Exported macro ------------------------------------------------------------*/
567 /** @defgroup MDMA_LL_Exported_Macros MDMA Exported Macros
568 * @{
569 */
570
571 /** @defgroup MDMA_LL_EM_WRITE_READ Common Write and read registers macros
572 * @{
573 */
574 /**
575 * @brief Write a value in MDMA register
576 * @param __INSTANCE__ MDMA Instance
577 * @param __REG__ Register to be written
578 * @param __VALUE__ Value to be written in the register
579 * @retval None
580 */
581 #define LL_MDMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
582
583 /**
584 * @brief Read a value in MDMA register
585 * @param __INSTANCE__ MDMA Instance
586 * @param __REG__ Register to be read
587 * @retval Register value
588 */
589 #define LL_MDMA_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
590 /**
591 * @}
592 */
593
594 /** @defgroup MDMA_LL_EM_CONVERT_DMAxCHANNELy Convert MDMAxChannely
595 * @{
596 */
597 /**
598 * @brief Convert MDMAx_Channely into MDMAx
599 * @param __CHANNEL_INSTANCE__ MDMAx_Channely
600 * @retval MDMAx
601 */
602 #define LL_MDMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (MDMA)
603
604 /**
605 * @brief Convert MDMAx_Channely into LL_MDMA_CHANNEL_y
606 * @param __CHANNEL_INSTANCE__ MDMAx_Channely
607 * @retval LL_MDMA_CHANNEL_y
608 */
609 #define LL_MDMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
610 (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel0 )) ? LL_MDMA_CHANNEL_0 : \
611 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel1 )) ? LL_MDMA_CHANNEL_1 : \
612 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel2 )) ? LL_MDMA_CHANNEL_2 : \
613 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel3 )) ? LL_MDMA_CHANNEL_3 : \
614 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel4 )) ? LL_MDMA_CHANNEL_4 : \
615 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel5 )) ? LL_MDMA_CHANNEL_5 : \
616 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel6 )) ? LL_MDMA_CHANNEL_6 : \
617 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel7 )) ? LL_MDMA_CHANNEL_7 : \
618 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel8 )) ? LL_MDMA_CHANNEL_8 : \
619 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel9 )) ? LL_MDMA_CHANNEL_9 : \
620 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel10)) ? LL_MDMA_CHANNEL_10 : \
621 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel11)) ? LL_MDMA_CHANNEL_11 : \
622 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel12)) ? LL_MDMA_CHANNEL_12 : \
623 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel13)) ? LL_MDMA_CHANNEL_13 : \
624 ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)MDMA_Channel14)) ? LL_MDMA_CHANNEL_14 : \
625 LL_MDMA_CHANNEL_15)
626
627 /**
628 * @brief Convert MDMA Instance MDMAx and LL_MDMA_CHANNEL_y into MDMAx_Channely
629 * @param __MDMA_INSTANCE__ MDMAx
630 * @param __CHANNEL__ LL_MDMA_CHANNEL_y
631 * @retval MDMAx_Channely
632 */
633 #define LL_MDMA_GET_CHANNEL_INSTANCE(__MDMA_INSTANCE__, __CHANNEL__) \
634 (((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_0 )) ? MDMA_Channel0 : \
635 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_1 )) ? MDMA_Channel1 : \
636 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_2 )) ? MDMA_Channel2 : \
637 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_3 )) ? MDMA_Channel3 : \
638 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_4 )) ? MDMA_Channel4 : \
639 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_5 )) ? MDMA_Channel5 : \
640 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_6 )) ? MDMA_Channel6 : \
641 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_7 )) ? MDMA_Channel7 : \
642 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_8 )) ? MDMA_Channel8 : \
643 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_9 )) ? MDMA_Channel9 : \
644 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_10)) ? MDMA_Channel10 : \
645 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_11)) ? MDMA_Channel11 : \
646 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_12)) ? MDMA_Channel12 : \
647 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_13)) ? MDMA_Channel13 : \
648 ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_MDMA_CHANNEL_14)) ? MDMA_Channel14 : \
649 MDMA_Channel15)
650
651 /**
652 * @}
653 */
654
655 /**
656 * @}
657 */
658
659
660 /* Exported functions --------------------------------------------------------*/
661 /** @defgroup MDMA_LL_Exported_Functions MDMA Exported Functions
662 * @{
663 */
664
665 /** @defgroup MDMA_LL_EF_Configuration Configuration
666 * @{
667 */
668 /**
669 * @brief Enable MDMA channel.
670 * @rmtoll CCR EN LL_MDMA_EnableChannel
671 * @param MDMAx MDMAx Instance
672 * @param Channel This parameter can be one of the following values:
673 * @arg @ref LL_MDMA_CHANNEL_0
674 * @arg @ref LL_MDMA_CHANNEL_1
675 * @arg @ref LL_MDMA_CHANNEL_2
676 * @arg @ref LL_MDMA_CHANNEL_3
677 * @arg @ref LL_MDMA_CHANNEL_4
678 * @arg @ref LL_MDMA_CHANNEL_5
679 * @arg @ref LL_MDMA_CHANNEL_6
680 * @arg @ref LL_MDMA_CHANNEL_7
681 * @arg @ref LL_MDMA_CHANNEL_8
682 * @arg @ref LL_MDMA_CHANNEL_9
683 * @arg @ref LL_MDMA_CHANNEL_10
684 * @arg @ref LL_MDMA_CHANNEL_11
685 * @arg @ref LL_MDMA_CHANNEL_12
686 * @arg @ref LL_MDMA_CHANNEL_13
687 * @arg @ref LL_MDMA_CHANNEL_14
688 * @arg @ref LL_MDMA_CHANNEL_15
689 * @retval None
690 */
LL_MDMA_EnableChannel(MDMA_TypeDef * MDMAx,uint32_t Channel)691 __STATIC_INLINE void LL_MDMA_EnableChannel(MDMA_TypeDef *MDMAx, uint32_t Channel)
692 {
693 uint32_t mdma_base_addr = (uint32_t)MDMAx;
694
695 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN);
696 }
697
698 /**
699 * @brief Disable MDMA channel.
700 * @rmtoll CCR EN LL_MDMA_DisableChannel
701 * @param MDMAx MDMAx Instance
702 * @param Channel This parameter can be one of the following values:
703 * @arg @ref LL_MDMA_CHANNEL_0
704 * @arg @ref LL_MDMA_CHANNEL_1
705 * @arg @ref LL_MDMA_CHANNEL_2
706 * @arg @ref LL_MDMA_CHANNEL_3
707 * @arg @ref LL_MDMA_CHANNEL_4
708 * @arg @ref LL_MDMA_CHANNEL_5
709 * @arg @ref LL_MDMA_CHANNEL_6
710 * @arg @ref LL_MDMA_CHANNEL_7
711 * @arg @ref LL_MDMA_CHANNEL_8
712 * @arg @ref LL_MDMA_CHANNEL_9
713 * @arg @ref LL_MDMA_CHANNEL_10
714 * @arg @ref LL_MDMA_CHANNEL_11
715 * @arg @ref LL_MDMA_CHANNEL_12
716 * @arg @ref LL_MDMA_CHANNEL_13
717 * @arg @ref LL_MDMA_CHANNEL_14
718 * @arg @ref LL_MDMA_CHANNEL_15
719 * @retval None
720 */
LL_MDMA_DisableChannel(MDMA_TypeDef * MDMAx,uint32_t Channel)721 __STATIC_INLINE void LL_MDMA_DisableChannel(MDMA_TypeDef *MDMAx, uint32_t Channel)
722 {
723 uint32_t mdma_base_addr = (uint32_t)MDMAx;
724
725 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN);
726 }
727
728 /**
729 * @brief Check if MDMA channel is enabled or disabled.
730 * @rmtoll CCR EN LL_MDMA_IsEnabledChannel
731 * @param MDMAx MDMAx Instance
732 * @param Channel This parameter can be one of the following values:
733 * @arg @ref LL_MDMA_CHANNEL_0
734 * @arg @ref LL_MDMA_CHANNEL_1
735 * @arg @ref LL_MDMA_CHANNEL_2
736 * @arg @ref LL_MDMA_CHANNEL_3
737 * @arg @ref LL_MDMA_CHANNEL_4
738 * @arg @ref LL_MDMA_CHANNEL_5
739 * @arg @ref LL_MDMA_CHANNEL_6
740 * @arg @ref LL_MDMA_CHANNEL_7
741 * @arg @ref LL_MDMA_CHANNEL_8
742 * @arg @ref LL_MDMA_CHANNEL_9
743 * @arg @ref LL_MDMA_CHANNEL_10
744 * @arg @ref LL_MDMA_CHANNEL_11
745 * @arg @ref LL_MDMA_CHANNEL_12
746 * @arg @ref LL_MDMA_CHANNEL_13
747 * @arg @ref LL_MDMA_CHANNEL_14
748 * @arg @ref LL_MDMA_CHANNEL_15
749 * @retval State of bit (1 or 0).
750 */
LL_MDMA_IsEnabledChannel(MDMA_TypeDef * MDMAx,uint32_t Channel)751 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledChannel(MDMA_TypeDef *MDMAx, uint32_t Channel)
752 {
753 uint32_t mdma_base_addr = (uint32_t)MDMAx;
754
755 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_EN) == (MDMA_CCR_EN)) ? 1UL : 0UL);
756 }
757
758 /**
759 * @brief Generate a SW transfer request on the MDMA channel.
760 * @rmtoll CCR SWRQ LL_MDMA_GenerateSWRequest
761 * @param MDMAx MDMAx Instance
762 * @param Channel This parameter can be one of the following values:
763 * @arg @ref LL_MDMA_CHANNEL_0
764 * @arg @ref LL_MDMA_CHANNEL_1
765 * @arg @ref LL_MDMA_CHANNEL_2
766 * @arg @ref LL_MDMA_CHANNEL_3
767 * @arg @ref LL_MDMA_CHANNEL_4
768 * @arg @ref LL_MDMA_CHANNEL_5
769 * @arg @ref LL_MDMA_CHANNEL_6
770 * @arg @ref LL_MDMA_CHANNEL_7
771 * @arg @ref LL_MDMA_CHANNEL_8
772 * @arg @ref LL_MDMA_CHANNEL_9
773 * @arg @ref LL_MDMA_CHANNEL_10
774 * @arg @ref LL_MDMA_CHANNEL_11
775 * @arg @ref LL_MDMA_CHANNEL_12
776 * @arg @ref LL_MDMA_CHANNEL_13
777 * @arg @ref LL_MDMA_CHANNEL_14
778 * @arg @ref LL_MDMA_CHANNEL_15
779 * @retval None
780 */
LL_MDMA_GenerateSWRequest(MDMA_TypeDef * MDMAx,uint32_t Channel)781 __STATIC_INLINE void LL_MDMA_GenerateSWRequest(MDMA_TypeDef *MDMAx, uint32_t Channel)
782 {
783 uint32_t mdma_base_addr = (uint32_t)MDMAx;
784
785 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_SWRQ);
786 }
787
788 /**
789 * @brief Configure Transfer endianness parameters : Word, Half word and Bytes Endianness.
790 * @rmtoll CCR WEX LL_MDMA_ConfigXferEndianness\n
791 * @rmtoll CCR HEX LL_MDMA_ConfigXferEndianness\n
792 * @rmtoll CCR BEX LL_MDMA_ConfigXferEndianness
793 * @param MDMAx MDMAx Instance
794 * @param Channel This parameter can be one of the following values:
795 * @arg @ref LL_MDMA_CHANNEL_0
796 * @arg @ref LL_MDMA_CHANNEL_1
797 * @arg @ref LL_MDMA_CHANNEL_2
798 * @arg @ref LL_MDMA_CHANNEL_3
799 * @arg @ref LL_MDMA_CHANNEL_4
800 * @arg @ref LL_MDMA_CHANNEL_5
801 * @arg @ref LL_MDMA_CHANNEL_6
802 * @arg @ref LL_MDMA_CHANNEL_7
803 * @arg @ref LL_MDMA_CHANNEL_8
804 * @arg @ref LL_MDMA_CHANNEL_9
805 * @arg @ref LL_MDMA_CHANNEL_10
806 * @arg @ref LL_MDMA_CHANNEL_11
807 * @arg @ref LL_MDMA_CHANNEL_12
808 * @arg @ref LL_MDMA_CHANNEL_13
809 * @arg @ref LL_MDMA_CHANNEL_14
810 * @arg @ref LL_MDMA_CHANNEL_15
811 * @param Configuration This parameter must be a combination of all the following values:
812 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE or @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE
813 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE or @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE
814 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE or @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE
815 * @retval None
816 */
LL_MDMA_ConfigXferEndianness(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Configuration)817 __STATIC_INLINE void LL_MDMA_ConfigXferEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration)
818 {
819 uint32_t mdma_base_addr = (uint32_t)MDMAx;
820
821 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR,
822 MDMA_CCR_WEX | MDMA_CCR_HEX | MDMA_CCR_BEX, Configuration);
823 }
824
825 /**
826 * @brief Set Words Endianness.
827 * @rmtoll CCR WEX LL_MDMA_SetWordEndianness
828 * @param MDMAx MDMAx Instance
829 * @param Channel This parameter can be one of the following values:
830 * @arg @ref LL_MDMA_CHANNEL_0
831 * @arg @ref LL_MDMA_CHANNEL_1
832 * @arg @ref LL_MDMA_CHANNEL_2
833 * @arg @ref LL_MDMA_CHANNEL_3
834 * @arg @ref LL_MDMA_CHANNEL_4
835 * @arg @ref LL_MDMA_CHANNEL_5
836 * @arg @ref LL_MDMA_CHANNEL_6
837 * @arg @ref LL_MDMA_CHANNEL_7
838 * @arg @ref LL_MDMA_CHANNEL_8
839 * @arg @ref LL_MDMA_CHANNEL_9
840 * @arg @ref LL_MDMA_CHANNEL_10
841 * @arg @ref LL_MDMA_CHANNEL_11
842 * @arg @ref LL_MDMA_CHANNEL_12
843 * @arg @ref LL_MDMA_CHANNEL_13
844 * @arg @ref LL_MDMA_CHANNEL_14
845 * @arg @ref LL_MDMA_CHANNEL_15
846 * @param Endianness This parameter can be one of the following values:
847 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE
848 * @arg @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE
849 * @retval None
850 */
LL_MDMA_SetWordEndianness(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Endianness)851 __STATIC_INLINE void LL_MDMA_SetWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness)
852 {
853 uint32_t mdma_base_addr = (uint32_t)MDMAx;
854
855 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_WEX, Endianness);
856 }
857
858 /**
859 * @brief Get Words Endianness.
860 * @rmtoll CCR WEX LL_MDMA_GetWordEndianness
861 * @param MDMAx MDMAx Instance
862 * @param Channel This parameter can be one of the following values:
863 * @arg @ref LL_MDMA_CHANNEL_0
864 * @arg @ref LL_MDMA_CHANNEL_1
865 * @arg @ref LL_MDMA_CHANNEL_2
866 * @arg @ref LL_MDMA_CHANNEL_3
867 * @arg @ref LL_MDMA_CHANNEL_4
868 * @arg @ref LL_MDMA_CHANNEL_5
869 * @arg @ref LL_MDMA_CHANNEL_6
870 * @arg @ref LL_MDMA_CHANNEL_7
871 * @arg @ref LL_MDMA_CHANNEL_8
872 * @arg @ref LL_MDMA_CHANNEL_9
873 * @arg @ref LL_MDMA_CHANNEL_10
874 * @arg @ref LL_MDMA_CHANNEL_11
875 * @arg @ref LL_MDMA_CHANNEL_12
876 * @arg @ref LL_MDMA_CHANNEL_13
877 * @arg @ref LL_MDMA_CHANNEL_14
878 * @arg @ref LL_MDMA_CHANNEL_15
879 * @retval Returned value can be one of the following values:
880 * @arg @ref LL_MDMA_WORD_ENDIANNESS_PRESERVE
881 * @arg @ref LL_MDMA_WORD_ENDIANNESS_EXCHANGE
882 * @retval None
883 */
LL_MDMA_GetWordEndianness(MDMA_TypeDef * MDMAx,uint32_t Channel)884 __STATIC_INLINE uint32_t LL_MDMA_GetWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel)
885 {
886 uint32_t mdma_base_addr = (uint32_t)MDMAx;
887
888 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_WEX));
889 }
890
891 /**
892 * @brief Set Half Words Endianness.
893 * @rmtoll CCR HEX LL_MDMA_SetHalfWordEndianness
894 * @param MDMAx MDMAx Instance
895 * @param Channel This parameter can be one of the following values:
896 * @arg @ref LL_MDMA_CHANNEL_0
897 * @arg @ref LL_MDMA_CHANNEL_1
898 * @arg @ref LL_MDMA_CHANNEL_2
899 * @arg @ref LL_MDMA_CHANNEL_3
900 * @arg @ref LL_MDMA_CHANNEL_4
901 * @arg @ref LL_MDMA_CHANNEL_5
902 * @arg @ref LL_MDMA_CHANNEL_6
903 * @arg @ref LL_MDMA_CHANNEL_7
904 * @arg @ref LL_MDMA_CHANNEL_8
905 * @arg @ref LL_MDMA_CHANNEL_9
906 * @arg @ref LL_MDMA_CHANNEL_10
907 * @arg @ref LL_MDMA_CHANNEL_11
908 * @arg @ref LL_MDMA_CHANNEL_12
909 * @arg @ref LL_MDMA_CHANNEL_13
910 * @arg @ref LL_MDMA_CHANNEL_14
911 * @arg @ref LL_MDMA_CHANNEL_15
912 * @param Endianness This parameter can be one of the following values:
913 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE
914 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE
915 * @retval None
916 */
LL_MDMA_SetHalfWordEndianness(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Endianness)917 __STATIC_INLINE void LL_MDMA_SetHalfWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness)
918 {
919 uint32_t mdma_base_addr = (uint32_t)MDMAx;
920
921 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_HEX, Endianness);
922 }
923
924 /**
925 * @brief Get Half Words Endianness.
926 * @rmtoll CCR HEX LL_MDMA_GetHalfWordEndianness
927 * @param MDMAx MDMAx Instance
928 * @param Channel This parameter can be one of the following values:
929 * @arg @ref LL_MDMA_CHANNEL_0
930 * @arg @ref LL_MDMA_CHANNEL_1
931 * @arg @ref LL_MDMA_CHANNEL_2
932 * @arg @ref LL_MDMA_CHANNEL_3
933 * @arg @ref LL_MDMA_CHANNEL_4
934 * @arg @ref LL_MDMA_CHANNEL_5
935 * @arg @ref LL_MDMA_CHANNEL_6
936 * @arg @ref LL_MDMA_CHANNEL_7
937 * @arg @ref LL_MDMA_CHANNEL_8
938 * @arg @ref LL_MDMA_CHANNEL_9
939 * @arg @ref LL_MDMA_CHANNEL_10
940 * @arg @ref LL_MDMA_CHANNEL_11
941 * @arg @ref LL_MDMA_CHANNEL_12
942 * @arg @ref LL_MDMA_CHANNEL_13
943 * @arg @ref LL_MDMA_CHANNEL_14
944 * @arg @ref LL_MDMA_CHANNEL_15
945 * @retval Returned value can be one of the following values:
946 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_PRESERVE
947 * @arg @ref LL_MDMA_HALFWORD_ENDIANNESS_EXCHANGE
948 * @retval None
949 */
LL_MDMA_GetHalfWordEndianness(MDMA_TypeDef * MDMAx,uint32_t Channel)950 __STATIC_INLINE uint32_t LL_MDMA_GetHalfWordEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel)
951 {
952 uint32_t mdma_base_addr = (uint32_t)MDMAx;
953
954 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_HEX));
955 }
956
957 /**
958 * @brief Set Bytes Endianness.
959 * @rmtoll CCR BEX LL_MDMA_SetByteEndianness
960 * @param MDMAx MDMAx Instance
961 * @param Channel This parameter can be one of the following values:
962 * @arg @ref LL_MDMA_CHANNEL_0
963 * @arg @ref LL_MDMA_CHANNEL_1
964 * @arg @ref LL_MDMA_CHANNEL_2
965 * @arg @ref LL_MDMA_CHANNEL_3
966 * @arg @ref LL_MDMA_CHANNEL_4
967 * @arg @ref LL_MDMA_CHANNEL_5
968 * @arg @ref LL_MDMA_CHANNEL_6
969 * @arg @ref LL_MDMA_CHANNEL_7
970 * @arg @ref LL_MDMA_CHANNEL_8
971 * @arg @ref LL_MDMA_CHANNEL_9
972 * @arg @ref LL_MDMA_CHANNEL_10
973 * @arg @ref LL_MDMA_CHANNEL_11
974 * @arg @ref LL_MDMA_CHANNEL_12
975 * @arg @ref LL_MDMA_CHANNEL_13
976 * @arg @ref LL_MDMA_CHANNEL_14
977 * @arg @ref LL_MDMA_CHANNEL_15
978 * @param Endianness This parameter can be one of the following values:
979 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE
980 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE
981 * @retval None
982 */
LL_MDMA_SetByteEndianness(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Endianness)983 __STATIC_INLINE void LL_MDMA_SetByteEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Endianness)
984 {
985 uint32_t mdma_base_addr = (uint32_t)MDMAx;
986
987 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_BEX, Endianness);
988 }
989
990 /**
991 * @brief Get Bytes Endianness.
992 * @rmtoll CCR BEX LL_MDMA_GetByteEndianness
993 * @param MDMAx MDMAx Instance
994 * @param Channel This parameter can be one of the following values:
995 * @arg @ref LL_MDMA_CHANNEL_0
996 * @arg @ref LL_MDMA_CHANNEL_1
997 * @arg @ref LL_MDMA_CHANNEL_2
998 * @arg @ref LL_MDMA_CHANNEL_3
999 * @arg @ref LL_MDMA_CHANNEL_4
1000 * @arg @ref LL_MDMA_CHANNEL_5
1001 * @arg @ref LL_MDMA_CHANNEL_6
1002 * @arg @ref LL_MDMA_CHANNEL_7
1003 * @arg @ref LL_MDMA_CHANNEL_8
1004 * @arg @ref LL_MDMA_CHANNEL_9
1005 * @arg @ref LL_MDMA_CHANNEL_10
1006 * @arg @ref LL_MDMA_CHANNEL_11
1007 * @arg @ref LL_MDMA_CHANNEL_12
1008 * @arg @ref LL_MDMA_CHANNEL_13
1009 * @arg @ref LL_MDMA_CHANNEL_14
1010 * @arg @ref LL_MDMA_CHANNEL_15
1011 * @retval Returned value can be one of the following values:
1012 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_PRESERVE
1013 * @arg @ref LL_MDMA_BYTE_ENDIANNESS_EXCHANGE
1014 * @retval None
1015 */
LL_MDMA_GetByteEndianness(MDMA_TypeDef * MDMAx,uint32_t Channel)1016 __STATIC_INLINE uint32_t LL_MDMA_GetByteEndianness(MDMA_TypeDef *MDMAx, uint32_t Channel)
1017 {
1018 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1019
1020 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_BEX));
1021 }
1022
1023 /**
1024 * @brief Set Channel priority level.
1025 * @rmtoll CCR PL LL_MDMA_SetChannelPriorityLevel
1026 * @param MDMAx MDMAx Instance
1027 * @param Channel This parameter can be one of the following values:
1028 * @arg @ref LL_MDMA_CHANNEL_0
1029 * @arg @ref LL_MDMA_CHANNEL_1
1030 * @arg @ref LL_MDMA_CHANNEL_2
1031 * @arg @ref LL_MDMA_CHANNEL_3
1032 * @arg @ref LL_MDMA_CHANNEL_4
1033 * @arg @ref LL_MDMA_CHANNEL_5
1034 * @arg @ref LL_MDMA_CHANNEL_6
1035 * @arg @ref LL_MDMA_CHANNEL_7
1036 * @arg @ref LL_MDMA_CHANNEL_8
1037 * @arg @ref LL_MDMA_CHANNEL_9
1038 * @arg @ref LL_MDMA_CHANNEL_10
1039 * @arg @ref LL_MDMA_CHANNEL_11
1040 * @arg @ref LL_MDMA_CHANNEL_12
1041 * @arg @ref LL_MDMA_CHANNEL_13
1042 * @arg @ref LL_MDMA_CHANNEL_14
1043 * @arg @ref LL_MDMA_CHANNEL_15
1044 * @param Priority This parameter can be one of the following values:
1045 * @arg @ref LL_MDMA_PRIORITY_LOW
1046 * @arg @ref LL_MDMA_PRIORITY_MEDIUM
1047 * @arg @ref LL_MDMA_PRIORITY_HIGH
1048 * @arg @ref LL_MDMA_PRIORITY_VERYHIGH
1049 * @retval None
1050 */
LL_MDMA_SetChannelPriorityLevel(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Priority)1051 __STATIC_INLINE void LL_MDMA_SetChannelPriorityLevel(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Priority)
1052 {
1053 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1054
1055 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_PL, Priority);
1056 }
1057
1058 /**
1059 * @brief Get Channel priority level.
1060 * @rmtoll CCR PL LL_MDMA_GetChannelPriorityLevel
1061 * @param MDMAx MDMAx Instance
1062 * @param Channel This parameter can be one of the following values:
1063 * @arg @ref LL_MDMA_CHANNEL_0
1064 * @arg @ref LL_MDMA_CHANNEL_1
1065 * @arg @ref LL_MDMA_CHANNEL_2
1066 * @arg @ref LL_MDMA_CHANNEL_3
1067 * @arg @ref LL_MDMA_CHANNEL_4
1068 * @arg @ref LL_MDMA_CHANNEL_5
1069 * @arg @ref LL_MDMA_CHANNEL_6
1070 * @arg @ref LL_MDMA_CHANNEL_7
1071 * @arg @ref LL_MDMA_CHANNEL_8
1072 * @arg @ref LL_MDMA_CHANNEL_9
1073 * @arg @ref LL_MDMA_CHANNEL_10
1074 * @arg @ref LL_MDMA_CHANNEL_11
1075 * @arg @ref LL_MDMA_CHANNEL_12
1076 * @arg @ref LL_MDMA_CHANNEL_13
1077 * @arg @ref LL_MDMA_CHANNEL_14
1078 * @arg @ref LL_MDMA_CHANNEL_15
1079 * @retval Returned value can be one of the following values:
1080 * @arg @ref LL_MDMA_PRIORITY_LOW
1081 * @arg @ref LL_MDMA_PRIORITY_MEDIUM
1082 * @arg @ref LL_MDMA_PRIORITY_HIGH
1083 * @arg @ref LL_MDMA_PRIORITY_VERYHIGH
1084 * @retval None
1085 */
LL_MDMA_GetChannelPriorityLevel(MDMA_TypeDef * MDMAx,uint32_t Channel)1086 __STATIC_INLINE uint32_t LL_MDMA_GetChannelPriorityLevel(MDMA_TypeDef *MDMAx, uint32_t Channel)
1087 {
1088 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1089
1090 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR, MDMA_CCR_PL));
1091 }
1092
1093 /**
1094 * @brief Configure MDMA transfer parameters.
1095 * @rmtoll CTCR BWM LL_MDMA_ConfigTransfer\n
1096 * @rmtoll CTCR SWRM LL_MDMA_ConfigTransfer\n
1097 * @rmtoll CTCR TRGM LL_MDMA_ConfigTransfer\n
1098 * @rmtoll CTCR PAM LL_MDMA_ConfigTransfer\n
1099 * @rmtoll CTCR PKE LL_MDMA_ConfigTransfer\n
1100 * @rmtoll CTCR TLEN LL_MDMA_ConfigTransfer\n
1101 * @rmtoll CTCR DBURST LL_MDMA_ConfigTransfer\n
1102 * @rmtoll CTCR SBURST LL_MDMA_ConfigTransfer\n
1103 * @rmtoll CTCR DINCOS LL_MDMA_ConfigTransfer\n
1104 * @rmtoll CTCR SINCOS LL_MDMA_ConfigTransfer\n
1105 * @rmtoll CTCR DSIZE LL_MDMA_ConfigTransfer\n
1106 * @rmtoll CTCR SSIZE LL_MDMA_ConfigTransfer\n
1107 * @rmtoll CTCR DINC LL_MDMA_ConfigTransfer\n
1108 * @rmtoll CTCR SINC LL_MDMA_ConfigTransfer
1109 * @param MDMAx MDMAx Instance
1110 * @param Channel This parameter can be one of the following values:
1111 * @arg @ref LL_MDMA_CHANNEL_0
1112 * @arg @ref LL_MDMA_CHANNEL_1
1113 * @arg @ref LL_MDMA_CHANNEL_2
1114 * @arg @ref LL_MDMA_CHANNEL_3
1115 * @arg @ref LL_MDMA_CHANNEL_4
1116 * @arg @ref LL_MDMA_CHANNEL_5
1117 * @arg @ref LL_MDMA_CHANNEL_6
1118 * @arg @ref LL_MDMA_CHANNEL_7
1119 * @arg @ref LL_MDMA_CHANNEL_8
1120 * @arg @ref LL_MDMA_CHANNEL_9
1121 * @arg @ref LL_MDMA_CHANNEL_10
1122 * @arg @ref LL_MDMA_CHANNEL_11
1123 * @arg @ref LL_MDMA_CHANNEL_12
1124 * @arg @ref LL_MDMA_CHANNEL_13
1125 * @arg @ref LL_MDMA_CHANNEL_14
1126 * @arg @ref LL_MDMA_CHANNEL_15
1127 * @param Configuration This parameter must be a combination of all the following values:
1128 * @arg @ref LL_MDMA_BUFF_WRITE_DISABLE or @ref LL_MDMA_BUFF_WRITE_ENABLE
1129 * @arg @ref LL_MDMA_REQUEST_MODE_HW or @ref LL_MDMA_REQUEST_MODE_SW
1130 * @arg @ref LL_MDMA_BUFFER_TRANSFER or @ref LL_MDMA_BLOCK_TRANSFER or @ref LL_MDMA_REPEAT_BLOCK_TRANSFER or @ref LL_MDMA_FULL_TRANSFER
1131 * @arg @ref LL_MDMA_DATAALIGN_RIGHT or @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED or @ref LL_MDMA_DATAALIGN_LEFT
1132 * @arg @ref LL_MDMA_PACK_DISABLE or @ref LL_MDMA_PACK_ENABLE
1133 * @arg @ref LL_MDMA_DEST_BURST_SINGLE or @ref LL_MDMA_DEST_BURST_2BEATS or @ref LL_MDMA_DEST_BURST_4BEATS or @ref LL_MDMA_DEST_BURST_8BEATS
1134 * or @ref LL_MDMA_DEST_BURST_16BEATS or @ref LL_MDMA_DEST_BURST_32BEATS or @ref LL_MDMA_DEST_BURST_64BEATS or @ref LL_MDMA_DEST_BURST_128BEATS
1135 * @arg @ref LL_MDMA_SRC_BURST_SINGLE or @ref LL_MDMA_SRC_BURST_2BEATS or @ref LL_MDMA_SRC_BURST_4BEATS or @ref LL_MDMA_SRC_BURST_8BEATS
1136 * or @ref LL_MDMA_SRC_BURST_16BEATS or @ref LL_MDMA_SRC_BURST_32BEATS or @ref LL_MDMA_SRC_BURST_64BEATS or @ref LL_MDMA_SRC_BURST_128BEATS
1137 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE or @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD or @ref LL_MDMA_DEST_INC_OFFSET_WORD or @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD
1138 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE or @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD or @ref LL_MDMA_SRC_INC_OFFSET_WORD or @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD
1139 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE or @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD or @ref LL_MDMA_DEST_DATA_SIZE_WORD or @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD
1140 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE or @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD or @ref LL_MDMA_SRC_DATA_SIZE_WORD or @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD
1141 * @arg @ref LL_MDMA_DEST_FIXED or @ref LL_MDMA_DEST_INCREMENT or @ref LL_MDMA_DEST_DECREMENT
1142 * @arg @ref LL_MDMA_SRC_FIXED or @ref LL_MDMA_SRC_INCREMENT or @ref LL_MDMA_SRC_DECREMENT
1143 * @param BufferXferLength This parameter can be a value Between 0 to 0x0000007F
1144 * @retval None
1145 */
LL_MDMA_ConfigTransfer(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Configuration,uint32_t BufferXferLength)1146 __STATIC_INLINE void LL_MDMA_ConfigTransfer(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration, uint32_t BufferXferLength)
1147 {
1148 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1149
1150 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR,
1151 Configuration | ((BufferXferLength << MDMA_CTCR_TLEN_Pos) & MDMA_CTCR_TLEN_Msk));
1152 }
1153
1154 /**
1155 * @brief Enable Bufferable Write Mode.
1156 * @rmtoll CTCR BWM LL_MDMA_EnableBufferableWrMode
1157 * @param MDMAx MDMAx Instance
1158 * @param Channel This parameter can be one of the following values:
1159 * @arg @ref LL_MDMA_CHANNEL_0
1160 * @arg @ref LL_MDMA_CHANNEL_1
1161 * @arg @ref LL_MDMA_CHANNEL_2
1162 * @arg @ref LL_MDMA_CHANNEL_3
1163 * @arg @ref LL_MDMA_CHANNEL_4
1164 * @arg @ref LL_MDMA_CHANNEL_5
1165 * @arg @ref LL_MDMA_CHANNEL_6
1166 * @arg @ref LL_MDMA_CHANNEL_7
1167 * @arg @ref LL_MDMA_CHANNEL_8
1168 * @arg @ref LL_MDMA_CHANNEL_9
1169 * @arg @ref LL_MDMA_CHANNEL_10
1170 * @arg @ref LL_MDMA_CHANNEL_11
1171 * @arg @ref LL_MDMA_CHANNEL_12
1172 * @arg @ref LL_MDMA_CHANNEL_13
1173 * @arg @ref LL_MDMA_CHANNEL_14
1174 * @arg @ref LL_MDMA_CHANNEL_15
1175 * @retval None
1176 */
LL_MDMA_EnableBufferableWrMode(MDMA_TypeDef * MDMAx,uint32_t Channel)1177 __STATIC_INLINE void LL_MDMA_EnableBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1178 {
1179 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1180
1181 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM);
1182 }
1183
1184 /**
1185 * @brief Disable Bufferable Write Mode.
1186 * @rmtoll CTCR BWM LL_MDMA_DisableBufferableWrMode
1187 * @param MDMAx MDMAx Instance
1188 * @param Channel This parameter can be one of the following values:
1189 * @arg @ref LL_MDMA_CHANNEL_0
1190 * @arg @ref LL_MDMA_CHANNEL_1
1191 * @arg @ref LL_MDMA_CHANNEL_2
1192 * @arg @ref LL_MDMA_CHANNEL_3
1193 * @arg @ref LL_MDMA_CHANNEL_4
1194 * @arg @ref LL_MDMA_CHANNEL_5
1195 * @arg @ref LL_MDMA_CHANNEL_6
1196 * @arg @ref LL_MDMA_CHANNEL_7
1197 * @arg @ref LL_MDMA_CHANNEL_8
1198 * @arg @ref LL_MDMA_CHANNEL_9
1199 * @arg @ref LL_MDMA_CHANNEL_10
1200 * @arg @ref LL_MDMA_CHANNEL_11
1201 * @arg @ref LL_MDMA_CHANNEL_12
1202 * @arg @ref LL_MDMA_CHANNEL_13
1203 * @arg @ref LL_MDMA_CHANNEL_14
1204 * @arg @ref LL_MDMA_CHANNEL_15
1205 * @retval None
1206 */
LL_MDMA_DisableBufferableWrMode(MDMA_TypeDef * MDMAx,uint32_t Channel)1207 __STATIC_INLINE void LL_MDMA_DisableBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1208 {
1209 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1210
1211 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM);
1212 }
1213
1214 /**
1215 * @brief Check if Bufferable Write Mode is enabled or disabled.
1216 * @rmtoll CTCR BWM LL_MDMA_IsEnabledBufferableWrMode
1217 * @param MDMAx MDMAx Instance
1218 * @param Channel This parameter can be one of the following values:
1219 * @arg @ref LL_MDMA_CHANNEL_0
1220 * @arg @ref LL_MDMA_CHANNEL_1
1221 * @arg @ref LL_MDMA_CHANNEL_2
1222 * @arg @ref LL_MDMA_CHANNEL_3
1223 * @arg @ref LL_MDMA_CHANNEL_4
1224 * @arg @ref LL_MDMA_CHANNEL_5
1225 * @arg @ref LL_MDMA_CHANNEL_6
1226 * @arg @ref LL_MDMA_CHANNEL_7
1227 * @arg @ref LL_MDMA_CHANNEL_8
1228 * @arg @ref LL_MDMA_CHANNEL_9
1229 * @arg @ref LL_MDMA_CHANNEL_10
1230 * @arg @ref LL_MDMA_CHANNEL_11
1231 * @arg @ref LL_MDMA_CHANNEL_12
1232 * @arg @ref LL_MDMA_CHANNEL_13
1233 * @arg @ref LL_MDMA_CHANNEL_14
1234 * @arg @ref LL_MDMA_CHANNEL_15
1235 * @retval State of bit (1 or 0).
1236 */
LL_MDMA_IsEnabledBufferableWrMode(MDMA_TypeDef * MDMAx,uint32_t Channel)1237 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledBufferableWrMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1238 {
1239 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1240
1241 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_BWM) == (MDMA_CTCR_BWM)) ? 1UL : 0UL);
1242 }
1243
1244 /**
1245 * @brief Set Request Mode.
1246 * @rmtoll CTCR SWRM LL_MDMA_SetRequestMode
1247 * @param MDMAx MDMAx Instance
1248 * @param Channel This parameter can be one of the following values:
1249 * @arg @ref LL_MDMA_CHANNEL_0
1250 * @arg @ref LL_MDMA_CHANNEL_1
1251 * @arg @ref LL_MDMA_CHANNEL_2
1252 * @arg @ref LL_MDMA_CHANNEL_3
1253 * @arg @ref LL_MDMA_CHANNEL_4
1254 * @arg @ref LL_MDMA_CHANNEL_5
1255 * @arg @ref LL_MDMA_CHANNEL_6
1256 * @arg @ref LL_MDMA_CHANNEL_7
1257 * @arg @ref LL_MDMA_CHANNEL_8
1258 * @arg @ref LL_MDMA_CHANNEL_9
1259 * @arg @ref LL_MDMA_CHANNEL_10
1260 * @arg @ref LL_MDMA_CHANNEL_11
1261 * @arg @ref LL_MDMA_CHANNEL_12
1262 * @arg @ref LL_MDMA_CHANNEL_13
1263 * @arg @ref LL_MDMA_CHANNEL_14
1264 * @arg @ref LL_MDMA_CHANNEL_15
1265 * @param RequestMode This parameter can be one of the following values:
1266 * @arg @ref LL_MDMA_REQUEST_MODE_HW
1267 * @arg @ref LL_MDMA_REQUEST_MODE_SW
1268 * @retval None
1269 */
LL_MDMA_SetRequestMode(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t RequestMode)1270 __STATIC_INLINE void LL_MDMA_SetRequestMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t RequestMode)
1271 {
1272 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1273
1274 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SWRM, RequestMode);
1275 }
1276
1277 /**
1278 * @brief Get Request Mode.
1279 * @rmtoll CTCR SWRM LL_MDMA_GetRequestMode
1280 * @param MDMAx MDMAx Instance
1281 * @param Channel This parameter can be one of the following values:
1282 * @arg @ref LL_MDMA_CHANNEL_0
1283 * @arg @ref LL_MDMA_CHANNEL_1
1284 * @arg @ref LL_MDMA_CHANNEL_2
1285 * @arg @ref LL_MDMA_CHANNEL_3
1286 * @arg @ref LL_MDMA_CHANNEL_4
1287 * @arg @ref LL_MDMA_CHANNEL_5
1288 * @arg @ref LL_MDMA_CHANNEL_6
1289 * @arg @ref LL_MDMA_CHANNEL_7
1290 * @arg @ref LL_MDMA_CHANNEL_8
1291 * @arg @ref LL_MDMA_CHANNEL_9
1292 * @arg @ref LL_MDMA_CHANNEL_10
1293 * @arg @ref LL_MDMA_CHANNEL_11
1294 * @arg @ref LL_MDMA_CHANNEL_12
1295 * @arg @ref LL_MDMA_CHANNEL_13
1296 * @arg @ref LL_MDMA_CHANNEL_14
1297 * @arg @ref LL_MDMA_CHANNEL_15
1298 * @retval Returned value can be one of the following values:
1299 * @arg @ref LL_MDMA_REQUEST_MODE_HW
1300 * @arg @ref LL_MDMA_REQUEST_MODE_SW
1301 * @retval None
1302 */
LL_MDMA_GetRequestMode(MDMA_TypeDef * MDMAx,uint32_t Channel)1303 __STATIC_INLINE uint32_t LL_MDMA_GetRequestMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1304 {
1305 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1306
1307 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SWRM));
1308 }
1309
1310 /**
1311 * @brief Set Trigger Mode.
1312 * @rmtoll CTCR TRGM LL_MDMA_SetTriggerMode
1313 * @param MDMAx MDMAx Instance
1314 * @param Channel This parameter can be one of the following values:
1315 * @arg @ref LL_MDMA_CHANNEL_0
1316 * @arg @ref LL_MDMA_CHANNEL_1
1317 * @arg @ref LL_MDMA_CHANNEL_2
1318 * @arg @ref LL_MDMA_CHANNEL_3
1319 * @arg @ref LL_MDMA_CHANNEL_4
1320 * @arg @ref LL_MDMA_CHANNEL_5
1321 * @arg @ref LL_MDMA_CHANNEL_6
1322 * @arg @ref LL_MDMA_CHANNEL_7
1323 * @arg @ref LL_MDMA_CHANNEL_8
1324 * @arg @ref LL_MDMA_CHANNEL_9
1325 * @arg @ref LL_MDMA_CHANNEL_10
1326 * @arg @ref LL_MDMA_CHANNEL_11
1327 * @arg @ref LL_MDMA_CHANNEL_12
1328 * @arg @ref LL_MDMA_CHANNEL_13
1329 * @arg @ref LL_MDMA_CHANNEL_14
1330 * @arg @ref LL_MDMA_CHANNEL_15
1331 * @param TriggerMode This parameter can be one of the following values:
1332 * @arg @ref LL_MDMA_BUFFER_TRANSFER
1333 * @arg @ref LL_MDMA_BLOCK_TRANSFER
1334 * @arg @ref LL_MDMA_REPEAT_BLOCK_TRANSFER
1335 * @arg @ref LL_MDMA_FULL_TRANSFER
1336 * @retval None
1337 */
LL_MDMA_SetTriggerMode(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t TriggerMode)1338 __STATIC_INLINE void LL_MDMA_SetTriggerMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t TriggerMode)
1339 {
1340 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1341
1342 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TRGM, TriggerMode);
1343 }
1344
1345 /**
1346 * @brief Get Trigger Mode.
1347 * @rmtoll CTCR TRGM LL_MDMA_GetTriggerMode
1348 * @param MDMAx MDMAx Instance
1349 * @param Channel This parameter can be one of the following values:
1350 * @arg @ref LL_MDMA_CHANNEL_0
1351 * @arg @ref LL_MDMA_CHANNEL_1
1352 * @arg @ref LL_MDMA_CHANNEL_2
1353 * @arg @ref LL_MDMA_CHANNEL_3
1354 * @arg @ref LL_MDMA_CHANNEL_4
1355 * @arg @ref LL_MDMA_CHANNEL_5
1356 * @arg @ref LL_MDMA_CHANNEL_6
1357 * @arg @ref LL_MDMA_CHANNEL_7
1358 * @arg @ref LL_MDMA_CHANNEL_8
1359 * @arg @ref LL_MDMA_CHANNEL_9
1360 * @arg @ref LL_MDMA_CHANNEL_10
1361 * @arg @ref LL_MDMA_CHANNEL_11
1362 * @arg @ref LL_MDMA_CHANNEL_12
1363 * @arg @ref LL_MDMA_CHANNEL_13
1364 * @arg @ref LL_MDMA_CHANNEL_14
1365 * @arg @ref LL_MDMA_CHANNEL_15
1366 * @retval Returned value can be one of the following values:
1367 * @arg @ref LL_MDMA_BUFFER_TRANSFER
1368 * @arg @ref LL_MDMA_BLOCK_TRANSFER
1369 * @arg @ref LL_MDMA_REPEAT_BLOCK_TRANSFER
1370 * @arg @ref LL_MDMA_FULL_TRANSFER
1371 * @retval None
1372 */
LL_MDMA_GetTriggerMode(MDMA_TypeDef * MDMAx,uint32_t Channel)1373 __STATIC_INLINE uint32_t LL_MDMA_GetTriggerMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
1374 {
1375 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1376
1377 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TRGM));
1378 }
1379
1380 /**
1381 * @brief Set Padding Alignment.
1382 * @rmtoll CTCR PAM LL_MDMA_SetPaddingAlignment
1383 * @param MDMAx MDMAx Instance
1384 * @param Channel This parameter can be one of the following values:
1385 * @arg @ref LL_MDMA_CHANNEL_0
1386 * @arg @ref LL_MDMA_CHANNEL_1
1387 * @arg @ref LL_MDMA_CHANNEL_2
1388 * @arg @ref LL_MDMA_CHANNEL_3
1389 * @arg @ref LL_MDMA_CHANNEL_4
1390 * @arg @ref LL_MDMA_CHANNEL_5
1391 * @arg @ref LL_MDMA_CHANNEL_6
1392 * @arg @ref LL_MDMA_CHANNEL_7
1393 * @arg @ref LL_MDMA_CHANNEL_8
1394 * @arg @ref LL_MDMA_CHANNEL_9
1395 * @arg @ref LL_MDMA_CHANNEL_10
1396 * @arg @ref LL_MDMA_CHANNEL_11
1397 * @arg @ref LL_MDMA_CHANNEL_12
1398 * @arg @ref LL_MDMA_CHANNEL_13
1399 * @arg @ref LL_MDMA_CHANNEL_14
1400 * @arg @ref LL_MDMA_CHANNEL_15
1401 * @param PaddingAlignment This parameter can be one of the following values:
1402 * @arg @ref LL_MDMA_DATAALIGN_RIGHT
1403 * @arg @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED
1404 * @arg @ref LL_MDMA_DATAALIGN_LEFT
1405 * @retval None
1406 */
LL_MDMA_SetPaddingAlignment(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t PaddingAlignment)1407 __STATIC_INLINE void LL_MDMA_SetPaddingAlignment(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t PaddingAlignment)
1408 {
1409 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1410
1411 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PAM, PaddingAlignment);
1412 }
1413
1414 /**
1415 * @brief Get Padding Alignment.
1416 * @rmtoll CTCR PAM LL_MDMA_GetPaddingAlignment
1417 * @param MDMAx MDMAx Instance
1418 * @param Channel This parameter can be one of the following values:
1419 * @arg @ref LL_MDMA_CHANNEL_0
1420 * @arg @ref LL_MDMA_CHANNEL_1
1421 * @arg @ref LL_MDMA_CHANNEL_2
1422 * @arg @ref LL_MDMA_CHANNEL_3
1423 * @arg @ref LL_MDMA_CHANNEL_4
1424 * @arg @ref LL_MDMA_CHANNEL_5
1425 * @arg @ref LL_MDMA_CHANNEL_6
1426 * @arg @ref LL_MDMA_CHANNEL_7
1427 * @arg @ref LL_MDMA_CHANNEL_8
1428 * @arg @ref LL_MDMA_CHANNEL_9
1429 * @arg @ref LL_MDMA_CHANNEL_10
1430 * @arg @ref LL_MDMA_CHANNEL_11
1431 * @arg @ref LL_MDMA_CHANNEL_12
1432 * @arg @ref LL_MDMA_CHANNEL_13
1433 * @arg @ref LL_MDMA_CHANNEL_14
1434 * @arg @ref LL_MDMA_CHANNEL_15
1435 * @retval Returned value can be one of the following values:
1436 * @arg @ref LL_MDMA_DATAALIGN_RIGHT
1437 * @arg @ref LL_MDMA_DATAALIGN_RIGHT_SIGNED
1438 * @arg @ref LL_MDMA_DATAALIGN_LEFT
1439 * @retval None
1440 */
LL_MDMA_GetPaddingAlignment(MDMA_TypeDef * MDMAx,uint32_t Channel)1441 __STATIC_INLINE uint32_t LL_MDMA_GetPaddingAlignment(MDMA_TypeDef *MDMAx, uint32_t Channel)
1442 {
1443 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1444
1445 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PAM));
1446 }
1447
1448
1449 /**
1450 * @brief Enable Packing.
1451 * @rmtoll CTCR PKE LL_MDMA_EnablePacking
1452 * @param MDMAx MDMAx Instance
1453 * @param Channel This parameter can be one of the following values:
1454 * @arg @ref LL_MDMA_CHANNEL_0
1455 * @arg @ref LL_MDMA_CHANNEL_1
1456 * @arg @ref LL_MDMA_CHANNEL_2
1457 * @arg @ref LL_MDMA_CHANNEL_3
1458 * @arg @ref LL_MDMA_CHANNEL_4
1459 * @arg @ref LL_MDMA_CHANNEL_5
1460 * @arg @ref LL_MDMA_CHANNEL_6
1461 * @arg @ref LL_MDMA_CHANNEL_7
1462 * @arg @ref LL_MDMA_CHANNEL_8
1463 * @arg @ref LL_MDMA_CHANNEL_9
1464 * @arg @ref LL_MDMA_CHANNEL_10
1465 * @arg @ref LL_MDMA_CHANNEL_11
1466 * @arg @ref LL_MDMA_CHANNEL_12
1467 * @arg @ref LL_MDMA_CHANNEL_13
1468 * @arg @ref LL_MDMA_CHANNEL_14
1469 * @arg @ref LL_MDMA_CHANNEL_15
1470 * @retval None
1471 */
LL_MDMA_EnablePacking(MDMA_TypeDef * MDMAx,uint32_t Channel)1472 __STATIC_INLINE void LL_MDMA_EnablePacking(MDMA_TypeDef *MDMAx, uint32_t Channel)
1473 {
1474 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1475
1476 SET_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE);
1477 }
1478
1479 /**
1480 * @brief Disable Packing.
1481 * @rmtoll CTCR PKE LL_MDMA_DisablePacking
1482 * @param MDMAx MDMAx Instance
1483 * @param Channel This parameter can be one of the following values:
1484 * @arg @ref LL_MDMA_CHANNEL_0
1485 * @arg @ref LL_MDMA_CHANNEL_1
1486 * @arg @ref LL_MDMA_CHANNEL_2
1487 * @arg @ref LL_MDMA_CHANNEL_3
1488 * @arg @ref LL_MDMA_CHANNEL_4
1489 * @arg @ref LL_MDMA_CHANNEL_5
1490 * @arg @ref LL_MDMA_CHANNEL_6
1491 * @arg @ref LL_MDMA_CHANNEL_7
1492 * @arg @ref LL_MDMA_CHANNEL_8
1493 * @arg @ref LL_MDMA_CHANNEL_9
1494 * @arg @ref LL_MDMA_CHANNEL_10
1495 * @arg @ref LL_MDMA_CHANNEL_11
1496 * @arg @ref LL_MDMA_CHANNEL_12
1497 * @arg @ref LL_MDMA_CHANNEL_13
1498 * @arg @ref LL_MDMA_CHANNEL_14
1499 * @arg @ref LL_MDMA_CHANNEL_15
1500 * @retval None
1501 */
LL_MDMA_DisablePacking(MDMA_TypeDef * MDMAx,uint32_t Channel)1502 __STATIC_INLINE void LL_MDMA_DisablePacking(MDMA_TypeDef *MDMAx, uint32_t Channel)
1503 {
1504 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1505
1506 CLEAR_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE);
1507 }
1508
1509 /**
1510 * @brief Check if packing is enabled or disabled.
1511 * @rmtoll CTCR PKE LL_MDMA_IsEnabledPacking
1512 * @param MDMAx MDMAx Instance
1513 * @param Channel This parameter can be one of the following values:
1514 * @arg @ref LL_MDMA_CHANNEL_0
1515 * @arg @ref LL_MDMA_CHANNEL_1
1516 * @arg @ref LL_MDMA_CHANNEL_2
1517 * @arg @ref LL_MDMA_CHANNEL_3
1518 * @arg @ref LL_MDMA_CHANNEL_4
1519 * @arg @ref LL_MDMA_CHANNEL_5
1520 * @arg @ref LL_MDMA_CHANNEL_6
1521 * @arg @ref LL_MDMA_CHANNEL_7
1522 * @arg @ref LL_MDMA_CHANNEL_8
1523 * @arg @ref LL_MDMA_CHANNEL_9
1524 * @arg @ref LL_MDMA_CHANNEL_10
1525 * @arg @ref LL_MDMA_CHANNEL_11
1526 * @arg @ref LL_MDMA_CHANNEL_12
1527 * @arg @ref LL_MDMA_CHANNEL_13
1528 * @arg @ref LL_MDMA_CHANNEL_14
1529 * @arg @ref LL_MDMA_CHANNEL_15
1530 * @retval State of bit (1 or 0).
1531 */
LL_MDMA_IsEnabledPacking(MDMA_TypeDef * MDMAx,uint32_t Channel)1532 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledPacking(MDMA_TypeDef *MDMAx, uint32_t Channel)
1533 {
1534 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1535
1536 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_PKE) == (MDMA_CTCR_PKE)) ? 1UL : 0UL);
1537 }
1538
1539 /**
1540 * @brief Set Buffer Transfer Length.
1541 * @rmtoll CTCR TLEN LL_MDMA_SetBufferTransferLength
1542 * @param MDMAx MDMAx Instance
1543 * @param Channel This parameter can be one of the following values:
1544 * @arg @ref LL_MDMA_CHANNEL_0
1545 * @arg @ref LL_MDMA_CHANNEL_1
1546 * @arg @ref LL_MDMA_CHANNEL_2
1547 * @arg @ref LL_MDMA_CHANNEL_3
1548 * @arg @ref LL_MDMA_CHANNEL_4
1549 * @arg @ref LL_MDMA_CHANNEL_5
1550 * @arg @ref LL_MDMA_CHANNEL_6
1551 * @arg @ref LL_MDMA_CHANNEL_7
1552 * @arg @ref LL_MDMA_CHANNEL_8
1553 * @arg @ref LL_MDMA_CHANNEL_9
1554 * @arg @ref LL_MDMA_CHANNEL_10
1555 * @arg @ref LL_MDMA_CHANNEL_11
1556 * @arg @ref LL_MDMA_CHANNEL_12
1557 * @arg @ref LL_MDMA_CHANNEL_13
1558 * @arg @ref LL_MDMA_CHANNEL_14
1559 * @arg @ref LL_MDMA_CHANNEL_15
1560 * @param Length Between 0 to 0x0000007F
1561 * @retval None
1562 */
LL_MDMA_SetBufferTransferLength(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Length)1563 __STATIC_INLINE void LL_MDMA_SetBufferTransferLength(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Length)
1564 {
1565 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1566
1567 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TLEN,
1568 (Length << MDMA_CTCR_TLEN_Pos) & MDMA_CTCR_TLEN_Msk);
1569 }
1570
1571 /**
1572 * @brief Get Buffer Transfer Length.
1573 * @rmtoll CTCR TLEN LL_MDMA_GetBufferTransferLength
1574 * @param MDMAx MDMAx Instance
1575 * @param Channel This parameter can be one of the following values:
1576 * @arg @ref LL_MDMA_CHANNEL_0
1577 * @arg @ref LL_MDMA_CHANNEL_1
1578 * @arg @ref LL_MDMA_CHANNEL_2
1579 * @arg @ref LL_MDMA_CHANNEL_3
1580 * @arg @ref LL_MDMA_CHANNEL_4
1581 * @arg @ref LL_MDMA_CHANNEL_5
1582 * @arg @ref LL_MDMA_CHANNEL_6
1583 * @arg @ref LL_MDMA_CHANNEL_7
1584 * @arg @ref LL_MDMA_CHANNEL_8
1585 * @arg @ref LL_MDMA_CHANNEL_9
1586 * @arg @ref LL_MDMA_CHANNEL_10
1587 * @arg @ref LL_MDMA_CHANNEL_11
1588 * @arg @ref LL_MDMA_CHANNEL_12
1589 * @arg @ref LL_MDMA_CHANNEL_13
1590 * @arg @ref LL_MDMA_CHANNEL_14
1591 * @arg @ref LL_MDMA_CHANNEL_15
1592 * @retval Between 0 to 0x0000007F
1593 * @retval None
1594 */
LL_MDMA_GetBufferTransferLength(MDMA_TypeDef * MDMAx,uint32_t Channel)1595 __STATIC_INLINE uint32_t LL_MDMA_GetBufferTransferLength(MDMA_TypeDef *MDMAx, uint32_t Channel)
1596 {
1597 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1598
1599 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_TLEN) >> MDMA_CTCR_TLEN_Pos);
1600 }
1601
1602 /**
1603 * @brief Set Destination burst transfer.
1604 * @rmtoll CTCR DBURST LL_MDMA_SetDestinationBurstSize
1605 * @param MDMAx MDMAx Instance
1606 * @param Channel This parameter can be one of the following values:
1607 * @arg @ref LL_MDMA_CHANNEL_0
1608 * @arg @ref LL_MDMA_CHANNEL_1
1609 * @arg @ref LL_MDMA_CHANNEL_2
1610 * @arg @ref LL_MDMA_CHANNEL_3
1611 * @arg @ref LL_MDMA_CHANNEL_4
1612 * @arg @ref LL_MDMA_CHANNEL_5
1613 * @arg @ref LL_MDMA_CHANNEL_6
1614 * @arg @ref LL_MDMA_CHANNEL_7
1615 * @arg @ref LL_MDMA_CHANNEL_8
1616 * @arg @ref LL_MDMA_CHANNEL_9
1617 * @arg @ref LL_MDMA_CHANNEL_10
1618 * @arg @ref LL_MDMA_CHANNEL_11
1619 * @arg @ref LL_MDMA_CHANNEL_12
1620 * @arg @ref LL_MDMA_CHANNEL_13
1621 * @arg @ref LL_MDMA_CHANNEL_14
1622 * @arg @ref LL_MDMA_CHANNEL_15
1623 * @param Dburst This parameter can be one of the following values:
1624 * @arg @ref LL_MDMA_DEST_BURST_SINGLE
1625 * @arg @ref LL_MDMA_DEST_BURST_2BEATS
1626 * @arg @ref LL_MDMA_DEST_BURST_4BEATS
1627 * @arg @ref LL_MDMA_DEST_BURST_8BEATS
1628 * @arg @ref LL_MDMA_DEST_BURST_16BEATS
1629 * @arg @ref LL_MDMA_DEST_BURST_32BEATS
1630 * @arg @ref LL_MDMA_DEST_BURST_64BEATS
1631 * @arg @ref LL_MDMA_DEST_BURST_128BEATS
1632 * @retval None
1633 */
LL_MDMA_SetDestinationBurstSize(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Dburst)1634 __STATIC_INLINE void LL_MDMA_SetDestinationBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Dburst)
1635 {
1636 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1637
1638 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DBURST, Dburst);
1639 }
1640
1641 /**
1642 * @brief Get Destination burst transfer.
1643 * @rmtoll CTCR DBURST LL_MDMA_GetDestinationBurstSize
1644 * @param MDMAx MDMAx Instance
1645 * @param Channel This parameter can be one of the following values:
1646 * @arg @ref LL_MDMA_CHANNEL_0
1647 * @arg @ref LL_MDMA_CHANNEL_1
1648 * @arg @ref LL_MDMA_CHANNEL_2
1649 * @arg @ref LL_MDMA_CHANNEL_3
1650 * @arg @ref LL_MDMA_CHANNEL_4
1651 * @arg @ref LL_MDMA_CHANNEL_5
1652 * @arg @ref LL_MDMA_CHANNEL_6
1653 * @arg @ref LL_MDMA_CHANNEL_7
1654 * @arg @ref LL_MDMA_CHANNEL_8
1655 * @arg @ref LL_MDMA_CHANNEL_9
1656 * @arg @ref LL_MDMA_CHANNEL_10
1657 * @arg @ref LL_MDMA_CHANNEL_11
1658 * @arg @ref LL_MDMA_CHANNEL_12
1659 * @arg @ref LL_MDMA_CHANNEL_13
1660 * @arg @ref LL_MDMA_CHANNEL_14
1661 * @arg @ref LL_MDMA_CHANNEL_15
1662 * @retval Returned value can be one of the following values:
1663 * @arg @ref LL_MDMA_DEST_BURST_SINGLE
1664 * @arg @ref LL_MDMA_DEST_BURST_2BEATS
1665 * @arg @ref LL_MDMA_DEST_BURST_4BEATS
1666 * @arg @ref LL_MDMA_DEST_BURST_8BEATS
1667 * @arg @ref LL_MDMA_DEST_BURST_16BEATS
1668 * @arg @ref LL_MDMA_DEST_BURST_32BEATS
1669 * @arg @ref LL_MDMA_DEST_BURST_64BEATS
1670 * @arg @ref LL_MDMA_DEST_BURST_128BEATS
1671 * @retval None
1672 */
LL_MDMA_GetDestinationBurstSize(MDMA_TypeDef * MDMAx,uint32_t Channel)1673 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1674 {
1675 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1676
1677 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DBURST));
1678 }
1679
1680 /**
1681 * @brief Set Source burst transfer.
1682 * @rmtoll CTCR SBURST LL_MDMA_SetSourceBurstSize
1683 * @param MDMAx MDMAx Instance
1684 * @param Channel This parameter can be one of the following values:
1685 * @arg @ref LL_MDMA_CHANNEL_0
1686 * @arg @ref LL_MDMA_CHANNEL_1
1687 * @arg @ref LL_MDMA_CHANNEL_2
1688 * @arg @ref LL_MDMA_CHANNEL_3
1689 * @arg @ref LL_MDMA_CHANNEL_4
1690 * @arg @ref LL_MDMA_CHANNEL_5
1691 * @arg @ref LL_MDMA_CHANNEL_6
1692 * @arg @ref LL_MDMA_CHANNEL_7
1693 * @arg @ref LL_MDMA_CHANNEL_8
1694 * @arg @ref LL_MDMA_CHANNEL_9
1695 * @arg @ref LL_MDMA_CHANNEL_10
1696 * @arg @ref LL_MDMA_CHANNEL_11
1697 * @arg @ref LL_MDMA_CHANNEL_12
1698 * @arg @ref LL_MDMA_CHANNEL_13
1699 * @arg @ref LL_MDMA_CHANNEL_14
1700 * @arg @ref LL_MDMA_CHANNEL_15
1701 * @param Sburst This parameter can be one of the following values:
1702 * @arg @ref LL_MDMA_SRC_BURST_SINGLE
1703 * @arg @ref LL_MDMA_SRC_BURST_2BEATS
1704 * @arg @ref LL_MDMA_SRC_BURST_4BEATS
1705 * @arg @ref LL_MDMA_SRC_BURST_8BEATS
1706 * @arg @ref LL_MDMA_SRC_BURST_16BEATS
1707 * @arg @ref LL_MDMA_SRC_BURST_32BEATS
1708 * @arg @ref LL_MDMA_SRC_BURST_64BEATS
1709 * @arg @ref LL_MDMA_SRC_BURST_128BEATS
1710 * @retval None
1711 */
LL_MDMA_SetSourceBurstSize(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Sburst)1712 __STATIC_INLINE void LL_MDMA_SetSourceBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Sburst)
1713 {
1714 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1715
1716 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SBURST, Sburst);
1717 }
1718
1719 /**
1720 * @brief Get Source burst transfer.
1721 * @rmtoll CTCR SBURST LL_MDMA_GetSourceBurstSize
1722 * @param MDMAx MDMAx Instance
1723 * @param Channel This parameter can be one of the following values:
1724 * @arg @ref LL_MDMA_CHANNEL_0
1725 * @arg @ref LL_MDMA_CHANNEL_1
1726 * @arg @ref LL_MDMA_CHANNEL_2
1727 * @arg @ref LL_MDMA_CHANNEL_3
1728 * @arg @ref LL_MDMA_CHANNEL_4
1729 * @arg @ref LL_MDMA_CHANNEL_5
1730 * @arg @ref LL_MDMA_CHANNEL_6
1731 * @arg @ref LL_MDMA_CHANNEL_7
1732 * @arg @ref LL_MDMA_CHANNEL_8
1733 * @arg @ref LL_MDMA_CHANNEL_9
1734 * @arg @ref LL_MDMA_CHANNEL_10
1735 * @arg @ref LL_MDMA_CHANNEL_11
1736 * @arg @ref LL_MDMA_CHANNEL_12
1737 * @arg @ref LL_MDMA_CHANNEL_13
1738 * @arg @ref LL_MDMA_CHANNEL_14
1739 * @arg @ref LL_MDMA_CHANNEL_15
1740 * @retval Returned value can be one of the following values:
1741 * @arg @ref LL_MDMA_SRC_BURST_SINGLE
1742 * @arg @ref LL_MDMA_SRC_BURST_2BEATS
1743 * @arg @ref LL_MDMA_SRC_BURST_4BEATS
1744 * @arg @ref LL_MDMA_SRC_BURST_8BEATS
1745 * @arg @ref LL_MDMA_SRC_BURST_16BEATS
1746 * @arg @ref LL_MDMA_SRC_BURST_32BEATS
1747 * @arg @ref LL_MDMA_SRC_BURST_64BEATS
1748 * @arg @ref LL_MDMA_SRC_BURST_128BEATS
1749 * @retval None
1750 */
LL_MDMA_GetSourceBurstSize(MDMA_TypeDef * MDMAx,uint32_t Channel)1751 __STATIC_INLINE uint32_t LL_MDMA_GetSourceBurstSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1752 {
1753 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1754
1755 return(READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SBURST));
1756 }
1757
1758 /**
1759 * @brief Set Destination Increment Offset Size.
1760 * @rmtoll CTCR DINCOS LL_MDMA_SetDestinationIncSize
1761 * @param MDMAx MDMAx Instance
1762 * @param Channel This parameter can be one of the following values:
1763 * @arg @ref LL_MDMA_CHANNEL_0
1764 * @arg @ref LL_MDMA_CHANNEL_1
1765 * @arg @ref LL_MDMA_CHANNEL_2
1766 * @arg @ref LL_MDMA_CHANNEL_3
1767 * @arg @ref LL_MDMA_CHANNEL_4
1768 * @arg @ref LL_MDMA_CHANNEL_5
1769 * @arg @ref LL_MDMA_CHANNEL_6
1770 * @arg @ref LL_MDMA_CHANNEL_7
1771 * @arg @ref LL_MDMA_CHANNEL_8
1772 * @arg @ref LL_MDMA_CHANNEL_9
1773 * @arg @ref LL_MDMA_CHANNEL_10
1774 * @arg @ref LL_MDMA_CHANNEL_11
1775 * @arg @ref LL_MDMA_CHANNEL_12
1776 * @arg @ref LL_MDMA_CHANNEL_13
1777 * @arg @ref LL_MDMA_CHANNEL_14
1778 * @arg @ref LL_MDMA_CHANNEL_15
1779 * @param IncSize This parameter can be one of the following values:
1780 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE
1781 * @arg @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD
1782 * @arg @ref LL_MDMA_DEST_INC_OFFSET_WORD
1783 * @arg @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD
1784 * @retval None
1785 */
LL_MDMA_SetDestinationIncSize(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t IncSize)1786 __STATIC_INLINE void LL_MDMA_SetDestinationIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t IncSize)
1787 {
1788 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1789
1790 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINCOS, IncSize);
1791 }
1792
1793 /**
1794 * @brief Get Destination Increment Offset Size.
1795 * @rmtoll CTCR DINCOS LL_MDMA_GetDestinationIncSize
1796 * @param MDMAx MDMAx Instance
1797 * @param Channel This parameter can be one of the following values:
1798 * @arg @ref LL_MDMA_CHANNEL_0
1799 * @arg @ref LL_MDMA_CHANNEL_1
1800 * @arg @ref LL_MDMA_CHANNEL_2
1801 * @arg @ref LL_MDMA_CHANNEL_3
1802 * @arg @ref LL_MDMA_CHANNEL_4
1803 * @arg @ref LL_MDMA_CHANNEL_5
1804 * @arg @ref LL_MDMA_CHANNEL_6
1805 * @arg @ref LL_MDMA_CHANNEL_7
1806 * @arg @ref LL_MDMA_CHANNEL_8
1807 * @arg @ref LL_MDMA_CHANNEL_9
1808 * @arg @ref LL_MDMA_CHANNEL_10
1809 * @arg @ref LL_MDMA_CHANNEL_11
1810 * @arg @ref LL_MDMA_CHANNEL_12
1811 * @arg @ref LL_MDMA_CHANNEL_13
1812 * @arg @ref LL_MDMA_CHANNEL_14
1813 * @arg @ref LL_MDMA_CHANNEL_15
1814 * @retval Returned value can be one of the following values:
1815 * @arg @ref LL_MDMA_DEST_INC_OFFSET_BYTE
1816 * @arg @ref LL_MDMA_DEST_INC_OFFSET_HALFWORD
1817 * @arg @ref LL_MDMA_DEST_INC_OFFSET_WORD
1818 * @arg @ref LL_MDMA_DEST_INC_OFFSET_DOUBLEWORD
1819 * @retval None
1820 */
LL_MDMA_GetDestinationIncSize(MDMA_TypeDef * MDMAx,uint32_t Channel)1821 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1822 {
1823 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1824
1825 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINCOS));
1826 }
1827
1828 /**
1829 * @brief Set Source Increment Offset Size.
1830 * @rmtoll CTCR SINCOS LL_MDMA_SetSourceIncSize
1831 * @param MDMAx MDMAx Instance
1832 * @param Channel This parameter can be one of the following values:
1833 * @arg @ref LL_MDMA_CHANNEL_0
1834 * @arg @ref LL_MDMA_CHANNEL_1
1835 * @arg @ref LL_MDMA_CHANNEL_2
1836 * @arg @ref LL_MDMA_CHANNEL_3
1837 * @arg @ref LL_MDMA_CHANNEL_4
1838 * @arg @ref LL_MDMA_CHANNEL_5
1839 * @arg @ref LL_MDMA_CHANNEL_6
1840 * @arg @ref LL_MDMA_CHANNEL_7
1841 * @arg @ref LL_MDMA_CHANNEL_8
1842 * @arg @ref LL_MDMA_CHANNEL_9
1843 * @arg @ref LL_MDMA_CHANNEL_10
1844 * @arg @ref LL_MDMA_CHANNEL_11
1845 * @arg @ref LL_MDMA_CHANNEL_12
1846 * @arg @ref LL_MDMA_CHANNEL_13
1847 * @arg @ref LL_MDMA_CHANNEL_14
1848 * @arg @ref LL_MDMA_CHANNEL_15
1849 * @param IncSize This parameter can be one of the following values:
1850 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE
1851 * @arg @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD
1852 * @arg @ref LL_MDMA_SRC_INC_OFFSET_WORD
1853 * @arg @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD
1854 * @retval None
1855 */
LL_MDMA_SetSourceIncSize(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t IncSize)1856 __STATIC_INLINE void LL_MDMA_SetSourceIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t IncSize)
1857 {
1858 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1859
1860 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINCOS, IncSize);
1861 }
1862
1863 /**
1864 * @brief Get Source Increment Offset Size.
1865 * @rmtoll CTCR SINCOS LL_MDMA_GetSourceIncSize
1866 * @param MDMAx MDMAx Instance
1867 * @param Channel This parameter can be one of the following values:
1868 * @arg @ref LL_MDMA_CHANNEL_0
1869 * @arg @ref LL_MDMA_CHANNEL_1
1870 * @arg @ref LL_MDMA_CHANNEL_2
1871 * @arg @ref LL_MDMA_CHANNEL_3
1872 * @arg @ref LL_MDMA_CHANNEL_4
1873 * @arg @ref LL_MDMA_CHANNEL_5
1874 * @arg @ref LL_MDMA_CHANNEL_6
1875 * @arg @ref LL_MDMA_CHANNEL_7
1876 * @arg @ref LL_MDMA_CHANNEL_8
1877 * @arg @ref LL_MDMA_CHANNEL_9
1878 * @arg @ref LL_MDMA_CHANNEL_10
1879 * @arg @ref LL_MDMA_CHANNEL_11
1880 * @arg @ref LL_MDMA_CHANNEL_12
1881 * @arg @ref LL_MDMA_CHANNEL_13
1882 * @arg @ref LL_MDMA_CHANNEL_14
1883 * @arg @ref LL_MDMA_CHANNEL_15
1884 * @retval Returned value can be one of the following values:
1885 * @arg @ref LL_MDMA_SRC_INC_OFFSET_BYTE
1886 * @arg @ref LL_MDMA_SRC_INC_OFFSET_HALFWORD
1887 * @arg @ref LL_MDMA_SRC_INC_OFFSET_WORD
1888 * @arg @ref LL_MDMA_SRC_INC_OFFSET_DOUBLEWORD
1889 * @retval None
1890 */
LL_MDMA_GetSourceIncSize(MDMA_TypeDef * MDMAx,uint32_t Channel)1891 __STATIC_INLINE uint32_t LL_MDMA_GetSourceIncSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1892 {
1893 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1894
1895 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINCOS));
1896 }
1897
1898 /**
1899 * @brief Set Destination Data Size.
1900 * @rmtoll CTCR DSIZE LL_MDMA_SetDestinationDataSize
1901 * @param MDMAx MDMAx Instance
1902 * @param Channel This parameter can be one of the following values:
1903 * @arg @ref LL_MDMA_CHANNEL_0
1904 * @arg @ref LL_MDMA_CHANNEL_1
1905 * @arg @ref LL_MDMA_CHANNEL_2
1906 * @arg @ref LL_MDMA_CHANNEL_3
1907 * @arg @ref LL_MDMA_CHANNEL_4
1908 * @arg @ref LL_MDMA_CHANNEL_5
1909 * @arg @ref LL_MDMA_CHANNEL_6
1910 * @arg @ref LL_MDMA_CHANNEL_7
1911 * @arg @ref LL_MDMA_CHANNEL_8
1912 * @arg @ref LL_MDMA_CHANNEL_9
1913 * @arg @ref LL_MDMA_CHANNEL_10
1914 * @arg @ref LL_MDMA_CHANNEL_11
1915 * @arg @ref LL_MDMA_CHANNEL_12
1916 * @arg @ref LL_MDMA_CHANNEL_13
1917 * @arg @ref LL_MDMA_CHANNEL_14
1918 * @arg @ref LL_MDMA_CHANNEL_15
1919 * @param DestDataSize This parameter can be one of the following values:
1920 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE
1921 * @arg @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD
1922 * @arg @ref LL_MDMA_DEST_DATA_SIZE_WORD
1923 * @arg @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD
1924 * @retval None
1925 */
LL_MDMA_SetDestinationDataSize(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t DestDataSize)1926 __STATIC_INLINE void LL_MDMA_SetDestinationDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestDataSize)
1927 {
1928 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1929
1930 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DSIZE, DestDataSize);
1931 }
1932
1933 /**
1934 * @brief Get Destination Data Size.
1935 * @rmtoll CTCR DSIZE LL_MDMA_GetDestinationDataSize
1936 * @param MDMAx MDMAx Instance
1937 * @param Channel This parameter can be one of the following values:
1938 * @arg @ref LL_MDMA_CHANNEL_0
1939 * @arg @ref LL_MDMA_CHANNEL_1
1940 * @arg @ref LL_MDMA_CHANNEL_2
1941 * @arg @ref LL_MDMA_CHANNEL_3
1942 * @arg @ref LL_MDMA_CHANNEL_4
1943 * @arg @ref LL_MDMA_CHANNEL_5
1944 * @arg @ref LL_MDMA_CHANNEL_6
1945 * @arg @ref LL_MDMA_CHANNEL_7
1946 * @arg @ref LL_MDMA_CHANNEL_8
1947 * @arg @ref LL_MDMA_CHANNEL_9
1948 * @arg @ref LL_MDMA_CHANNEL_10
1949 * @arg @ref LL_MDMA_CHANNEL_11
1950 * @arg @ref LL_MDMA_CHANNEL_12
1951 * @arg @ref LL_MDMA_CHANNEL_13
1952 * @arg @ref LL_MDMA_CHANNEL_14
1953 * @arg @ref LL_MDMA_CHANNEL_15
1954 * @retval Returned value can be one of the following values:
1955 * @arg @ref LL_MDMA_DEST_DATA_SIZE_BYTE
1956 * @arg @ref LL_MDMA_DEST_DATA_SIZE_HALFWORD
1957 * @arg @ref LL_MDMA_DEST_DATA_SIZE_WORD
1958 * @arg @ref LL_MDMA_DEST_DATA_SIZE_DOUBLEWORD
1959 * @retval None
1960 */
LL_MDMA_GetDestinationDataSize(MDMA_TypeDef * MDMAx,uint32_t Channel)1961 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
1962 {
1963 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1964
1965 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DSIZE));
1966 }
1967
1968 /**
1969 * @brief Set Source Data Size.
1970 * @rmtoll CTCR SSIZE LL_MDMA_SetSourceDataSize
1971 * @param MDMAx MDMAx Instance
1972 * @param Channel This parameter can be one of the following values:
1973 * @arg @ref LL_MDMA_CHANNEL_0
1974 * @arg @ref LL_MDMA_CHANNEL_1
1975 * @arg @ref LL_MDMA_CHANNEL_2
1976 * @arg @ref LL_MDMA_CHANNEL_3
1977 * @arg @ref LL_MDMA_CHANNEL_4
1978 * @arg @ref LL_MDMA_CHANNEL_5
1979 * @arg @ref LL_MDMA_CHANNEL_6
1980 * @arg @ref LL_MDMA_CHANNEL_7
1981 * @arg @ref LL_MDMA_CHANNEL_8
1982 * @arg @ref LL_MDMA_CHANNEL_9
1983 * @arg @ref LL_MDMA_CHANNEL_10
1984 * @arg @ref LL_MDMA_CHANNEL_11
1985 * @arg @ref LL_MDMA_CHANNEL_12
1986 * @arg @ref LL_MDMA_CHANNEL_13
1987 * @arg @ref LL_MDMA_CHANNEL_14
1988 * @arg @ref LL_MDMA_CHANNEL_15
1989 * @param SrcDataSize This parameter can be one of the following values:
1990 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE
1991 * @arg @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD
1992 * @arg @ref LL_MDMA_SRC_DATA_SIZE_WORD
1993 * @arg @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD
1994 * @retval None
1995 */
LL_MDMA_SetSourceDataSize(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrcDataSize)1996 __STATIC_INLINE void LL_MDMA_SetSourceDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcDataSize)
1997 {
1998 uint32_t mdma_base_addr = (uint32_t)MDMAx;
1999
2000 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SSIZE, SrcDataSize);
2001 }
2002
2003 /**
2004 * @brief Get Source Data Size.
2005 * @rmtoll CTCR SSIZE LL_MDMA_GetSourceDataSize
2006 * @param MDMAx MDMAx Instance
2007 * @param Channel This parameter can be one of the following values:
2008 * @arg @ref LL_MDMA_CHANNEL_0
2009 * @arg @ref LL_MDMA_CHANNEL_1
2010 * @arg @ref LL_MDMA_CHANNEL_2
2011 * @arg @ref LL_MDMA_CHANNEL_3
2012 * @arg @ref LL_MDMA_CHANNEL_4
2013 * @arg @ref LL_MDMA_CHANNEL_5
2014 * @arg @ref LL_MDMA_CHANNEL_6
2015 * @arg @ref LL_MDMA_CHANNEL_7
2016 * @arg @ref LL_MDMA_CHANNEL_8
2017 * @arg @ref LL_MDMA_CHANNEL_9
2018 * @arg @ref LL_MDMA_CHANNEL_10
2019 * @arg @ref LL_MDMA_CHANNEL_11
2020 * @arg @ref LL_MDMA_CHANNEL_12
2021 * @arg @ref LL_MDMA_CHANNEL_13
2022 * @arg @ref LL_MDMA_CHANNEL_14
2023 * @arg @ref LL_MDMA_CHANNEL_15
2024 * @retval Returned value can be one of the following values:
2025 * @arg @ref LL_MDMA_SRC_DATA_SIZE_BYTE
2026 * @arg @ref LL_MDMA_SRC_DATA_SIZE_HALFWORD
2027 * @arg @ref LL_MDMA_SRC_DATA_SIZE_WORD
2028 * @arg @ref LL_MDMA_SRC_DATA_SIZE_DOUBLEWORD
2029 * @retval None
2030 */
LL_MDMA_GetSourceDataSize(MDMA_TypeDef * MDMAx,uint32_t Channel)2031 __STATIC_INLINE uint32_t LL_MDMA_GetSourceDataSize(MDMA_TypeDef *MDMAx, uint32_t Channel)
2032 {
2033 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2034
2035 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SSIZE));
2036 }
2037
2038 /**
2039 * @brief Set Destination Increment Mode.
2040 * @rmtoll CTCR DINC LL_MDMA_SetDestinationIncMode
2041 * @param MDMAx MDMAx Instance
2042 * @param Channel This parameter can be one of the following values:
2043 * @arg @ref LL_MDMA_CHANNEL_0
2044 * @arg @ref LL_MDMA_CHANNEL_1
2045 * @arg @ref LL_MDMA_CHANNEL_2
2046 * @arg @ref LL_MDMA_CHANNEL_3
2047 * @arg @ref LL_MDMA_CHANNEL_4
2048 * @arg @ref LL_MDMA_CHANNEL_5
2049 * @arg @ref LL_MDMA_CHANNEL_6
2050 * @arg @ref LL_MDMA_CHANNEL_7
2051 * @arg @ref LL_MDMA_CHANNEL_8
2052 * @arg @ref LL_MDMA_CHANNEL_9
2053 * @arg @ref LL_MDMA_CHANNEL_10
2054 * @arg @ref LL_MDMA_CHANNEL_11
2055 * @arg @ref LL_MDMA_CHANNEL_12
2056 * @arg @ref LL_MDMA_CHANNEL_13
2057 * @arg @ref LL_MDMA_CHANNEL_14
2058 * @arg @ref LL_MDMA_CHANNEL_15
2059 * @param DestIncMode This parameter can be one of the following values:
2060 * @arg @ref LL_MDMA_DEST_FIXED
2061 * @arg @ref LL_MDMA_DEST_INCREMENT
2062 * @arg @ref LL_MDMA_DEST_DECREMENT
2063 * @retval None
2064 */
LL_MDMA_SetDestinationIncMode(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t DestIncMode)2065 __STATIC_INLINE void LL_MDMA_SetDestinationIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestIncMode)
2066 {
2067 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2068
2069 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINC, DestIncMode);
2070 }
2071
2072 /**
2073 * @brief Get Destination Increment Mode.
2074 * @rmtoll CTCR DINC LL_MDMA_GetDestinationIncMode
2075 * @param MDMAx MDMAx Instance
2076 * @param Channel This parameter can be one of the following values:
2077 * @arg @ref LL_MDMA_CHANNEL_0
2078 * @arg @ref LL_MDMA_CHANNEL_1
2079 * @arg @ref LL_MDMA_CHANNEL_2
2080 * @arg @ref LL_MDMA_CHANNEL_3
2081 * @arg @ref LL_MDMA_CHANNEL_4
2082 * @arg @ref LL_MDMA_CHANNEL_5
2083 * @arg @ref LL_MDMA_CHANNEL_6
2084 * @arg @ref LL_MDMA_CHANNEL_7
2085 * @arg @ref LL_MDMA_CHANNEL_8
2086 * @arg @ref LL_MDMA_CHANNEL_9
2087 * @arg @ref LL_MDMA_CHANNEL_10
2088 * @arg @ref LL_MDMA_CHANNEL_11
2089 * @arg @ref LL_MDMA_CHANNEL_12
2090 * @arg @ref LL_MDMA_CHANNEL_13
2091 * @arg @ref LL_MDMA_CHANNEL_14
2092 * @arg @ref LL_MDMA_CHANNEL_15
2093 * @retval Returned value can be one of the following values:
2094 * @arg @ref LL_MDMA_DEST_FIXED
2095 * @arg @ref LL_MDMA_DEST_INCREMENT
2096 * @arg @ref LL_MDMA_DEST_DECREMENT
2097 * @retval None
2098 */
LL_MDMA_GetDestinationIncMode(MDMA_TypeDef * MDMAx,uint32_t Channel)2099 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
2100 {
2101 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2102
2103 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_DINC));
2104 }
2105
2106 /**
2107 * @brief Set Source Increment Mode.
2108 * @rmtoll CTCR SINC LL_MDMA_SetSourceIncMode
2109 * @param MDMAx MDMAx Instance
2110 * @param Channel This parameter can be one of the following values:
2111 * @arg @ref LL_MDMA_CHANNEL_0
2112 * @arg @ref LL_MDMA_CHANNEL_1
2113 * @arg @ref LL_MDMA_CHANNEL_2
2114 * @arg @ref LL_MDMA_CHANNEL_3
2115 * @arg @ref LL_MDMA_CHANNEL_4
2116 * @arg @ref LL_MDMA_CHANNEL_5
2117 * @arg @ref LL_MDMA_CHANNEL_6
2118 * @arg @ref LL_MDMA_CHANNEL_7
2119 * @arg @ref LL_MDMA_CHANNEL_8
2120 * @arg @ref LL_MDMA_CHANNEL_9
2121 * @arg @ref LL_MDMA_CHANNEL_10
2122 * @arg @ref LL_MDMA_CHANNEL_11
2123 * @arg @ref LL_MDMA_CHANNEL_12
2124 * @arg @ref LL_MDMA_CHANNEL_13
2125 * @arg @ref LL_MDMA_CHANNEL_14
2126 * @arg @ref LL_MDMA_CHANNEL_15
2127 * @param SrcIncMode This parameter can be one of the following values:
2128 * @arg @ref LL_MDMA_SRC_FIXED
2129 * @arg @ref LL_MDMA_SRC_INCREMENT
2130 * @arg @ref LL_MDMA_SRC_DECREMENT
2131 * @retval None
2132 */
LL_MDMA_SetSourceIncMode(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrcIncMode)2133 __STATIC_INLINE void LL_MDMA_SetSourceIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcIncMode)
2134 {
2135 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2136
2137 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINC, SrcIncMode);
2138 }
2139
2140 /**
2141 * @brief Get Source Increment Mode.
2142 * @rmtoll CTCR SINC LL_MDMA_GetSourceIncMode
2143 * @param MDMAx MDMAx Instance
2144 * @param Channel This parameter can be one of the following values:
2145 * @arg @ref LL_MDMA_CHANNEL_0
2146 * @arg @ref LL_MDMA_CHANNEL_1
2147 * @arg @ref LL_MDMA_CHANNEL_2
2148 * @arg @ref LL_MDMA_CHANNEL_3
2149 * @arg @ref LL_MDMA_CHANNEL_4
2150 * @arg @ref LL_MDMA_CHANNEL_5
2151 * @arg @ref LL_MDMA_CHANNEL_6
2152 * @arg @ref LL_MDMA_CHANNEL_7
2153 * @arg @ref LL_MDMA_CHANNEL_8
2154 * @arg @ref LL_MDMA_CHANNEL_9
2155 * @arg @ref LL_MDMA_CHANNEL_10
2156 * @arg @ref LL_MDMA_CHANNEL_11
2157 * @arg @ref LL_MDMA_CHANNEL_12
2158 * @arg @ref LL_MDMA_CHANNEL_13
2159 * @arg @ref LL_MDMA_CHANNEL_14
2160 * @arg @ref LL_MDMA_CHANNEL_15
2161 * @retval Returned value can be one of the following values:
2162 * @arg @ref LL_MDMA_SRC_FIXED
2163 * @arg @ref LL_MDMA_SRC_INCREMENT
2164 * @arg @ref LL_MDMA_SRC_DECREMENT
2165 * @retval None
2166 */
LL_MDMA_GetSourceIncMode(MDMA_TypeDef * MDMAx,uint32_t Channel)2167 __STATIC_INLINE uint32_t LL_MDMA_GetSourceIncMode(MDMA_TypeDef *MDMAx, uint32_t Channel)
2168 {
2169 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2170
2171 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTCR, MDMA_CTCR_SINC));
2172 }
2173
2174 /**
2175 * @brief Configure MDMA Block number of data and repeat Count.
2176 * @rmtoll CBNDTR BRC LL_MDMA_ConfigBlkCounters\n
2177 * @rmtoll CBNDTR BNDT LL_MDMA_ConfigBlkCounters
2178 * @param MDMAx MDMAx Instance
2179 * @param Channel This parameter can be one of the following values:
2180 * @arg @ref LL_MDMA_CHANNEL_0
2181 * @arg @ref LL_MDMA_CHANNEL_1
2182 * @arg @ref LL_MDMA_CHANNEL_2
2183 * @arg @ref LL_MDMA_CHANNEL_3
2184 * @arg @ref LL_MDMA_CHANNEL_4
2185 * @arg @ref LL_MDMA_CHANNEL_5
2186 * @arg @ref LL_MDMA_CHANNEL_6
2187 * @arg @ref LL_MDMA_CHANNEL_7
2188 * @arg @ref LL_MDMA_CHANNEL_8
2189 * @arg @ref LL_MDMA_CHANNEL_9
2190 * @arg @ref LL_MDMA_CHANNEL_10
2191 * @arg @ref LL_MDMA_CHANNEL_11
2192 * @arg @ref LL_MDMA_CHANNEL_12
2193 * @arg @ref LL_MDMA_CHANNEL_13
2194 * @arg @ref LL_MDMA_CHANNEL_14
2195 * @arg @ref LL_MDMA_CHANNEL_15
2196 * @param BlockRepeatCount Between 0 to 0x00000FFF
2197 * @param BlkDataLength Between 0 to 0x00010000
2198 * @retval None
2199 */
LL_MDMA_ConfigBlkCounters(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t BlockRepeatCount,uint32_t BlkDataLength)2200 __STATIC_INLINE void LL_MDMA_ConfigBlkCounters(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlockRepeatCount, uint32_t BlkDataLength)
2201 {
2202 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2203
2204 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR,
2205 MDMA_CBNDTR_BRC | MDMA_CBNDTR_BNDT,
2206 ((BlockRepeatCount << MDMA_CBNDTR_BRC_Pos) & MDMA_CBNDTR_BRC_Msk) | (BlkDataLength & MDMA_CBNDTR_BNDT_Msk));
2207 }
2208
2209 /**
2210 * @brief Set Block Number of data bytes to transfer.
2211 * @rmtoll CBNDTR BNDT LL_MDMA_SetBlkDataLength
2212 * @param MDMAx MDMAx Instance
2213 * @param Channel This parameter can be one of the following values:
2214 * @arg @ref LL_MDMA_CHANNEL_0
2215 * @arg @ref LL_MDMA_CHANNEL_1
2216 * @arg @ref LL_MDMA_CHANNEL_2
2217 * @arg @ref LL_MDMA_CHANNEL_3
2218 * @arg @ref LL_MDMA_CHANNEL_4
2219 * @arg @ref LL_MDMA_CHANNEL_5
2220 * @arg @ref LL_MDMA_CHANNEL_6
2221 * @arg @ref LL_MDMA_CHANNEL_7
2222 * @arg @ref LL_MDMA_CHANNEL_8
2223 * @arg @ref LL_MDMA_CHANNEL_9
2224 * @arg @ref LL_MDMA_CHANNEL_10
2225 * @arg @ref LL_MDMA_CHANNEL_11
2226 * @arg @ref LL_MDMA_CHANNEL_12
2227 * @arg @ref LL_MDMA_CHANNEL_13
2228 * @arg @ref LL_MDMA_CHANNEL_14
2229 * @arg @ref LL_MDMA_CHANNEL_15
2230 * @param BlkDataLength Between 0 to 0x00010000
2231 * @retval None
2232 */
LL_MDMA_SetBlkDataLength(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t BlkDataLength)2233 __STATIC_INLINE void LL_MDMA_SetBlkDataLength(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlkDataLength)
2234 {
2235 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2236
2237 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BNDT, (BlkDataLength & MDMA_CBNDTR_BNDT_Msk));
2238 }
2239
2240 /**
2241 * @brief Get Block Number of data bytes to transfer.
2242 * @rmtoll CBNDTR BNDT LL_MDMA_GetBlkDataLength
2243 * @param MDMAx MDMAx Instance
2244 * @param Channel This parameter can be one of the following values:
2245 * @arg @ref LL_MDMA_CHANNEL_0
2246 * @arg @ref LL_MDMA_CHANNEL_1
2247 * @arg @ref LL_MDMA_CHANNEL_2
2248 * @arg @ref LL_MDMA_CHANNEL_3
2249 * @arg @ref LL_MDMA_CHANNEL_4
2250 * @arg @ref LL_MDMA_CHANNEL_5
2251 * @arg @ref LL_MDMA_CHANNEL_6
2252 * @arg @ref LL_MDMA_CHANNEL_7
2253 * @arg @ref LL_MDMA_CHANNEL_8
2254 * @arg @ref LL_MDMA_CHANNEL_9
2255 * @arg @ref LL_MDMA_CHANNEL_10
2256 * @arg @ref LL_MDMA_CHANNEL_11
2257 * @arg @ref LL_MDMA_CHANNEL_12
2258 * @arg @ref LL_MDMA_CHANNEL_13
2259 * @arg @ref LL_MDMA_CHANNEL_14
2260 * @arg @ref LL_MDMA_CHANNEL_15
2261 * @retval Between 0 to 0x00010000
2262 * @retval None
2263 */
LL_MDMA_GetBlkDataLength(MDMA_TypeDef * MDMAx,uint32_t Channel)2264 __STATIC_INLINE uint32_t LL_MDMA_GetBlkDataLength(MDMA_TypeDef *MDMAx, uint32_t Channel)
2265 {
2266 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2267
2268 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BNDT));
2269 }
2270
2271 /**
2272 * @brief Set Block Repeat Count.
2273 * @rmtoll CBNDTR BRC LL_MDMA_SetBlkRepeatCount
2274 * @param MDMAx MDMAx Instance
2275 * @param Channel This parameter can be one of the following values:
2276 * @arg @ref LL_MDMA_CHANNEL_0
2277 * @arg @ref LL_MDMA_CHANNEL_1
2278 * @arg @ref LL_MDMA_CHANNEL_2
2279 * @arg @ref LL_MDMA_CHANNEL_3
2280 * @arg @ref LL_MDMA_CHANNEL_4
2281 * @arg @ref LL_MDMA_CHANNEL_5
2282 * @arg @ref LL_MDMA_CHANNEL_6
2283 * @arg @ref LL_MDMA_CHANNEL_7
2284 * @arg @ref LL_MDMA_CHANNEL_8
2285 * @arg @ref LL_MDMA_CHANNEL_9
2286 * @arg @ref LL_MDMA_CHANNEL_10
2287 * @arg @ref LL_MDMA_CHANNEL_11
2288 * @arg @ref LL_MDMA_CHANNEL_12
2289 * @arg @ref LL_MDMA_CHANNEL_13
2290 * @arg @ref LL_MDMA_CHANNEL_14
2291 * @arg @ref LL_MDMA_CHANNEL_15
2292 * @param BlockRepeatCount Between 0 to 0x00000FFF
2293 * @retval None
2294 */
LL_MDMA_SetBlkRepeatCount(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t BlockRepeatCount)2295 __STATIC_INLINE void LL_MDMA_SetBlkRepeatCount(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t BlockRepeatCount)
2296 {
2297 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2298
2299 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRC,
2300 (BlockRepeatCount << MDMA_CBNDTR_BRC_Pos) & MDMA_CBNDTR_BRC_Msk);
2301 }
2302
2303 /**
2304 * @brief Get Block Repeat Count.
2305 * @rmtoll CBNDTR BRC LL_MDMA_GetBlkRepeatCount
2306 * @param MDMAx MDMAx Instance
2307 * @param Channel This parameter can be one of the following values:
2308 * @arg @ref LL_MDMA_CHANNEL_0
2309 * @arg @ref LL_MDMA_CHANNEL_1
2310 * @arg @ref LL_MDMA_CHANNEL_2
2311 * @arg @ref LL_MDMA_CHANNEL_3
2312 * @arg @ref LL_MDMA_CHANNEL_4
2313 * @arg @ref LL_MDMA_CHANNEL_5
2314 * @arg @ref LL_MDMA_CHANNEL_6
2315 * @arg @ref LL_MDMA_CHANNEL_7
2316 * @arg @ref LL_MDMA_CHANNEL_8
2317 * @arg @ref LL_MDMA_CHANNEL_9
2318 * @arg @ref LL_MDMA_CHANNEL_10
2319 * @arg @ref LL_MDMA_CHANNEL_11
2320 * @arg @ref LL_MDMA_CHANNEL_12
2321 * @arg @ref LL_MDMA_CHANNEL_13
2322 * @arg @ref LL_MDMA_CHANNEL_14
2323 * @arg @ref LL_MDMA_CHANNEL_15
2324 * @retval Between 0 to 0x00000FFF
2325 * @retval None
2326 */
LL_MDMA_GetBlkRepeatCount(MDMA_TypeDef * MDMAx,uint32_t Channel)2327 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatCount(MDMA_TypeDef *MDMAx, uint32_t Channel)
2328 {
2329 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2330
2331 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRC) >> MDMA_CBNDTR_BRC_Pos);
2332 }
2333
2334 /**
2335 * @brief Configure MDMA block repeat address update mode.
2336 * @rmtoll CBNDTR BRDUM LL_MDMA_ConfigBlkRepeatAddrUpdate\n
2337 * @rmtoll CBNDTR BRSUM LL_MDMA_ConfigBlkRepeatAddrUpdate
2338 * @param MDMAx MDMAx Instance
2339 * @param Channel This parameter can be one of the following values:
2340 * @arg @ref LL_MDMA_CHANNEL_0
2341 * @arg @ref LL_MDMA_CHANNEL_1
2342 * @arg @ref LL_MDMA_CHANNEL_2
2343 * @arg @ref LL_MDMA_CHANNEL_3
2344 * @arg @ref LL_MDMA_CHANNEL_4
2345 * @arg @ref LL_MDMA_CHANNEL_5
2346 * @arg @ref LL_MDMA_CHANNEL_6
2347 * @arg @ref LL_MDMA_CHANNEL_7
2348 * @arg @ref LL_MDMA_CHANNEL_8
2349 * @arg @ref LL_MDMA_CHANNEL_9
2350 * @arg @ref LL_MDMA_CHANNEL_10
2351 * @arg @ref LL_MDMA_CHANNEL_11
2352 * @arg @ref LL_MDMA_CHANNEL_12
2353 * @arg @ref LL_MDMA_CHANNEL_13
2354 * @arg @ref LL_MDMA_CHANNEL_14
2355 * @arg @ref LL_MDMA_CHANNEL_15
2356 * @param Configuration This parameter must be a combination of all the following values:
2357 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT or @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT
2358 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT or @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT
2359 * @retval None
2360 */
LL_MDMA_ConfigBlkRepeatAddrUpdate(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Configuration)2361 __STATIC_INLINE void LL_MDMA_ConfigBlkRepeatAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration)
2362 {
2363 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2364
2365 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR,
2366 MDMA_CBNDTR_BRDUM | MDMA_CBNDTR_BRSUM,
2367 Configuration);
2368 }
2369
2370 /**
2371 * @brief Set Block Repeat Destination address Update Mode.
2372 * @rmtoll CBNDTR BRDUM LL_MDMA_SetBlkRepeatDestAddrUpdate
2373 * @param MDMAx MDMAx Instance
2374 * @param Channel This parameter can be one of the following values:
2375 * @arg @ref LL_MDMA_CHANNEL_0
2376 * @arg @ref LL_MDMA_CHANNEL_1
2377 * @arg @ref LL_MDMA_CHANNEL_2
2378 * @arg @ref LL_MDMA_CHANNEL_3
2379 * @arg @ref LL_MDMA_CHANNEL_4
2380 * @arg @ref LL_MDMA_CHANNEL_5
2381 * @arg @ref LL_MDMA_CHANNEL_6
2382 * @arg @ref LL_MDMA_CHANNEL_7
2383 * @arg @ref LL_MDMA_CHANNEL_8
2384 * @arg @ref LL_MDMA_CHANNEL_9
2385 * @arg @ref LL_MDMA_CHANNEL_10
2386 * @arg @ref LL_MDMA_CHANNEL_11
2387 * @arg @ref LL_MDMA_CHANNEL_12
2388 * @arg @ref LL_MDMA_CHANNEL_13
2389 * @arg @ref LL_MDMA_CHANNEL_14
2390 * @arg @ref LL_MDMA_CHANNEL_15
2391 * @param DestAdrUpdateMode This parameter can be one of the following values:
2392 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT
2393 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT
2394 * @retval None
2395 */
LL_MDMA_SetBlkRepeatDestAddrUpdate(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t DestAdrUpdateMode)2396 __STATIC_INLINE void LL_MDMA_SetBlkRepeatDestAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAdrUpdateMode)
2397 {
2398 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2399
2400 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRDUM, DestAdrUpdateMode);
2401 }
2402
2403 /**
2404 * @brief Get Block Repeat Destination address Update Mode.
2405 * @rmtoll CBNDTR BRDUM LL_MDMA_GetBlkRepeatDestAddrUpdate
2406 * @param MDMAx MDMAx Instance
2407 * @param Channel This parameter can be one of the following values:
2408 * @arg @ref LL_MDMA_CHANNEL_0
2409 * @arg @ref LL_MDMA_CHANNEL_1
2410 * @arg @ref LL_MDMA_CHANNEL_2
2411 * @arg @ref LL_MDMA_CHANNEL_3
2412 * @arg @ref LL_MDMA_CHANNEL_4
2413 * @arg @ref LL_MDMA_CHANNEL_5
2414 * @arg @ref LL_MDMA_CHANNEL_6
2415 * @arg @ref LL_MDMA_CHANNEL_7
2416 * @arg @ref LL_MDMA_CHANNEL_8
2417 * @arg @ref LL_MDMA_CHANNEL_9
2418 * @arg @ref LL_MDMA_CHANNEL_10
2419 * @arg @ref LL_MDMA_CHANNEL_11
2420 * @arg @ref LL_MDMA_CHANNEL_12
2421 * @arg @ref LL_MDMA_CHANNEL_13
2422 * @arg @ref LL_MDMA_CHANNEL_14
2423 * @arg @ref LL_MDMA_CHANNEL_15
2424 * @retval Returned value can be one of the following values:
2425 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_INCREMENT
2426 * @arg @ref LL_MDMA_BLK_RPT_DEST_ADDR_DECREMENT
2427 * @retval None
2428 */
LL_MDMA_GetBlkRepeatDestAddrUpdate(MDMA_TypeDef * MDMAx,uint32_t Channel)2429 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatDestAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel)
2430 {
2431 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2432
2433 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRDUM));
2434 }
2435
2436 /**
2437 * @brief Set Block Repeat Source address Update Mode.
2438 * @rmtoll CBNDTR BRSUM LL_MDMA_SetBlkRepeatSrcAddrUpdate
2439 * @param MDMAx MDMAx Instance
2440 * @param Channel This parameter can be one of the following values:
2441 * @arg @ref LL_MDMA_CHANNEL_0
2442 * @arg @ref LL_MDMA_CHANNEL_1
2443 * @arg @ref LL_MDMA_CHANNEL_2
2444 * @arg @ref LL_MDMA_CHANNEL_3
2445 * @arg @ref LL_MDMA_CHANNEL_4
2446 * @arg @ref LL_MDMA_CHANNEL_5
2447 * @arg @ref LL_MDMA_CHANNEL_6
2448 * @arg @ref LL_MDMA_CHANNEL_7
2449 * @arg @ref LL_MDMA_CHANNEL_8
2450 * @arg @ref LL_MDMA_CHANNEL_9
2451 * @arg @ref LL_MDMA_CHANNEL_10
2452 * @arg @ref LL_MDMA_CHANNEL_11
2453 * @arg @ref LL_MDMA_CHANNEL_12
2454 * @arg @ref LL_MDMA_CHANNEL_13
2455 * @arg @ref LL_MDMA_CHANNEL_14
2456 * @arg @ref LL_MDMA_CHANNEL_15
2457 * @param SrcAdrUpdateMode This parameter can be one of the following values:
2458 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT
2459 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT
2460 * @retval None
2461 */
LL_MDMA_SetBlkRepeatSrcAddrUpdate(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrcAdrUpdateMode)2462 __STATIC_INLINE void LL_MDMA_SetBlkRepeatSrcAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAdrUpdateMode)
2463 {
2464 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2465
2466 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRSUM, SrcAdrUpdateMode);
2467 }
2468
2469 /**
2470 * @brief Get Block Repeat Source address Update Mode.
2471 * @rmtoll CBNDTR BRSUM LL_MDMA_GetBlkRepeatSrcAddrUpdate
2472 * @param MDMAx MDMAx Instance
2473 * @param Channel This parameter can be one of the following values:
2474 * @arg @ref LL_MDMA_CHANNEL_0
2475 * @arg @ref LL_MDMA_CHANNEL_1
2476 * @arg @ref LL_MDMA_CHANNEL_2
2477 * @arg @ref LL_MDMA_CHANNEL_3
2478 * @arg @ref LL_MDMA_CHANNEL_4
2479 * @arg @ref LL_MDMA_CHANNEL_5
2480 * @arg @ref LL_MDMA_CHANNEL_6
2481 * @arg @ref LL_MDMA_CHANNEL_7
2482 * @arg @ref LL_MDMA_CHANNEL_8
2483 * @arg @ref LL_MDMA_CHANNEL_9
2484 * @arg @ref LL_MDMA_CHANNEL_10
2485 * @arg @ref LL_MDMA_CHANNEL_11
2486 * @arg @ref LL_MDMA_CHANNEL_12
2487 * @arg @ref LL_MDMA_CHANNEL_13
2488 * @arg @ref LL_MDMA_CHANNEL_14
2489 * @arg @ref LL_MDMA_CHANNEL_15
2490 * @retval Returned value can be one of the following values:
2491 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_INCREMENT
2492 * @arg @ref LL_MDMA_BLK_RPT_SRC_ADDR_DECREMENT
2493 * @retval None
2494 */
LL_MDMA_GetBlkRepeatSrcAddrUpdate(MDMA_TypeDef * MDMAx,uint32_t Channel)2495 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRepeatSrcAddrUpdate(MDMA_TypeDef *MDMAx, uint32_t Channel)
2496 {
2497 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2498
2499 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBNDTR, MDMA_CBNDTR_BRSUM));
2500 }
2501
2502 /**
2503 * @brief Configure the Source and Destination addresses.
2504 * @note This API must not be called when the MDMA channel is enabled.
2505 * @rmtoll CSAR SAR LL_MDMA_ConfigAddresses\n
2506 * @rmtoll CDAR DAR LL_MDMA_ConfigAddresses
2507 * @param MDMAx MDMAx Instance
2508 * @param Channel This parameter can be one of the following values:
2509 * @arg @ref LL_MDMA_CHANNEL_0
2510 * @arg @ref LL_MDMA_CHANNEL_1
2511 * @arg @ref LL_MDMA_CHANNEL_2
2512 * @arg @ref LL_MDMA_CHANNEL_3
2513 * @arg @ref LL_MDMA_CHANNEL_4
2514 * @arg @ref LL_MDMA_CHANNEL_5
2515 * @arg @ref LL_MDMA_CHANNEL_6
2516 * @arg @ref LL_MDMA_CHANNEL_7
2517 * @arg @ref LL_MDMA_CHANNEL_8
2518 * @arg @ref LL_MDMA_CHANNEL_9
2519 * @arg @ref LL_MDMA_CHANNEL_10
2520 * @arg @ref LL_MDMA_CHANNEL_11
2521 * @arg @ref LL_MDMA_CHANNEL_12
2522 * @arg @ref LL_MDMA_CHANNEL_13
2523 * @arg @ref LL_MDMA_CHANNEL_14
2524 * @arg @ref LL_MDMA_CHANNEL_15
2525 * @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
2526 * @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
2527 * @retval None
2528 */
LL_MDMA_ConfigAddresses(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrcAddress,uint32_t DstAddress)2529 __STATIC_INLINE void LL_MDMA_ConfigAddresses(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress)
2530 {
2531 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2532
2533 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR, SrcAddress);
2534 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR, DstAddress);
2535 }
2536 /**
2537 * @brief Set transfer Source address.
2538 * @rmtoll CSAR SAR LL_MDMA_SetSourceAddress
2539 * @param MDMAx MDMAx Instance
2540 * @param Channel This parameter can be one of the following values:
2541 * @arg @ref LL_MDMA_CHANNEL_0
2542 * @arg @ref LL_MDMA_CHANNEL_1
2543 * @arg @ref LL_MDMA_CHANNEL_2
2544 * @arg @ref LL_MDMA_CHANNEL_3
2545 * @arg @ref LL_MDMA_CHANNEL_4
2546 * @arg @ref LL_MDMA_CHANNEL_5
2547 * @arg @ref LL_MDMA_CHANNEL_6
2548 * @arg @ref LL_MDMA_CHANNEL_7
2549 * @arg @ref LL_MDMA_CHANNEL_8
2550 * @arg @ref LL_MDMA_CHANNEL_9
2551 * @arg @ref LL_MDMA_CHANNEL_10
2552 * @arg @ref LL_MDMA_CHANNEL_11
2553 * @arg @ref LL_MDMA_CHANNEL_12
2554 * @arg @ref LL_MDMA_CHANNEL_13
2555 * @arg @ref LL_MDMA_CHANNEL_14
2556 * @arg @ref LL_MDMA_CHANNEL_15
2557 * @param SrcAddress Between 0 to 0xFFFFFFFF
2558 * @retval None
2559 */
LL_MDMA_SetSourceAddress(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrcAddress)2560 __STATIC_INLINE void LL_MDMA_SetSourceAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAddress)
2561 {
2562 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2563
2564 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR, SrcAddress);
2565 }
2566
2567 /**
2568 * @brief Get transfer Source address.
2569 * @rmtoll CSAR SAR LL_MDMA_GetSourceAddress
2570 * @param MDMAx MDMAx Instance
2571 * @param Channel This parameter can be one of the following values:
2572 * @arg @ref LL_MDMA_CHANNEL_0
2573 * @arg @ref LL_MDMA_CHANNEL_1
2574 * @arg @ref LL_MDMA_CHANNEL_2
2575 * @arg @ref LL_MDMA_CHANNEL_3
2576 * @arg @ref LL_MDMA_CHANNEL_4
2577 * @arg @ref LL_MDMA_CHANNEL_5
2578 * @arg @ref LL_MDMA_CHANNEL_6
2579 * @arg @ref LL_MDMA_CHANNEL_7
2580 * @arg @ref LL_MDMA_CHANNEL_8
2581 * @arg @ref LL_MDMA_CHANNEL_9
2582 * @arg @ref LL_MDMA_CHANNEL_10
2583 * @arg @ref LL_MDMA_CHANNEL_11
2584 * @arg @ref LL_MDMA_CHANNEL_12
2585 * @arg @ref LL_MDMA_CHANNEL_13
2586 * @arg @ref LL_MDMA_CHANNEL_14
2587 * @arg @ref LL_MDMA_CHANNEL_15
2588 * @retval Between 0 to 0xFFFFFFFF
2589 * @retval None
2590 */
LL_MDMA_GetSourceAddress(MDMA_TypeDef * MDMAx,uint32_t Channel)2591 __STATIC_INLINE uint32_t LL_MDMA_GetSourceAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
2592 {
2593 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2594
2595 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CSAR));
2596 }
2597
2598 /**
2599 * @brief Set transfer Destination address.
2600 * @rmtoll CDAR DAR LL_MDMA_SetDestinationAddress
2601 * @param MDMAx MDMAx Instance
2602 * @param Channel This parameter can be one of the following values:
2603 * @arg @ref LL_MDMA_CHANNEL_0
2604 * @arg @ref LL_MDMA_CHANNEL_1
2605 * @arg @ref LL_MDMA_CHANNEL_2
2606 * @arg @ref LL_MDMA_CHANNEL_3
2607 * @arg @ref LL_MDMA_CHANNEL_4
2608 * @arg @ref LL_MDMA_CHANNEL_5
2609 * @arg @ref LL_MDMA_CHANNEL_6
2610 * @arg @ref LL_MDMA_CHANNEL_7
2611 * @arg @ref LL_MDMA_CHANNEL_8
2612 * @arg @ref LL_MDMA_CHANNEL_9
2613 * @arg @ref LL_MDMA_CHANNEL_10
2614 * @arg @ref LL_MDMA_CHANNEL_11
2615 * @arg @ref LL_MDMA_CHANNEL_12
2616 * @arg @ref LL_MDMA_CHANNEL_13
2617 * @arg @ref LL_MDMA_CHANNEL_14
2618 * @arg @ref LL_MDMA_CHANNEL_15
2619 * @param DestAddress Between 0 to 0xFFFFFFFF
2620 * @retval None
2621 */
LL_MDMA_SetDestinationAddress(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t DestAddress)2622 __STATIC_INLINE void LL_MDMA_SetDestinationAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAddress)
2623 {
2624 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2625
2626 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR, DestAddress);
2627 }
2628
2629 /**
2630 * @brief Get transfer Destination address.
2631 * @rmtoll CDAR DAR LL_MDMA_GetDestinationAddress
2632 * @param MDMAx MDMAx Instance
2633 * @param Channel This parameter can be one of the following values:
2634 * @arg @ref LL_MDMA_CHANNEL_0
2635 * @arg @ref LL_MDMA_CHANNEL_1
2636 * @arg @ref LL_MDMA_CHANNEL_2
2637 * @arg @ref LL_MDMA_CHANNEL_3
2638 * @arg @ref LL_MDMA_CHANNEL_4
2639 * @arg @ref LL_MDMA_CHANNEL_5
2640 * @arg @ref LL_MDMA_CHANNEL_6
2641 * @arg @ref LL_MDMA_CHANNEL_7
2642 * @arg @ref LL_MDMA_CHANNEL_8
2643 * @arg @ref LL_MDMA_CHANNEL_9
2644 * @arg @ref LL_MDMA_CHANNEL_10
2645 * @arg @ref LL_MDMA_CHANNEL_11
2646 * @arg @ref LL_MDMA_CHANNEL_12
2647 * @arg @ref LL_MDMA_CHANNEL_13
2648 * @arg @ref LL_MDMA_CHANNEL_14
2649 * @arg @ref LL_MDMA_CHANNEL_15
2650 * @retval Between 0 to 0xFFFFFFFF
2651 * @retval None
2652 */
LL_MDMA_GetDestinationAddress(MDMA_TypeDef * MDMAx,uint32_t Channel)2653 __STATIC_INLINE uint32_t LL_MDMA_GetDestinationAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
2654 {
2655 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2656
2657 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CDAR));
2658 }
2659
2660 /**
2661 * @brief Configure the Source and Destination Block repeat addresses Update value.
2662 * @note This API must not be called when the MDMA channel is enabled.
2663 * @rmtoll CBRUR DUV LL_MDMA_ConfigBlkRptAddrUpdateValue\n
2664 * @rmtoll CBRUR SUV LL_MDMA_ConfigBlkRptAddrUpdateValue
2665 * @param MDMAx MDMAx Instance
2666 * @param Channel This parameter can be one of the following values:
2667 * @arg @ref LL_MDMA_CHANNEL_0
2668 * @arg @ref LL_MDMA_CHANNEL_1
2669 * @arg @ref LL_MDMA_CHANNEL_2
2670 * @arg @ref LL_MDMA_CHANNEL_3
2671 * @arg @ref LL_MDMA_CHANNEL_4
2672 * @arg @ref LL_MDMA_CHANNEL_5
2673 * @arg @ref LL_MDMA_CHANNEL_6
2674 * @arg @ref LL_MDMA_CHANNEL_7
2675 * @arg @ref LL_MDMA_CHANNEL_8
2676 * @arg @ref LL_MDMA_CHANNEL_9
2677 * @arg @ref LL_MDMA_CHANNEL_10
2678 * @arg @ref LL_MDMA_CHANNEL_11
2679 * @arg @ref LL_MDMA_CHANNEL_12
2680 * @arg @ref LL_MDMA_CHANNEL_13
2681 * @arg @ref LL_MDMA_CHANNEL_14
2682 * @arg @ref LL_MDMA_CHANNEL_15
2683 * @param SrctAdrUpdateValue Min_Data = 0 and Max_Data = 0x0000FFFF
2684 * @param DestAdrUpdateValue Between Min_Data = 0 and Max_Data = 0x0000FFFF
2685 * @retval None
2686 */
LL_MDMA_ConfigBlkRptAddrUpdateValue(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrctAdrUpdateValue,uint32_t DestAdrUpdateValue)2687 __STATIC_INLINE void LL_MDMA_ConfigBlkRptAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrctAdrUpdateValue, uint32_t DestAdrUpdateValue)
2688 {
2689 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2690
2691 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR,
2692 (SrctAdrUpdateValue & MDMA_CBRUR_SUV_Msk) | ((DestAdrUpdateValue << MDMA_CBRUR_DUV_Pos) & MDMA_CBRUR_DUV_Msk));
2693 }
2694
2695 /**
2696 * @brief Set transfer Destination address Update Value.
2697 * @rmtoll CBRUR DUV LL_MDMA_SetBlkRptDestAddrUpdateValue
2698 * @param MDMAx MDMAx Instance
2699 * @param Channel This parameter can be one of the following values:
2700 * @arg @ref LL_MDMA_CHANNEL_0
2701 * @arg @ref LL_MDMA_CHANNEL_1
2702 * @arg @ref LL_MDMA_CHANNEL_2
2703 * @arg @ref LL_MDMA_CHANNEL_3
2704 * @arg @ref LL_MDMA_CHANNEL_4
2705 * @arg @ref LL_MDMA_CHANNEL_5
2706 * @arg @ref LL_MDMA_CHANNEL_6
2707 * @arg @ref LL_MDMA_CHANNEL_7
2708 * @arg @ref LL_MDMA_CHANNEL_8
2709 * @arg @ref LL_MDMA_CHANNEL_9
2710 * @arg @ref LL_MDMA_CHANNEL_10
2711 * @arg @ref LL_MDMA_CHANNEL_11
2712 * @arg @ref LL_MDMA_CHANNEL_12
2713 * @arg @ref LL_MDMA_CHANNEL_13
2714 * @arg @ref LL_MDMA_CHANNEL_14
2715 * @arg @ref LL_MDMA_CHANNEL_15
2716 * @param DestAdrUpdateValue Between 0 to 0x0000FFFF
2717 * @retval None
2718 */
LL_MDMA_SetBlkRptDestAddrUpdateValue(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t DestAdrUpdateValue)2719 __STATIC_INLINE void LL_MDMA_SetBlkRptDestAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestAdrUpdateValue)
2720 {
2721 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2722
2723 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_DUV,
2724 ((DestAdrUpdateValue << MDMA_CBRUR_DUV_Pos) & MDMA_CBRUR_DUV_Msk));
2725 }
2726
2727 /**
2728 * @brief Get transfer Destination address Update Value.
2729 * @rmtoll CBRUR DUV LL_MDMA_GetBlkRptDestAddrUpdateValue
2730 * @param MDMAx MDMAx Instance
2731 * @param Channel This parameter can be one of the following values:
2732 * @arg @ref LL_MDMA_CHANNEL_0
2733 * @arg @ref LL_MDMA_CHANNEL_1
2734 * @arg @ref LL_MDMA_CHANNEL_2
2735 * @arg @ref LL_MDMA_CHANNEL_3
2736 * @arg @ref LL_MDMA_CHANNEL_4
2737 * @arg @ref LL_MDMA_CHANNEL_5
2738 * @arg @ref LL_MDMA_CHANNEL_6
2739 * @arg @ref LL_MDMA_CHANNEL_7
2740 * @arg @ref LL_MDMA_CHANNEL_8
2741 * @arg @ref LL_MDMA_CHANNEL_9
2742 * @arg @ref LL_MDMA_CHANNEL_10
2743 * @arg @ref LL_MDMA_CHANNEL_11
2744 * @arg @ref LL_MDMA_CHANNEL_12
2745 * @arg @ref LL_MDMA_CHANNEL_13
2746 * @arg @ref LL_MDMA_CHANNEL_14
2747 * @arg @ref LL_MDMA_CHANNEL_15
2748 * @retval Between 0 to 0x0000FFFF
2749 * @retval None
2750 */
LL_MDMA_GetBlkRptDestAddrUpdateValue(MDMA_TypeDef * MDMAx,uint32_t Channel)2751 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRptDestAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel)
2752 {
2753 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2754
2755 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_DUV) >> MDMA_CBRUR_DUV_Pos);
2756 }
2757
2758 /**
2759 * @brief Set transfer Source address Update Value.
2760 * @rmtoll CBRUR SUV LL_MDMA_SetBlkRptSrcAddrUpdateValue
2761 * @param MDMAx MDMAx Instance
2762 * @param Channel This parameter can be one of the following values:
2763 * @arg @ref LL_MDMA_CHANNEL_0
2764 * @arg @ref LL_MDMA_CHANNEL_1
2765 * @arg @ref LL_MDMA_CHANNEL_2
2766 * @arg @ref LL_MDMA_CHANNEL_3
2767 * @arg @ref LL_MDMA_CHANNEL_4
2768 * @arg @ref LL_MDMA_CHANNEL_5
2769 * @arg @ref LL_MDMA_CHANNEL_6
2770 * @arg @ref LL_MDMA_CHANNEL_7
2771 * @arg @ref LL_MDMA_CHANNEL_8
2772 * @arg @ref LL_MDMA_CHANNEL_9
2773 * @arg @ref LL_MDMA_CHANNEL_10
2774 * @arg @ref LL_MDMA_CHANNEL_11
2775 * @arg @ref LL_MDMA_CHANNEL_12
2776 * @arg @ref LL_MDMA_CHANNEL_13
2777 * @arg @ref LL_MDMA_CHANNEL_14
2778 * @arg @ref LL_MDMA_CHANNEL_15
2779 * @param SrcAdrUpdateValue Between 0 to 0x0000FFFF
2780 * @retval None
2781 */
LL_MDMA_SetBlkRptSrcAddrUpdateValue(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrcAdrUpdateValue)2782 __STATIC_INLINE void LL_MDMA_SetBlkRptSrcAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcAdrUpdateValue)
2783 {
2784 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2785
2786 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_SUV, SrcAdrUpdateValue);
2787 }
2788
2789 /**
2790 * @brief Get transfer Source address Update Value.
2791 * @rmtoll CBRUR SUV LL_MDMA_GetBlkRptSrcAddrUpdateValue
2792 * @param MDMAx MDMAx Instance
2793 * @param Channel This parameter can be one of the following values:
2794 * @arg @ref LL_MDMA_CHANNEL_0
2795 * @arg @ref LL_MDMA_CHANNEL_1
2796 * @arg @ref LL_MDMA_CHANNEL_2
2797 * @arg @ref LL_MDMA_CHANNEL_3
2798 * @arg @ref LL_MDMA_CHANNEL_4
2799 * @arg @ref LL_MDMA_CHANNEL_5
2800 * @arg @ref LL_MDMA_CHANNEL_6
2801 * @arg @ref LL_MDMA_CHANNEL_7
2802 * @arg @ref LL_MDMA_CHANNEL_8
2803 * @arg @ref LL_MDMA_CHANNEL_9
2804 * @arg @ref LL_MDMA_CHANNEL_10
2805 * @arg @ref LL_MDMA_CHANNEL_11
2806 * @arg @ref LL_MDMA_CHANNEL_12
2807 * @arg @ref LL_MDMA_CHANNEL_13
2808 * @arg @ref LL_MDMA_CHANNEL_14
2809 * @arg @ref LL_MDMA_CHANNEL_15
2810 * @retval Between 0 to 0x0000FFFF
2811 * @retval None
2812 */
LL_MDMA_GetBlkRptSrcAddrUpdateValue(MDMA_TypeDef * MDMAx,uint32_t Channel)2813 __STATIC_INLINE uint32_t LL_MDMA_GetBlkRptSrcAddrUpdateValue(MDMA_TypeDef *MDMAx, uint32_t Channel)
2814 {
2815 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2816
2817 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CBRUR, MDMA_CBRUR_SUV));
2818 }
2819
2820 /**
2821 * @brief Set transfer Link Address.
2822 * @rmtoll CLAR LAR LL_MDMA_SetLinkAddress
2823 * @param MDMAx MDMAx Instance
2824 * @param Channel This parameter can be one of the following values:
2825 * @arg @ref LL_MDMA_CHANNEL_0
2826 * @arg @ref LL_MDMA_CHANNEL_1
2827 * @arg @ref LL_MDMA_CHANNEL_2
2828 * @arg @ref LL_MDMA_CHANNEL_3
2829 * @arg @ref LL_MDMA_CHANNEL_4
2830 * @arg @ref LL_MDMA_CHANNEL_5
2831 * @arg @ref LL_MDMA_CHANNEL_6
2832 * @arg @ref LL_MDMA_CHANNEL_7
2833 * @arg @ref LL_MDMA_CHANNEL_8
2834 * @arg @ref LL_MDMA_CHANNEL_9
2835 * @arg @ref LL_MDMA_CHANNEL_10
2836 * @arg @ref LL_MDMA_CHANNEL_11
2837 * @arg @ref LL_MDMA_CHANNEL_12
2838 * @arg @ref LL_MDMA_CHANNEL_13
2839 * @arg @ref LL_MDMA_CHANNEL_14
2840 * @arg @ref LL_MDMA_CHANNEL_15
2841 * @param LinkAddress Between 0 to 0xFFFFFFFF
2842 * @retval None
2843 */
LL_MDMA_SetLinkAddress(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t LinkAddress)2844 __STATIC_INLINE void LL_MDMA_SetLinkAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t LinkAddress)
2845 {
2846 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2847
2848 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CLAR, LinkAddress);
2849 }
2850
2851 /**
2852 * @brief Get transfer Link Address.
2853 * @rmtoll CLAR LAR LL_MDMA_GetLinkAddress
2854 * @param MDMAx MDMAx Instance
2855 * @param Channel This parameter can be one of the following values:
2856 * @arg @ref LL_MDMA_CHANNEL_0
2857 * @arg @ref LL_MDMA_CHANNEL_1
2858 * @arg @ref LL_MDMA_CHANNEL_2
2859 * @arg @ref LL_MDMA_CHANNEL_3
2860 * @arg @ref LL_MDMA_CHANNEL_4
2861 * @arg @ref LL_MDMA_CHANNEL_5
2862 * @arg @ref LL_MDMA_CHANNEL_6
2863 * @arg @ref LL_MDMA_CHANNEL_7
2864 * @arg @ref LL_MDMA_CHANNEL_8
2865 * @arg @ref LL_MDMA_CHANNEL_9
2866 * @arg @ref LL_MDMA_CHANNEL_10
2867 * @arg @ref LL_MDMA_CHANNEL_11
2868 * @arg @ref LL_MDMA_CHANNEL_12
2869 * @arg @ref LL_MDMA_CHANNEL_13
2870 * @arg @ref LL_MDMA_CHANNEL_14
2871 * @arg @ref LL_MDMA_CHANNEL_15
2872 * @retval Between 0 to 0xFFFFFFFF
2873 * @retval None
2874 */
LL_MDMA_GetLinkAddress(MDMA_TypeDef * MDMAx,uint32_t Channel)2875 __STATIC_INLINE uint32_t LL_MDMA_GetLinkAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
2876 {
2877 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2878
2879 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CLAR));
2880 }
2881
2882 /**
2883 * @brief Configure MDMA source and destination bus selection.
2884 * @rmtoll CTBR DBUS LL_MDMA_ConfigBusSelection\n
2885 * @rmtoll CTBR SBUS LL_MDMA_ConfigBusSelection
2886 * @param MDMAx MDMAx Instance
2887 * @param Channel This parameter can be one of the following values:
2888 * @arg @ref LL_MDMA_CHANNEL_0
2889 * @arg @ref LL_MDMA_CHANNEL_1
2890 * @arg @ref LL_MDMA_CHANNEL_2
2891 * @arg @ref LL_MDMA_CHANNEL_3
2892 * @arg @ref LL_MDMA_CHANNEL_4
2893 * @arg @ref LL_MDMA_CHANNEL_5
2894 * @arg @ref LL_MDMA_CHANNEL_6
2895 * @arg @ref LL_MDMA_CHANNEL_7
2896 * @arg @ref LL_MDMA_CHANNEL_8
2897 * @arg @ref LL_MDMA_CHANNEL_9
2898 * @arg @ref LL_MDMA_CHANNEL_10
2899 * @arg @ref LL_MDMA_CHANNEL_11
2900 * @arg @ref LL_MDMA_CHANNEL_12
2901 * @arg @ref LL_MDMA_CHANNEL_13
2902 * @arg @ref LL_MDMA_CHANNEL_14
2903 * @arg @ref LL_MDMA_CHANNEL_15
2904 * @param Configuration This parameter must be a combination of all the following values:
2905 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI or @ref LL_MDMA_DEST_BUS_AHB_TCM
2906 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI or @ref LL_MDMA_SRC_BUS_AHB_TCM
2907 * @retval None
2908 */
LL_MDMA_ConfigBusSelection(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t Configuration)2909 __STATIC_INLINE void LL_MDMA_ConfigBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t Configuration)
2910 {
2911 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2912
2913 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR,
2914 MDMA_CTBR_DBUS | MDMA_CTBR_SBUS,
2915 Configuration);
2916 }
2917
2918 /**
2919 * @brief Set Destination Bus Selection.
2920 * @rmtoll CTBR DBUS LL_MDMA_SetDestBusSelection
2921 * @param MDMAx MDMAx Instance
2922 * @param Channel This parameter can be one of the following values:
2923 * @arg @ref LL_MDMA_CHANNEL_0
2924 * @arg @ref LL_MDMA_CHANNEL_1
2925 * @arg @ref LL_MDMA_CHANNEL_2
2926 * @arg @ref LL_MDMA_CHANNEL_3
2927 * @arg @ref LL_MDMA_CHANNEL_4
2928 * @arg @ref LL_MDMA_CHANNEL_5
2929 * @arg @ref LL_MDMA_CHANNEL_6
2930 * @arg @ref LL_MDMA_CHANNEL_7
2931 * @arg @ref LL_MDMA_CHANNEL_8
2932 * @arg @ref LL_MDMA_CHANNEL_9
2933 * @arg @ref LL_MDMA_CHANNEL_10
2934 * @arg @ref LL_MDMA_CHANNEL_11
2935 * @arg @ref LL_MDMA_CHANNEL_12
2936 * @arg @ref LL_MDMA_CHANNEL_13
2937 * @arg @ref LL_MDMA_CHANNEL_14
2938 * @arg @ref LL_MDMA_CHANNEL_15
2939 * @param DestBus This parameter can be one of the following values:
2940 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI
2941 * @arg @ref LL_MDMA_DEST_BUS_AHB_TCM
2942 * @retval None
2943 */
LL_MDMA_SetDestBusSelection(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t DestBus)2944 __STATIC_INLINE void LL_MDMA_SetDestBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t DestBus)
2945 {
2946 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2947
2948 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_DBUS, DestBus);
2949 }
2950
2951 /**
2952 * @brief Get Destination Bus Selection.
2953 * @rmtoll CTBR DBUS LL_MDMA_GetDestBusSelection
2954 * @param MDMAx MDMAx Instance
2955 * @param Channel This parameter can be one of the following values:
2956 * @arg @ref LL_MDMA_CHANNEL_0
2957 * @arg @ref LL_MDMA_CHANNEL_1
2958 * @arg @ref LL_MDMA_CHANNEL_2
2959 * @arg @ref LL_MDMA_CHANNEL_3
2960 * @arg @ref LL_MDMA_CHANNEL_4
2961 * @arg @ref LL_MDMA_CHANNEL_5
2962 * @arg @ref LL_MDMA_CHANNEL_6
2963 * @arg @ref LL_MDMA_CHANNEL_7
2964 * @arg @ref LL_MDMA_CHANNEL_8
2965 * @arg @ref LL_MDMA_CHANNEL_9
2966 * @arg @ref LL_MDMA_CHANNEL_10
2967 * @arg @ref LL_MDMA_CHANNEL_11
2968 * @arg @ref LL_MDMA_CHANNEL_12
2969 * @arg @ref LL_MDMA_CHANNEL_13
2970 * @arg @ref LL_MDMA_CHANNEL_14
2971 * @arg @ref LL_MDMA_CHANNEL_15
2972 * @retval Returned value can be one of the following values:
2973 * @arg @ref LL_MDMA_DEST_BUS_SYSTEM_AXI
2974 * @arg @ref LL_MDMA_DEST_BUS_AHB_TCM
2975 * @retval None
2976 */
LL_MDMA_GetDestBusSelection(MDMA_TypeDef * MDMAx,uint32_t Channel)2977 __STATIC_INLINE uint32_t LL_MDMA_GetDestBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel)
2978 {
2979 uint32_t mdma_base_addr = (uint32_t)MDMAx;
2980
2981 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_DBUS));
2982 }
2983
2984 /**
2985 * @brief Set Source Bus Selection.
2986 * @rmtoll CTBR SBUS LL_MDMA_SetSrcBusSelection
2987 * @param MDMAx MDMAx Instance
2988 * @param Channel This parameter can be one of the following values:
2989 * @arg @ref LL_MDMA_CHANNEL_0
2990 * @arg @ref LL_MDMA_CHANNEL_1
2991 * @arg @ref LL_MDMA_CHANNEL_2
2992 * @arg @ref LL_MDMA_CHANNEL_3
2993 * @arg @ref LL_MDMA_CHANNEL_4
2994 * @arg @ref LL_MDMA_CHANNEL_5
2995 * @arg @ref LL_MDMA_CHANNEL_6
2996 * @arg @ref LL_MDMA_CHANNEL_7
2997 * @arg @ref LL_MDMA_CHANNEL_8
2998 * @arg @ref LL_MDMA_CHANNEL_9
2999 * @arg @ref LL_MDMA_CHANNEL_10
3000 * @arg @ref LL_MDMA_CHANNEL_11
3001 * @arg @ref LL_MDMA_CHANNEL_12
3002 * @arg @ref LL_MDMA_CHANNEL_13
3003 * @arg @ref LL_MDMA_CHANNEL_14
3004 * @arg @ref LL_MDMA_CHANNEL_15
3005 * @param SrcBus This parameter can be one of the following values:
3006 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI
3007 * @arg @ref LL_MDMA_SRC_BUS_AHB_TCM
3008 * @retval None
3009 */
LL_MDMA_SetSrcBusSelection(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t SrcBus)3010 __STATIC_INLINE void LL_MDMA_SetSrcBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t SrcBus)
3011 {
3012 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3013
3014 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_SBUS, SrcBus);
3015 }
3016
3017 /**
3018 * @brief Get Source Bus Selection.
3019 * @rmtoll CTBR SBUS LL_MDMA_GetSrcBusSelection
3020 * @param MDMAx MDMAx Instance
3021 * @param Channel This parameter can be one of the following values:
3022 * @arg @ref LL_MDMA_CHANNEL_0
3023 * @arg @ref LL_MDMA_CHANNEL_1
3024 * @arg @ref LL_MDMA_CHANNEL_2
3025 * @arg @ref LL_MDMA_CHANNEL_3
3026 * @arg @ref LL_MDMA_CHANNEL_4
3027 * @arg @ref LL_MDMA_CHANNEL_5
3028 * @arg @ref LL_MDMA_CHANNEL_6
3029 * @arg @ref LL_MDMA_CHANNEL_7
3030 * @arg @ref LL_MDMA_CHANNEL_8
3031 * @arg @ref LL_MDMA_CHANNEL_9
3032 * @arg @ref LL_MDMA_CHANNEL_10
3033 * @arg @ref LL_MDMA_CHANNEL_11
3034 * @arg @ref LL_MDMA_CHANNEL_12
3035 * @arg @ref LL_MDMA_CHANNEL_13
3036 * @arg @ref LL_MDMA_CHANNEL_14
3037 * @arg @ref LL_MDMA_CHANNEL_15
3038 * @retval Returned value can be one of the following values:
3039 * @arg @ref LL_MDMA_SRC_BUS_SYSTEM_AXI
3040 * @arg @ref LL_MDMA_SRC_BUS_AHB_TCM
3041 * @retval None
3042 */
LL_MDMA_GetSrcBusSelection(MDMA_TypeDef * MDMAx,uint32_t Channel)3043 __STATIC_INLINE uint32_t LL_MDMA_GetSrcBusSelection(MDMA_TypeDef *MDMAx, uint32_t Channel)
3044 {
3045 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3046
3047 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_SBUS));
3048 }
3049
3050 /**
3051 * @brief Set Transfer hardware trigger (Request).
3052 * @rmtoll CTBR TSEL LL_MDMA_SetHWTrigger
3053 * @param MDMAx MDMAx Instance
3054 * @param Channel This parameter can be one of the following values:
3055 * @arg @ref LL_MDMA_CHANNEL_0
3056 * @arg @ref LL_MDMA_CHANNEL_1
3057 * @arg @ref LL_MDMA_CHANNEL_2
3058 * @arg @ref LL_MDMA_CHANNEL_3
3059 * @arg @ref LL_MDMA_CHANNEL_4
3060 * @arg @ref LL_MDMA_CHANNEL_5
3061 * @arg @ref LL_MDMA_CHANNEL_6
3062 * @arg @ref LL_MDMA_CHANNEL_7
3063 * @arg @ref LL_MDMA_CHANNEL_8
3064 * @arg @ref LL_MDMA_CHANNEL_9
3065 * @arg @ref LL_MDMA_CHANNEL_10
3066 * @arg @ref LL_MDMA_CHANNEL_11
3067 * @arg @ref LL_MDMA_CHANNEL_12
3068 * @arg @ref LL_MDMA_CHANNEL_13
3069 * @arg @ref LL_MDMA_CHANNEL_14
3070 * @arg @ref LL_MDMA_CHANNEL_15
3071 * @param HWRequest This parameter can be one of the following values:
3072 * @arg @ref LL_MDMA_REQ_DMA1_STREAM0_TC
3073 * @arg @ref LL_MDMA_REQ_DMA1_STREAM1_TC
3074 * @arg @ref LL_MDMA_REQ_DMA1_STREAM2_TC
3075 * @arg @ref LL_MDMA_REQ_DMA1_STREAM3_TC
3076 * @arg @ref LL_MDMA_REQ_DMA1_STREAM4_TC
3077 * @arg @ref LL_MDMA_REQ_DMA1_STREAM5_TC
3078 * @arg @ref LL_MDMA_REQ_DMA1_STREAM6_TC
3079 * @arg @ref LL_MDMA_REQ_DMA1_STREAM7_TC
3080 * @arg @ref LL_MDMA_REQ_DMA2_STREAM0_TC
3081 * @arg @ref LL_MDMA_REQ_DMA2_STREAM1_TC
3082 * @arg @ref LL_MDMA_REQ_DMA2_STREAM2_TC
3083 * @arg @ref LL_MDMA_REQ_DMA2_STREAM3_TC
3084 * @arg @ref LL_MDMA_REQ_DMA2_STREAM4_TC
3085 * @arg @ref LL_MDMA_REQ_DMA2_STREAM5_TC
3086 * @arg @ref LL_MDMA_REQ_DMA2_STREAM6_TC
3087 * @arg @ref LL_MDMA_REQ_DMA2_STREAM7_TC
3088 * @arg @ref LL_MDMA_REQ_LTDC_LINE_IT (*)
3089 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_TH (*)
3090 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_NF (*)
3091 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_TH (*)
3092 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_NE (*)
3093 * @arg @ref LL_MDMA_REQ_JPEG_END_CONVERSION (*)
3094 * @arg @ref LL_MDMA_REQ_QUADSPI_FIFO_TH (*)
3095 * @arg @ref LL_MDMA_REQ_QUADSPI_TC (*)
3096 * @arg @ref LL_MDMA_REQ_OCTOSPI1_FIFO_TH (*)
3097 * @arg @ref LL_MDMA_REQ_OCTOSPI1_TC (*)
3098 * @arg @ref LL_MDMA_REQ_DMA2D_CLUT_TC
3099 * @arg @ref LL_MDMA_REQ_DMA2D_TC
3100 * @arg @ref LL_MDMA_REQ_DMA2D_TW
3101 * @arg @ref LL_MDMA_REQ_DSI_TEARING_EFFECT (*)
3102 * @arg @ref LL_MDMA_REQ_DSI_END_REFRESH (*)
3103 * @arg @ref LL_MDMA_REQ_SDMMC1_END_DATA
3104 * @arg @ref LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER (*)
3105 * @arg @ref LL_MDMA_REQ_SDMMC1_COMMAND_END (*)
3106 * @arg @ref LL_MDMA_REQ_OCTOSPI2_FIFO_TH (*)
3107 * @arg @ref LL_MDMA_REQ_OCTOSPI2_TC (*)
3108 * @note (*) Availability depends on devices.
3109 * @retval None
3110 */
LL_MDMA_SetHWTrigger(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t HWRequest)3111 __STATIC_INLINE void LL_MDMA_SetHWTrigger(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t HWRequest)
3112 {
3113 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3114
3115 MODIFY_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_TSEL, HWRequest);
3116 }
3117
3118 /**
3119 * @brief Get Transfer hardware trigger (Request).
3120 * @rmtoll CTBR TSEL LL_MDMA_GetHWTrigger
3121 * @param MDMAx MDMAx Instance
3122 * @param Channel This parameter can be one of the following values:
3123 * @arg @ref LL_MDMA_CHANNEL_0
3124 * @arg @ref LL_MDMA_CHANNEL_1
3125 * @arg @ref LL_MDMA_CHANNEL_2
3126 * @arg @ref LL_MDMA_CHANNEL_3
3127 * @arg @ref LL_MDMA_CHANNEL_4
3128 * @arg @ref LL_MDMA_CHANNEL_5
3129 * @arg @ref LL_MDMA_CHANNEL_6
3130 * @arg @ref LL_MDMA_CHANNEL_7
3131 * @arg @ref LL_MDMA_CHANNEL_8
3132 * @arg @ref LL_MDMA_CHANNEL_9
3133 * @arg @ref LL_MDMA_CHANNEL_10
3134 * @arg @ref LL_MDMA_CHANNEL_11
3135 * @arg @ref LL_MDMA_CHANNEL_12
3136 * @arg @ref LL_MDMA_CHANNEL_13
3137 * @arg @ref LL_MDMA_CHANNEL_14
3138 * @arg @ref LL_MDMA_CHANNEL_15
3139 * @retval Returned value can be one of the following values:
3140 * @arg @ref LL_MDMA_REQ_DMA1_STREAM0_TC
3141 * @arg @ref LL_MDMA_REQ_DMA1_STREAM1_TC
3142 * @arg @ref LL_MDMA_REQ_DMA1_STREAM2_TC
3143 * @arg @ref LL_MDMA_REQ_DMA1_STREAM3_TC
3144 * @arg @ref LL_MDMA_REQ_DMA1_STREAM4_TC
3145 * @arg @ref LL_MDMA_REQ_DMA1_STREAM5_TC
3146 * @arg @ref LL_MDMA_REQ_DMA1_STREAM6_TC
3147 * @arg @ref LL_MDMA_REQ_DMA1_STREAM7_TC
3148 * @arg @ref LL_MDMA_REQ_DMA2_STREAM0_TC
3149 * @arg @ref LL_MDMA_REQ_DMA2_STREAM1_TC
3150 * @arg @ref LL_MDMA_REQ_DMA2_STREAM2_TC
3151 * @arg @ref LL_MDMA_REQ_DMA2_STREAM3_TC
3152 * @arg @ref LL_MDMA_REQ_DMA2_STREAM4_TC
3153 * @arg @ref LL_MDMA_REQ_DMA2_STREAM5_TC
3154 * @arg @ref LL_MDMA_REQ_DMA2_STREAM6_TC
3155 * @arg @ref LL_MDMA_REQ_DMA2_STREAM7_TC
3156 * @arg @ref LL_MDMA_REQ_LTDC_LINE_IT (*)
3157 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_TH (*)
3158 * @arg @ref LL_MDMA_REQ_JPEG_INFIFO_NF (*)
3159 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_TH (*)
3160 * @arg @ref LL_MDMA_REQ_JPEG_OUTFIFO_NE (*)
3161 * @arg @ref LL_MDMA_REQ_JPEG_END_CONVERSION (*)
3162 * @arg @ref LL_MDMA_REQ_QUADSPI_FIFO_TH (*)
3163 * @arg @ref LL_MDMA_REQ_QUADSPI_TC (*)
3164 * @arg @ref LL_MDMA_REQ_OCTOSPI1_FIFO_TH (*)
3165 * @arg @ref LL_MDMA_REQ_OCTOSPI1_TC (*)
3166 * @arg @ref LL_MDMA_REQ_DMA2D_CLUT_TC
3167 * @arg @ref LL_MDMA_REQ_DMA2D_TC
3168 * @arg @ref LL_MDMA_REQ_DMA2D_TW
3169 * @arg @ref LL_MDMA_REQ_DSI_TEARING_EFFECT (*)
3170 * @arg @ref LL_MDMA_REQ_DSI_END_REFRESH (*)
3171 * @arg @ref LL_MDMA_REQ_SDMMC1_END_DATA
3172 * @arg @ref LL_MDMA_REQ_SDMMC1_DMA_ENDBUFFER (*)
3173 * @arg @ref LL_MDMA_REQ_SDMMC1_COMMAND_END (*)
3174 * @arg @ref LL_MDMA_REQ_OCTOSPI2_FIFO_TH (*)
3175 * @arg @ref LL_MDMA_REQ_OCTOSPI2_TC (*)
3176 * @note (*) Availability depends on devices.
3177 * @retval None
3178 */
LL_MDMA_GetHWTrigger(MDMA_TypeDef * MDMAx,uint32_t Channel)3179 __STATIC_INLINE uint32_t LL_MDMA_GetHWTrigger(MDMA_TypeDef *MDMAx, uint32_t Channel)
3180 {
3181 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3182
3183 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CTBR, MDMA_CTBR_TSEL));
3184 }
3185
3186 /**
3187 * @brief Set Mask Address.
3188 * @rmtoll CMAR MAR LL_MDMA_SetMaskAddress
3189 * @param MDMAx MDMAx Instance
3190 * @param Channel This parameter can be one of the following values:
3191 * @arg @ref LL_MDMA_CHANNEL_0
3192 * @arg @ref LL_MDMA_CHANNEL_1
3193 * @arg @ref LL_MDMA_CHANNEL_2
3194 * @arg @ref LL_MDMA_CHANNEL_3
3195 * @arg @ref LL_MDMA_CHANNEL_4
3196 * @arg @ref LL_MDMA_CHANNEL_5
3197 * @arg @ref LL_MDMA_CHANNEL_6
3198 * @arg @ref LL_MDMA_CHANNEL_7
3199 * @arg @ref LL_MDMA_CHANNEL_8
3200 * @arg @ref LL_MDMA_CHANNEL_9
3201 * @arg @ref LL_MDMA_CHANNEL_10
3202 * @arg @ref LL_MDMA_CHANNEL_11
3203 * @arg @ref LL_MDMA_CHANNEL_12
3204 * @arg @ref LL_MDMA_CHANNEL_13
3205 * @arg @ref LL_MDMA_CHANNEL_14
3206 * @arg @ref LL_MDMA_CHANNEL_15
3207 * @param MaskAddress Between 0 to 0xFFFFFFFF
3208 * @retval None
3209 */
LL_MDMA_SetMaskAddress(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t MaskAddress)3210 __STATIC_INLINE void LL_MDMA_SetMaskAddress(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t MaskAddress)
3211 {
3212 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3213
3214 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMAR, MaskAddress);
3215 }
3216
3217 /**
3218 * @brief Get Mask Address.
3219 * @rmtoll CMAR MAR LL_MDMA_GetMaskAddress
3220 * @param MDMAx MDMAx Instance
3221 * @param Channel This parameter can be one of the following values:
3222 * @arg @ref LL_MDMA_CHANNEL_0
3223 * @arg @ref LL_MDMA_CHANNEL_1
3224 * @arg @ref LL_MDMA_CHANNEL_2
3225 * @arg @ref LL_MDMA_CHANNEL_3
3226 * @arg @ref LL_MDMA_CHANNEL_4
3227 * @arg @ref LL_MDMA_CHANNEL_5
3228 * @arg @ref LL_MDMA_CHANNEL_6
3229 * @arg @ref LL_MDMA_CHANNEL_7
3230 * @arg @ref LL_MDMA_CHANNEL_8
3231 * @arg @ref LL_MDMA_CHANNEL_9
3232 * @arg @ref LL_MDMA_CHANNEL_10
3233 * @arg @ref LL_MDMA_CHANNEL_11
3234 * @arg @ref LL_MDMA_CHANNEL_12
3235 * @arg @ref LL_MDMA_CHANNEL_13
3236 * @arg @ref LL_MDMA_CHANNEL_14
3237 * @arg @ref LL_MDMA_CHANNEL_15
3238 * @retval Between 0 to 0xFFFFFFFF
3239 * @retval None
3240 */
LL_MDMA_GetMaskAddress(MDMA_TypeDef * MDMAx,uint32_t Channel)3241 __STATIC_INLINE uint32_t LL_MDMA_GetMaskAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
3242 {
3243 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3244
3245 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMAR));
3246 }
3247
3248 /**
3249 * @brief Set Mask Data.
3250 * @rmtoll CMDR MDR LL_MDMA_SetMaskData
3251 * @param MDMAx MDMAx Instance
3252 * @param Channel This parameter can be one of the following values:
3253 * @arg @ref LL_MDMA_CHANNEL_0
3254 * @arg @ref LL_MDMA_CHANNEL_1
3255 * @arg @ref LL_MDMA_CHANNEL_2
3256 * @arg @ref LL_MDMA_CHANNEL_3
3257 * @arg @ref LL_MDMA_CHANNEL_4
3258 * @arg @ref LL_MDMA_CHANNEL_5
3259 * @arg @ref LL_MDMA_CHANNEL_6
3260 * @arg @ref LL_MDMA_CHANNEL_7
3261 * @arg @ref LL_MDMA_CHANNEL_8
3262 * @arg @ref LL_MDMA_CHANNEL_9
3263 * @arg @ref LL_MDMA_CHANNEL_10
3264 * @arg @ref LL_MDMA_CHANNEL_11
3265 * @arg @ref LL_MDMA_CHANNEL_12
3266 * @arg @ref LL_MDMA_CHANNEL_13
3267 * @arg @ref LL_MDMA_CHANNEL_14
3268 * @arg @ref LL_MDMA_CHANNEL_15
3269 * @param MaskData Between 0 to 0xFFFFFFFF
3270 * @retval None
3271 */
LL_MDMA_SetMaskData(MDMA_TypeDef * MDMAx,uint32_t Channel,uint32_t MaskData)3272 __STATIC_INLINE void LL_MDMA_SetMaskData(MDMA_TypeDef *MDMAx, uint32_t Channel, uint32_t MaskData)
3273 {
3274 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3275
3276 WRITE_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMDR, MaskData);
3277 }
3278
3279 /**
3280 * @brief Get Mask Data.
3281 * @rmtoll CMDR MDR LL_MDMA_GetMaskData
3282 * @param MDMAx MDMAx Instance
3283 * @param Channel This parameter can be one of the following values:
3284 * @arg @ref LL_MDMA_CHANNEL_0
3285 * @arg @ref LL_MDMA_CHANNEL_1
3286 * @arg @ref LL_MDMA_CHANNEL_2
3287 * @arg @ref LL_MDMA_CHANNEL_3
3288 * @arg @ref LL_MDMA_CHANNEL_4
3289 * @arg @ref LL_MDMA_CHANNEL_5
3290 * @arg @ref LL_MDMA_CHANNEL_6
3291 * @arg @ref LL_MDMA_CHANNEL_7
3292 * @arg @ref LL_MDMA_CHANNEL_8
3293 * @arg @ref LL_MDMA_CHANNEL_9
3294 * @arg @ref LL_MDMA_CHANNEL_10
3295 * @arg @ref LL_MDMA_CHANNEL_11
3296 * @arg @ref LL_MDMA_CHANNEL_12
3297 * @arg @ref LL_MDMA_CHANNEL_13
3298 * @arg @ref LL_MDMA_CHANNEL_14
3299 * @arg @ref LL_MDMA_CHANNEL_15
3300 * @retval Between 0 to 0xFFFFFFFF
3301 * @retval None
3302 */
LL_MDMA_GetMaskData(MDMA_TypeDef * MDMAx,uint32_t Channel)3303 __STATIC_INLINE uint32_t LL_MDMA_GetMaskData(MDMA_TypeDef *MDMAx, uint32_t Channel)
3304 {
3305 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3306
3307 return (READ_REG(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CMDR));
3308 }
3309
3310 /**
3311 * @brief Get Transfer Error Direction.
3312 * @rmtoll CESR TED LL_MDMA_GetXferErrorDirection
3313 * @param MDMAx MDMAx Instance
3314 * @param Channel This parameter can be one of the following values:
3315 * @arg @ref LL_MDMA_CHANNEL_0
3316 * @arg @ref LL_MDMA_CHANNEL_1
3317 * @arg @ref LL_MDMA_CHANNEL_2
3318 * @arg @ref LL_MDMA_CHANNEL_3
3319 * @arg @ref LL_MDMA_CHANNEL_4
3320 * @arg @ref LL_MDMA_CHANNEL_5
3321 * @arg @ref LL_MDMA_CHANNEL_6
3322 * @arg @ref LL_MDMA_CHANNEL_7
3323 * @arg @ref LL_MDMA_CHANNEL_8
3324 * @arg @ref LL_MDMA_CHANNEL_9
3325 * @arg @ref LL_MDMA_CHANNEL_10
3326 * @arg @ref LL_MDMA_CHANNEL_11
3327 * @arg @ref LL_MDMA_CHANNEL_12
3328 * @arg @ref LL_MDMA_CHANNEL_13
3329 * @arg @ref LL_MDMA_CHANNEL_14
3330 * @arg @ref LL_MDMA_CHANNEL_15
3331 * @retval Returned value can be one of the following values:
3332 * @arg @ref LL_MDMA_READ_ERROR
3333 * @arg @ref LL_MDMA_WRITE_ERROR
3334 * @retval None
3335 */
LL_MDMA_GetXferErrorDirection(MDMA_TypeDef * MDMAx,uint32_t Channel)3336 __STATIC_INLINE uint32_t LL_MDMA_GetXferErrorDirection(MDMA_TypeDef *MDMAx, uint32_t Channel)
3337 {
3338 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3339
3340 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TED));
3341 }
3342
3343 /**
3344 * @brief Get Transfer Error LSB Address.
3345 * @rmtoll CESR TEA LL_MDMA_GetXferErrorLSBAddress
3346 * @param MDMAx MDMAx Instance
3347 * @param Channel This parameter can be one of the following values:
3348 * @arg @ref LL_MDMA_CHANNEL_0
3349 * @arg @ref LL_MDMA_CHANNEL_1
3350 * @arg @ref LL_MDMA_CHANNEL_2
3351 * @arg @ref LL_MDMA_CHANNEL_3
3352 * @arg @ref LL_MDMA_CHANNEL_4
3353 * @arg @ref LL_MDMA_CHANNEL_5
3354 * @arg @ref LL_MDMA_CHANNEL_6
3355 * @arg @ref LL_MDMA_CHANNEL_7
3356 * @arg @ref LL_MDMA_CHANNEL_8
3357 * @arg @ref LL_MDMA_CHANNEL_9
3358 * @arg @ref LL_MDMA_CHANNEL_10
3359 * @arg @ref LL_MDMA_CHANNEL_11
3360 * @arg @ref LL_MDMA_CHANNEL_12
3361 * @arg @ref LL_MDMA_CHANNEL_13
3362 * @arg @ref LL_MDMA_CHANNEL_14
3363 * @arg @ref LL_MDMA_CHANNEL_15
3364 * @retval Between 0 to 0x0000007F
3365 * @retval None
3366 */
LL_MDMA_GetXferErrorLSBAddress(MDMA_TypeDef * MDMAx,uint32_t Channel)3367 __STATIC_INLINE uint32_t LL_MDMA_GetXferErrorLSBAddress(MDMA_TypeDef *MDMAx, uint32_t Channel)
3368 {
3369 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3370
3371 return (READ_BIT(((MDMA_Channel_TypeDef *)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TEA));
3372 }
3373
3374 /**
3375 * @}
3376 */
3377
3378 /** @defgroup MDMA_LL_EF_FLAG_Management FLAG_Management
3379 * @{
3380 */
3381
3382 /**
3383 * @brief Get MDMA Channel x Global Interrupt flag.
3384 * @rmtoll GISR0 GIFx LL_MDMA_IsActiveFlag_GI
3385 * @param MDMAx MDMAx Instance
3386 * @param Channel This parameter can be one of the following values:
3387 * @arg @ref LL_MDMA_CHANNEL_0
3388 * @arg @ref LL_MDMA_CHANNEL_1
3389 * @arg @ref LL_MDMA_CHANNEL_2
3390 * @arg @ref LL_MDMA_CHANNEL_3
3391 * @arg @ref LL_MDMA_CHANNEL_4
3392 * @arg @ref LL_MDMA_CHANNEL_5
3393 * @arg @ref LL_MDMA_CHANNEL_6
3394 * @arg @ref LL_MDMA_CHANNEL_7
3395 * @arg @ref LL_MDMA_CHANNEL_8
3396 * @arg @ref LL_MDMA_CHANNEL_9
3397 * @arg @ref LL_MDMA_CHANNEL_10
3398 * @arg @ref LL_MDMA_CHANNEL_11
3399 * @arg @ref LL_MDMA_CHANNEL_12
3400 * @arg @ref LL_MDMA_CHANNEL_13
3401 * @arg @ref LL_MDMA_CHANNEL_14
3402 * @arg @ref LL_MDMA_CHANNEL_15
3403 * @retval State of bit (1 or 0).
3404 */
LL_MDMA_IsActiveFlag_GI(MDMA_TypeDef * MDMAx,uint32_t Channel)3405 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_GI(MDMA_TypeDef *MDMAx, uint32_t Channel)
3406 {
3407 return ((READ_BIT(MDMAx->GISR0 ,(MDMA_GISR0_GIF0 << (Channel & 0x0000000FU)))==(MDMA_GISR0_GIF0 << (Channel & 0x0000000FU))) ? 1UL : 0UL);
3408 }
3409
3410 /**
3411 * @brief Get MDMA Channel x Transfer Error interrupt flag.
3412 * @rmtoll CISR TEIF LL_MDMA_IsActiveFlag_TE
3413 * @param MDMAx MDMAx Instance
3414 * @param Channel This parameter can be one of the following values:
3415 * @arg @ref LL_MDMA_CHANNEL_0
3416 * @arg @ref LL_MDMA_CHANNEL_1
3417 * @arg @ref LL_MDMA_CHANNEL_2
3418 * @arg @ref LL_MDMA_CHANNEL_3
3419 * @arg @ref LL_MDMA_CHANNEL_4
3420 * @arg @ref LL_MDMA_CHANNEL_5
3421 * @arg @ref LL_MDMA_CHANNEL_6
3422 * @arg @ref LL_MDMA_CHANNEL_7
3423 * @arg @ref LL_MDMA_CHANNEL_8
3424 * @arg @ref LL_MDMA_CHANNEL_9
3425 * @arg @ref LL_MDMA_CHANNEL_10
3426 * @arg @ref LL_MDMA_CHANNEL_11
3427 * @arg @ref LL_MDMA_CHANNEL_12
3428 * @arg @ref LL_MDMA_CHANNEL_13
3429 * @arg @ref LL_MDMA_CHANNEL_14
3430 * @arg @ref LL_MDMA_CHANNEL_15
3431 * @retval State of bit (1 or 0).
3432 */
LL_MDMA_IsActiveFlag_TE(MDMA_TypeDef * MDMAx,uint32_t Channel)3433 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3434 {
3435 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3436
3437 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_TEIF) == (MDMA_CISR_TEIF)) ? 1UL : 0UL);
3438 }
3439
3440 /**
3441 * @brief Get MDMA Channel x Channel Transfer Complete interrupt flag.
3442 * @rmtoll CISR CTCIF LL_MDMA_IsActiveFlag_CTC
3443 * @param MDMAx MDMAx Instance
3444 * @param Channel This parameter can be one of the following values:
3445 * @arg @ref LL_MDMA_CHANNEL_0
3446 * @arg @ref LL_MDMA_CHANNEL_1
3447 * @arg @ref LL_MDMA_CHANNEL_2
3448 * @arg @ref LL_MDMA_CHANNEL_3
3449 * @arg @ref LL_MDMA_CHANNEL_4
3450 * @arg @ref LL_MDMA_CHANNEL_5
3451 * @arg @ref LL_MDMA_CHANNEL_6
3452 * @arg @ref LL_MDMA_CHANNEL_7
3453 * @arg @ref LL_MDMA_CHANNEL_8
3454 * @arg @ref LL_MDMA_CHANNEL_9
3455 * @arg @ref LL_MDMA_CHANNEL_10
3456 * @arg @ref LL_MDMA_CHANNEL_11
3457 * @arg @ref LL_MDMA_CHANNEL_12
3458 * @arg @ref LL_MDMA_CHANNEL_13
3459 * @arg @ref LL_MDMA_CHANNEL_14
3460 * @arg @ref LL_MDMA_CHANNEL_15
3461 * @retval State of bit (1 or 0).
3462 */
LL_MDMA_IsActiveFlag_CTC(MDMA_TypeDef * MDMAx,uint32_t Channel)3463 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3464 {
3465 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3466
3467 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_CTCIF) == (MDMA_CISR_CTCIF)) ? 1UL : 0UL);
3468 }
3469
3470 /**
3471 * @brief Get MDMA Channel x Block Repeat Transfer complete interrupt flag.
3472 * @rmtoll CISR BRTIF LL_MDMA_IsActiveFlag_BRT
3473 * @param MDMAx MDMAx Instance
3474 * @param Channel This parameter can be one of the following values:
3475 * @arg @ref LL_MDMA_CHANNEL_0
3476 * @arg @ref LL_MDMA_CHANNEL_1
3477 * @arg @ref LL_MDMA_CHANNEL_2
3478 * @arg @ref LL_MDMA_CHANNEL_3
3479 * @arg @ref LL_MDMA_CHANNEL_4
3480 * @arg @ref LL_MDMA_CHANNEL_5
3481 * @arg @ref LL_MDMA_CHANNEL_6
3482 * @arg @ref LL_MDMA_CHANNEL_7
3483 * @arg @ref LL_MDMA_CHANNEL_8
3484 * @arg @ref LL_MDMA_CHANNEL_9
3485 * @arg @ref LL_MDMA_CHANNEL_10
3486 * @arg @ref LL_MDMA_CHANNEL_11
3487 * @arg @ref LL_MDMA_CHANNEL_12
3488 * @arg @ref LL_MDMA_CHANNEL_13
3489 * @arg @ref LL_MDMA_CHANNEL_14
3490 * @arg @ref LL_MDMA_CHANNEL_15
3491 * @retval State of bit (1 or 0).
3492 */
LL_MDMA_IsActiveFlag_BRT(MDMA_TypeDef * MDMAx,uint32_t Channel)3493 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3494 {
3495 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3496
3497 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_BRTIF) == (MDMA_CISR_BRTIF)) ? 1UL : 0UL);
3498 }
3499
3500 /**
3501 * @brief Get MDMA Channel x Block Transfer complete interrupt flag.
3502 * @rmtoll CISR BTIF LL_MDMA_IsActiveFlag_BT
3503 * @param MDMAx MDMAx Instance
3504 * @param Channel This parameter can be one of the following values:
3505 * @arg @ref LL_MDMA_CHANNEL_0
3506 * @arg @ref LL_MDMA_CHANNEL_1
3507 * @arg @ref LL_MDMA_CHANNEL_2
3508 * @arg @ref LL_MDMA_CHANNEL_3
3509 * @arg @ref LL_MDMA_CHANNEL_4
3510 * @arg @ref LL_MDMA_CHANNEL_5
3511 * @arg @ref LL_MDMA_CHANNEL_6
3512 * @arg @ref LL_MDMA_CHANNEL_7
3513 * @arg @ref LL_MDMA_CHANNEL_8
3514 * @arg @ref LL_MDMA_CHANNEL_9
3515 * @arg @ref LL_MDMA_CHANNEL_10
3516 * @arg @ref LL_MDMA_CHANNEL_11
3517 * @arg @ref LL_MDMA_CHANNEL_12
3518 * @arg @ref LL_MDMA_CHANNEL_13
3519 * @arg @ref LL_MDMA_CHANNEL_14
3520 * @arg @ref LL_MDMA_CHANNEL_15
3521 * @retval State of bit (1 or 0).
3522 */
LL_MDMA_IsActiveFlag_BT(MDMA_TypeDef * MDMAx,uint32_t Channel)3523 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3524 {
3525 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3526
3527 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_BTIF) == (MDMA_CISR_BTIF)) ? 1UL : 0UL);
3528 }
3529
3530 /**
3531 * @brief Get MDMA Channel x buffer transfer complete interrupt flag.
3532 * @rmtoll CISR TCIF LL_MDMA_IsActiveFlag_TC
3533 * @param MDMAx MDMAx Instance
3534 * @param Channel This parameter can be one of the following values:
3535 * @arg @ref LL_MDMA_CHANNEL_0
3536 * @arg @ref LL_MDMA_CHANNEL_1
3537 * @arg @ref LL_MDMA_CHANNEL_2
3538 * @arg @ref LL_MDMA_CHANNEL_3
3539 * @arg @ref LL_MDMA_CHANNEL_4
3540 * @arg @ref LL_MDMA_CHANNEL_5
3541 * @arg @ref LL_MDMA_CHANNEL_6
3542 * @arg @ref LL_MDMA_CHANNEL_7
3543 * @arg @ref LL_MDMA_CHANNEL_8
3544 * @arg @ref LL_MDMA_CHANNEL_9
3545 * @arg @ref LL_MDMA_CHANNEL_10
3546 * @arg @ref LL_MDMA_CHANNEL_11
3547 * @arg @ref LL_MDMA_CHANNEL_12
3548 * @arg @ref LL_MDMA_CHANNEL_13
3549 * @arg @ref LL_MDMA_CHANNEL_14
3550 * @arg @ref LL_MDMA_CHANNEL_15
3551 * @retval State of bit (1 or 0).
3552 */
LL_MDMA_IsActiveFlag_TC(MDMA_TypeDef * MDMAx,uint32_t Channel)3553 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3554 {
3555 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3556
3557 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_TCIF) == (MDMA_CISR_TCIF)) ? 1UL : 0UL);
3558 }
3559
3560 /**
3561 * @brief Get MDMA Channel x ReQuest Active flag.
3562 * @rmtoll CISR CRQA LL_MDMA_IsActiveFlag_CRQA
3563 * @param MDMAx MDMAx Instance
3564 * @param Channel This parameter can be one of the following values:
3565 * @arg @ref LL_MDMA_CHANNEL_0
3566 * @arg @ref LL_MDMA_CHANNEL_1
3567 * @arg @ref LL_MDMA_CHANNEL_2
3568 * @arg @ref LL_MDMA_CHANNEL_3
3569 * @arg @ref LL_MDMA_CHANNEL_4
3570 * @arg @ref LL_MDMA_CHANNEL_5
3571 * @arg @ref LL_MDMA_CHANNEL_6
3572 * @arg @ref LL_MDMA_CHANNEL_7
3573 * @arg @ref LL_MDMA_CHANNEL_8
3574 * @arg @ref LL_MDMA_CHANNEL_9
3575 * @arg @ref LL_MDMA_CHANNEL_10
3576 * @arg @ref LL_MDMA_CHANNEL_11
3577 * @arg @ref LL_MDMA_CHANNEL_12
3578 * @arg @ref LL_MDMA_CHANNEL_13
3579 * @arg @ref LL_MDMA_CHANNEL_14
3580 * @arg @ref LL_MDMA_CHANNEL_15
3581 * @retval State of bit (1 or 0).
3582 */
LL_MDMA_IsActiveFlag_CRQA(MDMA_TypeDef * MDMAx,uint32_t Channel)3583 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_CRQA(MDMA_TypeDef *MDMAx, uint32_t Channel)
3584 {
3585 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3586
3587 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CISR, MDMA_CISR_CRQA) == (MDMA_CISR_CRQA)) ? 1UL : 0UL);
3588 }
3589
3590 /**
3591 * @brief Get MDMA Channel x Block Size Error flag.
3592 * @rmtoll CESR BSE LL_MDMA_IsActiveFlag_BSE
3593 * @param MDMAx MDMAx Instance
3594 * @param Channel This parameter can be one of the following values:
3595 * @arg @ref LL_MDMA_CHANNEL_0
3596 * @arg @ref LL_MDMA_CHANNEL_1
3597 * @arg @ref LL_MDMA_CHANNEL_2
3598 * @arg @ref LL_MDMA_CHANNEL_3
3599 * @arg @ref LL_MDMA_CHANNEL_4
3600 * @arg @ref LL_MDMA_CHANNEL_5
3601 * @arg @ref LL_MDMA_CHANNEL_6
3602 * @arg @ref LL_MDMA_CHANNEL_7
3603 * @arg @ref LL_MDMA_CHANNEL_8
3604 * @arg @ref LL_MDMA_CHANNEL_9
3605 * @arg @ref LL_MDMA_CHANNEL_10
3606 * @arg @ref LL_MDMA_CHANNEL_11
3607 * @arg @ref LL_MDMA_CHANNEL_12
3608 * @arg @ref LL_MDMA_CHANNEL_13
3609 * @arg @ref LL_MDMA_CHANNEL_14
3610 * @arg @ref LL_MDMA_CHANNEL_15
3611 * @retval State of bit (1 or 0).
3612 */
LL_MDMA_IsActiveFlag_BSE(MDMA_TypeDef * MDMAx,uint32_t Channel)3613 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_BSE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3614 {
3615 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3616
3617 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_BSE) == (MDMA_CESR_BSE)) ? 1UL : 0UL);
3618 }
3619
3620 /**
3621 * @brief Get MDMA Channel x Address/Size Error flag.
3622 * @rmtoll CESR ASE LL_MDMA_IsActiveFlag_ASE
3623 * @param MDMAx MDMAx Instance
3624 * @param Channel This parameter can be one of the following values:
3625 * @arg @ref LL_MDMA_CHANNEL_0
3626 * @arg @ref LL_MDMA_CHANNEL_1
3627 * @arg @ref LL_MDMA_CHANNEL_2
3628 * @arg @ref LL_MDMA_CHANNEL_3
3629 * @arg @ref LL_MDMA_CHANNEL_4
3630 * @arg @ref LL_MDMA_CHANNEL_5
3631 * @arg @ref LL_MDMA_CHANNEL_6
3632 * @arg @ref LL_MDMA_CHANNEL_7
3633 * @arg @ref LL_MDMA_CHANNEL_8
3634 * @arg @ref LL_MDMA_CHANNEL_9
3635 * @arg @ref LL_MDMA_CHANNEL_10
3636 * @arg @ref LL_MDMA_CHANNEL_11
3637 * @arg @ref LL_MDMA_CHANNEL_12
3638 * @arg @ref LL_MDMA_CHANNEL_13
3639 * @arg @ref LL_MDMA_CHANNEL_14
3640 * @arg @ref LL_MDMA_CHANNEL_15
3641 * @retval State of bit (1 or 0).
3642 */
LL_MDMA_IsActiveFlag_ASE(MDMA_TypeDef * MDMAx,uint32_t Channel)3643 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_ASE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3644 {
3645 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3646
3647 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_ASE) == (MDMA_CESR_ASE)) ? 1UL : 0UL);
3648 }
3649
3650 /**
3651 * @brief Get MDMA Channel x Transfer Error Mask Data flag.
3652 * @rmtoll CESR TEMD LL_MDMA_IsActiveFlag_TEMD
3653 * @param MDMAx MDMAx Instance
3654 * @param Channel This parameter can be one of the following values:
3655 * @arg @ref LL_MDMA_CHANNEL_0
3656 * @arg @ref LL_MDMA_CHANNEL_1
3657 * @arg @ref LL_MDMA_CHANNEL_2
3658 * @arg @ref LL_MDMA_CHANNEL_3
3659 * @arg @ref LL_MDMA_CHANNEL_4
3660 * @arg @ref LL_MDMA_CHANNEL_5
3661 * @arg @ref LL_MDMA_CHANNEL_6
3662 * @arg @ref LL_MDMA_CHANNEL_7
3663 * @arg @ref LL_MDMA_CHANNEL_8
3664 * @arg @ref LL_MDMA_CHANNEL_9
3665 * @arg @ref LL_MDMA_CHANNEL_10
3666 * @arg @ref LL_MDMA_CHANNEL_11
3667 * @arg @ref LL_MDMA_CHANNEL_12
3668 * @arg @ref LL_MDMA_CHANNEL_13
3669 * @arg @ref LL_MDMA_CHANNEL_14
3670 * @arg @ref LL_MDMA_CHANNEL_15
3671 * @retval State of bit (1 or 0).
3672 */
LL_MDMA_IsActiveFlag_TEMD(MDMA_TypeDef * MDMAx,uint32_t Channel)3673 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TEMD(MDMA_TypeDef *MDMAx, uint32_t Channel)
3674 {
3675 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3676
3677 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TEMD) == (MDMA_CESR_TEMD)) ? 1UL : 0UL);
3678 }
3679
3680 /**
3681 * @brief Get MDMA Channel x Transfer Error Link Data flag.
3682 * @rmtoll CESR TELD LL_MDMA_IsActiveFlag_TELD
3683 * @param MDMAx MDMAx Instance
3684 * @param Channel This parameter can be one of the following values:
3685 * @arg @ref LL_MDMA_CHANNEL_0
3686 * @arg @ref LL_MDMA_CHANNEL_1
3687 * @arg @ref LL_MDMA_CHANNEL_2
3688 * @arg @ref LL_MDMA_CHANNEL_3
3689 * @arg @ref LL_MDMA_CHANNEL_4
3690 * @arg @ref LL_MDMA_CHANNEL_5
3691 * @arg @ref LL_MDMA_CHANNEL_6
3692 * @arg @ref LL_MDMA_CHANNEL_7
3693 * @arg @ref LL_MDMA_CHANNEL_8
3694 * @arg @ref LL_MDMA_CHANNEL_9
3695 * @arg @ref LL_MDMA_CHANNEL_10
3696 * @arg @ref LL_MDMA_CHANNEL_11
3697 * @arg @ref LL_MDMA_CHANNEL_12
3698 * @arg @ref LL_MDMA_CHANNEL_13
3699 * @arg @ref LL_MDMA_CHANNEL_14
3700 * @arg @ref LL_MDMA_CHANNEL_15
3701 * @retval State of bit (1 or 0).
3702 */
LL_MDMA_IsActiveFlag_TELD(MDMA_TypeDef * MDMAx,uint32_t Channel)3703 __STATIC_INLINE uint32_t LL_MDMA_IsActiveFlag_TELD(MDMA_TypeDef *MDMAx, uint32_t Channel)
3704 {
3705 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3706
3707 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CESR, MDMA_CESR_TELD) == (MDMA_CESR_TELD)) ? 1UL : 0UL);
3708 }
3709
3710 /**
3711 * @brief Clear MDMA Channel x Transfer Error interrupt flag.
3712 * @rmtoll CIFCR CTEIF LL_MDMA_ClearFlag_TE
3713 * @param MDMAx MDMAx Instance
3714 * @param Channel This parameter can be one of the following values:
3715 * @arg @ref LL_MDMA_CHANNEL_0
3716 * @arg @ref LL_MDMA_CHANNEL_1
3717 * @arg @ref LL_MDMA_CHANNEL_2
3718 * @arg @ref LL_MDMA_CHANNEL_3
3719 * @arg @ref LL_MDMA_CHANNEL_4
3720 * @arg @ref LL_MDMA_CHANNEL_5
3721 * @arg @ref LL_MDMA_CHANNEL_6
3722 * @arg @ref LL_MDMA_CHANNEL_7
3723 * @arg @ref LL_MDMA_CHANNEL_8
3724 * @arg @ref LL_MDMA_CHANNEL_9
3725 * @arg @ref LL_MDMA_CHANNEL_10
3726 * @arg @ref LL_MDMA_CHANNEL_11
3727 * @arg @ref LL_MDMA_CHANNEL_12
3728 * @arg @ref LL_MDMA_CHANNEL_13
3729 * @arg @ref LL_MDMA_CHANNEL_14
3730 * @arg @ref LL_MDMA_CHANNEL_15
3731 * @retval None
3732 */
LL_MDMA_ClearFlag_TE(MDMA_TypeDef * MDMAx,uint32_t Channel)3733 __STATIC_INLINE void LL_MDMA_ClearFlag_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3734 {
3735 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3736
3737 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CTEIF);
3738 }
3739
3740 /**
3741 * @brief Clear MDMA Channel x Channel Transfer Complete interrupt flag.
3742 * @rmtoll CIFCR CCTCIF LL_MDMA_ClearFlag_CTC
3743 * @param MDMAx MDMAx Instance
3744 * @param Channel This parameter can be one of the following values:
3745 * @arg @ref LL_MDMA_CHANNEL_0
3746 * @arg @ref LL_MDMA_CHANNEL_1
3747 * @arg @ref LL_MDMA_CHANNEL_2
3748 * @arg @ref LL_MDMA_CHANNEL_3
3749 * @arg @ref LL_MDMA_CHANNEL_4
3750 * @arg @ref LL_MDMA_CHANNEL_5
3751 * @arg @ref LL_MDMA_CHANNEL_6
3752 * @arg @ref LL_MDMA_CHANNEL_7
3753 * @arg @ref LL_MDMA_CHANNEL_8
3754 * @arg @ref LL_MDMA_CHANNEL_9
3755 * @arg @ref LL_MDMA_CHANNEL_10
3756 * @arg @ref LL_MDMA_CHANNEL_11
3757 * @arg @ref LL_MDMA_CHANNEL_12
3758 * @arg @ref LL_MDMA_CHANNEL_13
3759 * @arg @ref LL_MDMA_CHANNEL_14
3760 * @arg @ref LL_MDMA_CHANNEL_15
3761 * @retval None
3762 */
LL_MDMA_ClearFlag_CTC(MDMA_TypeDef * MDMAx,uint32_t Channel)3763 __STATIC_INLINE void LL_MDMA_ClearFlag_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3764 {
3765 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3766
3767 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CCTCIF);
3768 }
3769
3770 /**
3771 * @brief Clear MDMA Channel x Block Repeat Transfer complete interrupt flag.
3772 * @rmtoll CIFCR CBRTIF LL_MDMA_ClearFlag_BRT
3773 * @param MDMAx MDMAx Instance
3774 * @param Channel This parameter can be one of the following values:
3775 * @arg @ref LL_MDMA_CHANNEL_0
3776 * @arg @ref LL_MDMA_CHANNEL_1
3777 * @arg @ref LL_MDMA_CHANNEL_2
3778 * @arg @ref LL_MDMA_CHANNEL_3
3779 * @arg @ref LL_MDMA_CHANNEL_4
3780 * @arg @ref LL_MDMA_CHANNEL_5
3781 * @arg @ref LL_MDMA_CHANNEL_6
3782 * @arg @ref LL_MDMA_CHANNEL_7
3783 * @arg @ref LL_MDMA_CHANNEL_8
3784 * @arg @ref LL_MDMA_CHANNEL_9
3785 * @arg @ref LL_MDMA_CHANNEL_10
3786 * @arg @ref LL_MDMA_CHANNEL_11
3787 * @arg @ref LL_MDMA_CHANNEL_12
3788 * @arg @ref LL_MDMA_CHANNEL_13
3789 * @arg @ref LL_MDMA_CHANNEL_14
3790 * @arg @ref LL_MDMA_CHANNEL_15
3791 * @retval None
3792 */
LL_MDMA_ClearFlag_BRT(MDMA_TypeDef * MDMAx,uint32_t Channel)3793 __STATIC_INLINE void LL_MDMA_ClearFlag_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3794 {
3795 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3796
3797 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CBRTIF);
3798 }
3799
3800 /**
3801 * @brief Clear MDMA Channel x Block Transfer complete interrupt flag.
3802 * @rmtoll CIFCR CBTIF LL_MDMA_ClearFlag_BT
3803 * @param MDMAx MDMAx Instance
3804 * @param Channel This parameter can be one of the following values:
3805 * @arg @ref LL_MDMA_CHANNEL_0
3806 * @arg @ref LL_MDMA_CHANNEL_1
3807 * @arg @ref LL_MDMA_CHANNEL_2
3808 * @arg @ref LL_MDMA_CHANNEL_3
3809 * @arg @ref LL_MDMA_CHANNEL_4
3810 * @arg @ref LL_MDMA_CHANNEL_5
3811 * @arg @ref LL_MDMA_CHANNEL_6
3812 * @arg @ref LL_MDMA_CHANNEL_7
3813 * @arg @ref LL_MDMA_CHANNEL_8
3814 * @arg @ref LL_MDMA_CHANNEL_9
3815 * @arg @ref LL_MDMA_CHANNEL_10
3816 * @arg @ref LL_MDMA_CHANNEL_11
3817 * @arg @ref LL_MDMA_CHANNEL_12
3818 * @arg @ref LL_MDMA_CHANNEL_13
3819 * @arg @ref LL_MDMA_CHANNEL_14
3820 * @arg @ref LL_MDMA_CHANNEL_15
3821 * @retval None
3822 */
LL_MDMA_ClearFlag_BT(MDMA_TypeDef * MDMAx,uint32_t Channel)3823 __STATIC_INLINE void LL_MDMA_ClearFlag_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3824 {
3825 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3826
3827 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CBTIF);
3828 }
3829
3830 /**
3831 * @brief Clear MDMA Channel x buffer transfer Complete Interrupt Flag.
3832 * @rmtoll CIFCR CLTCIF LL_MDMA_ClearFlag_TC
3833 * @param MDMAx MDMAx Instance
3834 * @param Channel This parameter can be one of the following values:
3835 * @arg @ref LL_MDMA_CHANNEL_0
3836 * @arg @ref LL_MDMA_CHANNEL_1
3837 * @arg @ref LL_MDMA_CHANNEL_2
3838 * @arg @ref LL_MDMA_CHANNEL_3
3839 * @arg @ref LL_MDMA_CHANNEL_4
3840 * @arg @ref LL_MDMA_CHANNEL_5
3841 * @arg @ref LL_MDMA_CHANNEL_6
3842 * @arg @ref LL_MDMA_CHANNEL_7
3843 * @arg @ref LL_MDMA_CHANNEL_8
3844 * @arg @ref LL_MDMA_CHANNEL_9
3845 * @arg @ref LL_MDMA_CHANNEL_10
3846 * @arg @ref LL_MDMA_CHANNEL_11
3847 * @arg @ref LL_MDMA_CHANNEL_12
3848 * @arg @ref LL_MDMA_CHANNEL_13
3849 * @arg @ref LL_MDMA_CHANNEL_14
3850 * @arg @ref LL_MDMA_CHANNEL_15
3851 * @retval None
3852 */
LL_MDMA_ClearFlag_TC(MDMA_TypeDef * MDMAx,uint32_t Channel)3853 __STATIC_INLINE void LL_MDMA_ClearFlag_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3854 {
3855 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3856
3857 WRITE_REG(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CIFCR ,MDMA_CIFCR_CLTCIF);
3858 }
3859
3860 /**
3861 * @}
3862 */
3863
3864 /** @defgroup MDMA_LL_EF_IT_Management IT_Management
3865 * @{
3866 */
3867
3868 /**
3869 * @brief Enable MDMA Channel x Transfer Error interrupt.
3870 * @rmtoll CCR TEIE LL_MDMA_EnableIT_TE
3871 * @param MDMAx MDMAx Instance
3872 * @param Channel This parameter can be one of the following values:
3873 * @arg @ref LL_MDMA_CHANNEL_0
3874 * @arg @ref LL_MDMA_CHANNEL_1
3875 * @arg @ref LL_MDMA_CHANNEL_2
3876 * @arg @ref LL_MDMA_CHANNEL_3
3877 * @arg @ref LL_MDMA_CHANNEL_4
3878 * @arg @ref LL_MDMA_CHANNEL_5
3879 * @arg @ref LL_MDMA_CHANNEL_6
3880 * @arg @ref LL_MDMA_CHANNEL_7
3881 * @arg @ref LL_MDMA_CHANNEL_8
3882 * @arg @ref LL_MDMA_CHANNEL_9
3883 * @arg @ref LL_MDMA_CHANNEL_10
3884 * @arg @ref LL_MDMA_CHANNEL_11
3885 * @arg @ref LL_MDMA_CHANNEL_12
3886 * @arg @ref LL_MDMA_CHANNEL_13
3887 * @arg @ref LL_MDMA_CHANNEL_14
3888 * @arg @ref LL_MDMA_CHANNEL_15
3889 * @retval None
3890 */
LL_MDMA_EnableIT_TE(MDMA_TypeDef * MDMAx,uint32_t Channel)3891 __STATIC_INLINE void LL_MDMA_EnableIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
3892 {
3893 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3894
3895 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE);
3896 }
3897
3898 /**
3899 * @brief Enable MDMA Channel x Channel Transfer Complete interrupt.
3900 * @rmtoll CCR CTCIE LL_MDMA_EnableIT_CTC
3901 * @param MDMAx MDMAx Instance
3902 * @param Channel This parameter can be one of the following values:
3903 * @arg @ref LL_MDMA_CHANNEL_0
3904 * @arg @ref LL_MDMA_CHANNEL_1
3905 * @arg @ref LL_MDMA_CHANNEL_2
3906 * @arg @ref LL_MDMA_CHANNEL_3
3907 * @arg @ref LL_MDMA_CHANNEL_4
3908 * @arg @ref LL_MDMA_CHANNEL_5
3909 * @arg @ref LL_MDMA_CHANNEL_6
3910 * @arg @ref LL_MDMA_CHANNEL_7
3911 * @arg @ref LL_MDMA_CHANNEL_8
3912 * @arg @ref LL_MDMA_CHANNEL_9
3913 * @arg @ref LL_MDMA_CHANNEL_10
3914 * @arg @ref LL_MDMA_CHANNEL_11
3915 * @arg @ref LL_MDMA_CHANNEL_12
3916 * @arg @ref LL_MDMA_CHANNEL_13
3917 * @arg @ref LL_MDMA_CHANNEL_14
3918 * @arg @ref LL_MDMA_CHANNEL_15
3919 * @retval None
3920 */
LL_MDMA_EnableIT_CTC(MDMA_TypeDef * MDMAx,uint32_t Channel)3921 __STATIC_INLINE void LL_MDMA_EnableIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
3922 {
3923 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3924
3925 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE);
3926 }
3927
3928 /**
3929 * @brief Enable MDMA Channel x Block Repeat Transfer interrupt.
3930 * @rmtoll CCR BRTIE LL_MDMA_EnableIT_BRT
3931 * @param MDMAx MDMAx Instance
3932 * @param Channel This parameter can be one of the following values:
3933 * @arg @ref LL_MDMA_CHANNEL_0
3934 * @arg @ref LL_MDMA_CHANNEL_1
3935 * @arg @ref LL_MDMA_CHANNEL_2
3936 * @arg @ref LL_MDMA_CHANNEL_3
3937 * @arg @ref LL_MDMA_CHANNEL_4
3938 * @arg @ref LL_MDMA_CHANNEL_5
3939 * @arg @ref LL_MDMA_CHANNEL_6
3940 * @arg @ref LL_MDMA_CHANNEL_7
3941 * @arg @ref LL_MDMA_CHANNEL_8
3942 * @arg @ref LL_MDMA_CHANNEL_9
3943 * @arg @ref LL_MDMA_CHANNEL_10
3944 * @arg @ref LL_MDMA_CHANNEL_11
3945 * @arg @ref LL_MDMA_CHANNEL_12
3946 * @arg @ref LL_MDMA_CHANNEL_13
3947 * @arg @ref LL_MDMA_CHANNEL_14
3948 * @arg @ref LL_MDMA_CHANNEL_15
3949 * @retval None
3950 */
LL_MDMA_EnableIT_BRT(MDMA_TypeDef * MDMAx,uint32_t Channel)3951 __STATIC_INLINE void LL_MDMA_EnableIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3952 {
3953 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3954
3955 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE);
3956 }
3957
3958 /**
3959 * @brief Enable MDMA Channel x Block Transfer interrupt.
3960 * @rmtoll CCR BTIE LL_MDMA_EnableIT_BT
3961 * @param MDMAx MDMAx Instance
3962 * @param Channel This parameter can be one of the following values:
3963 * @arg @ref LL_MDMA_CHANNEL_0
3964 * @arg @ref LL_MDMA_CHANNEL_1
3965 * @arg @ref LL_MDMA_CHANNEL_2
3966 * @arg @ref LL_MDMA_CHANNEL_3
3967 * @arg @ref LL_MDMA_CHANNEL_4
3968 * @arg @ref LL_MDMA_CHANNEL_5
3969 * @arg @ref LL_MDMA_CHANNEL_6
3970 * @arg @ref LL_MDMA_CHANNEL_7
3971 * @arg @ref LL_MDMA_CHANNEL_8
3972 * @arg @ref LL_MDMA_CHANNEL_9
3973 * @arg @ref LL_MDMA_CHANNEL_10
3974 * @arg @ref LL_MDMA_CHANNEL_11
3975 * @arg @ref LL_MDMA_CHANNEL_12
3976 * @arg @ref LL_MDMA_CHANNEL_13
3977 * @arg @ref LL_MDMA_CHANNEL_14
3978 * @arg @ref LL_MDMA_CHANNEL_15
3979 * @retval None
3980 */
LL_MDMA_EnableIT_BT(MDMA_TypeDef * MDMAx,uint32_t Channel)3981 __STATIC_INLINE void LL_MDMA_EnableIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
3982 {
3983 uint32_t mdma_base_addr = (uint32_t)MDMAx;
3984
3985 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE);
3986 }
3987
3988 /**
3989 * @brief Enable MDMA Channel x buffer transfer complete interrupt.
3990 * @rmtoll CCR TCIE LL_MDMA_EnableIT_TC
3991 * @param MDMAx MDMAx Instance
3992 * @param Channel This parameter can be one of the following values:
3993 * @arg @ref LL_MDMA_CHANNEL_0
3994 * @arg @ref LL_MDMA_CHANNEL_1
3995 * @arg @ref LL_MDMA_CHANNEL_2
3996 * @arg @ref LL_MDMA_CHANNEL_3
3997 * @arg @ref LL_MDMA_CHANNEL_4
3998 * @arg @ref LL_MDMA_CHANNEL_5
3999 * @arg @ref LL_MDMA_CHANNEL_6
4000 * @arg @ref LL_MDMA_CHANNEL_7
4001 * @arg @ref LL_MDMA_CHANNEL_8
4002 * @arg @ref LL_MDMA_CHANNEL_9
4003 * @arg @ref LL_MDMA_CHANNEL_10
4004 * @arg @ref LL_MDMA_CHANNEL_11
4005 * @arg @ref LL_MDMA_CHANNEL_12
4006 * @arg @ref LL_MDMA_CHANNEL_13
4007 * @arg @ref LL_MDMA_CHANNEL_14
4008 * @arg @ref LL_MDMA_CHANNEL_15
4009 * @retval None
4010 */
LL_MDMA_EnableIT_TC(MDMA_TypeDef * MDMAx,uint32_t Channel)4011 __STATIC_INLINE void LL_MDMA_EnableIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4012 {
4013 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4014
4015 SET_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE);
4016 }
4017
4018 /**
4019 * @brief Disable MDMA Channel x Transfer Error interrupt.
4020 * @rmtoll CCR TEIE LL_MDMA_DisableIT_TE
4021 * @param MDMAx MDMAx Instance
4022 * @param Channel This parameter can be one of the following values:
4023 * @arg @ref LL_MDMA_CHANNEL_0
4024 * @arg @ref LL_MDMA_CHANNEL_1
4025 * @arg @ref LL_MDMA_CHANNEL_2
4026 * @arg @ref LL_MDMA_CHANNEL_3
4027 * @arg @ref LL_MDMA_CHANNEL_4
4028 * @arg @ref LL_MDMA_CHANNEL_5
4029 * @arg @ref LL_MDMA_CHANNEL_6
4030 * @arg @ref LL_MDMA_CHANNEL_7
4031 * @arg @ref LL_MDMA_CHANNEL_8
4032 * @arg @ref LL_MDMA_CHANNEL_9
4033 * @arg @ref LL_MDMA_CHANNEL_10
4034 * @arg @ref LL_MDMA_CHANNEL_11
4035 * @arg @ref LL_MDMA_CHANNEL_12
4036 * @arg @ref LL_MDMA_CHANNEL_13
4037 * @arg @ref LL_MDMA_CHANNEL_14
4038 * @arg @ref LL_MDMA_CHANNEL_15
4039 * @retval None
4040 */
LL_MDMA_DisableIT_TE(MDMA_TypeDef * MDMAx,uint32_t Channel)4041 __STATIC_INLINE void LL_MDMA_DisableIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
4042 {
4043 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4044
4045 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE);
4046 }
4047
4048 /**
4049 * @brief Disable MDMA Channel x Channel Transfer Complete interrupt.
4050 * @rmtoll CCR CTCIE LL_MDMA_DisableIT_CTC
4051 * @param MDMAx MDMAx Instance
4052 * @param Channel This parameter can be one of the following values:
4053 * @arg @ref LL_MDMA_CHANNEL_0
4054 * @arg @ref LL_MDMA_CHANNEL_1
4055 * @arg @ref LL_MDMA_CHANNEL_2
4056 * @arg @ref LL_MDMA_CHANNEL_3
4057 * @arg @ref LL_MDMA_CHANNEL_4
4058 * @arg @ref LL_MDMA_CHANNEL_5
4059 * @arg @ref LL_MDMA_CHANNEL_6
4060 * @arg @ref LL_MDMA_CHANNEL_7
4061 * @arg @ref LL_MDMA_CHANNEL_8
4062 * @arg @ref LL_MDMA_CHANNEL_9
4063 * @arg @ref LL_MDMA_CHANNEL_10
4064 * @arg @ref LL_MDMA_CHANNEL_11
4065 * @arg @ref LL_MDMA_CHANNEL_12
4066 * @arg @ref LL_MDMA_CHANNEL_13
4067 * @arg @ref LL_MDMA_CHANNEL_14
4068 * @arg @ref LL_MDMA_CHANNEL_15
4069 * @retval None
4070 */
LL_MDMA_DisableIT_CTC(MDMA_TypeDef * MDMAx,uint32_t Channel)4071 __STATIC_INLINE void LL_MDMA_DisableIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4072 {
4073 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4074
4075 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE);
4076 }
4077
4078 /**
4079 * @brief Disable MDMA Channel x Block Repeat Transfer interrupt.
4080 * @rmtoll CCR BRTIE LL_MDMA_DisableIT_BRT
4081 * @param MDMAx MDMAx Instance
4082 * @param Channel This parameter can be one of the following values:
4083 * @arg @ref LL_MDMA_CHANNEL_0
4084 * @arg @ref LL_MDMA_CHANNEL_1
4085 * @arg @ref LL_MDMA_CHANNEL_2
4086 * @arg @ref LL_MDMA_CHANNEL_3
4087 * @arg @ref LL_MDMA_CHANNEL_4
4088 * @arg @ref LL_MDMA_CHANNEL_5
4089 * @arg @ref LL_MDMA_CHANNEL_6
4090 * @arg @ref LL_MDMA_CHANNEL_7
4091 * @arg @ref LL_MDMA_CHANNEL_8
4092 * @arg @ref LL_MDMA_CHANNEL_9
4093 * @arg @ref LL_MDMA_CHANNEL_10
4094 * @arg @ref LL_MDMA_CHANNEL_11
4095 * @arg @ref LL_MDMA_CHANNEL_12
4096 * @arg @ref LL_MDMA_CHANNEL_13
4097 * @arg @ref LL_MDMA_CHANNEL_14
4098 * @arg @ref LL_MDMA_CHANNEL_15
4099 * @retval None
4100 */
LL_MDMA_DisableIT_BRT(MDMA_TypeDef * MDMAx,uint32_t Channel)4101 __STATIC_INLINE void LL_MDMA_DisableIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4102 {
4103 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4104
4105 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE);
4106 }
4107
4108 /**
4109 * @brief Disable MDMA Channel x Block Transfer interrupt.
4110 * @rmtoll CCR BTIE LL_MDMA_DisableIT_BT
4111 * @param MDMAx MDMAx Instance
4112 * @param Channel This parameter can be one of the following values:
4113 * @arg @ref LL_MDMA_CHANNEL_0
4114 * @arg @ref LL_MDMA_CHANNEL_1
4115 * @arg @ref LL_MDMA_CHANNEL_2
4116 * @arg @ref LL_MDMA_CHANNEL_3
4117 * @arg @ref LL_MDMA_CHANNEL_4
4118 * @arg @ref LL_MDMA_CHANNEL_5
4119 * @arg @ref LL_MDMA_CHANNEL_6
4120 * @arg @ref LL_MDMA_CHANNEL_7
4121 * @arg @ref LL_MDMA_CHANNEL_8
4122 * @arg @ref LL_MDMA_CHANNEL_9
4123 * @arg @ref LL_MDMA_CHANNEL_10
4124 * @arg @ref LL_MDMA_CHANNEL_11
4125 * @arg @ref LL_MDMA_CHANNEL_12
4126 * @arg @ref LL_MDMA_CHANNEL_13
4127 * @arg @ref LL_MDMA_CHANNEL_14
4128 * @arg @ref LL_MDMA_CHANNEL_15
4129 * @retval None
4130 */
LL_MDMA_DisableIT_BT(MDMA_TypeDef * MDMAx,uint32_t Channel)4131 __STATIC_INLINE void LL_MDMA_DisableIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4132 {
4133 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4134
4135 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE);
4136 }
4137
4138 /**
4139 * @brief Disable MDMA Channel x buffer transfer complete interrupt.
4140 * @rmtoll CCR TCIE LL_MDMA_DisableIT_TC
4141 * @param MDMAx MDMAx Instance
4142 * @param Channel This parameter can be one of the following values:
4143 * @arg @ref LL_MDMA_CHANNEL_0
4144 * @arg @ref LL_MDMA_CHANNEL_1
4145 * @arg @ref LL_MDMA_CHANNEL_2
4146 * @arg @ref LL_MDMA_CHANNEL_3
4147 * @arg @ref LL_MDMA_CHANNEL_4
4148 * @arg @ref LL_MDMA_CHANNEL_5
4149 * @arg @ref LL_MDMA_CHANNEL_6
4150 * @arg @ref LL_MDMA_CHANNEL_7
4151 * @arg @ref LL_MDMA_CHANNEL_8
4152 * @arg @ref LL_MDMA_CHANNEL_9
4153 * @arg @ref LL_MDMA_CHANNEL_10
4154 * @arg @ref LL_MDMA_CHANNEL_11
4155 * @arg @ref LL_MDMA_CHANNEL_12
4156 * @arg @ref LL_MDMA_CHANNEL_13
4157 * @arg @ref LL_MDMA_CHANNEL_14
4158 * @arg @ref LL_MDMA_CHANNEL_15
4159 * @retval None
4160 */
LL_MDMA_DisableIT_TC(MDMA_TypeDef * MDMAx,uint32_t Channel)4161 __STATIC_INLINE void LL_MDMA_DisableIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4162 {
4163 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4164
4165 CLEAR_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE);
4166 }
4167
4168 /**
4169 * @brief Check if MDMA Channel x Transfer Error interrupt is enabled.
4170 * @rmtoll CCR TEIE LL_MDMA_IsEnabledIT_TE
4171 * @param MDMAx MDMAx Instance
4172 * @param Channel This parameter can be one of the following values:
4173 * @arg @ref LL_MDMA_CHANNEL_0
4174 * @arg @ref LL_MDMA_CHANNEL_1
4175 * @arg @ref LL_MDMA_CHANNEL_2
4176 * @arg @ref LL_MDMA_CHANNEL_3
4177 * @arg @ref LL_MDMA_CHANNEL_4
4178 * @arg @ref LL_MDMA_CHANNEL_5
4179 * @arg @ref LL_MDMA_CHANNEL_6
4180 * @arg @ref LL_MDMA_CHANNEL_7
4181 * @arg @ref LL_MDMA_CHANNEL_8
4182 * @arg @ref LL_MDMA_CHANNEL_9
4183 * @arg @ref LL_MDMA_CHANNEL_10
4184 * @arg @ref LL_MDMA_CHANNEL_11
4185 * @arg @ref LL_MDMA_CHANNEL_12
4186 * @arg @ref LL_MDMA_CHANNEL_13
4187 * @arg @ref LL_MDMA_CHANNEL_14
4188 * @arg @ref LL_MDMA_CHANNEL_15
4189 * @retval State of bit (1 or 0).
4190 */
LL_MDMA_IsEnabledIT_TE(MDMA_TypeDef * MDMAx,uint32_t Channel)4191 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_TE(MDMA_TypeDef *MDMAx, uint32_t Channel)
4192 {
4193 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4194
4195 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TEIE) == MDMA_CCR_TEIE) ? 1UL : 0UL);
4196 }
4197
4198 /**
4199 * @brief Check if MDMA Channel x Channel Transfer Complete interrupt is enabled.
4200 * @rmtoll CCR CTCIE LL_MDMA_IsEnabledIT_CTC
4201 * @param MDMAx MDMAx Instance
4202 * @param Channel This parameter can be one of the following values:
4203 * @arg @ref LL_MDMA_CHANNEL_0
4204 * @arg @ref LL_MDMA_CHANNEL_1
4205 * @arg @ref LL_MDMA_CHANNEL_2
4206 * @arg @ref LL_MDMA_CHANNEL_3
4207 * @arg @ref LL_MDMA_CHANNEL_4
4208 * @arg @ref LL_MDMA_CHANNEL_5
4209 * @arg @ref LL_MDMA_CHANNEL_6
4210 * @arg @ref LL_MDMA_CHANNEL_7
4211 * @arg @ref LL_MDMA_CHANNEL_8
4212 * @arg @ref LL_MDMA_CHANNEL_9
4213 * @arg @ref LL_MDMA_CHANNEL_10
4214 * @arg @ref LL_MDMA_CHANNEL_11
4215 * @arg @ref LL_MDMA_CHANNEL_12
4216 * @arg @ref LL_MDMA_CHANNEL_13
4217 * @arg @ref LL_MDMA_CHANNEL_14
4218 * @arg @ref LL_MDMA_CHANNEL_15
4219 * @retval State of bit (1 or 0).
4220 */
LL_MDMA_IsEnabledIT_CTC(MDMA_TypeDef * MDMAx,uint32_t Channel)4221 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_CTC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4222 {
4223 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4224
4225 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_CTCIE) == MDMA_CCR_CTCIE) ? 1UL : 0UL);
4226 }
4227
4228 /**
4229 * @brief Check if MDMA Channel x Block Repeat Transfer complete interrupt is enabled.
4230 * @rmtoll CCR BRTIE LL_MDMA_IsEnabledIT_BRT
4231 * @param MDMAx MDMAx Instance
4232 * @param Channel This parameter can be one of the following values:
4233 * @arg @ref LL_MDMA_CHANNEL_0
4234 * @arg @ref LL_MDMA_CHANNEL_1
4235 * @arg @ref LL_MDMA_CHANNEL_2
4236 * @arg @ref LL_MDMA_CHANNEL_3
4237 * @arg @ref LL_MDMA_CHANNEL_4
4238 * @arg @ref LL_MDMA_CHANNEL_5
4239 * @arg @ref LL_MDMA_CHANNEL_6
4240 * @arg @ref LL_MDMA_CHANNEL_7
4241 * @arg @ref LL_MDMA_CHANNEL_8
4242 * @arg @ref LL_MDMA_CHANNEL_9
4243 * @arg @ref LL_MDMA_CHANNEL_10
4244 * @arg @ref LL_MDMA_CHANNEL_11
4245 * @arg @ref LL_MDMA_CHANNEL_12
4246 * @arg @ref LL_MDMA_CHANNEL_13
4247 * @arg @ref LL_MDMA_CHANNEL_14
4248 * @arg @ref LL_MDMA_CHANNEL_15
4249 * @retval State of bit (1 or 0).
4250 */
LL_MDMA_IsEnabledIT_BRT(MDMA_TypeDef * MDMAx,uint32_t Channel)4251 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_BRT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4252 {
4253 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4254
4255 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BRTIE) == MDMA_CCR_BRTIE) ? 1UL : 0UL);
4256 }
4257
4258 /**
4259 * @brief Check if MDMA Channel x Block Transfer interrupt is enabled.
4260 * @rmtoll CCR BTIE LL_MDMA_IsEnabledIT_BT
4261 * @param MDMAx MDMAx Instance
4262 * @param Channel This parameter can be one of the following values:
4263 * @arg @ref LL_MDMA_CHANNEL_0
4264 * @arg @ref LL_MDMA_CHANNEL_1
4265 * @arg @ref LL_MDMA_CHANNEL_2
4266 * @arg @ref LL_MDMA_CHANNEL_3
4267 * @arg @ref LL_MDMA_CHANNEL_4
4268 * @arg @ref LL_MDMA_CHANNEL_5
4269 * @arg @ref LL_MDMA_CHANNEL_6
4270 * @arg @ref LL_MDMA_CHANNEL_7
4271 * @arg @ref LL_MDMA_CHANNEL_8
4272 * @arg @ref LL_MDMA_CHANNEL_9
4273 * @arg @ref LL_MDMA_CHANNEL_10
4274 * @arg @ref LL_MDMA_CHANNEL_11
4275 * @arg @ref LL_MDMA_CHANNEL_12
4276 * @arg @ref LL_MDMA_CHANNEL_13
4277 * @arg @ref LL_MDMA_CHANNEL_14
4278 * @arg @ref LL_MDMA_CHANNEL_15
4279 * @retval State of bit (1 or 0).
4280 */
LL_MDMA_IsEnabledIT_BT(MDMA_TypeDef * MDMAx,uint32_t Channel)4281 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_BT(MDMA_TypeDef *MDMAx, uint32_t Channel)
4282 {
4283 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4284
4285 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_BTIE) == MDMA_CCR_BTIE) ? 1UL : 0UL);
4286 }
4287
4288 /**
4289 * @brief Check if MDMA Channel x buffer transfer complete interrupt is enabled.
4290 * @rmtoll CCR TCIE LL_MDMA_IsEnabledIT_TC
4291 * @param MDMAx MDMAx Instance
4292 * @param Channel This parameter can be one of the following values:
4293 * @arg @ref LL_MDMA_CHANNEL_0
4294 * @arg @ref LL_MDMA_CHANNEL_1
4295 * @arg @ref LL_MDMA_CHANNEL_2
4296 * @arg @ref LL_MDMA_CHANNEL_3
4297 * @arg @ref LL_MDMA_CHANNEL_4
4298 * @arg @ref LL_MDMA_CHANNEL_5
4299 * @arg @ref LL_MDMA_CHANNEL_6
4300 * @arg @ref LL_MDMA_CHANNEL_7
4301 * @arg @ref LL_MDMA_CHANNEL_8
4302 * @arg @ref LL_MDMA_CHANNEL_9
4303 * @arg @ref LL_MDMA_CHANNEL_10
4304 * @arg @ref LL_MDMA_CHANNEL_11
4305 * @arg @ref LL_MDMA_CHANNEL_12
4306 * @arg @ref LL_MDMA_CHANNEL_13
4307 * @arg @ref LL_MDMA_CHANNEL_14
4308 * @arg @ref LL_MDMA_CHANNEL_15
4309 * @retval State of bit (1 or 0).
4310 */
LL_MDMA_IsEnabledIT_TC(MDMA_TypeDef * MDMAx,uint32_t Channel)4311 __STATIC_INLINE uint32_t LL_MDMA_IsEnabledIT_TC(MDMA_TypeDef *MDMAx, uint32_t Channel)
4312 {
4313 uint32_t mdma_base_addr = (uint32_t)MDMAx;
4314
4315 return ((READ_BIT(((MDMA_Channel_TypeDef*)(mdma_base_addr + LL_MDMA_CH_OFFSET_TAB[Channel]))->CCR ,MDMA_CCR_TCIE) == MDMA_CCR_TCIE) ? 1UL : 0UL);
4316 }
4317
4318 /**
4319 * @}
4320 */
4321
4322 #if defined(USE_FULL_LL_DRIVER)
4323 /** @defgroup MDMA_LL_EF_Init Initialization and de-initialization functions
4324 * @{
4325 */
4326
4327 uint32_t LL_MDMA_Init(MDMA_TypeDef *MDMAx, uint32_t Channel, LL_MDMA_InitTypeDef *MDMA_InitStruct);
4328 uint32_t LL_MDMA_DeInit(MDMA_TypeDef *MDMAx, uint32_t Channel);
4329 void LL_MDMA_StructInit(LL_MDMA_InitTypeDef *MDMA_InitStruct);
4330 void LL_MDMA_CreateLinkNode(LL_MDMA_InitTypeDef *MDMA_InitStruct, LL_MDMA_LinkNodeTypeDef *pNode);
4331 void LL_MDMA_ConnectLinkNode(LL_MDMA_LinkNodeTypeDef *pPrevLinkNode, LL_MDMA_LinkNodeTypeDef *pNewLinkNode);
4332 void LL_MDMA_DisconnectNextLinkNode(LL_MDMA_LinkNodeTypeDef *pLinkNode);
4333
4334 /**
4335 * @}
4336 */
4337 #endif /* USE_FULL_LL_DRIVER */
4338
4339 /**
4340 * @}
4341 */
4342
4343 /**
4344 * @}
4345 */
4346
4347 #endif /* MDMA */
4348
4349 /**
4350 * @}
4351 */
4352
4353 #ifdef __cplusplus
4354 }
4355 #endif
4356
4357 #endif /* STM32H7xx_LL_MDMA_H */
4358
4359
