1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_fmac.h
4 * @author MCD Application Team
5 * @brief Header file of FMAC LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H7xx_LL_FMAC_H
21 #define STM32H7xx_LL_FMAC_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h7xx.h"
29
30 /** @addtogroup STM32H7xx_LL_Driver
31 * @{
32 */
33
34 #if defined(FMAC)
35
36 /** @defgroup FMAC_LL FMAC
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41
42 /* Exported constants --------------------------------------------------------*/
43 /** @defgroup FMAC_LL_Exported_Constants FMAC Exported Constants
44 * @{
45 */
46
47 /** @defgroup FMAC_LL_EC_GET_FLAG Get Flag Defines
48 * @brief Flag defines which can be used with LL_FMAC_ReadReg function
49 * @{
50 */
51 #define LL_FMAC_SR_SAT FMAC_SR_SAT /*!< Saturation Error Flag
52 (this helps in debugging a filter) */
53 #define LL_FMAC_SR_UNFL FMAC_SR_UNFL /*!< Underflow Error Flag */
54 #define LL_FMAC_SR_OVFL FMAC_SR_OVFL /*!< Overflow Error Flag */
55 #define LL_FMAC_SR_X1FULL FMAC_SR_X1FULL /*!< X1 Buffer Full Flag */
56 #define LL_FMAC_SR_YEMPTY FMAC_SR_YEMPTY /*!< Y Buffer Empty Flag */
57 /**
58 * @}
59 */
60
61 /** @defgroup FMAC_LL_EC_IT IT Defines
62 * @brief IT defines which can be used with LL_FMAC_ReadReg and LL_FMAC_WriteReg functions
63 * @{
64 */
65 #define LL_FMAC_CR_SATIEN FMAC_CR_SATIEN /*!< Saturation Error Interrupt Enable
66 (this helps in debugging a filter) */
67 #define LL_FMAC_CR_UNFLIEN FMAC_CR_UNFLIEN /*!< Underflow Error Interrupt Enable */
68 #define LL_FMAC_CR_OVFLIEN FMAC_CR_OVFLIEN /*!< Overflow Error Interrupt Enable */
69 #define LL_FMAC_CR_WIEN FMAC_CR_WIEN /*!< Write Interrupt Enable */
70 #define LL_FMAC_CR_RIEN FMAC_CR_RIEN /*!< Read Interrupt Enable */
71 /**
72 * @}
73 */
74
75 /** @defgroup FMAC_LL_EC_WM FMAC watermarks
76 * @brief Watermark defines that can be used for buffer full (input) or buffer empty (output)
77 * @{
78 */
79 #define LL_FMAC_WM_0_THRESHOLD_1 0x00000000U /*!< Buffer full/empty flag set if there
80 is less than 1 free/unread space. */
81 #define LL_FMAC_WM_1_THRESHOLD_2 0x01000000U /*!< Buffer full/empty flag set if there
82 are less than 2 free/unread spaces. */
83 #define LL_FMAC_WM_2_THRESHOLD_4 0x02000000U /*!< Buffer full/empty flag set if there
84 are less than 4 free/unread spaces. */
85 #define LL_FMAC_WM_3_THRESHOLD_8 0x03000000U /*!< Buffer full/empty flag set if there
86 are less than 8 free/empty spaces. */
87 /**
88 * @}
89 */
90
91 /** @defgroup FMAC_LL_EC_FUNC FMAC functions
92 * @{
93 */
94 #define LL_FMAC_FUNC_LOAD_X1 (FMAC_PARAM_FUNC_0) /*!< Load X1 buffer */
95 #define LL_FMAC_FUNC_LOAD_X2 (FMAC_PARAM_FUNC_1) /*!< Load X2 buffer */
96 #define LL_FMAC_FUNC_LOAD_Y (FMAC_PARAM_FUNC_1 | FMAC_PARAM_FUNC_0) /*!< Load Y buffer */
97 #define LL_FMAC_FUNC_CONVO_FIR (FMAC_PARAM_FUNC_3) /*!< Convolution (FIR filter) */
98 #define LL_FMAC_FUNC_IIR_DIRECT_FORM_1 (FMAC_PARAM_FUNC_3 | FMAC_PARAM_FUNC_0) /*!< IIR filter (direct form 1) */
99 /**
100 * @}
101 */
102
103 /** @defgroup FMAC_LL_EC_PROCESSING FMAC processing
104 * @{
105 */
106 #define LL_FMAC_PROCESSING_STOP 0x00U /*!< Stop FMAC Processing */
107 #define LL_FMAC_PROCESSING_START 0x01U /*!< Start FMAC Processing */
108 /**
109 * @}
110 */
111
112 /**
113 * @}
114 */
115
116 /* External variables --------------------------------------------------------*/
117 /* Exported macros -----------------------------------------------------------*/
118 /** @defgroup FMAC_LL_Exported_Macros FMAC Exported Macros
119 * @{
120 */
121
122 /** @defgroup FMAC_LL_EM_WRITE_READ Common Write and read registers Macros
123 * @{
124 */
125
126 /**
127 * @brief Write a value in FMAC register
128 * @param __INSTANCE__ FMAC Instance
129 * @param __REG__ Register to be written
130 * @param __VALUE__ Value to be written in the register
131 * @retval None
132 */
133 #define LL_FMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
134
135 /**
136 * @brief Read a value in FMAC register
137 * @param __INSTANCE__ FMAC Instance
138 * @param __REG__ Register to be read
139 * @retval Register value
140 */
141 #define LL_FMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
142 /**
143 * @}
144 */
145
146 /**
147 * @}
148 */
149
150
151 /* Exported functions --------------------------------------------------------*/
152
153 /** @defgroup FMAC_LL_Exported_Functions FMAC Exported Functions
154 * @{
155 */
156
157 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
158 * @{
159 */
160
161 /**
162 * @brief Configure X1 full watermark.
163 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_SetX1FullWatermark
164 * @param FMACx FMAC instance
165 * @param Watermark This parameter can be one of the following values:
166 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
167 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
168 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
169 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
170 * @retval None
171 */
LL_FMAC_SetX1FullWatermark(FMAC_TypeDef * FMACx,uint32_t Watermark)172 __STATIC_INLINE void LL_FMAC_SetX1FullWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
173 {
174 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM, Watermark);
175 }
176
177 /**
178 * @brief Return X1 full watermark.
179 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_GetX1FullWatermark
180 * @param FMACx FMAC instance
181 * @retval uint32_t Returned value can be one of the following values:
182 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
183 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
184 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
185 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
186 */
LL_FMAC_GetX1FullWatermark(FMAC_TypeDef * FMACx)187 __STATIC_INLINE uint32_t LL_FMAC_GetX1FullWatermark(FMAC_TypeDef *FMACx)
188 {
189 return (uint32_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM));
190 }
191
192 /**
193 * @brief Configure X1 buffer size.
194 * @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_SetX1BufferSize
195 * @param FMACx FMAC instance
196 * @param BufferSize Number of 16-bit words allocated to the input buffer (including the optional "headroom").
197 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
198 * @retval None
199 */
LL_FMAC_SetX1BufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)200 __STATIC_INLINE void LL_FMAC_SetX1BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
201 {
202 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
203 }
204
205 /**
206 * @brief Return X1 buffer size.
207 * @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_GetX1BufferSize
208 * @param FMACx FMAC instance
209 * @retval uint8_t Number of 16-bit words allocated to the input buffer
210 * (including the optional "headroom") (value between Min_Data=0x01 and Max_Data=0xFF).
211 */
LL_FMAC_GetX1BufferSize(FMAC_TypeDef * FMACx)212 __STATIC_INLINE uint8_t LL_FMAC_GetX1BufferSize(FMAC_TypeDef *FMACx)
213 {
214 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE) >> FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
215 }
216
217 /**
218 * @brief Configure X1 base.
219 * @rmtoll X1BUFCFG X1_BASE LL_FMAC_SetX1Base
220 * @param FMACx FMAC instance
221 * @param Base Base address of the input buffer (X1) within the internal memory.
222 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
223 * @retval None
224 */
LL_FMAC_SetX1Base(FMAC_TypeDef * FMACx,uint8_t Base)225 __STATIC_INLINE void LL_FMAC_SetX1Base(FMAC_TypeDef *FMACx, uint8_t Base)
226 {
227 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE, ((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos);
228 }
229
230 /**
231 * @brief Return X1 base.
232 * @rmtoll X1BUFCFG X1_BASE LL_FMAC_GetX1Base
233 * @param FMACx FMAC instance
234 * @retval uint8_t Base address of the input buffer (X1) within the internal memory
235 * (value between Min_Data=0x00 and Max_Data=0xFF).
236 */
LL_FMAC_GetX1Base(FMAC_TypeDef * FMACx)237 __STATIC_INLINE uint8_t LL_FMAC_GetX1Base(FMAC_TypeDef *FMACx)
238 {
239 return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE) >> FMAC_X1BUFCFG_X1_BASE_Pos);
240 }
241
242 /**
243 * @brief Configure X2 buffer size.
244 * @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_SetX2BufferSize
245 * @param FMACx FMAC instance
246 * @param BufferSize Number of 16-bit words allocated to the coefficient buffer.
247 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
248 * @retval None
249 */
LL_FMAC_SetX2BufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)250 __STATIC_INLINE void LL_FMAC_SetX2BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
251 {
252 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
253 }
254
255 /**
256 * @brief Return X2 buffer size.
257 * @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_GetX2BufferSize
258 * @param FMACx FMAC instance
259 * @retval uint8_t Number of 16-bit words allocated to the coefficient buffer
260 * (value between Min_Data=0x01 and Max_Data=0xFF).
261 */
LL_FMAC_GetX2BufferSize(FMAC_TypeDef * FMACx)262 __STATIC_INLINE uint8_t LL_FMAC_GetX2BufferSize(FMAC_TypeDef *FMACx)
263 {
264 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE) >> FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
265 }
266
267 /**
268 * @brief Configure X2 base.
269 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_SetX2Base
270 * @param FMACx FMAC instance
271 * @param Base Base address of the coefficient buffer (X2) within the internal memory.
272 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
273 * @retval None
274 */
LL_FMAC_SetX2Base(FMAC_TypeDef * FMACx,uint8_t Base)275 __STATIC_INLINE void LL_FMAC_SetX2Base(FMAC_TypeDef *FMACx, uint8_t Base)
276 {
277 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE, ((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos);
278 }
279
280 /**
281 * @brief Return X2 base.
282 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_GetX2Base
283 * @param FMACx FMAC instance
284 * @retval uint8_t Base address of the coefficient buffer (X2) within the internal memory
285 * (value between Min_Data=0x00 and Max_Data=0xFF).
286 */
LL_FMAC_GetX2Base(FMAC_TypeDef * FMACx)287 __STATIC_INLINE uint8_t LL_FMAC_GetX2Base(FMAC_TypeDef *FMACx)
288 {
289 return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE) >> FMAC_X2BUFCFG_X2_BASE_Pos);
290 }
291
292 /**
293 * @brief Configure Y empty watermark.
294 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_SetYEmptyWatermark
295 * @param FMACx FMAC instance
296 * @param Watermark This parameter can be one of the following values:
297 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
298 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
299 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
300 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
301 * @retval None
302 */
LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef * FMACx,uint32_t Watermark)303 __STATIC_INLINE void LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
304 {
305 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM, Watermark);
306 }
307
308 /**
309 * @brief Return Y empty watermark.
310 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_GetYEmptyWatermark
311 * @param FMACx FMAC instance
312 * @retval uint32_t Returned value can be one of the following values:
313 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
314 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
315 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
316 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
317 */
LL_FMAC_GetYEmptyWatermark(FMAC_TypeDef * FMACx)318 __STATIC_INLINE uint32_t LL_FMAC_GetYEmptyWatermark(FMAC_TypeDef *FMACx)
319 {
320 return (uint32_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM));
321 }
322
323 /**
324 * @brief Configure Y buffer size.
325 * @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_SetYBufferSize
326 * @param FMACx FMAC instance
327 * @param BufferSize Number of 16-bit words allocated to the output buffer (including the optional "headroom").
328 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
329 * @retval None
330 */
LL_FMAC_SetYBufferSize(FMAC_TypeDef * FMACx,uint8_t BufferSize)331 __STATIC_INLINE void LL_FMAC_SetYBufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
332 {
333 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
334 }
335
336 /**
337 * @brief Return Y buffer size.
338 * @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_GetYBufferSize
339 * @param FMACx FMAC instance
340 * @retval uint8_t Number of 16-bit words allocated to the output buffer
341 * (including the optional "headroom" - value between Min_Data=0x01 and Max_Data=0xFF).
342 */
LL_FMAC_GetYBufferSize(FMAC_TypeDef * FMACx)343 __STATIC_INLINE uint8_t LL_FMAC_GetYBufferSize(FMAC_TypeDef *FMACx)
344 {
345 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE) >> FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
346 }
347
348 /**
349 * @brief Configure Y base.
350 * @rmtoll YBUFCFG Y_BASE LL_FMAC_SetYBase
351 * @param FMACx FMAC instance
352 * @param Base Base address of the output buffer (Y) within the internal memory.
353 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
354 * @retval None
355 */
LL_FMAC_SetYBase(FMAC_TypeDef * FMACx,uint8_t Base)356 __STATIC_INLINE void LL_FMAC_SetYBase(FMAC_TypeDef *FMACx, uint8_t Base)
357 {
358 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE, ((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos);
359 }
360
361 /**
362 * @brief Return Y base.
363 * @rmtoll YBUFCFG Y_BASE LL_FMAC_GetYBase
364 * @param FMACx FMAC instance
365 * @retval uint8_t Base address of the output buffer (Y) within the internal memory
366 * (value between Min_Data=0x00 and Max_Data=0xFF).
367 */
LL_FMAC_GetYBase(FMAC_TypeDef * FMACx)368 __STATIC_INLINE uint8_t LL_FMAC_GetYBase(FMAC_TypeDef *FMACx)
369 {
370 return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE) >> FMAC_YBUFCFG_Y_BASE_Pos);
371 }
372
373 /**
374 * @brief Start FMAC processing.
375 * @rmtoll PARAM START LL_FMAC_EnableStart
376 * @param FMACx FMAC instance
377 * @retval None
378 */
LL_FMAC_EnableStart(FMAC_TypeDef * FMACx)379 __STATIC_INLINE void LL_FMAC_EnableStart(FMAC_TypeDef *FMACx)
380 {
381 SET_BIT(FMACx->PARAM, FMAC_PARAM_START);
382 }
383
384 /**
385 * @brief Stop FMAC processing.
386 * @rmtoll PARAM START LL_FMAC_DisableStart
387 * @param FMACx FMAC instance
388 * @retval None
389 */
LL_FMAC_DisableStart(FMAC_TypeDef * FMACx)390 __STATIC_INLINE void LL_FMAC_DisableStart(FMAC_TypeDef *FMACx)
391 {
392 CLEAR_BIT(FMACx->PARAM, FMAC_PARAM_START);
393 }
394
395 /**
396 * @brief Check the state of FMAC processing.
397 * @rmtoll PARAM START LL_FMAC_IsEnabledStart
398 * @param FMACx FMAC instance
399 * @retval uint32_t State of bit (1 or 0).
400 */
LL_FMAC_IsEnabledStart(FMAC_TypeDef * FMACx)401 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledStart(FMAC_TypeDef *FMACx)
402 {
403 return ((READ_BIT(FMACx->PARAM, FMAC_PARAM_START) == (FMAC_PARAM_START)) ? 1UL : 0UL);
404 }
405
406 /**
407 * @brief Configure function.
408 * @rmtoll PARAM FUNC LL_FMAC_SetFunction
409 * @param FMACx FMAC instance
410 * @param Function This parameter can be one of the following values:
411 * @arg @ref LL_FMAC_FUNC_LOAD_X1
412 * @arg @ref LL_FMAC_FUNC_LOAD_X2
413 * @arg @ref LL_FMAC_FUNC_LOAD_Y
414 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
415 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
416 * @retval None
417 */
LL_FMAC_SetFunction(FMAC_TypeDef * FMACx,uint32_t Function)418 __STATIC_INLINE void LL_FMAC_SetFunction(FMAC_TypeDef *FMACx, uint32_t Function)
419 {
420 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_FUNC, Function);
421 }
422
423 /**
424 * @brief Return function.
425 * @rmtoll PARAM FUNC LL_FMAC_GetFunction
426 * @param FMACx FMAC instance
427 * @retval uint32_t Returned value can be one of the following values:
428 * @arg @ref LL_FMAC_FUNC_LOAD_X1
429 * @arg @ref LL_FMAC_FUNC_LOAD_X2
430 * @arg @ref LL_FMAC_FUNC_LOAD_Y
431 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
432 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
433 */
LL_FMAC_GetFunction(FMAC_TypeDef * FMACx)434 __STATIC_INLINE uint32_t LL_FMAC_GetFunction(FMAC_TypeDef *FMACx)
435 {
436 return (uint32_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_FUNC));
437 }
438
439 /**
440 * @brief Configure input parameter R.
441 * @rmtoll PARAM R LL_FMAC_SetParamR
442 * @param FMACx FMAC instance
443 * @param Param Parameter R (gain, etc.).
444 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
445 * @retval None
446 */
LL_FMAC_SetParamR(FMAC_TypeDef * FMACx,uint8_t Param)447 __STATIC_INLINE void LL_FMAC_SetParamR(FMAC_TypeDef *FMACx, uint8_t Param)
448 {
449 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_R, ((uint32_t)Param) << FMAC_PARAM_R_Pos);
450 }
451
452 /**
453 * @brief Return input parameter R.
454 * @rmtoll PARAM R LL_FMAC_GetParamR
455 * @param FMACx FMAC instance
456 * @retval uint8_t Parameter R (gain, etc.) (value between Min_Data=0x00 and Max_Data=0xFF).
457 */
LL_FMAC_GetParamR(FMAC_TypeDef * FMACx)458 __STATIC_INLINE uint8_t LL_FMAC_GetParamR(FMAC_TypeDef *FMACx)
459 {
460 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_R) >> FMAC_PARAM_R_Pos);
461 }
462
463 /**
464 * @brief Configure input parameter Q.
465 * @rmtoll PARAM Q LL_FMAC_SetParamQ
466 * @param FMACx FMAC instance
467 * @param Param Parameter Q (vector length, etc.).
468 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
469 * @retval None
470 */
LL_FMAC_SetParamQ(FMAC_TypeDef * FMACx,uint8_t Param)471 __STATIC_INLINE void LL_FMAC_SetParamQ(FMAC_TypeDef *FMACx, uint8_t Param)
472 {
473 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_Q, ((uint32_t)Param) << FMAC_PARAM_Q_Pos);
474 }
475
476 /**
477 * @brief Return input parameter Q.
478 * @rmtoll PARAM Q LL_FMAC_GetParamQ
479 * @param FMACx FMAC instance
480 * @retval uint8_t Parameter Q (vector length, etc.) (value between Min_Data=0x00 and Max_Data=0xFF).
481 */
LL_FMAC_GetParamQ(FMAC_TypeDef * FMACx)482 __STATIC_INLINE uint8_t LL_FMAC_GetParamQ(FMAC_TypeDef *FMACx)
483 {
484 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_Q) >> FMAC_PARAM_Q_Pos);
485 }
486
487 /**
488 * @brief Configure input parameter P.
489 * @rmtoll PARAM P LL_FMAC_SetParamP
490 * @param FMACx FMAC instance
491 * @param Param Parameter P (vector length, number of filter taps, etc.).
492 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
493 * @retval None
494 */
LL_FMAC_SetParamP(FMAC_TypeDef * FMACx,uint8_t Param)495 __STATIC_INLINE void LL_FMAC_SetParamP(FMAC_TypeDef *FMACx, uint8_t Param)
496 {
497 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_P, ((uint32_t)Param));
498 }
499
500 /**
501 * @brief Return input parameter P.
502 * @rmtoll PARAM P LL_FMAC_GetParamP
503 * @param FMACx FMAC instance
504 * @retval uint8_t Parameter P (vector length, number of filter taps, etc.)
505 * (value between Min_Data=0x00 and Max_Data=0xFF).
506 */
LL_FMAC_GetParamP(FMAC_TypeDef * FMACx)507 __STATIC_INLINE uint8_t LL_FMAC_GetParamP(FMAC_TypeDef *FMACx)
508 {
509 return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_P));
510 }
511
512 /**
513 * @}
514 */
515
516 /** @defgroup FMAC_LL_EF_Reset_Management Reset_Management
517 * @{
518 */
519
520 /**
521 * @brief Start the FMAC reset.
522 * @rmtoll CR RESET LL_FMAC_EnableReset
523 * @param FMACx FMAC instance
524 * @retval None
525 */
LL_FMAC_EnableReset(FMAC_TypeDef * FMACx)526 __STATIC_INLINE void LL_FMAC_EnableReset(FMAC_TypeDef *FMACx)
527 {
528 SET_BIT(FMACx->CR, FMAC_CR_RESET);
529 }
530
531 /**
532 * @brief Check the state of the FMAC reset.
533 * @rmtoll CR RESET LL_FMAC_IsEnabledReset
534 * @param FMACx FMAC instance
535 * @retval uint32_t State of bit (1 or 0).
536 */
LL_FMAC_IsEnabledReset(FMAC_TypeDef * FMACx)537 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledReset(FMAC_TypeDef *FMACx)
538 {
539 return ((READ_BIT(FMACx->CR, FMAC_CR_RESET) == (FMAC_CR_RESET)) ? 1UL : 0UL);
540 }
541
542 /**
543 * @}
544 */
545
546 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
547 * @{
548 */
549
550 /**
551 * @brief Enable Clipping.
552 * @rmtoll CR CLIPEN LL_FMAC_EnableClipping
553 * @param FMACx FMAC instance
554 * @retval None
555 */
LL_FMAC_EnableClipping(FMAC_TypeDef * FMACx)556 __STATIC_INLINE void LL_FMAC_EnableClipping(FMAC_TypeDef *FMACx)
557 {
558 SET_BIT(FMACx->CR, FMAC_CR_CLIPEN);
559 }
560
561 /**
562 * @brief Disable Clipping.
563 * @rmtoll CR CLIPEN LL_FMAC_DisableClipping
564 * @param FMACx FMAC instance
565 * @retval None
566 */
LL_FMAC_DisableClipping(FMAC_TypeDef * FMACx)567 __STATIC_INLINE void LL_FMAC_DisableClipping(FMAC_TypeDef *FMACx)
568 {
569 CLEAR_BIT(FMACx->CR, FMAC_CR_CLIPEN);
570 }
571
572 /**
573 * @brief Check Clipping State.
574 * @rmtoll CR CLIPEN LL_FMAC_IsEnabledClipping
575 * @param FMACx FMAC instance
576 * @retval uint32_t State of bit (1 or 0).
577 */
LL_FMAC_IsEnabledClipping(FMAC_TypeDef * FMACx)578 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledClipping(FMAC_TypeDef *FMACx)
579 {
580 return ((READ_BIT(FMACx->CR, FMAC_CR_CLIPEN) == (FMAC_CR_CLIPEN)) ? 1UL : 0UL);
581 }
582
583 /**
584 * @}
585 */
586
587 /** @defgroup FMAC_LL_EF_DMA_Management DMA_Management
588 * @{
589 */
590
591 /**
592 * @brief Enable FMAC DMA write channel request.
593 * @rmtoll CR DMAWEN LL_FMAC_EnableDMAReq_WRITE
594 * @param FMACx FMAC instance
595 * @retval None
596 */
LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef * FMACx)597 __STATIC_INLINE void LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef *FMACx)
598 {
599 SET_BIT(FMACx->CR, FMAC_CR_DMAWEN);
600 }
601
602 /**
603 * @brief Disable FMAC DMA write channel request.
604 * @rmtoll CR DMAWEN LL_FMAC_DisableDMAReq_WRITE
605 * @param FMACx FMAC instance
606 * @retval None
607 */
LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef * FMACx)608 __STATIC_INLINE void LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef *FMACx)
609 {
610 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAWEN);
611 }
612
613 /**
614 * @brief Check FMAC DMA write channel request state.
615 * @rmtoll CR DMAWEN LL_FMAC_IsEnabledDMAReq_WRITE
616 * @param FMACx FMAC instance
617 * @retval uint32_t State of bit (1 or 0).
618 */
LL_FMAC_IsEnabledDMAReq_WRITE(FMAC_TypeDef * FMACx)619 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_WRITE(FMAC_TypeDef *FMACx)
620 {
621 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAWEN) == (FMAC_CR_DMAWEN)) ? 1UL : 0UL);
622 }
623
624 /**
625 * @brief Enable FMAC DMA read channel request.
626 * @rmtoll CR DMAREN LL_FMAC_EnableDMAReq_READ
627 * @param FMACx FMAC instance
628 * @retval None
629 */
LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef * FMACx)630 __STATIC_INLINE void LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef *FMACx)
631 {
632 SET_BIT(FMACx->CR, FMAC_CR_DMAREN);
633 }
634
635 /**
636 * @brief Disable FMAC DMA read channel request.
637 * @rmtoll CR DMAREN LL_FMAC_DisableDMAReq_READ
638 * @param FMACx FMAC instance
639 * @retval None
640 */
LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef * FMACx)641 __STATIC_INLINE void LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef *FMACx)
642 {
643 CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN);
644 }
645
646 /**
647 * @brief Check FMAC DMA read channel request state.
648 * @rmtoll CR DMAREN LL_FMAC_IsEnabledDMAReq_READ
649 * @param FMACx FMAC instance
650 * @retval uint32_t State of bit (1 or 0).
651 */
LL_FMAC_IsEnabledDMAReq_READ(FMAC_TypeDef * FMACx)652 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_READ(FMAC_TypeDef *FMACx)
653 {
654 return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL);
655 }
656
657 /**
658 * @}
659 */
660
661 /** @defgroup FMAC_LL_EF_IT_Management IT_Management
662 * @{
663 */
664
665 /**
666 * @brief Enable FMAC saturation error interrupt.
667 * @rmtoll CR SATIEN LL_FMAC_EnableIT_SAT
668 * @param FMACx FMAC instance
669 * @retval None
670 */
LL_FMAC_EnableIT_SAT(FMAC_TypeDef * FMACx)671 __STATIC_INLINE void LL_FMAC_EnableIT_SAT(FMAC_TypeDef *FMACx)
672 {
673 SET_BIT(FMACx->CR, FMAC_CR_SATIEN);
674 }
675
676 /**
677 * @brief Disable FMAC saturation error interrupt.
678 * @rmtoll CR SATIEN LL_FMAC_DisableIT_SAT
679 * @param FMACx FMAC instance
680 * @retval None
681 */
LL_FMAC_DisableIT_SAT(FMAC_TypeDef * FMACx)682 __STATIC_INLINE void LL_FMAC_DisableIT_SAT(FMAC_TypeDef *FMACx)
683 {
684 CLEAR_BIT(FMACx->CR, FMAC_CR_SATIEN);
685 }
686
687 /**
688 * @brief Check FMAC saturation error interrupt state.
689 * @rmtoll CR SATIEN LL_FMAC_IsEnabledIT_SAT
690 * @param FMACx FMAC instance
691 * @retval uint32_t State of bit (1 or 0).
692 */
LL_FMAC_IsEnabledIT_SAT(FMAC_TypeDef * FMACx)693 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_SAT(FMAC_TypeDef *FMACx)
694 {
695 return ((READ_BIT(FMACx->CR, FMAC_CR_SATIEN) == (FMAC_CR_SATIEN)) ? 1UL : 0UL);
696 }
697
698 /**
699 * @brief Enable FMAC underflow error interrupt.
700 * @rmtoll CR UNFLIEN LL_FMAC_EnableIT_UNFL
701 * @param FMACx FMAC instance
702 * @retval None
703 */
LL_FMAC_EnableIT_UNFL(FMAC_TypeDef * FMACx)704 __STATIC_INLINE void LL_FMAC_EnableIT_UNFL(FMAC_TypeDef *FMACx)
705 {
706 SET_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
707 }
708
709 /**
710 * @brief Disable FMAC underflow error interrupt.
711 * @rmtoll CR UNFLIEN LL_FMAC_DisableIT_UNFL
712 * @param FMACx FMAC instance
713 * @retval None
714 */
LL_FMAC_DisableIT_UNFL(FMAC_TypeDef * FMACx)715 __STATIC_INLINE void LL_FMAC_DisableIT_UNFL(FMAC_TypeDef *FMACx)
716 {
717 CLEAR_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
718 }
719
720 /**
721 * @brief Check FMAC underflow error interrupt state.
722 * @rmtoll CR UNFLIEN LL_FMAC_IsEnabledIT_UNFL
723 * @param FMACx FMAC instance
724 * @retval uint32_t State of bit (1 or 0).
725 */
LL_FMAC_IsEnabledIT_UNFL(FMAC_TypeDef * FMACx)726 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_UNFL(FMAC_TypeDef *FMACx)
727 {
728 return ((READ_BIT(FMACx->CR, FMAC_CR_UNFLIEN) == (FMAC_CR_UNFLIEN)) ? 1UL : 0UL);
729 }
730
731 /**
732 * @brief Enable FMAC overflow error interrupt.
733 * @rmtoll CR OVFLIEN LL_FMAC_EnableIT_OVFL
734 * @param FMACx FMAC instance
735 * @retval None
736 */
LL_FMAC_EnableIT_OVFL(FMAC_TypeDef * FMACx)737 __STATIC_INLINE void LL_FMAC_EnableIT_OVFL(FMAC_TypeDef *FMACx)
738 {
739 SET_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
740 }
741
742 /**
743 * @brief Disable FMAC overflow error interrupt.
744 * @rmtoll CR OVFLIEN LL_FMAC_DisableIT_OVFL
745 * @param FMACx FMAC instance
746 * @retval None
747 */
LL_FMAC_DisableIT_OVFL(FMAC_TypeDef * FMACx)748 __STATIC_INLINE void LL_FMAC_DisableIT_OVFL(FMAC_TypeDef *FMACx)
749 {
750 CLEAR_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
751 }
752
753 /**
754 * @brief Check FMAC overflow error interrupt state.
755 * @rmtoll CR OVFLIEN LL_FMAC_IsEnabledIT_OVFL
756 * @param FMACx FMAC instance
757 * @retval uint32_t State of bit (1 or 0).
758 */
LL_FMAC_IsEnabledIT_OVFL(FMAC_TypeDef * FMACx)759 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_OVFL(FMAC_TypeDef *FMACx)
760 {
761 return ((READ_BIT(FMACx->CR, FMAC_CR_OVFLIEN) == (FMAC_CR_OVFLIEN)) ? 1UL : 0UL);
762 }
763
764 /**
765 * @brief Enable FMAC write interrupt.
766 * @rmtoll CR WIEN LL_FMAC_EnableIT_WR
767 * @param FMACx FMAC instance
768 * @retval None
769 */
LL_FMAC_EnableIT_WR(FMAC_TypeDef * FMACx)770 __STATIC_INLINE void LL_FMAC_EnableIT_WR(FMAC_TypeDef *FMACx)
771 {
772 SET_BIT(FMACx->CR, FMAC_CR_WIEN);
773 }
774
775 /**
776 * @brief Disable FMAC write interrupt.
777 * @rmtoll CR WIEN LL_FMAC_DisableIT_WR
778 * @param FMACx FMAC instance
779 * @retval None
780 */
LL_FMAC_DisableIT_WR(FMAC_TypeDef * FMACx)781 __STATIC_INLINE void LL_FMAC_DisableIT_WR(FMAC_TypeDef *FMACx)
782 {
783 CLEAR_BIT(FMACx->CR, FMAC_CR_WIEN);
784 }
785
786 /**
787 * @brief Check FMAC write interrupt state.
788 * @rmtoll CR WIEN LL_FMAC_IsEnabledIT_WR
789 * @param FMACx FMAC instance
790 * @retval uint32_t State of bit (1 or 0).
791 */
LL_FMAC_IsEnabledIT_WR(FMAC_TypeDef * FMACx)792 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_WR(FMAC_TypeDef *FMACx)
793 {
794 return ((READ_BIT(FMACx->CR, FMAC_CR_WIEN) == (FMAC_CR_WIEN)) ? 1UL : 0UL);
795 }
796
797 /**
798 * @brief Enable FMAC read interrupt.
799 * @rmtoll CR RIEN LL_FMAC_EnableIT_RD
800 * @param FMACx FMAC instance
801 * @retval None
802 */
LL_FMAC_EnableIT_RD(FMAC_TypeDef * FMACx)803 __STATIC_INLINE void LL_FMAC_EnableIT_RD(FMAC_TypeDef *FMACx)
804 {
805 SET_BIT(FMACx->CR, FMAC_CR_RIEN);
806 }
807
808 /**
809 * @brief Disable FMAC read interrupt.
810 * @rmtoll CR RIEN LL_FMAC_DisableIT_RD
811 * @param FMACx FMAC instance
812 * @retval None
813 */
LL_FMAC_DisableIT_RD(FMAC_TypeDef * FMACx)814 __STATIC_INLINE void LL_FMAC_DisableIT_RD(FMAC_TypeDef *FMACx)
815 {
816 CLEAR_BIT(FMACx->CR, FMAC_CR_RIEN);
817 }
818
819 /**
820 * @brief Check FMAC read interrupt state.
821 * @rmtoll CR RIEN LL_FMAC_IsEnabledIT_RD
822 * @param FMACx FMAC instance
823 * @retval uint32_t State of bit (1 or 0).
824 */
LL_FMAC_IsEnabledIT_RD(FMAC_TypeDef * FMACx)825 __STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_RD(FMAC_TypeDef *FMACx)
826 {
827 return ((READ_BIT(FMACx->CR, FMAC_CR_RIEN) == (FMAC_CR_RIEN)) ? 1UL : 0UL);
828 }
829
830 /**
831 * @}
832 */
833
834 /** @defgroup FMAC_LL_EF_FLAG_Management FLAG_Management
835 * @{
836 */
837
838 /**
839 * @brief Check FMAC saturation error flag state.
840 * @rmtoll SR SAT LL_FMAC_IsActiveFlag_SAT
841 * @param FMACx FMAC instance
842 * @retval uint32_t State of bit (1 or 0).
843 */
LL_FMAC_IsActiveFlag_SAT(FMAC_TypeDef * FMACx)844 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_SAT(FMAC_TypeDef *FMACx)
845 {
846 return ((READ_BIT(FMACx->SR, FMAC_SR_SAT) == (FMAC_SR_SAT)) ? 1UL : 0UL);
847 }
848
849 /**
850 * @brief Check FMAC underflow error flag state.
851 * @rmtoll SR UNFL LL_FMAC_IsActiveFlag_UNFL
852 * @param FMACx FMAC instance
853 * @retval uint32_t State of bit (1 or 0).
854 */
LL_FMAC_IsActiveFlag_UNFL(FMAC_TypeDef * FMACx)855 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_UNFL(FMAC_TypeDef *FMACx)
856 {
857 return ((READ_BIT(FMACx->SR, FMAC_SR_UNFL) == (FMAC_SR_UNFL)) ? 1UL : 0UL);
858 }
859
860 /**
861 * @brief Check FMAC overflow error flag state.
862 * @rmtoll SR OVFL LL_FMAC_IsActiveFlag_OVFL
863 * @param FMACx FMAC instance
864 * @retval uint32_t State of bit (1 or 0).
865 */
LL_FMAC_IsActiveFlag_OVFL(FMAC_TypeDef * FMACx)866 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_OVFL(FMAC_TypeDef *FMACx)
867 {
868 return ((READ_BIT(FMACx->SR, FMAC_SR_OVFL) == (FMAC_SR_OVFL)) ? 1UL : 0UL);
869 }
870
871 /**
872 * @brief Check FMAC X1 buffer full flag state.
873 * @rmtoll SR X1FULL LL_FMAC_IsActiveFlag_X1FULL
874 * @param FMACx FMAC instance
875 * @retval uint32_t State of bit (1 or 0).
876 */
LL_FMAC_IsActiveFlag_X1FULL(FMAC_TypeDef * FMACx)877 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_X1FULL(FMAC_TypeDef *FMACx)
878 {
879 return ((READ_BIT(FMACx->SR, FMAC_SR_X1FULL) == (FMAC_SR_X1FULL)) ? 1UL : 0UL);
880 }
881
882 /**
883 * @brief Check FMAC Y buffer empty flag state.
884 * @rmtoll SR YEMPTY LL_FMAC_IsActiveFlag_YEMPTY
885 * @param FMACx FMAC instance
886 * @retval uint32_t State of bit (1 or 0).
887 */
LL_FMAC_IsActiveFlag_YEMPTY(FMAC_TypeDef * FMACx)888 __STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_YEMPTY(FMAC_TypeDef *FMACx)
889 {
890 return ((READ_BIT(FMACx->SR, FMAC_SR_YEMPTY) == (FMAC_SR_YEMPTY)) ? 1UL : 0UL);
891 }
892
893 /**
894 * @}
895 */
896
897 /** @defgroup FMAC_LL_EF_Data_Management Data_Management
898 * @{
899 */
900
901 /**
902 * @brief Write 16-bit input data for the FMAC processing.
903 * @rmtoll WDATA WDATA LL_FMAC_WriteData
904 * @param FMACx FMAC instance
905 * @param InData 16-bit value to be provided as input data for FMAC processing.
906 * This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF.
907 * @retval None
908 */
LL_FMAC_WriteData(FMAC_TypeDef * FMACx,uint16_t InData)909 __STATIC_INLINE void LL_FMAC_WriteData(FMAC_TypeDef *FMACx, uint16_t InData)
910 {
911 WRITE_REG(FMACx->WDATA, InData);
912 }
913
914 /**
915 * @brief Return 16-bit output data of FMAC processing.
916 * @rmtoll RDATA RDATA LL_FMAC_ReadData
917 * @param FMACx FMAC instance
918 * @retval uint16_t 16-bit output data of FMAC processing (value between Min_Data=0x0000 and Max_Data=0xFFFF).
919 */
LL_FMAC_ReadData(FMAC_TypeDef * FMACx)920 __STATIC_INLINE uint16_t LL_FMAC_ReadData(FMAC_TypeDef *FMACx)
921 {
922 return (uint16_t)(READ_REG(FMACx->RDATA));
923 }
924
925 /**
926 * @}
927 */
928
929 /** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
930 * @{
931 */
932
933 /**
934 * @brief Configure memory for X1 buffer.
935 * @rmtoll X1BUFCFG FULL_WM LL_FMAC_ConfigX1\n
936 * X1BUFCFG X1_BASE LL_FMAC_ConfigX1\n
937 * X1BUFCFG X1_BUF_SIZE LL_FMAC_ConfigX1
938 * @param FMACx FMAC instance
939 * @param Watermark This parameter can be one of the following values:
940 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
941 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
942 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
943 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
944 * @param Base Base address of the input buffer (X1) within the internal memory.
945 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
946 * @param BufferSize Number of 16-bit words allocated to the input buffer (including the optional "headroom").
947 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
948 * @retval None
949 */
LL_FMAC_ConfigX1(FMAC_TypeDef * FMACx,uint32_t Watermark,uint8_t Base,uint8_t BufferSize)950 __STATIC_INLINE void LL_FMAC_ConfigX1(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
951 {
952 MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM | FMAC_X1BUFCFG_X1_BASE | FMAC_X1BUFCFG_X1_BUF_SIZE,
953 Watermark | (((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos) |
954 (((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos));
955 }
956
957 /**
958 * @brief Configure memory for X2 buffer.
959 * @rmtoll X2BUFCFG X2_BASE LL_FMAC_ConfigX2\n
960 * X2BUFCFG X2_BUF_SIZE LL_FMAC_ConfigX2
961 * @param FMACx FMAC instance
962 * @param Base Base address of the coefficient buffer (X2) within the internal memory.
963 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
964 * @param BufferSize Number of 16-bit words allocated to the coefficient buffer.
965 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
966 * @retval None
967 */
LL_FMAC_ConfigX2(FMAC_TypeDef * FMACx,uint8_t Base,uint8_t BufferSize)968 __STATIC_INLINE void LL_FMAC_ConfigX2(FMAC_TypeDef *FMACx, uint8_t Base, uint8_t BufferSize)
969 {
970 MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE | FMAC_X2BUFCFG_X2_BUF_SIZE,
971 (((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos) |
972 (((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos));
973 }
974
975 /**
976 * @brief Configure memory for Y buffer.
977 * @rmtoll YBUFCFG EMPTY_WM LL_FMAC_ConfigY\n
978 * YBUFCFG Y_BASE LL_FMAC_ConfigY\n
979 * YBUFCFG Y_BUF_SIZE LL_FMAC_ConfigY
980 * @param FMACx FMAC instance
981 * @param Watermark This parameter can be one of the following values:
982 * @arg @ref LL_FMAC_WM_0_THRESHOLD_1
983 * @arg @ref LL_FMAC_WM_1_THRESHOLD_2
984 * @arg @ref LL_FMAC_WM_2_THRESHOLD_4
985 * @arg @ref LL_FMAC_WM_3_THRESHOLD_8
986 * @param Base Base address of the output buffer (Y) within the internal memory.
987 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
988 * @param BufferSize Number of 16-bit words allocated to the output buffer (including the optional "headroom").
989 * This parameter must be a number between Min_Data=0x01 and Max_Data=0xFF.
990 * @retval None
991 */
LL_FMAC_ConfigY(FMAC_TypeDef * FMACx,uint32_t Watermark,uint8_t Base,uint8_t BufferSize)992 __STATIC_INLINE void LL_FMAC_ConfigY(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
993 {
994 MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM | FMAC_YBUFCFG_Y_BASE | FMAC_YBUFCFG_Y_BUF_SIZE,
995 Watermark | (((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos) |
996 (((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos));
997 }
998
999 /**
1000 * @brief Configure the FMAC processing.
1001 * @rmtoll PARAM START LL_FMAC_ConfigFunc\n
1002 * PARAM FUNC LL_FMAC_ConfigFunc\n
1003 * PARAM P LL_FMAC_ConfigFunc\n
1004 * PARAM Q LL_FMAC_ConfigFunc\n
1005 * PARAM R LL_FMAC_ConfigFunc
1006 * @param FMACx FMAC instance
1007 * @param Start This parameter can be one of the following values:
1008 * @arg @ref LL_FMAC_PROCESSING_STOP
1009 * @arg @ref LL_FMAC_PROCESSING_START
1010 * @param Function This parameter can be one of the following values:
1011 * @arg @ref LL_FMAC_FUNC_LOAD_X1
1012 * @arg @ref LL_FMAC_FUNC_LOAD_X2
1013 * @arg @ref LL_FMAC_FUNC_LOAD_Y
1014 * @arg @ref LL_FMAC_FUNC_CONVO_FIR
1015 * @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
1016 * @param ParamP Parameter P (vector length, number of filter taps, etc.).
1017 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1018 * @param ParamQ Parameter Q (vector length, etc.).
1019 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1020 * @param ParamR Parameter R (gain, etc.).
1021 * This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
1022 * @retval None
1023 */
LL_FMAC_ConfigFunc(FMAC_TypeDef * FMACx,uint8_t Start,uint32_t Function,uint8_t ParamP,uint8_t ParamQ,uint8_t ParamR)1024 __STATIC_INLINE void LL_FMAC_ConfigFunc(FMAC_TypeDef *FMACx, uint8_t Start, uint32_t Function, uint8_t ParamP,
1025 uint8_t ParamQ, uint8_t ParamR)
1026 {
1027 MODIFY_REG(FMACx->PARAM, FMAC_PARAM_START | FMAC_PARAM_FUNC | FMAC_PARAM_P | FMAC_PARAM_Q | FMAC_PARAM_R,
1028 (((uint32_t)Start) << FMAC_PARAM_START_Pos) | Function | (((uint32_t)ParamP) << FMAC_PARAM_P_Pos) |
1029 (((uint32_t)ParamQ) << FMAC_PARAM_Q_Pos) | (((uint32_t)ParamR) << FMAC_PARAM_R_Pos));
1030 }
1031
1032 /**
1033 * @}
1034 */
1035
1036
1037
1038 #if defined(USE_FULL_LL_DRIVER)
1039 /** @defgroup FMAC_LL_EF_Init Initialization and de-initialization functions
1040 * @{
1041 */
1042 ErrorStatus LL_FMAC_Init(FMAC_TypeDef *FMACx);
1043 ErrorStatus LL_FMAC_DeInit(FMAC_TypeDef *FMACx);
1044
1045
1046 /**
1047 * @}
1048 */
1049 #endif /* USE_FULL_LL_DRIVER */
1050
1051 /**
1052 * @}
1053 */
1054
1055 /**
1056 * @}
1057 */
1058
1059 #endif /* defined(FMAC) */
1060
1061 /**
1062 * @}
1063 */
1064
1065 #ifdef __cplusplus
1066 }
1067 #endif
1068
1069 #endif /* STM32H7xx_LL_FMAC_H */
1070
