1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_spdifrx.h 4 * @author MCD Application Team 5 * @brief Header file of SPDIFRX HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_SPDIFRX_H 21 #define STM32H7xx_HAL_SPDIFRX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 31 /** @addtogroup STM32H7xx_HAL_Driver 32 * @{ 33 */ 34 #if defined (SPDIFRX) 35 36 /** @addtogroup SPDIFRX 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief SPDIFRX Init structure definition 47 */ 48 typedef struct 49 { 50 uint32_t InputSelection; /*!< Specifies the SPDIF input selection. 51 This parameter can be a value of @ref SPDIFRX_Input_Selection */ 52 53 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase. 54 This parameter can be a value of @ref SPDIFRX_Max_Retries */ 55 56 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input. 57 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */ 58 59 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B. 60 This parameter can be a value of @ref SPDIFRX_Channel_Selection */ 61 62 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 63 This parameter can be a value of @ref SPDIFRX_Data_Format */ 64 65 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 66 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 67 68 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 69 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 70 71 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 72 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 73 74 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 75 This parameter can be a value of @ref SPDIFRX_V_Mask */ 76 77 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 78 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 79 FunctionalState SymbolClockGen; /*!< Enable/Disable the SPDIFRX Symbol Clock generation. 80 This parameter can be set to Enable or Disable */ 81 82 FunctionalState BackupSymbolClockGen; /*!< Enable/Disable the SPDIFRX Backup Symbol Clock generation. 83 This parameter can be set to Enable or Disable */ 84 } SPDIFRX_InitTypeDef; 85 86 /** 87 * @brief SPDIFRX SetDataFormat structure definition 88 */ 89 typedef struct 90 { 91 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...). 92 This parameter can be a value of @ref SPDIFRX_Data_Format */ 93 94 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode. 95 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */ 96 97 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame. 98 This parameter can be a value of @ref SPDIFRX_PT_Mask */ 99 100 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame. 101 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */ 102 103 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame. 104 This parameter can be a value of @ref SPDIFRX_V_Mask */ 105 106 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame. 107 This parameter can be a value of @ref SPDIFRX_PE_Mask */ 108 109 } SPDIFRX_SetDataFormatTypeDef; 110 111 /** 112 * @brief HAL State structures definition 113 */ 114 typedef enum 115 { 116 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */ 117 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */ 118 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */ 119 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */ 120 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */ 121 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */ 122 } HAL_SPDIFRX_StateTypeDef; 123 124 /** 125 * @brief SPDIFRX handle Structure definition 126 */ 127 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 128 typedef struct __SPDIFRX_HandleTypeDef 129 #else 130 typedef struct 131 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 132 { 133 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */ 134 135 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */ 136 137 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */ 138 139 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */ 140 141 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */ 142 143 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter 144 (This field is initialized at the 145 same value as transfer size at the 146 beginning of the transfer and 147 decremented when a sample is received. 148 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 149 150 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */ 151 152 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter 153 (This field is initialized at the 154 same value as transfer size at the 155 beginning of the transfer and 156 decremented when a sample is received. 157 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 158 159 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */ 160 161 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */ 162 163 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */ 164 165 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */ 166 167 __IO uint32_t ErrorCode; /* SPDIFRX Error code */ 168 169 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 170 void (*RxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow half completed callback */ 171 void (*RxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Data flow completed callback */ 172 void (*CxHalfCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow half completed callback */ 173 void (*CxCpltCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Control flow completed callback */ 174 void (*ErrorCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX error callback */ 175 void (* MspInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Msp Init callback */ 176 void (* MspDeInitCallback)(struct __SPDIFRX_HandleTypeDef *hspdif); /*!< SPDIFRX Msp DeInit callback */ 177 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 178 179 } SPDIFRX_HandleTypeDef; 180 /** 181 * @} 182 */ 183 184 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 185 /** 186 * @brief HAL SPDIFRX Callback ID enumeration definition 187 */ 188 typedef enum 189 { 190 HAL_SPDIFRX_RX_HALF_CB_ID = 0x00U, /*!< SPDIFRX Data flow half completed callback ID */ 191 HAL_SPDIFRX_RX_CPLT_CB_ID = 0x01U, /*!< SPDIFRX Data flow completed callback */ 192 HAL_SPDIFRX_CX_HALF_CB_ID = 0x02U, /*!< SPDIFRX Control flow half completed callback */ 193 HAL_SPDIFRX_CX_CPLT_CB_ID = 0x03U, /*!< SPDIFRX Control flow completed callback */ 194 HAL_SPDIFRX_ERROR_CB_ID = 0x04U, /*!< SPDIFRX error callback */ 195 HAL_SPDIFRX_MSPINIT_CB_ID = 0x05U, /*!< SPDIFRX Msp Init callback ID */ 196 HAL_SPDIFRX_MSPDEINIT_CB_ID = 0x06U /*!< SPDIFRX Msp DeInit callback ID */ 197 } HAL_SPDIFRX_CallbackIDTypeDef; 198 199 /** 200 * @brief HAL SPDIFRX Callback pointer definition 201 */ 202 typedef void (*pSPDIFRX_CallbackTypeDef)(SPDIFRX_HandleTypeDef *hspdif); /*!< pointer to an SPDIFRX callback function */ 203 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 204 205 /* Exported constants --------------------------------------------------------*/ 206 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants 207 * @{ 208 */ 209 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code 210 * @{ 211 */ 212 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 213 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ 214 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */ 215 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U) /*!< Parity error */ 216 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */ 217 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U) /*!< Unknown Error error */ 218 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 219 #define HAL_SPDIFRX_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */ 220 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 221 /** 222 * @} 223 */ 224 225 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection 226 * @{ 227 */ 228 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U) 229 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U) 230 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U) 231 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U) 232 /** 233 * @} 234 */ 235 236 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries 237 * @{ 238 */ 239 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U) 240 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U) 241 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U) 242 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U) 243 /** 244 * @} 245 */ 246 247 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity 248 * @{ 249 */ 250 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U) 251 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA) 252 /** 253 * @} 254 */ 255 256 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask 257 * @{ 258 */ 259 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U) 260 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK) 261 /** 262 * @} 263 */ 264 265 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask 266 * @{ 267 */ 268 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */ 269 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/ 270 /** 271 * @} 272 */ 273 274 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask 275 * @{ 276 */ 277 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U) 278 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK) 279 /** 280 * @} 281 */ 282 283 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask 284 * @{ 285 */ 286 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U) 287 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK) 288 /** 289 * @} 290 */ 291 292 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection 293 * @{ 294 */ 295 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U) 296 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL) 297 /** 298 * @} 299 */ 300 301 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format 302 * @{ 303 */ 304 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U) 305 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U) 306 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U) 307 /** 308 * @} 309 */ 310 311 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode 312 * @{ 313 */ 314 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U) 315 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO) 316 /** 317 * @} 318 */ 319 320 /** @defgroup SPDIFRX_State SPDIFRX State 321 * @{ 322 */ 323 324 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU) 325 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U) 326 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN) 327 /** 328 * @} 329 */ 330 331 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition 332 * @{ 333 */ 334 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE) 335 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE) 336 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE) 337 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE) 338 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE) 339 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE) 340 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE ) 341 /** 342 * @} 343 */ 344 345 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition 346 * @{ 347 */ 348 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE) 349 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE) 350 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR) 351 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR) 352 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD) 353 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD) 354 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR) 355 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR) 356 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR) 357 /** 358 * @} 359 */ 360 361 /** 362 * @} 363 */ 364 365 /* Exported macros -----------------------------------------------------------*/ 366 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros 367 * @{ 368 */ 369 370 /** @brief Reset SPDIFRX handle state 371 * @param __HANDLE__ SPDIFRX handle. 372 * @retval None 373 */ 374 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 375 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) do{\ 376 (__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET;\ 377 (__HANDLE__)->MspInitCallback = NULL;\ 378 (__HANDLE__)->MspDeInitCallback = NULL;\ 379 }while(0) 380 #else 381 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPDIFRX_STATE_RESET) 382 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 383 384 /** @brief Disable the specified SPDIFRX peripheral (IDLE State). 385 * @param __HANDLE__ specifies the SPDIFRX Handle. 386 * @retval None 387 */ 388 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE) 389 390 /** @brief Enable the specified SPDIFRX peripheral (SYNC State). 391 * @param __HANDLE__ specifies the SPDIFRX Handle. 392 * @retval None 393 */ 394 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC) 395 396 397 /** @brief Enable the specified SPDIFRX peripheral (RCV State). 398 * @param __HANDLE__ specifies the SPDIFRX Handle. 399 * @retval None 400 */ 401 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV) 402 403 404 /** @brief Enable or disable the specified SPDIFRX interrupts. 405 * @param __HANDLE__ specifies the SPDIFRX Handle. 406 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 407 * This parameter can be one of the following values: 408 * @arg SPDIFRX_IT_RXNE 409 * @arg SPDIFRX_IT_CSRNE 410 * @arg SPDIFRX_IT_PERRIE 411 * @arg SPDIFRX_IT_OVRIE 412 * @arg SPDIFRX_IT_SBLKIE 413 * @arg SPDIFRX_IT_SYNCDIE 414 * @arg SPDIFRX_IT_IFEIE 415 * @retval None 416 */ 417 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 418 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR\ 419 &= (uint16_t)(~(__INTERRUPT__))) 420 421 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled. 422 * @param __HANDLE__ specifies the SPDIFRX Handle. 423 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check. 424 * This parameter can be one of the following values: 425 * @arg SPDIFRX_IT_RXNE 426 * @arg SPDIFRX_IT_CSRNE 427 * @arg SPDIFRX_IT_PERRIE 428 * @arg SPDIFRX_IT_OVRIE 429 * @arg SPDIFRX_IT_SBLKIE 430 * @arg SPDIFRX_IT_SYNCDIE 431 * @arg SPDIFRX_IT_IFEIE 432 * @retval The new state of __IT__ (TRUE or FALSE). 433 */ 434 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR\ 435 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 436 437 /** @brief Checks whether the specified SPDIFRX flag is set or not. 438 * @param __HANDLE__ specifies the SPDIFRX Handle. 439 * @param __FLAG__ specifies the flag to check. 440 * This parameter can be one of the following values: 441 * @arg SPDIFRX_FLAG_RXNE 442 * @arg SPDIFRX_FLAG_CSRNE 443 * @arg SPDIFRX_FLAG_PERR 444 * @arg SPDIFRX_FLAG_OVR 445 * @arg SPDIFRX_FLAG_SBD 446 * @arg SPDIFRX_FLAG_SYNCD 447 * @arg SPDIFRX_FLAG_FERR 448 * @arg SPDIFRX_FLAG_SERR 449 * @arg SPDIFRX_FLAG_TERR 450 * @retval The new state of __FLAG__ (TRUE or FALSE). 451 */ 452 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->SR)\ 453 & (__FLAG__)) == (__FLAG__)) ? SET : RESET) 454 455 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit. 456 * @param __HANDLE__ specifies the USART Handle. 457 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 458 * to clear the corresponding interrupt 459 * This parameter can be one of the following values: 460 * @arg SPDIFRX_FLAG_PERR 461 * @arg SPDIFRX_FLAG_OVR 462 * @arg SPDIFRX_SR_SBD 463 * @arg SPDIFRX_SR_SYNCD 464 * @retval None 465 */ 466 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__)) 467 468 /** 469 * @} 470 */ 471 472 /* Exported functions --------------------------------------------------------*/ 473 /** @addtogroup SPDIFRX_Exported_Functions 474 * @{ 475 */ 476 477 /** @addtogroup SPDIFRX_Exported_Functions_Group1 478 * @{ 479 */ 480 /* Initialization/de-initialization functions **********************************/ 481 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif); 482 HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif); 483 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif); 484 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif); 485 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat); 486 487 /* Callbacks Register/UnRegister functions ***********************************/ 488 #if (USE_HAL_SPDIFRX_REGISTER_CALLBACKS == 1) 489 HAL_StatusTypeDef HAL_SPDIFRX_RegisterCallback(SPDIFRX_HandleTypeDef *hspdif, HAL_SPDIFRX_CallbackIDTypeDef CallbackID, 490 pSPDIFRX_CallbackTypeDef pCallback); 491 HAL_StatusTypeDef HAL_SPDIFRX_UnRegisterCallback(SPDIFRX_HandleTypeDef *hspdif, 492 HAL_SPDIFRX_CallbackIDTypeDef CallbackID); 493 #endif /* USE_HAL_SPDIFRX_REGISTER_CALLBACKS */ 494 /** 495 * @} 496 */ 497 498 /** @addtogroup SPDIFRX_Exported_Functions_Group2 499 * @{ 500 */ 501 /* I/O operation functions ***************************************************/ 502 /* Blocking mode: Polling */ 503 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, 504 uint32_t Timeout); 505 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, 506 uint32_t Timeout); 507 508 /* Non-Blocking mode: Interrupt */ 509 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 510 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 511 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif); 512 513 /* Non-Blocking mode: DMA */ 514 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveCtrlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 515 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size); 516 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif); 517 518 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 519 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 520 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 521 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif); 522 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 523 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif); 524 /** 525 * @} 526 */ 527 528 /** @addtogroup SPDIFRX_Exported_Functions_Group3 529 * @{ 530 */ 531 /* Peripheral Control and State functions ************************************/ 532 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef const *const hspdif); 533 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef const *const hspdif); 534 /** 535 * @} 536 */ 537 538 /** 539 * @} 540 */ 541 /* Private types -------------------------------------------------------------*/ 542 /* Private variables ---------------------------------------------------------*/ 543 /* Private constants ---------------------------------------------------------*/ 544 /* Private macros ------------------------------------------------------------*/ 545 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros 546 * @{ 547 */ 548 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \ 549 ((INPUT) == SPDIFRX_INPUT_IN2) || \ 550 ((INPUT) == SPDIFRX_INPUT_IN3) || \ 551 ((INPUT) == SPDIFRX_INPUT_IN0)) 552 553 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \ 554 ((RET) == SPDIFRX_MAXRETRIES_3) || \ 555 ((RET) == SPDIFRX_MAXRETRIES_15) || \ 556 ((RET) == SPDIFRX_MAXRETRIES_63)) 557 558 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \ 559 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF)) 560 561 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \ 562 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF)) 563 564 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \ 565 ((VAL) == SPDIFRX_VALIDITYMASK_ON)) 566 567 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \ 568 ((VAL) == SPDIFRX_PARITYERRORMASK_ON)) 569 570 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \ 571 ((CHANNEL) == SPDIFRX_CHANNEL_B)) 572 573 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \ 574 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \ 575 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS)) 576 577 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \ 578 ((MODE) == SPDIFRX_STEREOMODE_ENABLE)) 579 580 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \ 581 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF)) 582 583 #define IS_SYMBOL_CLOCK_GEN(VAL) (((VAL) == ENABLE) || ((VAL) == DISABLE)) 584 /** 585 * @} 586 */ 587 588 /* Private functions ---------------------------------------------------------*/ 589 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions 590 * @{ 591 */ 592 /** 593 * @} 594 */ 595 596 /** 597 * @} 598 */ 599 #endif /* SPDIFRX */ 600 /** 601 * @} 602 */ 603 604 605 #ifdef __cplusplus 606 } 607 #endif 608 609 610 #endif /* STM32H7xx_HAL_SPDIFRX_H */ 611
