1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_SAI_H 21 #define STM32H7xx_HAL_SAI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 /** @addtogroup STM32H7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SAI 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SAI_Exported_Types SAI Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief HAL State structures definition 45 */ 46 typedef enum 47 { 48 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 49 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 50 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 51 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 52 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 53 } HAL_SAI_StateTypeDef; 54 55 /** 56 * @brief SAI Callback prototype 57 */ 58 typedef void (*SAIcallback)(void); 59 60 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition 61 * @brief SAI PDM Init structure definition 62 * @{ 63 */ 64 typedef struct 65 { 66 FunctionalState Activation; /*!< Enable/disable PDM interface */ 67 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. 68 This parameter must be a number between Min_Data = 1 and Max_Data = 3. */ 69 uint32_t ClockEnable; /*!< Specifies which clock must be enabled. 70 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ 71 } SAI_PdmInitTypeDef; 72 /** 73 * @} 74 */ 75 76 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 77 * @brief SAI Init Structure definition 78 * @{ 79 */ 80 typedef struct 81 { 82 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 83 This parameter can be a value of @ref SAI_Block_Mode */ 84 85 uint32_t Synchro; /*!< Specifies SAI Block synchronization 86 This parameter can be a value of @ref SAI_Block_Synchronization */ 87 88 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 89 for BlockA and BlockB 90 This parameter can be a value of @ref SAI_Block_SyncExt 91 @note If both audio blocks of same SAI are used, this parameter has 92 to be set to the same value for each audio block */ 93 94 uint32_t MckOutput; /*!< Specifies whether master clock output will be generated or not. 95 This parameter can be a value of @ref SAI_Block_MckOutput 96 @note This feature is only available on STM32H7xx Rev.B and above */ 97 98 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 99 This parameter can be a value of @ref SAI_Block_Output_Drive 100 @note This value has to be set before enabling the audio block 101 but after the audio block configuration. */ 102 103 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 104 This parameter can be a value of @ref SAI_Block_NoDivider 105 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length 106 should be aligned to a number equal to a power of 2, from 8 to 256. 107 If bit NODIV in the SAI_xCR1 register is set, the frame length can 108 take any of the values from 8 to 256. 109 @note The NODIV bit is the same as NOMCK bit in STM32H7xx rev.Y */ 110 111 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 112 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 113 114 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 115 This parameter can be a value of @ref SAI_Audio_Frequency */ 116 117 uint32_t Mckdiv; /*!< Specifies the master clock divider. 118 This parameter must be a number between Min_Data = 0 and Max_Data = 63. 119 @note This parameter is used only if AudioFrequency is set to 120 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 121 122 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. 123 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ 124 125 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 126 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 127 128 uint32_t CompandingMode; /*!< Specifies the companding mode type. 129 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 130 131 uint32_t TriState; /*!< Specifies the companding mode type. 132 This parameter can be a value of @ref SAI_TRIState_Management */ 133 134 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ 135 136 /* This part of the structure is automatically filled if your are using the high level initialisation 137 function HAL_SAI_InitProtocol */ 138 139 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 140 This parameter can be a value of @ref SAI_Block_Protocol */ 141 142 uint32_t DataSize; /*!< Specifies the SAI Block data size. 143 This parameter can be a value of @ref SAI_Block_Data_Size */ 144 145 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 146 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 147 148 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 149 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 150 } SAI_InitTypeDef; 151 /** 152 * @} 153 */ 154 155 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 156 * @brief SAI Frame Init structure definition 157 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware). 158 * @{ 159 */ 160 typedef struct 161 { 162 163 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 164 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 165 @note If master clock MCLK_x pin is declared as an output, the frame length 166 should be aligned to a number equal to power of 2 in order to keep 167 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 168 169 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 170 This Parameter specifies the length in number of bit clock (SCK + 1) 171 of the active level of FS signal in audio frame. 172 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 173 174 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 175 This parameter can be a value of @ref SAI_Block_FS_Definition */ 176 177 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 178 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 179 180 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 181 This parameter can be a value of @ref SAI_Block_FS_Offset */ 182 183 } SAI_FrameInitTypeDef; 184 /** 185 * @} 186 */ 187 188 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 189 * @brief SAI Block Slot Init Structure definition 190 * @note For SPDIF protocol, these parameters are not used (set by hardware). 191 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware). 192 * @{ 193 */ 194 typedef struct 195 { 196 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 197 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 198 199 uint32_t SlotSize; /*!< Specifies the Slot Size. 200 This parameter can be a value of @ref SAI_Block_Slot_Size */ 201 202 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 203 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 204 205 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 206 This parameter can be a value of @ref SAI_Block_Slot_Active */ 207 } SAI_SlotInitTypeDef; 208 /** 209 * @} 210 */ 211 212 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 213 * @brief SAI handle Structure definition 214 * @{ 215 */ 216 typedef struct __SAI_HandleTypeDef 217 { 218 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 219 220 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 221 222 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 223 224 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 225 226 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 227 228 uint16_t XferSize; /*!< SAI transfer size */ 229 230 uint16_t XferCount; /*!< SAI transfer counter */ 231 232 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 233 234 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 235 236 SAIcallback mutecallback; /*!< SAI mute callback */ 237 238 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 239 240 HAL_LockTypeDef Lock; /*!< SAI locking object */ 241 242 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 243 244 __IO uint32_t ErrorCode; /*!< SAI Error code */ 245 246 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 247 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 248 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 249 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 250 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 251 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 252 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 253 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 254 #endif 255 } SAI_HandleTypeDef; 256 /** 257 * @} 258 */ 259 260 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 261 /** 262 * @brief SAI callback ID enumeration definition 263 */ 264 typedef enum 265 { 266 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 267 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 268 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 269 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 270 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 271 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 272 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 273 } HAL_SAI_CallbackIDTypeDef; 274 275 /** 276 * @brief SAI callback pointer definition 277 */ 278 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 279 #endif 280 281 /** 282 * @} 283 */ 284 285 /* Exported constants --------------------------------------------------------*/ 286 /** @defgroup SAI_Exported_Constants SAI Exported Constants 287 * @{ 288 */ 289 290 /** @defgroup SAI_Error_Code SAI Error Code 291 * @{ 292 */ 293 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 294 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 295 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 296 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 297 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 298 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 299 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 300 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 301 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 302 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 303 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 304 #endif 305 /** 306 * @} 307 */ 308 309 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 310 * @{ 311 */ 312 #define SAI_SYNCEXT_DISABLE 0U 313 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 314 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 315 /** 316 * @} 317 */ 318 319 /** @defgroup SAI_Block_MckOutput SAI Block Master Clock Output 320 * @{ 321 */ 322 #define SAI_MCK_OUTPUT_DISABLE 0x00000000U 323 #define SAI_MCK_OUTPUT_ENABLE SAI_xCR1_MCKEN 324 /** 325 * @} 326 */ 327 328 /** @defgroup SAI_Protocol SAI Supported protocol 329 * @{ 330 */ 331 #define SAI_I2S_STANDARD 0U 332 #define SAI_I2S_MSBJUSTIFIED 1U 333 #define SAI_I2S_LSBJUSTIFIED 2U 334 #define SAI_PCM_LONG 3U 335 #define SAI_PCM_SHORT 4U 336 /** 337 * @} 338 */ 339 340 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 341 * @{ 342 */ 343 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 344 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 345 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 346 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 347 /** 348 * @} 349 */ 350 351 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 352 * @{ 353 */ 354 #define SAI_AUDIO_FREQUENCY_192K 192000U 355 #define SAI_AUDIO_FREQUENCY_96K 96000U 356 #define SAI_AUDIO_FREQUENCY_48K 48000U 357 #define SAI_AUDIO_FREQUENCY_44K 44100U 358 #define SAI_AUDIO_FREQUENCY_32K 32000U 359 #define SAI_AUDIO_FREQUENCY_22K 22050U 360 #define SAI_AUDIO_FREQUENCY_16K 16000U 361 #define SAI_AUDIO_FREQUENCY_11K 11025U 362 #define SAI_AUDIO_FREQUENCY_8K 8000U 363 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 364 /** 365 * @} 366 */ 367 368 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling 369 * @{ 370 */ 371 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U 372 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR 373 /** 374 * @} 375 */ 376 377 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable 378 * @{ 379 */ 380 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1 381 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2 382 /** 383 * @} 384 */ 385 386 /** @defgroup SAI_Block_Mode SAI Block Mode 387 * @{ 388 */ 389 #define SAI_MODEMASTER_TX 0x00000000U 390 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0 391 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1 392 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0) 393 394 /** 395 * @} 396 */ 397 398 /** @defgroup SAI_Block_Protocol SAI Block Protocol 399 * @{ 400 */ 401 #define SAI_FREE_PROTOCOL 0x00000000U 402 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0 403 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1 404 /** 405 * @} 406 */ 407 408 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 409 * @{ 410 */ 411 #define SAI_DATASIZE_8 SAI_xCR1_DS_1 412 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 413 #define SAI_DATASIZE_16 SAI_xCR1_DS_2 414 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0) 415 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1) 416 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 417 /** 418 * @} 419 */ 420 421 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 422 * @{ 423 */ 424 #define SAI_FIRSTBIT_MSB 0x00000000U 425 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST 426 /** 427 * @} 428 */ 429 430 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 431 * @{ 432 */ 433 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 434 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 435 /** 436 * @} 437 */ 438 439 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 440 * @{ 441 */ 442 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 443 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 444 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 445 #if defined(SAI2) 446 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 447 #endif /* SAI2 */ 448 #if defined(SAI3) 449 #define SAI_SYNCHRONOUS_EXT_SAI3 4U /*!< Synchronous with other SAI, SAI3 */ 450 #endif /* SAI3 */ 451 #if defined(SAI4) 452 #define SAI_SYNCHRONOUS_EXT_SAI4 5U /*!< Synchronous with other SAI, SAI4 */ 453 #endif /* SAI4 */ 454 /** 455 * @} 456 */ 457 458 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 459 * @{ 460 */ 461 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 462 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV 463 /** 464 * @} 465 */ 466 467 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 468 * @{ 469 */ 470 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 471 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV 472 /** 473 * @} 474 */ 475 476 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 477 * @{ 478 */ 479 #define SAI_FS_STARTFRAME 0x00000000U 480 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF 481 /** 482 * @} 483 */ 484 485 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 486 * @{ 487 */ 488 #define SAI_FS_ACTIVE_LOW 0x00000000U 489 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL 490 /** 491 * @} 492 */ 493 494 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 495 * @{ 496 */ 497 #define SAI_FS_FIRSTBIT 0x00000000U 498 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF 499 /** 500 * @} 501 */ 502 503 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 504 * @{ 505 */ 506 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 507 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0 508 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1 509 /** 510 * @} 511 */ 512 513 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 514 * @{ 515 */ 516 #define SAI_SLOT_NOTACTIVE 0x00000000U 517 #define SAI_SLOTACTIVE_0 0x00000001U 518 #define SAI_SLOTACTIVE_1 0x00000002U 519 #define SAI_SLOTACTIVE_2 0x00000004U 520 #define SAI_SLOTACTIVE_3 0x00000008U 521 #define SAI_SLOTACTIVE_4 0x00000010U 522 #define SAI_SLOTACTIVE_5 0x00000020U 523 #define SAI_SLOTACTIVE_6 0x00000040U 524 #define SAI_SLOTACTIVE_7 0x00000080U 525 #define SAI_SLOTACTIVE_8 0x00000100U 526 #define SAI_SLOTACTIVE_9 0x00000200U 527 #define SAI_SLOTACTIVE_10 0x00000400U 528 #define SAI_SLOTACTIVE_11 0x00000800U 529 #define SAI_SLOTACTIVE_12 0x00001000U 530 #define SAI_SLOTACTIVE_13 0x00002000U 531 #define SAI_SLOTACTIVE_14 0x00004000U 532 #define SAI_SLOTACTIVE_15 0x00008000U 533 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 534 /** 535 * @} 536 */ 537 538 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 539 * @{ 540 */ 541 #define SAI_STEREOMODE 0x00000000U 542 #define SAI_MONOMODE SAI_xCR1_MONO 543 /** 544 * @} 545 */ 546 547 /** @defgroup SAI_TRIState_Management SAI TRIState Management 548 * @{ 549 */ 550 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 551 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS 552 /** 553 * @} 554 */ 555 556 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 557 * @{ 558 */ 559 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 560 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0 561 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1 562 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0) 563 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2 564 /** 565 * @} 566 */ 567 568 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 569 * @{ 570 */ 571 #define SAI_NOCOMPANDING 0x00000000U 572 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1 573 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0) 574 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL) 575 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL) 576 /** 577 * @} 578 */ 579 580 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 581 * @{ 582 */ 583 #define SAI_ZERO_VALUE 0x00000000U 584 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL 585 /** 586 * @} 587 */ 588 589 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 590 * @{ 591 */ 592 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE 593 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE 594 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE 595 #define SAI_IT_FREQ SAI_xIMR_FREQIE 596 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE 597 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE 598 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE 599 /** 600 * @} 601 */ 602 603 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 604 * @{ 605 */ 606 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR 607 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET 608 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG 609 #define SAI_FLAG_FREQ SAI_xSR_FREQ 610 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY 611 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET 612 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET 613 /** 614 * @} 615 */ 616 617 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 618 * @{ 619 */ 620 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 621 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 622 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 623 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 624 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 625 #define SAI_FIFOSTATUS_FULL 0x00050000U 626 /** 627 * @} 628 */ 629 630 /** 631 * @} 632 */ 633 634 /* Exported macro ------------------------------------------------------------*/ 635 /** @defgroup SAI_Exported_Macros SAI Exported Macros 636 * @brief macros to handle interrupts and specific configurations 637 * @{ 638 */ 639 640 /** @brief Reset SAI handle state. 641 * @param __HANDLE__ specifies the SAI Handle. 642 * @retval None 643 */ 644 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 645 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 646 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 647 (__HANDLE__)->MspInitCallback = NULL; \ 648 (__HANDLE__)->MspDeInitCallback = NULL; \ 649 } while(0U) 650 #else 651 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 652 #endif 653 654 /** @brief Enable the specified SAI interrupts. 655 * @param __HANDLE__ specifies the SAI Handle. 656 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 657 * This parameter can be one of the following values: 658 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 659 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 660 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 661 * @arg SAI_IT_FREQ: FIFO request interrupt enable 662 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 663 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 664 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 665 * @retval None 666 */ 667 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 668 669 /** @brief Disable the specified SAI interrupts. 670 * @param __HANDLE__ specifies the SAI Handle. 671 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 672 * This parameter can be one of the following values: 673 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 674 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 675 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 676 * @arg SAI_IT_FREQ: FIFO request interrupt enable 677 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 678 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 679 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 680 * @retval None 681 */ 682 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 683 684 /** @brief Check whether the specified SAI interrupt source is enabled or not. 685 * @param __HANDLE__ specifies the SAI Handle. 686 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 687 * This parameter can be one of the following values: 688 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 689 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 690 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 691 * @arg SAI_IT_FREQ: FIFO request interrupt enable 692 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 693 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 694 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 695 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 696 */ 697 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 698 699 /** @brief Check whether the specified SAI flag is set or not. 700 * @param __HANDLE__ specifies the SAI Handle. 701 * @param __FLAG__ specifies the flag to check. 702 * This parameter can be one of the following values: 703 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 704 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 705 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 706 * @arg SAI_FLAG_FREQ: FIFO request flag. 707 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 708 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 709 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 710 * @retval The new state of __FLAG__ (TRUE or FALSE). 711 */ 712 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 713 714 /** @brief Clear the specified SAI pending flag. 715 * @param __HANDLE__ specifies the SAI Handle. 716 * @param __FLAG__ specifies the flag to check. 717 * This parameter can be any combination of the following values: 718 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 719 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 720 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 721 * @arg SAI_FLAG_FREQ: Clear FIFO request 722 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 723 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 724 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 725 * 726 * @retval None 727 */ 728 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 729 730 /** @brief Enable SAI. 731 * @param __HANDLE__ specifies the SAI Handle. 732 * @retval None 733 */ 734 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 735 736 /** @brief Disable SAI. 737 * @param __HANDLE__ specifies the SAI Handle. 738 * @retval None 739 */ 740 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 741 742 /** 743 * @} 744 */ 745 746 /* Include SAI HAL Extension module */ 747 #include "stm32h7xx_hal_sai_ex.h" 748 749 /* Exported functions --------------------------------------------------------*/ 750 /** @addtogroup SAI_Exported_Functions 751 * @{ 752 */ 753 754 /* Initialization/de-initialization functions ********************************/ 755 /** @addtogroup SAI_Exported_Functions_Group1 756 * @{ 757 */ 758 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 759 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 760 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 761 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 762 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 763 764 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 765 /* SAI callbacks register/unregister functions ********************************/ 766 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 767 HAL_SAI_CallbackIDTypeDef CallbackID, 768 pSAI_CallbackTypeDef pCallback); 769 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 770 HAL_SAI_CallbackIDTypeDef CallbackID); 771 #endif 772 /** 773 * @} 774 */ 775 776 /* I/O operation functions ***************************************************/ 777 /** @addtogroup SAI_Exported_Functions_Group2 778 * @{ 779 */ 780 /* Blocking mode: Polling */ 781 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 782 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 783 784 /* Non-Blocking mode: Interrupt */ 785 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 786 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 787 788 /* Non-Blocking mode: DMA */ 789 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 790 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 791 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 792 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 793 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 794 795 /* Abort function */ 796 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 797 798 /* Mute management */ 799 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 800 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 801 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 802 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 803 804 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 805 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 806 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 807 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 808 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 809 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 810 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 811 /** 812 * @} 813 */ 814 815 /** @addtogroup SAI_Exported_Functions_Group3 816 * @{ 817 */ 818 /* Peripheral State functions ************************************************/ 819 HAL_SAI_StateTypeDef HAL_SAI_GetState(const SAI_HandleTypeDef *hsai); 820 uint32_t HAL_SAI_GetError(const SAI_HandleTypeDef *hsai); 821 /** 822 * @} 823 */ 824 825 /** 826 * @} 827 */ 828 829 /* Private macros ------------------------------------------------------------*/ 830 /** @defgroup SAI_Private_Macros SAI Private Macros 831 * @{ 832 */ 833 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 834 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 835 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 836 837 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 838 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 839 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 840 ((PROTOCOL) == SAI_PCM_LONG) ||\ 841 ((PROTOCOL) == SAI_PCM_SHORT)) 842 843 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 844 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 845 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 846 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 847 848 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 849 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 850 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 851 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 852 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 853 854 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ 855 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) 856 857 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 3U)) 858 859 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ 860 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) 861 862 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 863 ((MODE) == SAI_MODEMASTER_RX) || \ 864 ((MODE) == SAI_MODESLAVE_TX) || \ 865 ((MODE) == SAI_MODESLAVE_RX)) 866 867 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 868 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 869 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 870 871 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 872 ((DATASIZE) == SAI_DATASIZE_10) || \ 873 ((DATASIZE) == SAI_DATASIZE_16) || \ 874 ((DATASIZE) == SAI_DATASIZE_20) || \ 875 ((DATASIZE) == SAI_DATASIZE_24) || \ 876 ((DATASIZE) == SAI_DATASIZE_32)) 877 878 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 879 ((BIT) == SAI_FIRSTBIT_LSB)) 880 881 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 882 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 883 #if defined(SAI2) && defined(SAI3) && defined(SAI4) 884 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 885 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 886 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 887 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2) || \ 888 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI3) || \ 889 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI4)) 890 #elif defined(SAI2) 891 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 892 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 893 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 894 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 895 #else 896 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 897 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 898 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 899 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI4)) 900 #endif 901 902 #define IS_SAI_BLOCK_MCK_OUTPUT(VALUE) (((VALUE) == SAI_MCK_OUTPUT_ENABLE) || \ 903 ((VALUE) == SAI_MCK_OUTPUT_DISABLE)) 904 905 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 906 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 907 908 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 909 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 910 911 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 912 913 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 914 ((VALUE) == SAI_LAST_SENT_VALUE)) 915 916 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 917 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 918 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 919 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 920 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 921 922 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 923 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 924 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 925 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 926 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 927 928 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 929 ((STATE) == SAI_OUTPUT_RELEASED)) 930 931 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 932 ((MODE) == SAI_STEREOMODE)) 933 934 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 935 936 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 937 938 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 939 ((SIZE) == SAI_SLOTSIZE_16B) || \ 940 ((SIZE) == SAI_SLOTSIZE_32B)) 941 942 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 943 944 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 945 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 946 947 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 948 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 949 950 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 951 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 952 953 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 63U) 954 955 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 956 957 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 958 959 /** 960 * @} 961 */ 962 963 /* Private functions ---------------------------------------------------------*/ 964 /** @defgroup SAI_Private_Functions SAI Private Functions 965 * @{ 966 */ 967 968 /** 969 * @} 970 */ 971 972 /** 973 * @} 974 */ 975 976 /** 977 * @} 978 */ 979 980 #ifdef __cplusplus 981 } 982 #endif 983 984 #endif /* STM32H7xx_HAL_SAI_H */ 985 986
