1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_ramecc.h 4 * @author MCD Application Team 5 * @brief Header file of RAMECC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_RAMECC_H 21 #define STM32H7xx_HAL_RAMECC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 /** @addtogroup STM32H7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup RAMECC 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup RAMECC_Exported_Types RAMECC Exported Types 41 * @brief RAMECC Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL RAMECC State structures definition 47 */ 48 typedef enum 49 { 50 HAL_RAMECC_STATE_RESET = 0x00U, /*!< RAMECC not yet initialized or disabled */ 51 HAL_RAMECC_STATE_READY = 0x01U, /*!< RAMECC initialized and ready for use */ 52 HAL_RAMECC_STATE_BUSY = 0x02U, /*!< RAMECC process is ongoing */ 53 HAL_RAMECC_STATE_ERROR = 0x03U, /*!< RAMECC error state */ 54 }HAL_RAMECC_StateTypeDef; 55 56 57 /** 58 * @brief RAMECC handle Structure definition 59 */ 60 61 typedef struct __RAMECC_HandleTypeDef 62 { 63 RAMECC_MonitorTypeDef *Instance; /*!< Register base address */ 64 __IO HAL_RAMECC_StateTypeDef State; /*!< RAMECC state */ 65 __IO uint32_t ErrorCode; /*!< RAMECC Error Code */ 66 void (* DetectErrorCallback)( struct __RAMECC_HandleTypeDef *hramecc); /*!< RAMECC error detect callback */ 67 }RAMECC_HandleTypeDef; 68 69 /** 70 * @} 71 */ 72 73 74 /* Exported constants --------------------------------------------------------*/ 75 /** @defgroup RAMECC_Exported_Constants RAMECC Exported Constants 76 * @{ 77 */ 78 /** @defgroup RAMECC_Error_Codes RAMECC Error Codes 79 * @{ 80 */ 81 #define HAL_RAMECC_ERROR_NONE 0x00000000U /*!< RAMECC No Error */ 82 #define HAL_RAMECC_ERROR_TIMEOUT 0x00000001U /*!< RAMECC Timeout Error */ 83 #define HAL_RAMECC_ERROR_BUSY 0x00000002U /*!< RAMECC Busy Error */ 84 #define HAL_RAMECC_ERROR_INVALID_CALLBACK 0x00000003U /*!< Invalid Callback error */ 85 /** 86 * @} 87 */ 88 89 /** @defgroup RAMECC_Interrupt RAMECC interrupts 90 * @{ 91 */ 92 #define RAMECC_IT_GLOBAL_ID 0x10000000UL 93 #define RAMECC_IT_MONITOR_ID 0x20000000UL 94 95 #define RAMECC_IT_GLOBAL_ENABLE (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE) 96 #define RAMECC_IT_GLOBAL_SINGLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCSEIE) 97 #define RAMECC_IT_GLOBAL_DOUBLEERR_R (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEIE) 98 #define RAMECC_IT_GLOBAL_DOUBLEERR_W (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GECCDEBWIE) 99 #define RAMECC_IT_GLOBAL_ALL (RAMECC_IT_GLOBAL_ID | RAMECC_IER_GIE | RAMECC_IER_GECCSEIE | RAMECC_IER_GECCDEIE | RAMECC_IER_GECCDEBWIE) 100 101 102 #define RAMECC_IT_MONITOR_SINGLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCSEIE) 103 #define RAMECC_IT_MONITOR_DOUBLEERR_R (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEIE) 104 #define RAMECC_IT_MONITOR_DOUBLEERR_W (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE) 105 #define RAMECC_IT_MONITOR_ALL (RAMECC_IT_MONITOR_ID | RAMECC_CR_ECCDEBWIE | RAMECC_CR_ECCDEIE | RAMECC_CR_ECCSEIE) 106 /** 107 * @} 108 */ 109 110 /** @defgroup RAMECC_FLAG RAMECC Monitor flags 111 * @{ 112 */ 113 #define RAMECC_FLAG_SINGLEERR_R RAMECC_SR_SEDCF 114 #define RAMECC_FLAG_DOUBLEERR_R RAMECC_SR_DEDF 115 #define RAMECC_FLAG_DOUBLEERR_W RAMECC_SR_DEBWDF 116 #define RAMECC_FLAGS_ALL (RAMECC_SR_SEDCF | RAMECC_SR_DEDF | RAMECC_SR_DEBWDF) 117 118 /** 119 * @} 120 */ 121 /** 122 * @} 123 */ 124 125 /* Exported macro ------------------------------------------------------------*/ 126 /** @defgroup RAMECC_Exported_Macros RAMECC Exported Macros 127 * @{ 128 */ 129 130 #define __HAL_RAMECC_ENABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) |= ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) 131 #define __HAL_RAMECC_ENABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= ((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID)) 132 133 /** 134 * @brief Enable the specified RAMECC interrupts. 135 * @param __HANDLE__ : RAMECC handle. 136 * @param __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled. 137 * This parameter can be one of the following values: 138 * @arg RAMECC_IT_GLOBAL_E : Global interrupt enable mask. 139 * @arg RAMECC_IT_GLOBAL_SEE : Global ECC single error interrupt enable. 140 * @arg RAMECC_IT_GLOBAL_DEE : Global ECC double error interrupt enable. 141 * @arg RAMECC_IT_GLOBAL_DEBWE : Global ECC double error on byte write (BW) interrupt enable. 142 * @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask. 143 * @arg RAMECC_IT_MONITOR_SEE : Monitor ECC single error interrupt enable. 144 * @arg RAMECC_IT_MONITOR_DEE : Monitor ECC double error interrupt enable. 145 * @arg RAMECC_IT_MONITOR_DEBWE : Monitor ECC double error on byte write (BW) interrupt enable. 146 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask. 147 * @retval None 148 */ 149 #define __HAL_RAMECC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ( \ 150 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_ENABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\ 151 (__HAL_RAMECC_ENABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__)))) 152 153 154 #define __HAL_RAMECC_DISABLE_GLOBAL_IT(__HANDLE__, __INTERRUPT__) ((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) &= ~((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) 155 #define __HAL_RAMECC_DISABLE_MONITOR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~((__INTERRUPT__) & ~RAMECC_IT_MONITOR_ID)) 156 157 /** 158 * @brief Disable the specified RAMECC interrupts. 159 * @param __HANDLE__ : RAMECC handle. 160 * @param __INTERRUPT__: specifies the RAMECC interrupt sources to be enabled or disabled. 161 * This parameter can be one of the following values: 162 * @arg RAMECC_IT_GLOBAL_E : Global interrupt enable mask. 163 * @arg RAMECC_IT_GLOBAL_SEE : Global ECC single error interrupt enable. 164 * @arg RAMECC_IT_GLOBAL_DEE : Global ECC double error interrupt enable. 165 * @arg RAMECC_IT_GLOBAL_DEBWE : Global ECC double error on byte write (BW) interrupt enable. 166 * @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask. 167 * @arg RAMECC_IT_MONITOR_SEE : Monitor ECC single error interrupt enable. 168 * @arg RAMECC_IT_MONITOR_DEE : Monitor ECC double error interrupt enable. 169 * @arg RAMECC_IT_MONITOR_DEBWE : Monitor ECC double error on byte write (BW) interrupt enable. 170 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask. 171 * @retval None 172 */ 173 #define __HAL_RAMECC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ( \ 174 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_DISABLE_GLOBAL_IT((__HANDLE__), (__INTERRUPT__))) :\ 175 (__HAL_RAMECC_DISABLE_MONITOR_IT((__HANDLE__), (__INTERRUPT__)))) 176 177 178 #define __HAL_RAMECC_GET_GLOBAL_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((RAMECC_TypeDef *)((uint32_t)(__HANDLE__)->Instance & 0xFFFFFF00U))->IER) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET) 179 #define __HAL_RAMECC_GET_MONITOR_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR) & ((__INTERRUPT__) & ~RAMECC_IT_GLOBAL_ID)) ? SET : RESET) 180 181 /** 182 * @brief Check whether the specified RAMECC interrupt source is enabled or not. 183 * @param __HANDLE__ : Specifies the RAMECC Handle. 184 * @param __INTERRUPT__ : Specifies the RAMECC interrupt source to check. 185 * This parameter can be one of the following values: 186 * @arg RAMECC_IT_GLOBAL_E : Global interrupt enable mask. 187 * @arg RAMECC_IT_GLOBAL_SEE : Global ECC single error interrupt enable. 188 * @arg RAMECC_IT_GLOBAL_DEE : Global ECC double error interrupt enable. 189 * @arg RAMECC_IT_GLOBAL_DEBWE : Global ECC double error on byte write (BW) interrupt enable. 190 * @arg RAMECC_IT_GLOBAL_ALL : All Global ECC interrupts enable mask. 191 * @arg RAMECC_IT_MONITOR_SEE : Monitor ECC single error interrupt enable. 192 * @arg RAMECC_IT_MONITOR_DEE : Monitor ECC double error interrupt enable. 193 * @arg RAMECC_IT_MONITOR_DEBWE : Monitor ECC double error on byte write (BW) interrupt enable. 194 * @arg RAMECC_IT_MONITOR_ALL : All Monitor ECC interrupts enable mask. 195 * @retval The new state of __INTERRUPT__ (SET or RESET). 196 */ 197 #define __HAL_RAMECC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ( \ 198 (IS_RAMECC_GLOBAL_INTERRUPT(__INTERRUPT__)) ? (__HAL_RAMECC_GET_GLOBAL_IT_SOURCE((__HANDLE__), (__INTERRUPT__))) :\ 199 (__HAL_RAMECC_GET_MONITOR_IT_SOURCE((__HANDLE__), (__INTERRUPT__)))) 200 201 202 /** 203 * @brief Get the RAMECC pending flags. 204 * @param __HANDLE__ : RAMECC handle. 205 * @param __FLAG__ : specifies the flag to clear. 206 * This parameter can be any combination of the following values: 207 * @arg RAMECC_FLAG_SEDCF : RAMECC instance ECC single error detected and corrected flag. 208 * @arg RAMECC_FLAG_DEDF : RAMECC instance ECC double error detected flag. 209 * @arg RAMECC_FLAG_DEBWDF : RAMECC instance ECC double error on byte write (BW) detected flag. 210 * @arg RAMECC_FLAGS_ALL : RAMECC instance all flag. 211 * @retval The state of __FLAG__ (SET or RESET). 212 */ 213 #define __HAL_RAMECC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= (__FLAG__)) 214 215 216 /** 217 * @brief Clear the RAMECC pending flags. 218 * @param __HANDLE__ : RAMECC handle. 219 * @param __FLAG__ : specifies the flag to clear. 220 * This parameter can be any combination of the following values: 221 * @arg RAMECC_FLAG_SEDCF : RAMECC instance ECC single error detected and corrected flag. 222 * @arg RAMECC_FLAG_DEDF : RAMECC instance ECC double error detected flag. 223 * @arg RAMECC_FLAG_DEBWDF : RAMECC instance ECC double error on byte write (BW) detected flag. 224 * @arg RAMECC_FLAGS_ALL : RAMECC instance all flag. 225 * @retval None. 226 */ 227 #define __HAL_RAMECC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__)) 228 229 /** 230 * @brief Reset the RAMECC handle state. 231 * @param __HANDLE__ : Specifies the RAMECC Handle. 232 * @retval None. 233 */ 234 #define __HAL_RAMECC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RAMECC_STATE_RESET) 235 /** 236 * @} 237 */ 238 239 /* Exported functions --------------------------------------------------------*/ 240 241 /** @defgroup RAMECC_Exported_Functions RAMECC Exported Functions 242 * @brief RAMECC Exported functions 243 * @{ 244 */ 245 246 /** @defgroup RAMECC_Exported_Functions_Group1 Initialization and de-initialization functions 247 * @brief Initialization and de-initialization functions 248 * @{ 249 */ 250 HAL_StatusTypeDef HAL_RAMECC_Init (RAMECC_HandleTypeDef *hramecc); 251 HAL_StatusTypeDef HAL_RAMECC_DeInit (RAMECC_HandleTypeDef *hramecc); 252 /** 253 * @} 254 */ 255 256 /** @defgroup RAMECC_Exported_Functions_Group2 monitoring operation functions 257 * @brief monitoring operation functions 258 * @{ 259 */ 260 HAL_StatusTypeDef HAL_RAMECC_StartMonitor (RAMECC_HandleTypeDef *hramecc); 261 HAL_StatusTypeDef HAL_RAMECC_StopMonitor (RAMECC_HandleTypeDef *hramecc); 262 HAL_StatusTypeDef HAL_RAMECC_EnableNotification (RAMECC_HandleTypeDef *hramecc, uint32_t Notifications); 263 HAL_StatusTypeDef HAL_RAMECC_DisableNotification (RAMECC_HandleTypeDef *hramecc, uint32_t Notifications); 264 void HAL_RAMECC_IRQHandler (RAMECC_HandleTypeDef *hramecc); 265 HAL_StatusTypeDef HAL_RAMECC_RegisterCallback (RAMECC_HandleTypeDef *hramecc, void (* pCallback)(RAMECC_HandleTypeDef *_hramecc)); 266 HAL_StatusTypeDef HAL_RAMECC_UnRegisterCallback (RAMECC_HandleTypeDef *hramecc); 267 /** 268 * @} 269 */ 270 271 /** @defgroup RAMECC_Exported_Functions_Group3 Error information functions 272 * @brief Error information functions 273 * @{ 274 */ 275 uint32_t HAL_RAMECC_GetFailingAddress (RAMECC_HandleTypeDef *hramecc); 276 uint32_t HAL_RAMECC_GetFailingDataLow (RAMECC_HandleTypeDef *hramecc); 277 uint32_t HAL_RAMECC_GetFailingDataHigh (RAMECC_HandleTypeDef *hramecc); 278 uint32_t HAL_RAMECC_GetHammingErrorCode (RAMECC_HandleTypeDef *hramecc); 279 uint32_t HAL_RAMECC_IsECCSingleErrorDetected (RAMECC_HandleTypeDef *hramecc); 280 uint32_t HAL_RAMECC_IsECCDoubleErrorDetected (RAMECC_HandleTypeDef *hramecc); 281 /** 282 * @} 283 */ 284 285 /** @defgroup RAMECC_Exported_Functions_Group4 State and Error Functions 286 * @brief State and Error Functions 287 * @{ 288 */ 289 HAL_RAMECC_StateTypeDef HAL_RAMECC_GetState (RAMECC_HandleTypeDef *hramecc); 290 uint32_t HAL_RAMECC_GetError (RAMECC_HandleTypeDef *hramecc); 291 /** 292 * @} 293 */ 294 295 /** 296 * @} 297 */ 298 /* Private Constants -------------------------------------------------------------*/ 299 /** @defgroup RAMECC_Private_Constants RAMECC Private Constants 300 * @brief RAMECC private defines and constants 301 * @{ 302 */ 303 /** 304 * @} 305 */ 306 307 /* Private macros ------------------------------------------------------------*/ 308 /** @defgroup RAMECC_Private_Macros RAMECC Private Macros 309 * @brief RAMECC private macros 310 * @{ 311 */ 312 313 #define IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_GLOBAL_ENABLE) || \ 314 ((INTERRUPT) == RAMECC_IT_GLOBAL_SINGLEERR_R) || \ 315 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_R) || \ 316 ((INTERRUPT) == RAMECC_IT_GLOBAL_DOUBLEERR_W) || \ 317 ((INTERRUPT) == RAMECC_IT_GLOBAL_ALL)) 318 319 320 #define IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT) (((INTERRUPT) == RAMECC_IT_MONITOR_SINGLEERR_R) || \ 321 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_R) || \ 322 ((INTERRUPT) == RAMECC_IT_MONITOR_DOUBLEERR_W) || \ 323 ((INTERRUPT) == RAMECC_IT_MONITOR_ALL)) 324 325 #define IS_RAMECC_INTERRUPT(INTERRUPT) ((IS_RAMECC_GLOBAL_INTERRUPT(INTERRUPT)) || \ 326 (IS_RAMECC_MONITOR_INTERRUPT(INTERRUPT))) 327 328 /** 329 * @} 330 */ 331 332 /* Private functions ---------------------------------------------------------*/ 333 /** @defgroup RAMECC_Private_Functions RAMECC Private Functions 334 * @brief RAMECC private functions 335 * @{ 336 */ 337 /** 338 * @} 339 */ 340 341 /** 342 * @} 343 */ 344 345 /** 346 * @} 347 */ 348 #ifdef __cplusplus 349 } 350 #endif 351 352 #endif /* STM32H7xx_HAL_RAMECC_H */ 353 354
