1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_mmc.h 4 * @author MCD Application Team 5 * @brief Header file of MMC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_MMC_H 21 #define STM32H7xx_HAL_MMC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_ll_sdmmc.h" 29 30 /** @addtogroup STM32H7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup MMC 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup MMC_Exported_Types MMC Exported Types 40 * @{ 41 */ 42 43 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 44 * @{ 45 */ 46 typedef enum 47 { 48 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 49 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 50 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 51 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 52 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 53 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 54 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */ 55 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 56 } HAL_MMC_StateTypeDef; 57 /** 58 * @} 59 */ 60 61 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 62 * @{ 63 */ 64 typedef uint32_t HAL_MMC_CardStateTypeDef; 65 66 #define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */ 67 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready (can't be checked by CMD13) */ 68 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */ 69 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 70 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 71 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 72 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 73 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 74 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 75 #define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */ 76 #define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */ 77 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 83 * @{ 84 */ 85 #define MMC_InitTypeDef SDMMC_InitTypeDef 86 #define MMC_TypeDef SDMMC_TypeDef 87 88 /** 89 * @brief MMC Card Information Structure definition 90 */ 91 typedef struct 92 { 93 uint32_t CardType; /*!< Specifies the card Type */ 94 95 uint32_t Class; /*!< Specifies the class of the card class */ 96 97 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 98 99 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 100 101 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 102 103 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 104 105 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 106 107 } HAL_MMC_CardInfoTypeDef; 108 109 /** 110 * @brief MMC handle Structure definition 111 */ 112 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 113 typedef struct __MMC_HandleTypeDef 114 #else 115 typedef struct 116 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 117 { 118 MMC_TypeDef *Instance; /*!< MMC registers base address */ 119 120 MMC_InitTypeDef Init; /*!< MMC required parameters */ 121 122 HAL_LockTypeDef Lock; /*!< MMC locking object */ 123 124 const uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 125 126 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 127 128 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 129 130 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 131 132 __IO uint32_t Context; /*!< MMC transfer context */ 133 134 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 135 136 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 137 138 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 139 140 uint32_t CSD[4U]; /*!< MMC card specific data table */ 141 142 uint32_t CID[4U]; /*!< MMC card identification number table */ 143 144 uint32_t Ext_CSD[128]; 145 146 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 147 void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 148 void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 149 void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc); 150 void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 151 void (* Read_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 152 void (* Read_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 153 void (* Write_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 154 void (* Write_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc); 155 156 void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc); 157 void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc); 158 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 159 } MMC_HandleTypeDef; 160 161 162 /** 163 * @} 164 */ 165 166 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 167 * @{ 168 */ 169 typedef struct 170 { 171 __IO uint8_t CSDStruct; /*!< CSD structure */ 172 __IO uint8_t SysSpecVersion; /*!< System specification version */ 173 __IO uint8_t Reserved1; /*!< Reserved */ 174 __IO uint8_t TAAC; /*!< Data read access time 1 */ 175 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 176 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 177 __IO uint16_t CardComdClasses; /*!< Card command classes */ 178 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 179 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 180 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 181 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 182 __IO uint8_t DSRImpl; /*!< DSR implemented */ 183 __IO uint8_t Reserved2; /*!< Reserved */ 184 __IO uint32_t DeviceSize; /*!< Device Size */ 185 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 186 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 187 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 188 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 189 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 190 __IO uint8_t EraseGrSize; /*!< Erase group size */ 191 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 192 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 193 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 194 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 195 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 196 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 197 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 198 __IO uint8_t Reserved3; /*!< Reserved */ 199 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 200 __IO uint8_t FileFormatGroup; /*!< File format group */ 201 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 202 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 203 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 204 __IO uint8_t FileFormat; /*!< File format */ 205 __IO uint8_t ECC; /*!< ECC code */ 206 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 207 __IO uint8_t Reserved4; /*!< Always 1 */ 208 209 } HAL_MMC_CardCSDTypeDef; 210 /** 211 * @} 212 */ 213 214 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 215 * @{ 216 */ 217 typedef struct 218 { 219 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 220 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 221 __IO uint32_t ProdName1; /*!< Product Name part1 */ 222 __IO uint8_t ProdName2; /*!< Product Name part2 */ 223 __IO uint8_t ProdRev; /*!< Product Revision */ 224 __IO uint32_t ProdSN; /*!< Product Serial Number */ 225 __IO uint8_t Reserved1; /*!< Reserved1 */ 226 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 227 __IO uint8_t CID_CRC; /*!< CID CRC */ 228 __IO uint8_t Reserved2; /*!< Always 1 */ 229 230 } HAL_MMC_CardCIDTypeDef; 231 /** 232 * @} 233 */ 234 235 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 236 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 237 * @{ 238 */ 239 typedef enum 240 { 241 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 242 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 243 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 244 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 245 HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */ 246 HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */ 247 HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */ 248 HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */ 249 250 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 251 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 252 } HAL_MMC_CallbackIDTypeDef; 253 /** 254 * @} 255 */ 256 257 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 258 * @{ 259 */ 260 typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc); 261 /** 262 * @} 263 */ 264 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 265 /** 266 * @} 267 */ 268 269 /* Exported constants --------------------------------------------------------*/ 270 /** @defgroup MMC_Exported_Constants Exported Constants 271 * @{ 272 */ 273 274 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 275 276 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 277 * @{ 278 */ 279 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 280 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 281 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 282 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 283 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 284 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 285 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 286 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 287 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ 288 /*!< number of transferred bytes does not match the block length */ 289 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 290 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 291 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 292 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ 293 /*!< command or if there was an attempt to access a locked card */ 294 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 295 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 296 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 297 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 298 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 299 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 300 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 301 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 302 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 303 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 304 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ 305 /*!< of erase sequence command was received */ 306 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 307 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 308 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 309 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 310 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 311 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 312 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 313 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 314 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 315 316 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 317 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 318 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 319 /** 320 * @} 321 */ 322 323 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 324 * @{ 325 */ 326 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 327 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 328 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 329 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 330 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 331 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 332 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 333 334 /** 335 * @} 336 */ 337 338 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 339 * @{ 340 */ 341 /** 342 * @brief 343 */ 344 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 345 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 346 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 347 #define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 348 #define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 349 #define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 350 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 351 /** 352 * @} 353 */ 354 355 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 356 * @{ 357 */ 358 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 359 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 360 361 /** 362 * @} 363 */ 364 365 /** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type 366 * @{ 367 */ 368 #define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ 369 #define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ 370 #define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ 371 #define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ 372 #define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ 373 #define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ 374 375 #define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ 376 ((TYPE) == HAL_MMC_TRIM) || \ 377 ((TYPE) == HAL_MMC_DISCARD) || \ 378 ((TYPE) == HAL_MMC_SECURE_ERASE) || \ 379 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ 380 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) 381 /** 382 * @} 383 */ 384 385 /** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type 386 * @{ 387 */ 388 #define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ 389 #define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ 390 #define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ 391 #define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ 392 393 394 #define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ 395 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ 396 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ 397 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) 398 /** 399 * @} 400 */ 401 402 /** 403 * @} 404 */ 405 406 /* Exported macro ------------------------------------------------------------*/ 407 /** @defgroup MMC_Exported_macros MMC Exported Macros 408 * @brief macros to handle interrupts and specific clock configurations 409 * @{ 410 */ 411 /** @brief Reset MMC handle state. 412 * @param __HANDLE__ MMC Handle. 413 * @retval None 414 */ 415 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 416 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 417 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 418 (__HANDLE__)->MspInitCallback = NULL; \ 419 (__HANDLE__)->MspDeInitCallback = NULL; \ 420 } while(0) 421 #else 422 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 423 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 424 425 /** 426 * @brief Enable the MMC device interrupt. 427 * @param __HANDLE__ MMC Handle. 428 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 429 * This parameter can be one or a combination of the following values: 430 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 431 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 432 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 433 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 434 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 435 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 436 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 437 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 438 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 439 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 440 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 441 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 442 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 443 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 444 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 445 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 446 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 447 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 448 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 449 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 450 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 451 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 452 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 453 * @retval None 454 */ 455 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 456 457 /** 458 * @brief Disable the MMC device interrupt. 459 * @param __HANDLE__ MMC Handle. 460 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 461 * This parameter can be one or a combination of the following values: 462 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 463 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 464 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 465 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 466 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 467 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 468 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 469 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 470 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 471 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 472 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 473 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 474 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 475 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 476 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 477 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 478 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 479 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 480 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 481 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 482 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 483 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 484 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 485 * @retval None 486 */ 487 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 488 489 /** 490 * @brief Check whether the specified MMC flag is set or not. 491 * @param __HANDLE__ MMC Handle. 492 * @param __FLAG__ specifies the flag to check. 493 * This parameter can be one of the following values: 494 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 495 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 496 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 497 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 498 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 499 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 500 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 501 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 502 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 503 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 504 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 505 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 506 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 507 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 508 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 509 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 510 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 511 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 512 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 513 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 514 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 515 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 516 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 517 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 518 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 519 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 520 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 521 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 522 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 523 * @retval The new state of MMC FLAG (SET or RESET). 524 */ 525 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 526 527 /** 528 * @brief Clear the MMC's pending flags. 529 * @param __HANDLE__ MMC Handle. 530 * @param __FLAG__ specifies the flag to clear. 531 * This parameter can be one or a combination of the following values: 532 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 533 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 534 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 535 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 536 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 537 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 538 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 539 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 540 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 541 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 542 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 543 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 544 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 545 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 546 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 547 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 548 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 549 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 550 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 551 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 552 * @retval None 553 */ 554 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 555 556 /** 557 * @brief Check whether the specified MMC interrupt has occurred or not. 558 * @param __HANDLE__ MMC Handle. 559 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 560 * This parameter can be one of the following values: 561 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 562 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 563 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 564 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 565 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 566 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 567 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 568 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 569 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 570 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 571 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 572 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 573 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 574 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 575 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 576 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 577 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 578 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 579 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 580 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 581 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 582 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 583 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 584 * @retval The new state of MMC IT (SET or RESET). 585 */ 586 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 587 588 /** 589 * @brief Clear the MMC's interrupt pending bits. 590 * @param __HANDLE__ MMC Handle. 591 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 592 * This parameter can be one or a combination of the following values: 593 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 594 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 595 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 596 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 597 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 598 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 599 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 600 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 601 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 602 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 603 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 604 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 605 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 606 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 607 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 608 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 609 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 610 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 611 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 612 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 613 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 614 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 615 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 616 * @retval None 617 */ 618 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 619 620 /** 621 * @} 622 */ 623 624 /* Include MMC HAL Extension module */ 625 #include "stm32h7xx_hal_mmc_ex.h" 626 627 /* Exported functions --------------------------------------------------------*/ 628 /** @defgroup MMC_Exported_Functions MMC Exported Functions 629 * @{ 630 */ 631 632 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions 633 * @{ 634 */ 635 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 636 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 637 HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc); 638 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 639 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 640 641 /** 642 * @} 643 */ 644 645 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 646 * @{ 647 */ 648 /* Blocking mode: Polling */ 649 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 650 uint32_t NumberOfBlocks, 651 uint32_t Timeout); 652 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 653 uint32_t NumberOfBlocks, uint32_t Timeout); 654 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 655 /* Non-Blocking mode: IT */ 656 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 657 uint32_t NumberOfBlocks); 658 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 659 uint32_t NumberOfBlocks); 660 /* Non-Blocking mode: DMA */ 661 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 662 uint32_t NumberOfBlocks); 663 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 664 uint32_t NumberOfBlocks); 665 666 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 667 668 /* Callback in non blocking modes (DMA) */ 669 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 670 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 671 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 672 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 673 674 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 675 /* MMC callback registering/unregistering */ 676 HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, 677 pMMC_CallbackTypeDef pCallback); 678 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 679 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 680 /** 681 * @} 682 */ 683 684 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 685 * @{ 686 */ 687 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 688 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 689 /** 690 * @} 691 */ 692 693 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 694 * @{ 695 */ 696 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 697 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 698 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 699 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 700 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 701 /** 702 * @} 703 */ 704 705 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 706 * @{ 707 */ 708 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 709 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 710 /** 711 * @} 712 */ 713 714 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 715 * @{ 716 */ 717 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 718 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 719 /** 720 * @} 721 */ 722 723 /** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management 724 * @{ 725 */ 726 HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, 727 uint32_t BlockEndAdd); 728 HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); 729 HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); 730 HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); 731 /** 732 * @} 733 */ 734 735 /** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management 736 * @{ 737 */ 738 HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc); 739 HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc); 740 /** 741 * @} 742 */ 743 /* Private types -------------------------------------------------------------*/ 744 /** @defgroup MMC_Private_Types MMC Private Types 745 * @{ 746 */ 747 748 /** 749 * @} 750 */ 751 752 /* Private defines -----------------------------------------------------------*/ 753 /** @defgroup MMC_Private_Defines MMC Private Defines 754 * @{ 755 */ 756 #define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61 757 #define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8 758 /** 759 * @} 760 */ 761 762 /* Private variables ---------------------------------------------------------*/ 763 /** @defgroup MMC_Private_Variables MMC Private Variables 764 * @{ 765 */ 766 767 /** 768 * @} 769 */ 770 771 /* Private constants ---------------------------------------------------------*/ 772 /** @defgroup MMC_Private_Constants MMC Private Constants 773 * @{ 774 */ 775 776 /** 777 * @} 778 */ 779 780 /* Private macros ------------------------------------------------------------*/ 781 /** @defgroup MMC_Private_Macros MMC Private Macros 782 * @{ 783 */ 784 785 /** 786 * @} 787 */ 788 789 /* Private functions prototypes ----------------------------------------------*/ 790 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 791 * @{ 792 */ 793 794 /** 795 * @} 796 */ 797 798 /* Private functions ---------------------------------------------------------*/ 799 /** @defgroup MMC_Private_Functions MMC Private Functions 800 * @{ 801 */ 802 803 /** 804 * @} 805 */ 806 807 808 /** 809 * @} 810 */ 811 812 /** 813 * @} 814 */ 815 816 /** 817 * @} 818 */ 819 820 #ifdef __cplusplus 821 } 822 #endif 823 824 825 #endif /* STM32H7xx_HAL_MMC_H */ 826
