1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_gfxmmu.h 4 * @author MCD Application Team 5 * @brief Header file of GFXMMU HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_GFXMMU_H 21 #define STM32H7xx_HAL_GFXMMU_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 #if defined(GFXMMU) 31 32 /** @addtogroup STM32H7xx_HAL_Driver 33 * @{ 34 */ 35 36 /** @addtogroup GFXMMU 37 * @{ 38 */ 39 40 /* Exported types ------------------------------------------------------------*/ 41 /** @defgroup GFXMMU_Exported_Types GFXMMU Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief HAL GFXMMU states definition 47 */ 48 typedef enum 49 { 50 HAL_GFXMMU_STATE_RESET = 0x00U, /*!< GFXMMU not initialized */ 51 HAL_GFXMMU_STATE_READY = 0x01U, /*!< GFXMMU initialized and ready for use */ 52 }HAL_GFXMMU_StateTypeDef; 53 54 /** 55 * @brief GFXMMU buffers structure definition 56 */ 57 typedef struct 58 { 59 uint32_t Buf0Address; /*!< Physical address of buffer 0. */ 60 uint32_t Buf1Address; /*!< Physical address of buffer 1. */ 61 uint32_t Buf2Address; /*!< Physical address of buffer 2. */ 62 uint32_t Buf3Address; /*!< Physical address of buffer 3. */ 63 }GFXMMU_BuffersTypeDef; 64 65 /** 66 * @brief GFXMMU cache and pre-fetch structure definition 67 */ 68 typedef struct 69 { 70 FunctionalState Activation; /*!< Cache and pre-fetch enable/disable. 71 @note: All following parameters are useful only if cache and pre-fetch are enabled. */ 72 uint32_t CacheLock; /*!< Locking the cache to a buffer. 73 This parameter can be a value of @ref GFXMMU_CacheLock. */ 74 uint32_t CacheLockBuffer; /*!< Buffer on which the cache is locked. 75 This parameter can be a value of @ref GFXMMU_CacheLockBuffer. 76 @note: Useful only when lock of the cache is enabled. */ 77 uint32_t CacheForce; /*!< Forcing the cache regardless MPU attributes. 78 This parameter can be a value of @ref GFXMMU_CacheForce. 79 @note: Useful only when lock of the cache is enabled. */ 80 uint32_t OutterBufferability; /*!< Bufferability of an access generated by the GFXMMU cache. 81 This parameter can be a value of @ref GFXMMU_OutterBufferability. */ 82 uint32_t OutterCachability; /*!< Cachability of an access generated by the GFXMMU cache. 83 This parameter can be a value of @ref GFXMMU_OutterCachability. */ 84 uint32_t Prefetch; /*!< Pre-fetch enable/disable. 85 This parameter can be a value of @ref GFXMMU_Prefetch. */ 86 }GFXMMU_CachePrefetchTypeDef; 87 88 /** 89 * @brief GFXMMU interrupts structure definition 90 */ 91 typedef struct 92 { 93 FunctionalState Activation; /*!< Interrupts enable/disable */ 94 uint32_t UsedInterrupts; /*!< Interrupts used. 95 This parameter can be a values combination of @ref GFXMMU_Interrupts. 96 @note: Useful only when interrupts are enabled. */ 97 }GFXMMU_InterruptsTypeDef; 98 99 /** 100 * @brief GFXMMU init structure definition 101 */ 102 typedef struct 103 { 104 uint32_t BlocksPerLine; /*!< Number of blocks of 16 bytes per line. 105 This parameter can be a value of @ref GFXMMU_BlocksPerLine. */ 106 uint32_t DefaultValue; /*!< Value returned when virtual memory location not physically mapped. */ 107 GFXMMU_BuffersTypeDef Buffers; /*!< Physical buffers addresses. */ 108 GFXMMU_CachePrefetchTypeDef CachePrefetch; /*!< Cache and pre-fetch parameters. */ 109 GFXMMU_InterruptsTypeDef Interrupts; /*!< Interrupts parameters. */ 110 }GFXMMU_InitTypeDef; 111 112 /** 113 * @brief GFXMMU handle structure definition 114 */ 115 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 116 typedef struct __GFXMMU_HandleTypeDef 117 #else 118 typedef struct 119 #endif 120 { 121 GFXMMU_TypeDef *Instance; /*!< GFXMMU instance */ 122 GFXMMU_InitTypeDef Init; /*!< GFXMMU init parameters */ 123 HAL_GFXMMU_StateTypeDef State; /*!< GFXMMU state */ 124 __IO uint32_t ErrorCode; /*!< GFXMMU error code */ 125 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 126 void (*ErrorCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU error callback */ 127 void (*MspInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP init callback */ 128 void (*MspDeInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP de-init callback */ 129 #endif 130 }GFXMMU_HandleTypeDef; 131 132 /** 133 * @brief GFXMMU LUT line structure definition 134 */ 135 typedef struct 136 { 137 uint32_t LineNumber; /*!< LUT line number. 138 This parameter must be a number between Min_Data = 0 and Max_Data = 1023. */ 139 uint32_t LineStatus; /*!< LUT line enable/disable. 140 This parameter can be a value of @ref GFXMMU_LutLineStatus. */ 141 uint32_t FirstVisibleBlock; /*!< First visible block on this line. 142 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ 143 uint32_t LastVisibleBlock; /*!< Last visible block on this line. 144 This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ 145 int32_t LineOffset; /*!< Offset of block 0 of the current line in physical buffer. 146 This parameter must be a number between Min_Data = -4080 and Max_Data = 4190208. 147 @note: Line offset has to be computed with the following formula: 148 LineOffset = [(Blocks already used) - (1st visible block)]*BlockSize. */ 149 }GFXMMU_LutLineTypeDef; 150 151 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 152 /** 153 * @brief GFXMMU callback ID enumeration definition 154 */ 155 typedef enum 156 { 157 HAL_GFXMMU_ERROR_CB_ID = 0x00U, /*!< GFXMMU error callback ID */ 158 HAL_GFXMMU_MSPINIT_CB_ID = 0x01U, /*!< GFXMMU MSP init callback ID */ 159 HAL_GFXMMU_MSPDEINIT_CB_ID = 0x02U /*!< GFXMMU MSP de-init callback ID */ 160 }HAL_GFXMMU_CallbackIDTypeDef; 161 162 /** 163 * @brief GFXMMU callback pointer definition 164 */ 165 typedef void (*pGFXMMU_CallbackTypeDef)(GFXMMU_HandleTypeDef *hgfxmmu); 166 #endif 167 168 /** 169 * @} 170 */ 171 /* End of exported types -----------------------------------------------------*/ 172 173 /* Exported constants --------------------------------------------------------*/ 174 /** @defgroup GFXMMU_Exported_Constants GFXMMU Exported Constants 175 * @{ 176 */ 177 178 /** @defgroup GFXMMU_BlocksPerLine GFXMMU blocks per line 179 * @{ 180 */ 181 #define GFXMMU_256BLOCKS 0x00000000U /*!< 256 blocks of 16 bytes per line */ 182 #define GFXMMU_192BLOCKS GFXMMU_CR_192BM /*!< 192 blocks of 16 bytes per line */ 183 /** 184 * @} 185 */ 186 187 /** @defgroup GFXMMU_CacheLock GFXMMU cache lock 188 * @{ 189 */ 190 #define GFXMMU_CACHE_LOCK_DISABLE 0x00000000U /*!< Cache not locked to a buffer */ 191 #define GFXMMU_CACHE_LOCK_ENABLE GFXMMU_CR_CL /*!< Cache locked to a buffer */ 192 /** 193 * @} 194 */ 195 196 /** @defgroup GFXMMU_CacheLockBuffer GFXMMU cache lock buffer 197 * @{ 198 */ 199 #define GFXMMU_CACHE_LOCK_BUFFER0 0x00000000U /*!< Cache locked to buffer 0 */ 200 #define GFXMMU_CACHE_LOCK_BUFFER1 GFXMMU_CR_CLB_0 /*!< Cache locked to buffer 1 */ 201 #define GFXMMU_CACHE_LOCK_BUFFER2 GFXMMU_CR_CLB_1 /*!< Cache locked to buffer 2 */ 202 #define GFXMMU_CACHE_LOCK_BUFFER3 GFXMMU_CR_CLB /*!< Cache locked to buffer 3 */ 203 /** 204 * @} 205 */ 206 207 /** @defgroup GFXMMU_CacheForce GFXMMU cache force 208 * @{ 209 */ 210 #define GFXMMU_CACHE_FORCE_DISABLE 0x00000000U /*!< Caching not forced */ 211 #define GFXMMU_CACHE_FORCE_ENABLE GFXMMU_CR_FC /*!< Caching forced */ 212 /** 213 * @} 214 */ 215 216 /** @defgroup GFXMMU_OutterBufferability GFXMMU outer bufferability 217 * @{ 218 */ 219 #define GFXMMU_OUTTER_BUFFERABILITY_DISABLE 0x00000000U /*!< No bufferable */ 220 #define GFXMMU_OUTTER_BUFFERABILITY_ENABLE GFXMMU_CR_OB /*!< Bufferable */ 221 /** 222 * @} 223 */ 224 225 /** @defgroup GFXMMU_OutterCachability GFXMMU outer cachability 226 * @{ 227 */ 228 #define GFXMMU_OUTTER_CACHABILITY_DISABLE 0x00000000U /*!< No cacheable */ 229 #define GFXMMU_OUTTER_CACHABILITY_ENABLE GFXMMU_CR_OC /*!< Cacheable */ 230 /** 231 * @} 232 */ 233 234 /** @defgroup GFXMMU_Prefetch GFXMMU pre-fetch 235 * @{ 236 */ 237 #define GFXMMU_PREFETCH_DISABLE GFXMMU_CR_PD /*!< Pre-fetch disable */ 238 #define GFXMMU_PREFETCH_ENABLE 0x00000000U /*!< Pre-fetch enable */ 239 /** 240 * @} 241 */ 242 243 /** @defgroup GFXMMU_Interrupts GFXMMU interrupts 244 * @{ 245 */ 246 #define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE /*!< AHB master error interrupt */ 247 #define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE /*!< Buffer 0 overflow interrupt */ 248 #define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE /*!< Buffer 1 overflow interrupt */ 249 #define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE /*!< Buffer 2 overflow interrupt */ 250 #define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE /*!< Buffer 3 overflow interrupt */ 251 /** 252 * @} 253 */ 254 255 /** @defgroup GFXMMU_Error_Code GFXMMU Error Code 256 * @{ 257 */ 258 #define GFXMMU_ERROR_NONE 0x00000000U /*!< No error */ 259 #define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF /*!< Buffer 0 overflow */ 260 #define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF /*!< Buffer 1 overflow */ 261 #define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF /*!< Buffer 2 overflow */ 262 #define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF /*!< Buffer 3 overflow */ 263 #define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF /*!< AHB master error */ 264 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 265 #define GFXMMU_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 266 #endif 267 /** 268 * @} 269 */ 270 271 /** @defgroup GFXMMU_LutLineStatus GFXMMU LUT line status 272 * @{ 273 */ 274 #define GFXMMU_LUT_LINE_DISABLE 0x00000000U /*!< LUT line disabled */ 275 #define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN /*!< LUT line enabled */ 276 /** 277 * @} 278 */ 279 280 /** @defgroup GFXMMU_CacheForceParam GFXMMU cache force parameter 281 * @{ 282 */ 283 #define GFXMMU_CACHE_FORCE_FLUSH GFXMMU_CCR_FF /*!< Force cache flush */ 284 #define GFXMMU_CACHE_FORCE_INVALIDATE GFXMMU_CCR_FI /*!< Force cache invalidate */ 285 /** 286 * @} 287 */ 288 289 /** 290 * @} 291 */ 292 /* End of exported constants -------------------------------------------------*/ 293 294 /* Exported macros -----------------------------------------------------------*/ 295 /** @defgroup GFXMMU_Exported_Macros GFXMMU Exported Macros 296 * @{ 297 */ 298 299 /** @brief Reset GFXMMU handle state. 300 * @param __HANDLE__ GFXMMU handle. 301 * @retval None 302 */ 303 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 304 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) do{ \ 305 (__HANDLE__)->State = HAL_GFXMMU_STATE_RESET; \ 306 (__HANDLE__)->MspInitCallback = NULL; \ 307 (__HANDLE__)->MspDeInitCallback = NULL; \ 308 } while(0) 309 #else 310 #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET) 311 #endif 312 313 /** 314 * @} 315 */ 316 /* End of exported macros ----------------------------------------------------*/ 317 318 /* Exported functions --------------------------------------------------------*/ 319 /** @addtogroup GFXMMU_Exported_Functions GFXMMU Exported Functions 320 * @{ 321 */ 322 323 /** @addtogroup GFXMMU_Exported_Functions_Group1 Initialization and de-initialization functions 324 * @{ 325 */ 326 /* Initialization and de-initialization functions *****************************/ 327 HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu); 328 HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu); 329 void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu); 330 void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu); 331 #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1) 332 /* GFXMMU callbacks register/unregister functions *****************************/ 333 HAL_StatusTypeDef HAL_GFXMMU_RegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu, 334 HAL_GFXMMU_CallbackIDTypeDef CallbackID, 335 pGFXMMU_CallbackTypeDef pCallback); 336 HAL_StatusTypeDef HAL_GFXMMU_UnRegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu, 337 HAL_GFXMMU_CallbackIDTypeDef CallbackID); 338 #endif 339 /** 340 * @} 341 */ 342 343 /** @addtogroup GFXMMU_Exported_Functions_Group2 Operations functions 344 * @{ 345 */ 346 /* Operation functions ********************************************************/ 347 HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(GFXMMU_HandleTypeDef *hgfxmmu, 348 uint32_t FirstLine, 349 uint32_t LinesNumber, 350 uint32_t Address); 351 352 HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(GFXMMU_HandleTypeDef *hgfxmmu, 353 uint32_t FirstLine, 354 uint32_t LinesNumber); 355 356 HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_LutLineTypeDef *lutLine); 357 358 HAL_StatusTypeDef HAL_GFXMMU_ConfigForceCache(GFXMMU_HandleTypeDef *hgfxmmu, uint32_t ForceParam); 359 360 HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_BuffersTypeDef *Buffers); 361 362 HAL_StatusTypeDef HAL_GFXMMU_ModifyCachePrefetch(GFXMMU_HandleTypeDef *hgfxmmu, 363 GFXMMU_CachePrefetchTypeDef *CachePrefetch); 364 365 void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu); 366 367 void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu); 368 /** 369 * @} 370 */ 371 372 /** @defgroup GFXMMU_Exported_Functions_Group3 State functions 373 * @{ 374 */ 375 /* State function *************************************************************/ 376 HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(GFXMMU_HandleTypeDef *hgfxmmu); 377 378 uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu); 379 /** 380 * @} 381 */ 382 383 /** 384 * @} 385 */ 386 /* End of exported functions -------------------------------------------------*/ 387 388 /* Private macros ------------------------------------------------------------*/ 389 /** @defgroup GFXMMU_Private_Macros GFXMMU Private Macros 390 * @{ 391 */ 392 #define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \ 393 ((VALUE) == GFXMMU_192BLOCKS)) 394 395 #define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U) 396 397 #define IS_GFXMMU_CACHE_LOCK(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_DISABLE) || \ 398 ((VALUE) == GFXMMU_CACHE_LOCK_ENABLE)) 399 400 #define IS_GFXMMU_CACHE_LOCK_BUFFER(VALUE) (((VALUE) == GFXMMU_CACHE_LOCK_BUFFER0) || \ 401 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER1) || \ 402 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER2) || \ 403 ((VALUE) == GFXMMU_CACHE_LOCK_BUFFER3)) 404 405 #define IS_GFXMMU_CACHE_FORCE(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_DISABLE) || \ 406 ((VALUE) == GFXMMU_CACHE_FORCE_ENABLE)) 407 408 #define IS_GFXMMU_OUTTER_BUFFERABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_DISABLE) || \ 409 ((VALUE) == GFXMMU_OUTTER_BUFFERABILITY_ENABLE)) 410 411 #define IS_GFXMMU_OUTTER_CACHABILITY(VALUE) (((VALUE) == GFXMMU_OUTTER_CACHABILITY_DISABLE) || \ 412 ((VALUE) == GFXMMU_OUTTER_CACHABILITY_ENABLE)) 413 414 #define IS_GFXMMU_PREFETCH(VALUE) (((VALUE) == GFXMMU_PREFETCH_DISABLE) || \ 415 ((VALUE) == GFXMMU_PREFETCH_ENABLE)) 416 417 #define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U) 418 419 #define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U) 420 421 #define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U)) 422 423 #define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \ 424 ((VALUE) == GFXMMU_LUT_LINE_ENABLE)) 425 426 #define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U) 427 428 #define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208)) 429 430 #define IS_GFXMMU_CACHE_FORCE_ACTION(VALUE) (((VALUE) == GFXMMU_CACHE_FORCE_FLUSH) || \ 431 ((VALUE) == GFXMMU_CACHE_FORCE_INVALIDATE) || \ 432 ((VALUE) == (GFXMMU_CACHE_FORCE_FLUSH | GFXMMU_CACHE_FORCE_INVALIDATE))) 433 /** 434 * @} 435 */ 436 /* End of private macros -----------------------------------------------------*/ 437 438 /** 439 * @} 440 */ 441 442 /** 443 * @} 444 */ 445 #endif /* GFXMMU */ 446 #ifdef __cplusplus 447 } 448 #endif 449 450 #endif /* STM32H7xx_HAL_GFXMMU_H */ 451 452
