1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_exti.h 4 * @author MCD Application Team 5 * @brief Header file of EXTI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_EXTI_H 21 #define STM32H7xx_HAL_EXTI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 /** @addtogroup STM32H7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @defgroup EXTI EXTI 35 * @brief EXTI HAL module driver 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** @defgroup EXTI_Exported_Types EXTI Exported Types 42 * @{ 43 */ 44 typedef enum 45 { 46 HAL_EXTI_COMMON_CB_ID = 0x00U, 47 } EXTI_CallbackIDTypeDef; 48 49 50 /** 51 * @brief EXTI Handle structure definition 52 */ 53 typedef struct 54 { 55 uint32_t Line; /*!< Exti line number */ 56 void (* PendingCallback)(void); /*!< Exti pending callback */ 57 } EXTI_HandleTypeDef; 58 59 /** 60 * @brief EXTI Configuration structure definition 61 */ 62 typedef struct 63 { 64 uint32_t Line; /*!< The Exti line to be configured. This parameter 65 can be a value of @ref EXTI_Line */ 66 uint32_t Mode; /*!< The Exit Mode to be configured for a core. 67 This parameter can be a combination of @ref EXTI_Mode */ 68 uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter 69 can be a value of @ref EXTI_Trigger */ 70 uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured. 71 This parameter is only possible for line 0 to 15. It 72 can be a value of @ref EXTI_GPIOSel */ 73 74 uint32_t PendClearSource; /*!< Specifies the event pending clear source for D3/SRD 75 domain. This parameter can be a value of @ref 76 EXTI_PendClear_Source */ 77 78 } EXTI_ConfigTypeDef; 79 80 /** 81 * @} 82 */ 83 84 /* Exported constants --------------------------------------------------------*/ 85 /** @defgroup EXTI_Exported_Constants EXTI Exported Constants 86 * @{ 87 */ 88 89 /** @defgroup EXTI_Line EXTI Line 90 * @{ 91 */ 92 #define EXTI_LINE_0 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x00U) 93 #define EXTI_LINE_1 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x01U) 94 #define EXTI_LINE_2 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x02U) 95 #define EXTI_LINE_3 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x03U) 96 #define EXTI_LINE_4 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x04U) 97 #define EXTI_LINE_5 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x05U) 98 #define EXTI_LINE_6 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x06U) 99 #define EXTI_LINE_7 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x07U) 100 #define EXTI_LINE_8 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x08U) 101 #define EXTI_LINE_9 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x09U) 102 #define EXTI_LINE_10 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0AU) 103 #define EXTI_LINE_11 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0BU) 104 #define EXTI_LINE_12 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0CU) 105 #define EXTI_LINE_13 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0DU) 106 #define EXTI_LINE_14 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0EU) 107 #define EXTI_LINE_15 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0FU) 108 #define EXTI_LINE_16 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x10U) 109 #define EXTI_LINE_17 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x11U) 110 #define EXTI_LINE_18 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x12U) 111 #define EXTI_LINE_19 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x13U) 112 #define EXTI_LINE_20 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x14U) 113 #define EXTI_LINE_21 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x15U) 114 #define EXTI_LINE_22 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x16U) 115 #define EXTI_LINE_23 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x17U) 116 #define EXTI_LINE_24 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x18U) 117 #define EXTI_LINE_25 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x19U) 118 #define EXTI_LINE_26 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU) 119 #define EXTI_LINE_27 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU) 120 #define EXTI_LINE_28 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1CU) 121 #define EXTI_LINE_29 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1DU) 122 #define EXTI_LINE_30 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1EU) 123 #define EXTI_LINE_31 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1FU) 124 #define EXTI_LINE_32 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x00U) 125 #define EXTI_LINE_33 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x01U) 126 #define EXTI_LINE_34 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x02U) 127 #define EXTI_LINE_35 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x03U) 128 #define EXTI_LINE_36 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x04U) 129 #define EXTI_LINE_37 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x05U) 130 #define EXTI_LINE_38 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x06U) 131 #define EXTI_LINE_39 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x07U) 132 #define EXTI_LINE_40 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x08U) 133 #define EXTI_LINE_41 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x09U) 134 #define EXTI_LINE_42 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0AU) 135 #define EXTI_LINE_43 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0BU) 136 #if !defined(USB2_OTG_FS) 137 #define EXTI_LINE_44 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x0CU) 138 #else 139 #define EXTI_LINE_44 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0CU) 140 #endif /* USB2_OTG_FS */ 141 #define EXTI_LINE_45 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x0DU) 142 #if defined(DSI) 143 #define EXTI_LINE_46 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0EU) 144 #else 145 #define EXTI_LINE_46 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x0EU) 146 #endif /* DSI */ 147 #define EXTI_LINE_47 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0FU) 148 #define EXTI_LINE_48 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x10U) 149 #define EXTI_LINE_49 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x11U) 150 #define EXTI_LINE_50 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x12U) 151 #define EXTI_LINE_51 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x13U) 152 #if defined(LPTIM4) 153 #define EXTI_LINE_52 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x14U) 154 #else 155 #define EXTI_LINE_52 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x14U) 156 #endif /*LPTIM4*/ 157 #if defined(LPTIM5) 158 #define EXTI_LINE_53 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x15U) 159 #else 160 #define EXTI_LINE_53 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x15U) 161 #endif /*LPTIM5*/ 162 #define EXTI_LINE_54 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x16U) 163 #define EXTI_LINE_55 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x17U) 164 #define EXTI_LINE_56 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x18U) 165 #if defined(EXTI_IMR2_IM57) 166 #define EXTI_LINE_57 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x19U) 167 #else 168 #define EXTI_LINE_57 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x19U) 169 #endif /*EXTI_IMR2_IM57*/ 170 #define EXTI_LINE_58 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU) 171 #if defined(EXTI_IMR2_IM59) 172 #define EXTI_LINE_59 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU) 173 #else 174 #define EXTI_LINE_59 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x1BU) 175 #endif /*EXTI_IMR2_IM59*/ 176 #define EXTI_LINE_60 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1CU) 177 #define EXTI_LINE_61 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1DU) 178 #define EXTI_LINE_62 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1EU) 179 #define EXTI_LINE_63 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1FU) 180 #define EXTI_LINE_64 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x00U) 181 #define EXTI_LINE_65 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x01U) 182 #define EXTI_LINE_66 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x02U) 183 #define EXTI_LINE_67 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x03U) 184 #define EXTI_LINE_68 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x04U) 185 #define EXTI_LINE_69 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x05U) 186 #define EXTI_LINE_70 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x06U) 187 #define EXTI_LINE_71 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x07U) 188 #define EXTI_LINE_72 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x08U) 189 #define EXTI_LINE_73 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x09U) 190 #define EXTI_LINE_74 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0AU) 191 #if defined(ADC3) 192 #define EXTI_LINE_75 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0BU) 193 #else 194 #define EXTI_LINE_75 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE | 0x0BU) 195 #endif /* ADC3 */ 196 #if defined(SAI4) 197 #define EXTI_LINE_76 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0CU) 198 #else 199 #define EXTI_LINE_76 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE | 0x0CU) 200 #endif /* SAI4 */ 201 #if defined (DUAL_CORE) 202 #define EXTI_LINE_77 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x0DU) 203 #define EXTI_LINE_78 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU2| 0x0EU) 204 #define EXTI_LINE_79 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x0FU) 205 #define EXTI_LINE_80 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU2| 0x10U) 206 #else 207 #define EXTI_LINE_77 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x0DU) 208 #define EXTI_LINE_78 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x0EU) 209 #define EXTI_LINE_79 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x0FU) 210 #define EXTI_LINE_80 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x10U) 211 #endif /* DUAL_CORE */ 212 #define EXTI_LINE_81 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x11U) 213 #if defined (DUAL_CORE) 214 #define EXTI_LINE_82 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU2| 0x12U) 215 #else 216 #define EXTI_LINE_82 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x12U) 217 #endif /* DUAL_CORE */ 218 #define EXTI_LINE_83 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x13U) 219 #if defined (DUAL_CORE) 220 #define EXTI_LINE_84 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x14U) 221 #else 222 #define EXTI_LINE_84 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x14U) 223 #endif /* DUAL_CORE */ 224 #define EXTI_LINE_85 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x15U) 225 #if defined(ETH) 226 #define EXTI_LINE_86 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x16U) 227 #else 228 #define EXTI_LINE_86 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x16U) 229 #endif /* ETH */ 230 #define EXTI_LINE_87 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x17U) 231 #if defined(DTS) 232 #define EXTI_LINE_88 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL | 0x18U) 233 #endif /* DTS */ 234 #if defined(EXTI_IMR3_IM89) 235 #define EXTI_LINE_89 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x19U) 236 #endif /*EXTI_IMR3_IM89*/ 237 #if defined(EXTI_IMR3_IM90) 238 #define EXTI_LINE_90 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU) 239 #endif /*EXTI_IMR3_IM90*/ 240 #if defined(I2C5) 241 #define EXTI_LINE_91 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU) 242 #endif /*I2C5*/ 243 244 /** 245 * @} 246 */ 247 248 /** @defgroup EXTI_Mode EXTI Mode 249 * @{ 250 */ 251 #define EXTI_MODE_NONE 0x00000000U 252 #define EXTI_MODE_INTERRUPT 0x00000001U 253 #define EXTI_MODE_EVENT 0x00000002U 254 #if defined(DUAL_CORE) 255 #define EXTI_MODE_CORE1_INTERRUPT EXTI_MODE_INTERRUPT 256 #define EXTI_MODE_CORE1_EVENT EXTI_MODE_EVENT 257 #define EXTI_MODE_CORE2_INTERRUPT 0x00000010U 258 #define EXTI_MODE_CORE2_EVENT 0x00000020U 259 #endif /* DUAL_CORE */ 260 /** 261 * @} 262 */ 263 264 /** @defgroup EXTI_Trigger EXTI Trigger 265 * @{ 266 */ 267 #define EXTI_TRIGGER_NONE 0x00000000U 268 #define EXTI_TRIGGER_RISING 0x00000001U 269 #define EXTI_TRIGGER_FALLING 0x00000002U 270 #define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING) 271 /** 272 * @} 273 */ 274 275 /** @defgroup EXTI_GPIOSel EXTI GPIOSel 276 * @brief 277 * @{ 278 */ 279 #define EXTI_GPIOA 0x00000000U 280 #define EXTI_GPIOB 0x00000001U 281 #define EXTI_GPIOC 0x00000002U 282 #define EXTI_GPIOD 0x00000003U 283 #define EXTI_GPIOE 0x00000004U 284 #define EXTI_GPIOF 0x00000005U 285 #define EXTI_GPIOG 0x00000006U 286 #define EXTI_GPIOH 0x00000007U 287 #if defined(GPIOI) 288 #define EXTI_GPIOI 0x00000008U 289 #endif /*GPIOI*/ 290 #define EXTI_GPIOJ 0x00000009U 291 #define EXTI_GPIOK 0x0000000AU 292 293 /** 294 * @} 295 */ 296 297 /** @defgroup EXTI_PendClear_Source EXTI PendClear Source 298 * @brief 299 * @{ 300 */ 301 #define EXTI_D3_PENDCLR_SRC_NONE 0x00000000U /*!< No D3 domain pendclear source , PMRx register to be set to zero */ 302 #define EXTI_D3_PENDCLR_SRC_DMACH6 0x00000001U /*!< DMA ch6 event selected as D3 domain pendclear source, PMRx register to be set to 1 */ 303 #define EXTI_D3_PENDCLR_SRC_DMACH7 0x00000002U /*!< DMA ch7 event selected as D3 domain pendclear source, PMRx register to be set to 1*/ 304 #if defined (LPTIM4) 305 #define EXTI_D3_PENDCLR_SRC_LPTIM4 0x00000003U /*!< LPTIM4 out selected as D3 domain pendclear source, PMRx register to be set to 1 */ 306 #else 307 #define EXTI_D3_PENDCLR_SRC_LPTIM2 0x00000003U /*!< LPTIM2 out selected as D3 domain pendclear source, PMRx register to be set to 1 */ 308 #endif 309 #if defined (LPTIM5) 310 #define EXTI_D3_PENDCLR_SRC_LPTIM5 0x00000004U /*!< LPTIM5 out selected as D3 domain pendclear source, PMRx register to be set to 1 */ 311 #else 312 #define EXTI_D3_PENDCLR_SRC_LPTIM3 0x00000004U /*!< LPTIM3 out selected as D3 domain pendclear source, PMRx register to be set to 1 */ 313 #endif 314 /** 315 * @} 316 */ 317 318 /** 319 * @} 320 */ 321 322 /* Exported macro ------------------------------------------------------------*/ 323 /** @defgroup EXTI_Exported_Macros EXTI Exported Macros 324 * @{ 325 */ 326 327 /** 328 * @} 329 */ 330 331 /* Private constants --------------------------------------------------------*/ 332 /** @defgroup EXTI_Private_Constants EXTI Private Constants 333 * @{ 334 */ 335 /** 336 * @brief EXTI Line property definition 337 */ 338 #define EXTI_PROPERTY_SHIFT 24U 339 #define EXTI_DIRECT (0x01UL << EXTI_PROPERTY_SHIFT) 340 #define EXTI_CONFIG (0x02UL << EXTI_PROPERTY_SHIFT) 341 #define EXTI_GPIO ((0x04UL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG) 342 #define EXTI_RESERVED (0x08UL << EXTI_PROPERTY_SHIFT) 343 #define EXTI_PROPERTY_MASK (EXTI_DIRECT | EXTI_CONFIG | EXTI_GPIO) 344 345 /** 346 * @brief EXTI Event presence definition 347 */ 348 #define EXTI_EVENT_PRESENCE_SHIFT 28U 349 #define EXTI_EVENT (0x01UL << EXTI_EVENT_PRESENCE_SHIFT) 350 #define EXTI_EVENT_PRESENCE_MASK (EXTI_EVENT) 351 352 /** 353 * @brief EXTI Register and bit usage 354 */ 355 #define EXTI_REG_SHIFT 16U 356 #define EXTI_REG1 (0x00UL << EXTI_REG_SHIFT) 357 #define EXTI_REG2 (0x01UL << EXTI_REG_SHIFT) 358 #define EXTI_REG3 (0x02UL << EXTI_REG_SHIFT) 359 #define EXTI_REG_MASK (EXTI_REG1 | EXTI_REG2 | EXTI_REG3) 360 #define EXTI_PIN_MASK 0x0000001FUL 361 362 /** 363 * @brief EXTI Target and bit usage 364 */ 365 #define EXTI_TARGET_SHIFT 20U 366 #define EXTI_TARGET_MSK_NONE (0x00UL << EXTI_TARGET_SHIFT) 367 #define EXTI_TARGET_MSK_D3SRD (0x01UL << EXTI_TARGET_SHIFT) 368 #define EXTI_TARGET_MSK_CPU1 (0x02UL << EXTI_TARGET_SHIFT) 369 #if defined (DUAL_CORE) 370 #define EXTI_TARGET_MSK_CPU2 (0x04UL << EXTI_TARGET_SHIFT) 371 #define EXTI_TARGET_MASK (EXTI_TARGET_MSK_D3SRD | EXTI_TARGET_MSK_CPU1 | EXTI_TARGET_MSK_CPU2) 372 #define EXTI_TARGET_MSK_ALL_CPU (EXTI_TARGET_MSK_CPU1 | EXTI_TARGET_MSK_CPU2) 373 #else 374 #define EXTI_TARGET_MASK (EXTI_TARGET_MSK_D3SRD | EXTI_TARGET_MSK_CPU1) 375 #define EXTI_TARGET_MSK_ALL_CPU EXTI_TARGET_MSK_CPU1 376 #endif /* DUAL_CORE */ 377 #define EXTI_TARGET_MSK_ALL EXTI_TARGET_MASK 378 379 /** 380 * @brief EXTI Mask for interrupt & event mode 381 */ 382 #if defined (DUAL_CORE) 383 #define EXTI_MODE_MASK (EXTI_MODE_CORE1_EVENT | EXTI_MODE_CORE1_INTERRUPT | EXTI_MODE_CORE2_INTERRUPT | EXTI_MODE_CORE2_EVENT) 384 #else 385 #define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT) 386 #endif /* DUAL_CORE */ 387 388 /** 389 * @brief EXTI Mask for trigger possibilities 390 */ 391 #define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING) 392 393 /** 394 * @brief EXTI Line number 395 */ 396 #if (STM32H7_DEV_ID == 0x483UL) 397 #define EXTI_LINE_NB 92UL 398 #elif (STM32H7_DEV_ID == 0x480UL) 399 #define EXTI_LINE_NB 89UL 400 #else 401 #define EXTI_LINE_NB 88UL 402 #endif /* EXTI_LINE_91 */ 403 404 /** 405 * @} 406 */ 407 408 /* Private macros ------------------------------------------------------------*/ 409 /** @defgroup EXTI_Private_Macros EXTI Private Macros 410 * @{ 411 */ 412 #define IS_EXTI_PROPERTY(__EXTI_LINE__) ((((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \ 413 (((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \ 414 (((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) 415 #if defined (DUAL_CORE) 416 #define IS_EXTI_TARGET(__EXTI_LINE__) ((((__EXTI_LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_CPU1) || \ 417 (((__EXTI_LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_CPU2) || \ 418 (((__EXTI_LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL_CPU) || \ 419 (((__EXTI_LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)) 420 #else 421 #define IS_EXTI_TARGET(__EXTI_LINE__) ((((__EXTI_LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_CPU1) || \ 422 (((__EXTI_LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)) 423 #endif 424 425 #define IS_EXTI_LINE(__EXTI_LINE__) ((((__EXTI_LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_EVENT_PRESENCE_MASK |\ 426 EXTI_REG_MASK | EXTI_PIN_MASK | EXTI_TARGET_MASK)) == 0x00UL) && \ 427 IS_EXTI_PROPERTY(__EXTI_LINE__) && IS_EXTI_TARGET(__EXTI_LINE__) && \ 428 (((__EXTI_LINE__) & (EXTI_REG_MASK | EXTI_PIN_MASK)) < \ 429 (((EXTI_LINE_NB / 32UL) << EXTI_REG_SHIFT) | (EXTI_LINE_NB % 32UL)))) 430 431 #define IS_EXTI_MODE(__MODE__) (((__MODE__) & ~EXTI_MODE_MASK) == 0x00UL) 432 433 #define IS_EXTI_TRIGGER(__EXTI_LINE__) (((__EXTI_LINE__) & ~EXTI_TRIGGER_MASK) == 0x00UL) 434 435 #define IS_EXTI_PENDING_EDGE(__EXTI_LINE__) (((__EXTI_LINE__) == EXTI_TRIGGER_RISING) || \ 436 ((__EXTI_LINE__) == EXTI_TRIGGER_FALLING)|| \ 437 ((__EXTI_LINE__) == EXTI_TRIGGER_RISING_FALLING)) 438 439 #define IS_EXTI_CONFIG_LINE(__EXTI_LINE__) (((__EXTI_LINE__) & EXTI_CONFIG) != 0x00UL) 440 441 #if defined(GPIOI) 442 #define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \ 443 ((__PORT__) == EXTI_GPIOB) || \ 444 ((__PORT__) == EXTI_GPIOC) || \ 445 ((__PORT__) == EXTI_GPIOD) || \ 446 ((__PORT__) == EXTI_GPIOE) || \ 447 ((__PORT__) == EXTI_GPIOF) || \ 448 ((__PORT__) == EXTI_GPIOG) || \ 449 ((__PORT__) == EXTI_GPIOH) || \ 450 ((__PORT__) == EXTI_GPIOI) || \ 451 ((__PORT__) == EXTI_GPIOJ) || \ 452 ((__PORT__) == EXTI_GPIOK)) 453 #else 454 #define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \ 455 ((__PORT__) == EXTI_GPIOB) || \ 456 ((__PORT__) == EXTI_GPIOC) || \ 457 ((__PORT__) == EXTI_GPIOD) || \ 458 ((__PORT__) == EXTI_GPIOE) || \ 459 ((__PORT__) == EXTI_GPIOF) || \ 460 ((__PORT__) == EXTI_GPIOG) || \ 461 ((__PORT__) == EXTI_GPIOH) || \ 462 ((__PORT__) == EXTI_GPIOJ) || \ 463 ((__PORT__) == EXTI_GPIOK)) 464 #endif /*GPIOI*/ 465 466 #define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16UL) 467 #if defined (LPTIM4) && defined (LPTIM5) 468 #define IS_EXTI_D3_PENDCLR_SRC(__SRC__) (((__SRC__) == EXTI_D3_PENDCLR_SRC_NONE) || \ 469 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH6) || \ 470 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH7) || \ 471 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM4) || \ 472 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM5)) 473 #else 474 #define IS_EXTI_D3_PENDCLR_SRC(__SRC__) (((__SRC__) == EXTI_D3_PENDCLR_SRC_NONE) || \ 475 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH6) || \ 476 ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH7) || \ 477 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM2) || \ 478 ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM3)) 479 #endif /* LPTIM4 && LPTIM5 */ 480 481 /** 482 * @} 483 */ 484 485 486 /* Exported functions --------------------------------------------------------*/ 487 /** @defgroup EXTI_Exported_Functions EXTI Exported Functions 488 * @brief EXTI Exported Functions 489 * @{ 490 */ 491 492 /** @defgroup EXTI_Exported_Functions_Group1 Configuration functions 493 * @brief Configuration functions 494 * @{ 495 */ 496 /* Configuration functions ****************************************************/ 497 HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig); 498 HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig); 499 HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti); 500 HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void)); 501 HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine); 502 /** 503 * @} 504 */ 505 506 /** @defgroup EXTI_Exported_Functions_Group2 IO operation functions 507 * @brief IO operation functions 508 * @{ 509 */ 510 /* IO operation functions *****************************************************/ 511 void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti); 512 uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge); 513 void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge); 514 void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti); 515 516 /** 517 * @} 518 */ 519 520 /** 521 * @} 522 */ 523 524 /** 525 * @} 526 */ 527 528 /** 529 * @} 530 */ 531 532 #ifdef __cplusplus 533 } 534 #endif 535 536 #endif /* STM32H7xx_HAL_EXTI_H */ 537 538
