1 /**
2   ******************************************************************************
3   * @file    stm32h5xx_ll_usart.c
4   * @author  MCD Application Team
5   * @brief   USART LL module driver.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2022 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 #if defined(USE_FULL_LL_DRIVER)
19 
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32h5xx_ll_usart.h"
22 #include "stm32h5xx_ll_rcc.h"
23 #include "stm32h5xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29 
30 /** @addtogroup STM32H5xx_LL_Driver
31   * @{
32   */
33 
34 #if defined(USART1) || defined(USART2) || defined(USART3) || defined(UART4) || defined(UART5) || defined(USART6) \
35  || defined(UART7) || defined(UART8) || defined(UART9) || defined(USART10) || defined(USART11) || defined(UART12)
36 
37 /** @addtogroup USART_LL
38   * @{
39   */
40 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Constants
45   * @{
46   */
47 
48 /* Definition of default baudrate value used for USART initialisation */
49 #define USART_DEFAULT_BAUDRATE          (9600U)
50 
51 /**
52   * @}
53   */
54 
55 /* Private macros ------------------------------------------------------------*/
56 /** @addtogroup USART_LL_Private_Macros
57   * @{
58   */
59 
60 #define IS_LL_USART_PRESCALER(__VALUE__)  (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
61                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
62                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
63                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
64                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
65                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
66                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
67                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
68                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
69                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
70                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
71                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
72 
73 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
74  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
75 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 20000000U)
76 
77 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
78 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
79 
80 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
81                                           || ((__VALUE__) == LL_USART_DIRECTION_RX) \
82                                           || ((__VALUE__) == LL_USART_DIRECTION_TX) \
83                                           || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
84 
85 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
86                                        || ((__VALUE__) == LL_USART_PARITY_EVEN) \
87                                        || ((__VALUE__) == LL_USART_PARITY_ODD))
88 
89 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
90                                           || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
91                                           || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
92 
93 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
94                                              || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
95 
96 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
97                                                  || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
98 
99 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
100                                            || ((__VALUE__) == LL_USART_PHASE_2EDGE))
101 
102 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
103                                               || ((__VALUE__) == LL_USART_POLARITY_HIGH))
104 
105 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
106                                             || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
107 
108 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
109                                          || ((__VALUE__) == LL_USART_STOPBITS_1) \
110                                          || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
111                                          || ((__VALUE__) == LL_USART_STOPBITS_2))
112 
113 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
114                                           || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
115                                           || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
116                                           || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
117 
118 /**
119   * @}
120   */
121 
122 /* Private function prototypes -----------------------------------------------*/
123 
124 /* Exported functions --------------------------------------------------------*/
125 /** @addtogroup USART_LL_Exported_Functions
126   * @{
127   */
128 
129 /** @addtogroup USART_LL_EF_Init
130   * @{
131   */
132 
133 /**
134   * @brief  De-initialize USART registers (Registers restored to their default values).
135   * @param  USARTx USART Instance
136   * @retval An ErrorStatus enumeration value:
137   *          - SUCCESS: USART registers are de-initialized
138   *          - ERROR: USART registers are not de-initialized
139   */
LL_USART_DeInit(const USART_TypeDef * USARTx)140 ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
141 {
142   ErrorStatus status = SUCCESS;
143 
144   /* Check the parameters */
145   assert_param(IS_UART_INSTANCE(USARTx));
146 
147   if (USARTx == USART1)
148   {
149     /* Force reset of USART clock */
150     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
151 
152     /* Release reset of USART clock */
153     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
154   }
155   else if (USARTx == USART2)
156   {
157     /* Force reset of USART clock */
158     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
159 
160     /* Release reset of USART clock */
161     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
162   }
163   else if (USARTx == USART3)
164   {
165     /* Force reset of USART clock */
166     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
167 
168     /* Release reset of USART clock */
169     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
170   }
171 #if defined(UART4)
172   else if (USARTx == UART4)
173   {
174     /* Force reset of UART clock */
175     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
176 
177     /* Release reset of UART clock */
178     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
179   }
180 #endif /* UART4 */
181 #if defined(UART5)
182   else if (USARTx == UART5)
183   {
184     /* Force reset of UART clock */
185     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
186 
187     /* Release reset of UART clock */
188     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
189   }
190 #endif /* UART5 */
191 #if defined(USART6)
192   else if (USARTx == USART6)
193   {
194     /* Force reset of USART clock */
195     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART6);
196 
197     /* Release reset of USART clock */
198     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART6);
199   }
200 #endif /* USART6 */
201 #if defined(UART7)
202   else if (USARTx == UART7)
203   {
204     /* Force reset of UART clock */
205     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
206 
207     /* Release reset of UART clock */
208     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
209   }
210 #endif /* UART7 */
211 #if defined(UART8)
212   else if (USARTx == UART8)
213   {
214     /* Force reset of UART clock */
215     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
216 
217     /* Release reset of UART clock */
218     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
219   }
220 #endif /* UART8 */
221 #if defined(UART9)
222   else if (USARTx == UART9)
223   {
224     /* Force reset of UART clock */
225     LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_UART9);
226 
227     /* Release reset of UART clock */
228     LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_UART9);
229   }
230 #endif /* UART9 */
231 #if defined(USART10)
232   else if (USARTx == USART10)
233   {
234     /* Force reset of UART clock */
235     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART10);
236 
237     /* Release reset of UART clock */
238     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART10);
239   }
240 #endif /* USART10 */
241 #if defined(USART11)
242   else if (USARTx == USART11)
243   {
244     /* Force reset of UART clock */
245     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART11);
246 
247     /* Release reset of UART clock */
248     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART11);
249   }
250 #endif /* USART11 */
251 #if defined(UART12)
252   else if (USARTx == UART12)
253   {
254     /* Force reset of UART clock */
255     LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_UART12);
256 
257     /* Release reset of UART clock */
258     LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_UART12);
259   }
260 #endif /* UART12 */
261   else
262   {
263     status = ERROR;
264   }
265 
266   return (status);
267 }
268 
269 /**
270   * @brief  Initialize USART registers according to the specified
271   *         parameters in USART_InitStruct.
272   * @note   As some bits in USART configuration registers can only be written when
273   *         the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
274   *         this function. Otherwise, ERROR result will be returned.
275   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
276   * @param  USARTx USART Instance
277   * @param  USART_InitStruct pointer to a LL_USART_InitTypeDef structure
278   *         that contains the configuration information for the specified USART peripheral.
279   * @retval An ErrorStatus enumeration value:
280   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
281   *          - ERROR: Problem occurred during USART Registers initialization
282   */
LL_USART_Init(USART_TypeDef * USARTx,const LL_USART_InitTypeDef * USART_InitStruct)283 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct)
284 {
285   ErrorStatus status = ERROR;
286   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
287 
288   /* Check the parameters */
289   assert_param(IS_UART_INSTANCE(USARTx));
290   assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
291   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
292   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
293   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
294   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
295   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
296   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
297   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
298 
299   /* USART needs to be in disabled state, in order to be able to configure some bits in
300      CRx registers */
301   if (LL_USART_IsEnabled(USARTx) == 0U)
302   {
303     /*---------------------------- USART CR1 Configuration ---------------------
304      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
305      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
306      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
307      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
308      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
309      */
310     MODIFY_REG(USARTx->CR1,
311                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
312                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
313                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
314                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
315 
316     /*---------------------------- USART CR2 Configuration ---------------------
317      * Configure USARTx CR2 (Stop bits) with parameters:
318      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
319      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
320      */
321     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
322 
323     /*---------------------------- USART CR3 Configuration ---------------------
324      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
325      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
326      *   USART_InitStruct->HardwareFlowControl value.
327      */
328     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
329 
330     /*---------------------------- USART BRR Configuration ---------------------
331      * Retrieve Clock frequency used for USART Peripheral
332      */
333     if (USARTx == USART1)
334     {
335       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
336     }
337     else if (USARTx == USART2)
338     {
339       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
340     }
341     else if (USARTx == USART3)
342     {
343       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
344     }
345 #if defined(UART4)
346     else if (USARTx == UART4)
347     {
348       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
349     }
350 #endif /* UART4 */
351 #if defined(UART5)
352     else if (USARTx == UART5)
353     {
354       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
355     }
356 #endif /* UART5 */
357 #if defined(USART6)
358     else if (USARTx == USART6)
359     {
360       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART6_CLKSOURCE);
361     }
362 #endif /* USART6 */
363 #if defined(UART7)
364     else if (USARTx == UART7)
365     {
366       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART7_CLKSOURCE);
367     }
368 #endif /* UART7 */
369 #if defined(UART8)
370     else if (USARTx == UART8)
371     {
372       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART8_CLKSOURCE);
373     }
374 #endif /* UART8 */
375 #if defined(UART9)
376     else if (USARTx == UART9)
377     {
378       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_UART9_CLKSOURCE);
379     }
380 #endif /* UART9 */
381 #if defined(USART10)
382     else if (USARTx == USART10)
383     {
384       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART10_CLKSOURCE);
385     }
386 #endif /* USART10 */
387 #if defined(USART11)
388     else if (USARTx == USART11)
389     {
390       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART11_CLKSOURCE);
391     }
392 #endif /* USART11 */
393 #if defined(UART12)
394     else if (USARTx == UART12)
395     {
396       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_UART12_CLKSOURCE);
397     }
398 #endif /* UART12 */
399     else
400     {
401       /* Nothing to do, as error code is already assigned to ERROR value */
402     }
403 
404     /* Configure the USART Baud Rate :
405        - prescaler value is required
406        - valid baud rate value (different from 0) is required
407        - Peripheral clock as returned by RCC service, should be valid (different from 0).
408     */
409     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
410         && (USART_InitStruct->BaudRate != 0U))
411     {
412       status = SUCCESS;
413       LL_USART_SetBaudRate(USARTx,
414                            periphclk,
415                            USART_InitStruct->PrescalerValue,
416                            USART_InitStruct->OverSampling,
417                            USART_InitStruct->BaudRate);
418 
419       /* Check BRR is greater than or equal to 16d */
420       assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
421     }
422 
423     /*---------------------------- USART PRESC Configuration -----------------------
424      * Configure USARTx PRESC (Prescaler) with parameters:
425      * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
426      */
427     LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
428   }
429   /* Endif (=> USART not in Disabled state => return ERROR) */
430 
431   return (status);
432 }
433 
434 /**
435   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
436   * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
437   *                         whose fields will be set to default values.
438   * @retval None
439   */
440 
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)441 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
442 {
443   /* Set USART_InitStruct fields to default values */
444   USART_InitStruct->PrescalerValue      = LL_USART_PRESCALER_DIV1;
445   USART_InitStruct->BaudRate            = USART_DEFAULT_BAUDRATE;
446   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
447   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
448   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
449   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
450   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
451   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
452 }
453 
454 /**
455   * @brief  Initialize USART Clock related settings according to the
456   *         specified parameters in the USART_ClockInitStruct.
457   * @note   As some bits in USART configuration registers can only be written when
458   *         the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
459   *         this function. Otherwise, ERROR result will be returned.
460   * @param  USARTx USART Instance
461   * @param  USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
462   *         that contains the Clock configuration information for the specified USART peripheral.
463   * @retval An ErrorStatus enumeration value:
464   *          - SUCCESS: USART registers related to Clock settings are initialized according
465   *                     to USART_ClockInitStruct content
466   *          - ERROR: Problem occurred during USART Registers initialization
467   */
LL_USART_ClockInit(USART_TypeDef * USARTx,const LL_USART_ClockInitTypeDef * USART_ClockInitStruct)468 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
469 {
470   ErrorStatus status = SUCCESS;
471 
472   /* Check USART Instance and Clock signal output parameters */
473   assert_param(IS_UART_INSTANCE(USARTx));
474   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
475 
476   /* USART needs to be in disabled state, in order to be able to configure some bits in
477      CRx registers */
478   if (LL_USART_IsEnabled(USARTx) == 0U)
479   {
480     /* Ensure USART instance is USART capable */
481     assert_param(IS_USART_INSTANCE(USARTx));
482 
483     /* Check clock related parameters */
484     assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
485     assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
486     assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
487 
488     /*---------------------------- USART CR2 Configuration -----------------------
489      * Configure USARTx CR2 (Clock signal related bits) with parameters:
490      * - Clock Output:                USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
491      * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
492      * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
493      * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
494      */
495     MODIFY_REG(USARTx->CR2,
496                USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
497                USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
498                USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
499   }
500   /* Else (USART not in Disabled state => return ERROR */
501   else
502   {
503     status = ERROR;
504   }
505 
506   return (status);
507 }
508 
509 /**
510   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
511   * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
512   *                              whose fields will be set to default values.
513   * @retval None
514   */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)515 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
516 {
517   /* Set LL_USART_ClockInitStruct fields with default values */
518   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
519   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput =
520                                                                                   LL_USART_CLOCK_DISABLE */
521   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput =
522                                                                                   LL_USART_CLOCK_DISABLE */
523   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput =
524                                                                                   LL_USART_CLOCK_DISABLE */
525 }
526 
527 /**
528   * @}
529   */
530 
531 /**
532   * @}
533   */
534 
535 /**
536   * @}
537   */
538 
539 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 || USART6
540        || UART7 || UART8 || UART9 || USART10 || USART11 || UART12 */
541 
542 /**
543   * @}
544   */
545 
546 #endif /* USE_FULL_LL_DRIVER */
547