1 /**
2 ******************************************************************************
3 * @file stm32h5xx_ll_icache.c
4 * @author MCD Application Team
5 * @brief ICACHE LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2022 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32h5xx_ll_icache.h"
22 #ifdef USE_FULL_ASSERT
23 #include "stm32_assert.h"
24 #else
25 #define assert_param(expr) ((void)0U)
26 #endif /* USE_FULL_ASSERT */
27
28 /** @addtogroup STM32H5xx_LL_Driver
29 * @{
30 */
31
32 #if defined(ICACHE)
33
34 /** @defgroup ICACHE_LL ICACHE
35 * @{
36 */
37
38 /* Private types -------------------------------------------------------------*/
39 /* Private variables ---------------------------------------------------------*/
40 /* Private constants ---------------------------------------------------------*/
41 /* Private macros ------------------------------------------------------------*/
42 /** @defgroup ICACHE_LL_Private_Macros ICACHE Private Macros
43 * @{
44 */
45 #if defined(ICACHE_CRRx_REN)
46
47 #define IS_LL_ICACHE_REGION(__VALUE__) (((__VALUE__) == LL_ICACHE_REGION_0) || \
48 ((__VALUE__) == LL_ICACHE_REGION_1) || \
49 ((__VALUE__) == LL_ICACHE_REGION_2) || \
50 ((__VALUE__) == LL_ICACHE_REGION_3))
51
52 #define IS_LL_ICACHE_REGION_SIZE(__VALUE__) (((__VALUE__) == LL_ICACHE_REGIONSIZE_2MB) || \
53 ((__VALUE__) == LL_ICACHE_REGIONSIZE_4MB) || \
54 ((__VALUE__) == LL_ICACHE_REGIONSIZE_8MB) || \
55 ((__VALUE__) == LL_ICACHE_REGIONSIZE_16MB) || \
56 ((__VALUE__) == LL_ICACHE_REGIONSIZE_32MB) || \
57 ((__VALUE__) == LL_ICACHE_REGIONSIZE_64MB) || \
58 ((__VALUE__) == LL_ICACHE_REGIONSIZE_128MB))
59
60 #define IS_LL_ICACHE_MASTER_PORT(__VALUE__) (((__VALUE__) == LL_ICACHE_MASTER1_PORT) || \
61 ((__VALUE__) == LL_ICACHE_MASTER2_PORT))
62
63 #define IS_LL_ICACHE_OUTPUT_BURST(__VALUE__) (((__VALUE__) == LL_ICACHE_OUTPUT_BURST_WRAP) || \
64 ((__VALUE__) == LL_ICACHE_OUTPUT_BURST_INCR))
65
66 #endif /* ICACHE_CRRx_REN */
67 /**
68 * @}
69 */
70
71 /* Private function prototypes -----------------------------------------------*/
72
73 /* Exported functions --------------------------------------------------------*/
74 /** @addtogroup ICACHE_LL_Exported_Functions
75 * @{
76 */
77
78 #if defined(ICACHE_CRRx_REN)
79 /** @addtogroup ICACHE_LL_EF_REGION_Init
80 * @{
81 */
82
83 /**
84 * @brief Configure and enable the memory remapped region.
85 * @note The Instruction Cache and corresponding region must be disabled.
86 * @param Region This parameter can be one of the following values:
87 * @arg @ref LL_ICACHE_REGION_0
88 * @arg @ref LL_ICACHE_REGION_1
89 * @arg @ref LL_ICACHE_REGION_2
90 * @arg @ref LL_ICACHE_REGION_3
91 * @param pICACHE_RegionStruct pointer to a @ref LL_ICACHE_RegionTypeDef structure.
92 * @retval None
93 */
LL_ICACHE_ConfigRegion(uint32_t Region,const LL_ICACHE_RegionTypeDef * const pICACHE_RegionStruct)94 void LL_ICACHE_ConfigRegion(uint32_t Region, const LL_ICACHE_RegionTypeDef *const pICACHE_RegionStruct)
95 {
96 __IO uint32_t *p_reg;
97 uint32_t value;
98
99 /* Check the parameters */
100 assert_param(IS_LL_ICACHE_REGION(Region));
101 assert_param(IS_LL_ICACHE_REGION_SIZE(pICACHE_RegionStruct->Size));
102 assert_param(IS_LL_ICACHE_MASTER_PORT(pICACHE_RegionStruct->TrafficRoute));
103 assert_param(IS_LL_ICACHE_OUTPUT_BURST(pICACHE_RegionStruct->OutputBurstType));
104
105 /* Get region control register address */
106 p_reg = &(ICACHE->CRR0) + (1U * Region);
107
108 /* Region 2MB: BaseAddress size 8 bits, RemapAddress size 11 bits */
109 /* Region 4MB: BaseAddress size 7 bits, RemapAddress size 10 bits */
110 /* Region 8MB: BaseAddress size 6 bits, RemapAddress size 9 bits */
111 /* Region 16MB: BaseAddress size 5 bits, RemapAddress size 8 bits */
112 /* Region 32MB: BaseAddress size 4 bits, RemapAddress size 7 bits */
113 /* Region 64MB: BaseAddress size 3 bits, RemapAddress size 6 bits */
114 /* Region 128MB: BaseAddress size 2 bits, RemapAddress size 5 bits */
115 value = ((pICACHE_RegionStruct->BaseAddress & 0x1FFFFFFFU) >> 21U) & \
116 (0xFFU & ~(pICACHE_RegionStruct->Size - 1U));
117 value |= ((pICACHE_RegionStruct->RemapAddress >> 5U) & \
118 ((uint32_t)(0x7FFU & ~(pICACHE_RegionStruct->Size - 1U)) << ICACHE_CRRx_REMAPADDR_Pos));
119 value |= (pICACHE_RegionStruct->Size << ICACHE_CRRx_RSIZE_Pos) | pICACHE_RegionStruct->TrafficRoute | \
120 pICACHE_RegionStruct->OutputBurstType;
121 *p_reg = (value | ICACHE_CRRx_REN); /* Configure and enable region */
122 }
123
124 /**
125 * @}
126 */
127 #endif /* ICACHE_CRRx_REN */
128
129 /**
130 * @}
131 */
132
133 /**
134 * @}
135 */
136
137 #endif /* ICACHE */
138
139 /**
140 * @}
141 */
142
143 #endif /* USE_FULL_LL_DRIVER */
144
