1 /**
2   ******************************************************************************
3   * @file    stm32h5xx_hal_gpio.c
4   * @author  MCD Application Team
5   * @brief   GPIO HAL module driver.
6   *          This file provides firmware functions to manage the following
7   *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
8   *           + Initialization and de-initialization functions
9   *           + IO operation functions
10   ******************************************************************************
11   * @attention
12   *
13   * Copyright (c) 2022 STMicroelectronics.
14   * All rights reserved.
15   *
16   * This software is licensed under terms that can be found in the LICENSE file
17   * in the root directory of this software component.
18   * If no LICENSE file comes with this software, it is provided AS-IS.
19   *
20   ******************************************************************************
21   @verbatim
22   ==============================================================================
23                     ##### GPIO Peripheral features #####
24   ==============================================================================
25   [..]
26     (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually
27         configured by software in several modes:
28         (++) Input mode
29         (++) Analog mode
30         (++) Output mode
31         (++) Alternate function mode
32         (++) External interrupt/event lines
33 
34     (+) During and just after reset, the alternate functions and external interrupt
35         lines are not active and the I/O ports are configured in input floating mode.
36 
37     (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be
38         activated or not.
39 
40     (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull
41         type and the IO speed can be selected depending on the VDD value.
42 
43     (+) The microcontroller IO pins are connected to onboard peripherals/modules through a
44         multiplexer that allows only one peripheral alternate function (AF) connected
45        to an IO pin at a time. In this way, there can be no conflict between peripherals
46        sharing the same IO pin.
47 
48     (+) All ports have external interrupt/event capability. To use external interrupt
49         lines, the port must be configured in input mode. All available GPIO pins are
50         connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
51 
52     (+) The external interrupt/event controller consists of up to 39 edge detectors
53         (16 lines are connected to GPIO) for generating event/interrupt requests (each
54         input line can be independently configured to select the type (interrupt or event)
55         and the corresponding trigger event (rising or falling or both). Each line can
56         also be masked independently.
57 
58                      ##### How to use this driver #####
59   ==============================================================================
60   [..]
61     (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
62 
63     (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
64         (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
65         (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
66              structure.
67         (++) In case of Output or alternate function mode selection: the speed is
68              configured through "Speed" member from GPIO_InitTypeDef structure.
69         (++) In alternate mode is selection, the alternate function connected to the IO
70              is configured through "Alternate" member from GPIO_InitTypeDef structure.
71         (++) Analog mode is required when a pin is to be used as ADC channel
72              or DAC output.
73         (++) In case of external interrupt/event selection the "Mode" member from
74              GPIO_InitTypeDef structure select the type (interrupt or event) and
75              the corresponding trigger event (rising or falling or both).
76 
77     (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
78         mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
79         HAL_NVIC_EnableIRQ().
80 
81     (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
82 
83     (#) To set/reset the level of a pin configured in output mode use
84         HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
85 
86     (#) To set the level of several pins and reset level of several other pins in
87         same cycle, use HAL_GPIO_WriteMultipleStatePin().
88 
89    (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
90 
91     (#) During and just after reset, the alternate functions are not
92         active and the GPIO pins are configured in input floating mode (except JTAG
93         pins).
94 
95     (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
96         (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
97         priority over the GPIO function.
98 
99     (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
100         general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
101         The HSE has priority over the GPIO function.
102 
103   @endverbatim
104   ******************************************************************************
105   */
106 
107 /* Includes ------------------------------------------------------------------*/
108 #include "stm32h5xx_hal.h"
109 
110 /** @addtogroup STM32H5xx_HAL_Driver
111   * @{
112   */
113 
114 /** @defgroup GPIO GPIO
115   * @brief GPIO HAL module driver
116   * @{
117   */
118 
119 #ifdef HAL_GPIO_MODULE_ENABLED
120 
121 /* Private typedef -----------------------------------------------------------*/
122 /* Private defines -----------------------------------------------------------*/
123 /** @defgroup GPIO_Private_Defines GPIO Private Defines
124   * @{
125   */
126 #define GPIO_MODE             (0x00000003U)
127 #define EXTI_MODE             (0x10000000U)
128 #define GPIO_MODE_IT          (0x00010000U)
129 #define GPIO_MODE_EVT         (0x00020000U)
130 #define RISING_EDGE           (0x00100000U)
131 #define FALLING_EDGE          (0x00200000U)
132 #define GPIO_OUTPUT_TYPE      (0x00000010U)
133 #define GPIO_NUMBER           (16U)
134 
135 /**
136   * @}
137   */
138 
139 /* Private macros ------------------------------------------------------------*/
140 /* Private variables ---------------------------------------------------------*/
141 /** @defgroup GPIO_Private_Macros GPIO Private Macros
142   * @{
143   */
144 /**
145   * @}
146   */
147 
148 /* Private function prototypes -----------------------------------------------*/
149 /* Exported functions --------------------------------------------------------*/
150 
151 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
152   * @{
153   */
154 
155 /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions
156   *  @brief    Initialization and Configuration functions
157   *
158 @verbatim
159  ===============================================================================
160               ##### Initialization and de-initialization functions #####
161  ===============================================================================
162 
163 @endverbatim
164   * @{
165   */
166 
167 /**
168   * @brief  Initialize the GPIOx peripheral according to the specified parameters in the pGPIO_Init.
169   * @note   If GPIOx peripheral pin is used in EXTI_MODE and the pin is secure in case
170   *         the system implements the security (TZEN=1), it is up to the secure application to
171   *         insure that the corresponding EXTI line is set secure.
172   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
173   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
174   * @param  pGPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
175   *         the configuration information for the specified GPIO peripheral.
176   * @retval None
177   */
HAL_GPIO_Init(GPIO_TypeDef * GPIOx,const GPIO_InitTypeDef * pGPIO_Init)178 void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, const GPIO_InitTypeDef *pGPIO_Init)
179 {
180   uint32_t tmp;
181   uint32_t iocurrent;
182   uint32_t position = 0U;
183 
184 
185   /* Check the parameters */
186   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
187   assert_param(IS_GPIO_PIN(pGPIO_Init->Pin));
188   assert_param(IS_GPIO_MODE(pGPIO_Init->Mode));
189   assert_param(IS_GPIO_PULL(pGPIO_Init->Pull));
190 
191   /* Configure the port pins */
192   while (((pGPIO_Init->Pin) >> position) != 0U)
193   {
194     /* Get current io position */
195     iocurrent = (pGPIO_Init->Pin) & (1UL << position);
196 
197     if (iocurrent != 0U)
198     {
199       /*--------------------- GPIO Mode Configuration ------------------------*/
200       /* In case of Alternate function mode selection */
201       if ((pGPIO_Init->Mode == GPIO_MODE_AF_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_OD))
202       {
203         /* Check the Alternate function parameters */
204         assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
205         assert_param(IS_GPIO_AF(pGPIO_Init->Alternate));
206 
207         /* Configure Alternate function mapped with the current IO */
208         tmp = GPIOx->AFR[position >> 3U];
209         tmp &= ~(0x0FUL << ((position & 0x07U) * 4U));
210         tmp |= ((pGPIO_Init->Alternate & 0x0FUL) << ((position & 0x07U) * 4U));
211         GPIOx->AFR[position >> 3U] = tmp;
212       }
213 
214       /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
215       tmp = GPIOx->MODER;
216       tmp &= ~(GPIO_MODER_MODE0 << (position * 2U));
217       tmp |= ((pGPIO_Init->Mode & GPIO_MODE) << (position * 2U));
218       GPIOx->MODER = tmp;
219 
220       /* In case of Output or Alternate function mode selection */
221       if ((pGPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (pGPIO_Init->Mode == GPIO_MODE_AF_PP) ||
222           (pGPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (pGPIO_Init->Mode == GPIO_MODE_AF_OD))
223       {
224         /* Check the Speed parameter */
225         assert_param(IS_GPIO_SPEED(pGPIO_Init->Speed));
226 
227         /* Configure the IO Speed */
228         tmp = GPIOx->OSPEEDR;
229         tmp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
230         tmp |= (pGPIO_Init->Speed << (position * 2U));
231         GPIOx->OSPEEDR = tmp;
232 
233         /* Configure the IO Output Type */
234         tmp = GPIOx->OTYPER;
235         tmp &= ~(GPIO_OTYPER_OT0 << position) ;
236         tmp |= (((pGPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
237         GPIOx->OTYPER = tmp;
238       }
239 
240       if (pGPIO_Init->Mode != GPIO_MODE_ANALOG)
241       {
242         /* Check the Pull parameters */
243         assert_param(IS_GPIO_PULL(pGPIO_Init->Pull));
244 
245         /* Activate the Pull-up or Pull down resistor for the current IO */
246         tmp = GPIOx->PUPDR;
247         tmp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
248         tmp |= ((pGPIO_Init->Pull) << (position * 2U));
249         GPIOx->PUPDR = tmp;
250       }
251 
252       /*--------------------- EXTI Mode Configuration ------------------------*/
253       /* Configure the External Interrupt or event for the current IO */
254       if ((pGPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
255       {
256         tmp = EXTI->EXTICR[position >> 2U];
257         tmp &= ~((0x0FUL) << (8U * (position & 0x03U)));
258         tmp |= (GPIO_GET_INDEX(GPIOx) << (8U * (position & 0x03U)));
259         EXTI->EXTICR[position >> 2U] = tmp;
260 
261         /* Clear Rising Falling edge configuration */
262         tmp = EXTI->RTSR1;
263         tmp &= ~((uint32_t)iocurrent);
264         if ((pGPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
265         {
266           tmp |= iocurrent;
267         }
268         EXTI->RTSR1 = tmp;
269 
270         tmp = EXTI->FTSR1;
271         tmp &= ~((uint32_t)iocurrent);
272         if ((pGPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
273         {
274           tmp |= iocurrent;
275         }
276         EXTI->FTSR1 = tmp;
277 
278         /* Clear EXTI line configuration */
279         tmp = EXTI->EMR1;
280         tmp &= ~((uint32_t)iocurrent);
281         if ((pGPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
282         {
283           tmp |= iocurrent;
284         }
285         EXTI->EMR1 = tmp;
286 
287         tmp = EXTI->IMR1;
288         tmp &= ~((uint32_t)iocurrent);
289         if ((pGPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
290         {
291           tmp |= iocurrent;
292         }
293         EXTI->IMR1 = tmp;
294       }
295     }
296 
297     position++;
298   }
299 }
300 
301 /**
302   * @brief  De-initialize the GPIOx peripheral registers to their default reset values.
303   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
304   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
305   * @param  GPIO_Pin: specifies the port bit to be written.
306   *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
307   * @retval None
308   */
HAL_GPIO_DeInit(GPIO_TypeDef * GPIOx,uint32_t GPIO_Pin)309 void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
310 {
311   uint32_t tmp;
312   uint32_t iocurrent;
313   uint32_t position = 0U;
314 
315   /* Check the parameters */
316   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
317   assert_param(IS_GPIO_PIN(GPIO_Pin));
318 
319   /* Configure the port pins */
320   while ((GPIO_Pin >> position) != 0U)
321   {
322     /* Get current io position */
323     iocurrent = (GPIO_Pin) & (1UL << position);
324 
325     if (iocurrent != 0U)
326     {
327       /*------------------------- EXTI Mode Configuration --------------------*/
328       /* Clear the External Interrupt or Event for the current IO */
329       tmp = EXTI->EXTICR[position >> 2U];
330       tmp &= ((0x0FUL) << (8U * (position & 0x03U)));
331       if (tmp == (GPIO_GET_INDEX(GPIOx) << (8U * (position & 0x03U))))
332       {
333         /* Clear EXTI line configuration */
334         EXTI->IMR1 &= ~(iocurrent);
335         EXTI->EMR1 &= ~(iocurrent);
336 
337         /* Clear Rising Falling edge configuration */
338         EXTI->RTSR1 &= ~(iocurrent);
339         EXTI->FTSR1 &= ~(iocurrent);
340 
341         tmp = (0x0FUL) << (8U * (position & 0x03U));
342         EXTI->EXTICR[position >> 2U] &= ~tmp;
343       }
344 
345       /*------------------------- GPIO Mode Configuration --------------------*/
346       /* Configure IO in Analog Mode */
347       GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2U));
348 
349       /* Configure the default Alternate Function in current IO */
350       GPIOx->AFR[position >> 3U] &= ~(0x0FUL << ((position & 0x07U) * 4U));
351 
352       /* Configure the default value for IO Speed */
353       GPIOx->OSPEEDR &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
354 
355       /* Configure the default value IO Output Type */
356       GPIOx->OTYPER  &= ~(GPIO_OTYPER_OT0 << position);
357 
358       /* Deactivate the Pull-up and Pull-down resistor for the current IO */
359       GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
360     }
361 
362     position++;
363   }
364 }
365 
366 /**
367   * @}
368   */
369 
370 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
371   *  @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
372   *
373 @verbatim
374  ===============================================================================
375                        ##### IO operation functions #####
376  ===============================================================================
377 
378 @endverbatim
379   * @{
380   */
381 
382 /**
383   * @brief  Read the specified input port pin.
384   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
385   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
386   * @param  GPIO_Pin: specifies the port bit to read.
387   *         This parameter can be GPIO_PIN_x where x can be (0..15).
388   * @retval The input port pin value.
389   */
HAL_GPIO_ReadPin(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)390 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
391 {
392   GPIO_PinState bitstatus;
393 
394   /* Check the parameters */
395   assert_param(IS_GPIO_PIN(GPIO_Pin));
396 
397   if ((GPIOx->IDR & GPIO_Pin) != 0U)
398   {
399     bitstatus = GPIO_PIN_SET;
400   }
401   else
402   {
403     bitstatus = GPIO_PIN_RESET;
404   }
405   return bitstatus;
406 }
407 
408 /**
409   * @brief  Set or clear the selected data port bit.
410   *
411   * @note   This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify
412   *         accesses. In this way, there is no risk of an IRQ occurring between
413   *         the read and the modify access.
414   *
415   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
416   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
417   * @param  GPIO_Pin: specifies the port bit to be written.
418   *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
419   * @param  PinState: specifies the value to be written to the selected bit.
420   *         This parameter can be one of the GPIO_PinState enum values:
421   *            @arg GPIO_PIN_RESET: to clear the port pin
422   *            @arg GPIO_PIN_SET: to set the port pin
423   * @retval None
424   */
HAL_GPIO_WritePin(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,GPIO_PinState PinState)425 void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
426 {
427   /* Check the parameters */
428   assert_param(IS_GPIO_PIN(GPIO_Pin));
429   assert_param(IS_GPIO_PIN_ACTION(PinState));
430 
431   if (PinState != GPIO_PIN_RESET)
432   {
433     GPIOx->BSRR = (uint32_t)GPIO_Pin;
434   }
435   else
436   {
437     GPIOx->BRR = (uint32_t)GPIO_Pin;
438   }
439 }
440 
441 /**
442   * @brief  Set and clear several pins of a dedicated port in same cycle.
443   * @note   This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify
444   *         accesses.
445   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
446   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
447   * @param  PinReset specifies the port bits to be reset
448   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15) or zero.
449   * @param  PinSet specifies the port bits to be set
450   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15) or zero.
451   * @note   Both PinReset and PinSet combinations shall not get any common bit, else
452   *         assert would be triggered.
453   * @note   At least one of the two parameters used to set or reset shall be different from zero.
454   * @retval None
455   */
HAL_GPIO_WriteMultipleStatePin(GPIO_TypeDef * GPIOx,uint16_t PinReset,uint16_t PinSet)456 void HAL_GPIO_WriteMultipleStatePin(GPIO_TypeDef *GPIOx, uint16_t PinReset, uint16_t PinSet)
457 {
458   uint32_t tmp;
459 
460   /* Check the parameters */
461   /* Make sure at least one parameter is different from zero and that there is no common pin */
462   assert_param(IS_GPIO_PIN((uint32_t)PinReset | (uint32_t)PinSet));
463   assert_param(IS_GPIO_COMMON_PIN(PinReset, PinSet));
464 
465   tmp = (((uint32_t)PinReset << 16) | PinSet);
466   GPIOx->BSRR = tmp;
467 }
468 
469 /**
470   * @brief  Toggle the specified GPIO pin.
471   * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for STM32H5 family
472   * @param  GPIO_Pin: specifies the pin to be toggled.
473   * @retval None
474   */
HAL_GPIO_TogglePin(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)475 void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
476 {
477   uint32_t odr;
478 
479   /* Check the parameters */
480   assert_param(IS_GPIO_PIN(GPIO_Pin));
481 
482   /* get current Output Data Register value */
483   odr = GPIOx->ODR;
484 
485   /* Set selected pins that were at low level, and reset ones that were high */
486   GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
487 }
488 
489 /**
490   * @brief  Lock GPIO Pins configuration registers.
491   * @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
492   *         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
493   * @note   The configuration of the locked GPIO pins can no longer be modified
494   *         until the next reset.
495   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
496   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
497   * @param  GPIO_Pin: specifies the port bits to be locked.
498   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
499   * @retval None
500   */
HAL_GPIO_LockPin(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)501 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
502 {
503   __IO uint32_t tmp = GPIO_LCKR_LCKK;
504 
505   /* Check the parameters */
506   assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
507   assert_param(IS_GPIO_PIN(GPIO_Pin));
508 
509   /* Apply lock key write sequence */
510   tmp |= GPIO_Pin;
511   /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
512   GPIOx->LCKR = tmp;
513   /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
514   GPIOx->LCKR = GPIO_Pin;
515   /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
516   GPIOx->LCKR = tmp;
517   /* Read LCKK bit*/
518   tmp = GPIOx->LCKR;
519 
520   /* read again in order to confirm lock is active */
521   if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != GPIO_LCKR_LCKK)
522   {
523     return HAL_ERROR;
524   }
525   return HAL_OK;
526 }
527 
528 /**
529   * @brief  Enable speed optimization for several pin of dedicated port.
530   * @note   Not all I/Os support the HSLV mode. Refer to the I/O structure in the corresponding
531   *         datasheet for the list of I/Os supporting this feature. Other I/Os HSLV configuration must
532   *         be kept at reset value.
533   * @note   It must be used only if the I/O supply voltage is below 2.7 V.
534   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
535   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
536   * @param  GPIO_Pin: specifies the port bit to be written.
537   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
538   * @retval None
539   */
HAL_GPIO_EnableHighSPeedLowVoltage(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)540 void HAL_GPIO_EnableHighSPeedLowVoltage(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
541 {
542   /* Check the parameters */
543   assert_param(IS_GPIO_PIN(GPIO_Pin));
544   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
545 
546   /* Set HSLVR gpio pin */
547   SET_BIT(GPIOx->HSLVR, GPIO_Pin);
548 }
549 
550 /**
551   * @brief  Disable speed optimization for several pin of dedicated port.
552   * @note   Not all I/Os support the HSLV mode. Refer to the I/O structure in the corresponding
553   *         datasheet for the list of I/Os supporting this feature. Other I/Os HSLV configuration must
554   *         be kept at reset value.
555   * @note   It must be used only if the I/O supply voltage is below 2.7 V.
556   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
557   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
558   * @param  GPIO_Pin: specifies the port bit to be written.
559   *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
560   * @retval None
561   */
HAL_GPIO_DisableHighSPeedLowVoltage(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin)562 void HAL_GPIO_DisableHighSPeedLowVoltage(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
563 {
564   /* Check the parameters */
565   assert_param(IS_GPIO_PIN(GPIO_Pin));
566   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
567 
568   /* Clear HSLVR gpio pin */
569   CLEAR_BIT(GPIOx->HSLVR, GPIO_Pin);
570 }
571 
572 /**
573   * @brief  Handle EXTI interrupt request.
574   * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
575   * @retval None
576   */
HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)577 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
578 {
579   /* EXTI line interrupt detected */
580   if (__HAL_GPIO_EXTI_GET_RISING_IT(GPIO_Pin) != 0U)
581   {
582     __HAL_GPIO_EXTI_CLEAR_RISING_IT(GPIO_Pin);
583     HAL_GPIO_EXTI_Rising_Callback(GPIO_Pin);
584   }
585 
586   if (__HAL_GPIO_EXTI_GET_FALLING_IT(GPIO_Pin) != 0U)
587   {
588     __HAL_GPIO_EXTI_CLEAR_FALLING_IT(GPIO_Pin);
589     HAL_GPIO_EXTI_Falling_Callback(GPIO_Pin);
590   }
591 }
592 
593 /**
594   * @brief  EXTI line rising detection callback.
595   * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
596   * @retval None
597   */
HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)598 __weak void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)
599 {
600   /* Prevent unused argument(s) compilation warning */
601   UNUSED(GPIO_Pin);
602 
603   /* NOTE: This function should not be modified, when the callback is needed,
604            the HAL_GPIO_EXTI_Rising_Callback could be implemented in the user file
605    */
606 }
607 
608 /**
609   * @brief  EXTI line falling detection callback.
610   * @param  GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
611   * @retval None
612   */
HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin)613 __weak void HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin)
614 {
615   /* Prevent unused argument(s) compilation warning */
616   UNUSED(GPIO_Pin);
617 
618   /* NOTE: This function should not be modified, when the callback is needed,
619            the HAL_GPIO_EXTI_Falling_Callback could be implemented in the user file
620    */
621 }
622 
623 /**
624   * @}
625   */
626 
627 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
628 
629 /** @defgroup GPIO_Exported_Functions_Group3 IO attributes management functions
630   *  @brief GPIO attributes management functions.
631   *
632 @verbatim
633  ===============================================================================
634                        ##### IO attributes functions #####
635  ===============================================================================
636 
637 @endverbatim
638   * @{
639   */
640 
641 /**
642   * @brief  Configure the GPIO pins attributes.
643   * @note   Available attributes are to secure GPIO pin(s), so this function is
644   *         only available in secure
645   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
646   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
647   * @param  GPIO_Pin: specifies the pin(s) to configure the secure attribute
648   * @param  PinAttributes: specifies the pin(s) to be set in secure mode, other being set non secured.
649   * @retval None
650   */
HAL_GPIO_ConfigPinAttributes(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,uint32_t PinAttributes)651 void HAL_GPIO_ConfigPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t PinAttributes)
652 {
653   uint32_t tmp;
654   uint32_t iocurrent;
655   uint32_t position = 0U;
656 
657   /* Check the parameters */
658   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
659   assert_param(IS_GPIO_PIN(GPIO_Pin));
660   assert_param(IS_GPIO_PIN_ATTRIBUTES(PinAttributes));
661 
662   tmp = GPIOx->SECCFGR;
663 
664   /* Configure the port pins */
665   while ((GPIO_Pin >> position) != 0U)
666   {
667     /* Get current io position */
668     iocurrent = GPIO_Pin & (1UL << position);
669 
670     if (iocurrent != 0U)
671     {
672       /* Configure the IO secure attribute */
673       tmp &= ~(GPIO_SECCFGR_SEC0 << position);
674       tmp |= (PinAttributes << position);
675     }
676     position++;
677   }
678 
679   /* Set secure attributes */
680   GPIOx->SECCFGR = tmp;
681 }
682 
683 /**
684   * @brief  Get the GPIO pins attributes.
685   * @note   Available attributes are to secure GPIO pin(s), so this function is
686   *         only available in secure
687   * @param  GPIOx: where x can be (A..I) for stm32h56xxx and stm32h57xxx family lines and
688   *         (A..D or H) for stm32h503xx family line to select the GPIO peripheral for STM32H5 family
689   * @param  GPIO_Pin: specifies the single pin to get the secure attribute from
690   * @param  pPinAttributes: pointer to return the pin attributes.
691   * @retval HAL Status.
692   */
HAL_GPIO_GetConfigPinAttributes(GPIO_TypeDef * GPIOx,uint16_t GPIO_Pin,uint32_t * pPinAttributes)693 HAL_StatusTypeDef HAL_GPIO_GetConfigPinAttributes(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, uint32_t *pPinAttributes)
694 {
695   uint32_t iocurrent;
696   uint32_t position = 0U;
697 
698   /* Check null pointer */
699   if (pPinAttributes == NULL)
700   {
701     return HAL_ERROR;
702   }
703 
704   /* Check the parameters */
705   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
706   assert_param(IS_GPIO_PIN(GPIO_Pin) && (GPIO_Pin != GPIO_PIN_ALL));
707 
708   /* Get secure attribute of the port pin */
709   while ((GPIO_Pin >> position) != 0U)
710   {
711     /* Get current io position */
712     iocurrent = GPIO_Pin & (1UL << position);
713 
714     if (iocurrent != 0U)
715     {
716       /* Get the IO secure attribute */
717       if ((GPIOx->SECCFGR & (GPIO_SECCFGR_SEC0 << position)) != 0U)
718       {
719         *pPinAttributes = GPIO_PIN_SEC;
720       }
721       else
722       {
723         *pPinAttributes = GPIO_PIN_NSEC;
724       }
725 
726       break;
727     }
728     position++;
729   }
730 
731   return HAL_OK;
732 }
733 
734 /**
735   * @}
736   */
737 
738 #endif /* __ARM_FEATURE_CMSE */
739 
740 
741 /**
742   * @}
743   */
744 
745 #endif /* HAL_GPIO_MODULE_ENABLED */
746 /**
747   * @}
748   */
749 
750 /**
751   * @}
752   */
753