1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_UART_H 21 #define STM32H5xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 54 UART: 55 ===== 56 - If oversampling is 16 or in LIN mode, 57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 58 - If oversampling is 8, 59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 60 ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 63 ((huart->Init.BaudRate)))[3:0]) >> 1 64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 65 66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 67 This parameter can be a value of @ref UARTEx_Word_Length. */ 68 69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 70 This parameter can be a value of @ref UART_Stop_Bits. */ 71 72 uint32_t Parity; /*!< Specifies the parity mode. 73 This parameter can be a value of @ref UART_Parity 74 @note When parity is enabled, the computed parity is inserted 75 at the MSB position of the transmitted data (9th bit when 76 the word length is set to 9 data bits; 8th bit when the 77 word length is set to 8 data bits). */ 78 79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 80 This parameter can be a value of @ref UART_Mode. */ 81 82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 83 or disabled. 84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 85 86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 87 to achieve higher speed (up to f_PCLK/8). 88 This parameter can be a value of @ref UART_Over_Sampling. */ 89 90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 91 Selecting the single sample method increases the receiver tolerance to clock 92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 93 94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 95 This parameter can be a value of @ref UART_ClockPrescaler. */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of 107 @ref UART_Advanced_Features_Initialization_Type. */ 108 109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 110 This parameter can be a value of @ref UART_Tx_Inv. */ 111 112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 113 This parameter can be a value of @ref UART_Rx_Inv. */ 114 115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 116 vs negative/inverted logic). 117 This parameter can be a value of @ref UART_Data_Inv. */ 118 119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 121 122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 123 This parameter can be a value of @ref UART_Overrun_Disable. */ 124 #ifdef HAL_DMA_MODULE_ENABLED 125 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 126 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 127 #endif /* HAL_DMA_MODULE_ENABLED */ 128 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 129 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 130 131 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 132 detection is carried out. 133 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 134 135 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 136 This parameter can be a value of @ref UART_MSB_First. */ 137 } UART_AdvFeatureInitTypeDef; 138 139 /** 140 * @brief HAL UART State definition 141 * @note HAL UART State value is a combination of 2 different substates: 142 * gState and RxState (see @ref UART_State_Definition). 143 * - gState contains UART state information related to global Handle management 144 * and also information related to Tx operations. 145 * gState value coding follow below described bitmap : 146 * b7-b6 Error information 147 * 00 : No Error 148 * 01 : (Not Used) 149 * 10 : Timeout 150 * 11 : Error 151 * b5 Peripheral initialization status 152 * 0 : Reset (Peripheral not initialized) 153 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 154 * b4-b3 (not used) 155 * xx : Should be set to 00 156 * b2 Intrinsic process state 157 * 0 : Ready 158 * 1 : Busy (Peripheral busy with some configuration or internal operations) 159 * b1 (not used) 160 * x : Should be set to 0 161 * b0 Tx state 162 * 0 : Ready (no Tx operation ongoing) 163 * 1 : Busy (Tx operation ongoing) 164 * - RxState contains information related to Rx operations. 165 * RxState value coding follow below described bitmap : 166 * b7-b6 (not used) 167 * xx : Should be set to 00 168 * b5 Peripheral initialization status 169 * 0 : Reset (Peripheral not initialized) 170 * 1 : Init done (Peripheral initialized) 171 * b4-b2 (not used) 172 * xxx : Should be set to 000 173 * b1 Rx state 174 * 0 : Ready (no Rx operation ongoing) 175 * 1 : Busy (Rx operation ongoing) 176 * b0 (not used) 177 * x : Should be set to 0. 178 */ 179 typedef uint32_t HAL_UART_StateTypeDef; 180 181 /** 182 * @brief UART clock sources definition 183 */ 184 typedef enum 185 { 186 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 187 UART_CLOCKSOURCE_PLL2Q = 0x01U, /*!< PLL2Q clock source */ 188 UART_CLOCKSOURCE_PLL3Q = 0x02U, /*!< PLL3Q clock source */ 189 UART_CLOCKSOURCE_HSI = 0x04U, /*!< HSI clock source */ 190 UART_CLOCKSOURCE_CSI = 0x08U, /*!< CSI clock source */ 191 UART_CLOCKSOURCE_LSE = 0x10U, /*!< LSE clock source */ 192 UART_CLOCKSOURCE_UNDEFINED = 0x20U /*!< Undefined clock source */ 193 } UART_ClockSourceTypeDef; 194 195 /** 196 * @brief HAL UART Reception type definition 197 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 198 * This parameter can be a value of @ref UART_Reception_Type_Values : 199 * HAL_UART_RECEPTION_STANDARD = 0x00U, 200 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 201 * HAL_UART_RECEPTION_TORTO = 0x02U, 202 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 203 */ 204 typedef uint32_t HAL_UART_RxTypeTypeDef; 205 206 /** 207 * @brief HAL UART Rx Event type definition 208 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 209 * leading to call of the RxEvent callback. 210 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 211 * HAL_UART_RXEVENT_TC = 0x00U, 212 * HAL_UART_RXEVENT_HT = 0x01U, 213 * HAL_UART_RXEVENT_IDLE = 0x02U, 214 */ 215 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 216 217 /** 218 * @brief UART handle Structure definition 219 */ 220 typedef struct __UART_HandleTypeDef 221 { 222 USART_TypeDef *Instance; /*!< UART registers base address */ 223 224 UART_InitTypeDef Init; /*!< UART communication parameters */ 225 226 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 227 228 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 229 230 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 231 232 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 233 234 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 235 236 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 237 238 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 239 240 uint16_t Mask; /*!< UART Rx RDR register mask */ 241 242 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 243 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 244 245 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 246 247 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 248 249 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 250 251 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 252 253 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 254 255 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 256 257 #ifdef HAL_DMA_MODULE_ENABLED 258 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 259 260 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 261 #endif /* HAL_DMA_MODULE_ENABLED */ 262 HAL_LockTypeDef Lock; /*!< Locking object */ 263 264 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 265 and also related to Tx operations. This parameter 266 can be a value of @ref HAL_UART_StateTypeDef */ 267 268 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 269 parameter can be a value of @ref HAL_UART_StateTypeDef */ 270 271 __IO uint32_t ErrorCode; /*!< UART Error code */ 272 273 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 274 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 275 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 276 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 277 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 278 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 279 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 280 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 281 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 282 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 283 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 284 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 285 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 286 287 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 288 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 289 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 290 291 } UART_HandleTypeDef; 292 293 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 294 /** 295 * @brief HAL UART Callback ID enumeration definition 296 */ 297 typedef enum 298 { 299 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 300 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 301 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 302 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 303 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 304 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 305 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 306 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 307 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 308 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 309 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 310 311 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 312 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 313 314 } HAL_UART_CallbackIDTypeDef; 315 316 /** 317 * @brief HAL UART Callback pointer definition 318 */ 319 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 320 typedef void (*pUART_RxEventCallbackTypeDef) 321 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 322 323 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 324 325 /** 326 * @} 327 */ 328 329 /* Exported constants --------------------------------------------------------*/ 330 /** @defgroup UART_Exported_Constants UART Exported Constants 331 * @{ 332 */ 333 334 /** @defgroup UART_State_Definition UART State Code Definition 335 * @{ 336 */ 337 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 338 Value is allowed for gState and RxState */ 339 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 340 Value is allowed for gState and RxState */ 341 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 342 Value is allowed for gState only */ 343 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 344 Value is allowed for gState only */ 345 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 346 Value is allowed for RxState only */ 347 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 348 Not to be used for neither gState nor RxState.Value is result 349 of combination (Or) between gState and RxState values */ 350 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 351 Value is allowed for gState only */ 352 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 353 Value is allowed for gState only */ 354 /** 355 * @} 356 */ 357 358 /** @defgroup UART_Error_Definition UART Error Definition 359 * @{ 360 */ 361 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 362 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 363 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 364 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 365 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 366 #ifdef HAL_DMA_MODULE_ENABLED 367 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 368 #endif /* HAL_DMA_MODULE_ENABLED */ 369 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 370 371 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 372 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 373 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 374 /** 375 * @} 376 */ 377 378 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 379 * @{ 380 */ 381 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 382 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 383 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 384 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 385 /** 386 * @} 387 */ 388 389 /** @defgroup UART_Parity UART Parity 390 * @{ 391 */ 392 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 393 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 394 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 395 /** 396 * @} 397 */ 398 399 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 400 * @{ 401 */ 402 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 403 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 404 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 405 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 406 /** 407 * @} 408 */ 409 410 /** @defgroup UART_Mode UART Transfer Mode 411 * @{ 412 */ 413 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 414 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 415 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 416 /** 417 * @} 418 */ 419 420 /** @defgroup UART_State UART State 421 * @{ 422 */ 423 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 424 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 425 /** 426 * @} 427 */ 428 429 /** @defgroup UART_Over_Sampling UART Over Sampling 430 * @{ 431 */ 432 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 433 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 434 /** 435 * @} 436 */ 437 438 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 439 * @{ 440 */ 441 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 442 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 443 /** 444 * @} 445 */ 446 447 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 448 * @{ 449 */ 450 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 451 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 452 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 453 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 454 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 455 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 456 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 457 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 458 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 459 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 460 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 461 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 462 /** 463 * @} 464 */ 465 466 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 467 * @{ 468 */ 469 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 470 on start bit */ 471 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 472 on falling edge */ 473 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 474 on 0x7F frame detection */ 475 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 476 on 0x55 frame detection */ 477 /** 478 * @} 479 */ 480 481 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 482 * @{ 483 */ 484 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 485 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 486 /** 487 * @} 488 */ 489 490 /** @defgroup UART_LIN UART Local Interconnection Network mode 491 * @{ 492 */ 493 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 494 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 495 /** 496 * @} 497 */ 498 499 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 500 * @{ 501 */ 502 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 503 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 504 /** 505 * @} 506 */ 507 508 #ifdef HAL_DMA_MODULE_ENABLED 509 /** @defgroup UART_DMA_Tx UART DMA Tx 510 * @{ 511 */ 512 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 513 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 514 /** 515 * @} 516 */ 517 518 /** @defgroup UART_DMA_Rx UART DMA Rx 519 * @{ 520 */ 521 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 522 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 523 /** 524 * @} 525 */ 526 #endif /* HAL_DMA_MODULE_ENABLED */ 527 528 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 529 * @{ 530 */ 531 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 532 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 533 /** 534 * @} 535 */ 536 537 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 538 * @{ 539 */ 540 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 541 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 542 /** 543 * @} 544 */ 545 546 /** @defgroup UART_Request_Parameters UART Request Parameters 547 * @{ 548 */ 549 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 550 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 551 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 552 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 553 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 554 /** 555 * @} 556 */ 557 558 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 559 * @{ 560 */ 561 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 562 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 563 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 564 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 565 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 566 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 567 #ifdef HAL_DMA_MODULE_ENABLED 568 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 569 #endif /* HAL_DMA_MODULE_ENABLED */ 570 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 571 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 572 /** 573 * @} 574 */ 575 576 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 577 * @{ 578 */ 579 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 580 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 581 /** 582 * @} 583 */ 584 585 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 586 * @{ 587 */ 588 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 589 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 590 /** 591 * @} 592 */ 593 594 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 595 * @{ 596 */ 597 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 598 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 599 /** 600 * @} 601 */ 602 603 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 604 * @{ 605 */ 606 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 607 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 608 /** 609 * @} 610 */ 611 612 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 613 * @{ 614 */ 615 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 616 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 617 /** 618 * @} 619 */ 620 621 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 622 * @{ 623 */ 624 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 625 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 626 /** 627 * @} 628 */ 629 630 #ifdef HAL_DMA_MODULE_ENABLED 631 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 632 * @{ 633 */ 634 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 635 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 636 /** 637 * @} 638 */ 639 #endif /* HAL_DMA_MODULE_ENABLED */ 640 641 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 642 * @{ 643 */ 644 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 645 first disable */ 646 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 647 first enable */ 648 /** 649 * @} 650 */ 651 652 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 653 * @{ 654 */ 655 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 656 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 657 /** 658 * @} 659 */ 660 661 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 662 * @{ 663 */ 664 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 665 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 666 /** 667 * @} 668 */ 669 670 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 671 * @{ 672 */ 673 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 674 /** 675 * @} 676 */ 677 678 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 679 * @{ 680 */ 681 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 682 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 683 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 684 not empty or RXFIFO is not empty */ 685 /** 686 * @} 687 */ 688 689 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 690 * @{ 691 */ 692 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 693 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 694 /** 695 * @} 696 */ 697 698 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 699 * @{ 700 */ 701 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 702 position in CR1 register */ 703 /** 704 * @} 705 */ 706 707 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 708 * @{ 709 */ 710 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 711 position in CR1 register */ 712 /** 713 * @} 714 */ 715 716 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 717 * @{ 718 */ 719 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 720 /** 721 * @} 722 */ 723 724 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 725 * @{ 726 */ 727 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 728 /** 729 * @} 730 */ 731 732 /** @defgroup UART_Flags UART Status Flags 733 * Elements values convention: 0xXXXX 734 * - 0xXXXX : Flag mask in the ISR register 735 * @{ 736 */ 737 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 738 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 739 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 740 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 741 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 742 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 743 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 744 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 745 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 746 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 747 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 748 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 749 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 750 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 751 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 752 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 753 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 754 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 755 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 756 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 757 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 758 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 759 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 760 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 761 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 762 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 763 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 764 /** 765 * @} 766 */ 767 768 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 769 * Elements values convention: 000ZZZZZ0XXYYYYYb 770 * - YYYYY : Interrupt source position in the XX register (5bits) 771 * - XX : Interrupt source register (2bits) 772 * - 01: CR1 register 773 * - 10: CR2 register 774 * - 11: CR3 register 775 * - ZZZZZ : Flag position in the ISR register(5bits) 776 * Elements values convention: 000000000XXYYYYYb 777 * - YYYYY : Interrupt source position in the XX register (5bits) 778 * - XX : Interrupt source register (2bits) 779 * - 01: CR1 register 780 * - 10: CR2 register 781 * - 11: CR3 register 782 * Elements values convention: 0000ZZZZ00000000b 783 * - ZZZZ : Flag position in the ISR register(4bits) 784 * @{ 785 */ 786 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 787 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 788 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 789 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 790 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 791 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 792 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 793 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 794 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 795 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 796 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 797 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 798 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 799 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 800 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 801 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 802 803 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 804 805 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 806 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 807 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 808 /** 809 * @} 810 */ 811 812 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 813 * @{ 814 */ 815 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 816 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 817 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 818 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 819 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 820 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 821 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 822 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 823 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 824 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 825 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 826 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 827 /** 828 * @} 829 */ 830 831 /** @defgroup UART_Reception_Type_Values UART Reception type values 832 * @{ 833 */ 834 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 835 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 836 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 837 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 838 /** 839 * @} 840 */ 841 842 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 843 * @{ 844 */ 845 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 846 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 847 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 848 /** 849 * @} 850 */ 851 852 /** 853 * @} 854 */ 855 856 /* Exported macros -----------------------------------------------------------*/ 857 /** @defgroup UART_Exported_Macros UART Exported Macros 858 * @{ 859 */ 860 861 /** @brief Reset UART handle states. 862 * @param __HANDLE__ UART handle. 863 * @retval None 864 */ 865 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 866 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 867 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 868 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 869 (__HANDLE__)->MspInitCallback = NULL; \ 870 (__HANDLE__)->MspDeInitCallback = NULL; \ 871 } while(0U) 872 #else 873 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 874 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 875 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 876 } while(0U) 877 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 878 879 /** @brief Flush the UART Data registers. 880 * @param __HANDLE__ specifies the UART Handle. 881 * @retval None 882 */ 883 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 884 do{ \ 885 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 886 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 887 } while(0U) 888 889 /** @brief Clear the specified UART pending flag. 890 * @param __HANDLE__ specifies the UART Handle. 891 * @param __FLAG__ specifies the flag to check. 892 * This parameter can be any combination of the following values: 893 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 894 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 895 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 896 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 897 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 898 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 899 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 900 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 901 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 902 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 903 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 904 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 905 * @retval None 906 */ 907 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 908 909 /** @brief Clear the UART PE pending flag. 910 * @param __HANDLE__ specifies the UART Handle. 911 * @retval None 912 */ 913 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 914 915 /** @brief Clear the UART FE pending flag. 916 * @param __HANDLE__ specifies the UART Handle. 917 * @retval None 918 */ 919 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 920 921 /** @brief Clear the UART NE pending flag. 922 * @param __HANDLE__ specifies the UART Handle. 923 * @retval None 924 */ 925 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 926 927 /** @brief Clear the UART ORE pending flag. 928 * @param __HANDLE__ specifies the UART Handle. 929 * @retval None 930 */ 931 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 932 933 /** @brief Clear the UART IDLE pending flag. 934 * @param __HANDLE__ specifies the UART Handle. 935 * @retval None 936 */ 937 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 938 939 /** @brief Clear the UART TX FIFO empty clear flag. 940 * @param __HANDLE__ specifies the UART Handle. 941 * @retval None 942 */ 943 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 944 945 /** @brief Check whether the specified UART flag is set or not. 946 * @param __HANDLE__ specifies the UART Handle. 947 * @param __FLAG__ specifies the flag to check. 948 * This parameter can be one of the following values: 949 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 950 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 951 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 952 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 953 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 954 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 955 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 956 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 957 * @arg @ref UART_FLAG_SBKF Send Break flag 958 * @arg @ref UART_FLAG_CMF Character match flag 959 * @arg @ref UART_FLAG_BUSY Busy flag 960 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 961 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 962 * @arg @ref UART_FLAG_CTS CTS Change flag 963 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 964 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 965 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 966 * @arg @ref UART_FLAG_TC Transmission Complete flag 967 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 968 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 969 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 970 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 971 * @arg @ref UART_FLAG_ORE Overrun Error flag 972 * @arg @ref UART_FLAG_NE Noise Error flag 973 * @arg @ref UART_FLAG_FE Framing Error flag 974 * @arg @ref UART_FLAG_PE Parity Error flag 975 * @retval The new state of __FLAG__ (TRUE or FALSE). 976 */ 977 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 978 979 /** @brief Enable the specified UART interrupt. 980 * @param __HANDLE__ specifies the UART Handle. 981 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 982 * This parameter can be one of the following values: 983 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 984 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 985 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 986 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 987 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 988 * @arg @ref UART_IT_CM Character match interrupt 989 * @arg @ref UART_IT_CTS CTS change interrupt 990 * @arg @ref UART_IT_LBD LIN Break detection interrupt 991 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 992 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 993 * @arg @ref UART_IT_TC Transmission complete interrupt 994 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 995 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 996 * @arg @ref UART_IT_RTO Receive Timeout interrupt 997 * @arg @ref UART_IT_IDLE Idle line detection interrupt 998 * @arg @ref UART_IT_PE Parity Error interrupt 999 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 1000 * @retval None 1001 */ 1002 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1003 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1004 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 1005 ((__INTERRUPT__) & UART_IT_MASK))): \ 1006 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1007 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1008 ((__INTERRUPT__) & UART_IT_MASK))): \ 1009 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1010 ((__INTERRUPT__) & UART_IT_MASK)))) 1011 1012 /** @brief Disable the specified UART interrupt. 1013 * @param __HANDLE__ specifies the UART Handle. 1014 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1015 * This parameter can be one of the following values: 1016 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1017 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1018 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1019 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1020 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1021 * @arg @ref UART_IT_CM Character match interrupt 1022 * @arg @ref UART_IT_CTS CTS change interrupt 1023 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1024 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1025 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1026 * @arg @ref UART_IT_TC Transmission complete interrupt 1027 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1028 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1029 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1030 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1031 * @arg @ref UART_IT_PE Parity Error interrupt 1032 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1033 * @retval None 1034 */ 1035 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1036 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1037 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1038 ((__INTERRUPT__) & UART_IT_MASK))): \ 1039 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1040 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1041 ((__INTERRUPT__) & UART_IT_MASK))): \ 1042 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1043 ((__INTERRUPT__) & UART_IT_MASK)))) 1044 1045 /** @brief Check whether the specified UART interrupt has occurred or not. 1046 * @param __HANDLE__ specifies the UART Handle. 1047 * @param __INTERRUPT__ specifies the UART interrupt to check. 1048 * This parameter can be one of the following values: 1049 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1050 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1051 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1052 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1053 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1054 * @arg @ref UART_IT_CM Character match interrupt 1055 * @arg @ref UART_IT_CTS CTS change interrupt 1056 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1057 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1058 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1059 * @arg @ref UART_IT_TC Transmission complete interrupt 1060 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1061 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1062 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1063 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1064 * @arg @ref UART_IT_PE Parity Error interrupt 1065 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1066 * @retval The new state of __INTERRUPT__ (SET or RESET). 1067 */ 1068 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1069 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1070 1071 /** @brief Check whether the specified UART interrupt source is enabled or not. 1072 * @param __HANDLE__ specifies the UART Handle. 1073 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1074 * This parameter can be one of the following values: 1075 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1076 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1077 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1078 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1079 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1080 * @arg @ref UART_IT_CM Character match interrupt 1081 * @arg @ref UART_IT_CTS CTS change interrupt 1082 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1083 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1084 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1085 * @arg @ref UART_IT_TC Transmission complete interrupt 1086 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1087 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1088 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1089 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1090 * @arg @ref UART_IT_PE Parity Error interrupt 1091 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1092 * @retval The new state of __INTERRUPT__ (SET or RESET). 1093 */ 1094 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1095 (__HANDLE__)->Instance->CR1 : \ 1096 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1097 (__HANDLE__)->Instance->CR2 : \ 1098 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1099 (((uint16_t)(__INTERRUPT__)) &\ 1100 UART_IT_MASK))) != RESET) ? SET : RESET) 1101 1102 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1103 * @param __HANDLE__ specifies the UART Handle. 1104 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1105 * to clear the corresponding interrupt 1106 * This parameter can be one of the following values: 1107 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1108 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1109 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1110 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1111 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1112 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1113 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1114 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1115 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1116 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1117 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1118 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1119 * @retval None 1120 */ 1121 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1122 1123 /** @brief Set a specific UART request flag. 1124 * @param __HANDLE__ specifies the UART Handle. 1125 * @param __REQ__ specifies the request flag to set 1126 * This parameter can be one of the following values: 1127 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1128 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1129 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1130 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1131 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1132 * @retval None 1133 */ 1134 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1135 1136 /** @brief Enable the UART one bit sample method. 1137 * @param __HANDLE__ specifies the UART Handle. 1138 * @retval None 1139 */ 1140 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1141 1142 /** @brief Disable the UART one bit sample method. 1143 * @param __HANDLE__ specifies the UART Handle. 1144 * @retval None 1145 */ 1146 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1147 1148 /** @brief Enable UART. 1149 * @param __HANDLE__ specifies the UART Handle. 1150 * @retval None 1151 */ 1152 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1153 1154 /** @brief Disable UART. 1155 * @param __HANDLE__ specifies the UART Handle. 1156 * @retval None 1157 */ 1158 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1159 1160 /** @brief Enable CTS flow control. 1161 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1162 * without need to call HAL_UART_Init() function. 1163 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1164 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1165 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1166 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1167 * - macro could only be called when corresponding UART instance is disabled 1168 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1169 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1170 * @param __HANDLE__ specifies the UART Handle. 1171 * @retval None 1172 */ 1173 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1174 do{ \ 1175 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1176 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1177 } while(0U) 1178 1179 /** @brief Disable CTS flow control. 1180 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1181 * without need to call HAL_UART_Init() function. 1182 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1183 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1184 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1185 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1186 * - macro could only be called when corresponding UART instance is disabled 1187 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1188 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1189 * @param __HANDLE__ specifies the UART Handle. 1190 * @retval None 1191 */ 1192 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1193 do{ \ 1194 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1195 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1196 } while(0U) 1197 1198 /** @brief Enable RTS flow control. 1199 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1200 * without need to call HAL_UART_Init() function. 1201 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1202 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1203 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1204 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1205 * - macro could only be called when corresponding UART instance is disabled 1206 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1207 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1208 * @param __HANDLE__ specifies the UART Handle. 1209 * @retval None 1210 */ 1211 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1212 do{ \ 1213 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1214 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1215 } while(0U) 1216 1217 /** @brief Disable RTS flow control. 1218 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1219 * without need to call HAL_UART_Init() function. 1220 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1221 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1222 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1223 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1224 * - macro could only be called when corresponding UART instance is disabled 1225 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1226 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1227 * @param __HANDLE__ specifies the UART Handle. 1228 * @retval None 1229 */ 1230 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1231 do{ \ 1232 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1233 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1234 } while(0U) 1235 /** 1236 * @} 1237 */ 1238 1239 /* Private macros --------------------------------------------------------*/ 1240 /** @defgroup UART_Private_Macros UART Private Macros 1241 * @{ 1242 */ 1243 /** @brief Get UART clok division factor from clock prescaler value. 1244 * @param __CLOCKPRESCALER__ UART prescaler value. 1245 * @retval UART clock division factor 1246 */ 1247 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1248 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1249 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1250 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1251 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1252 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1253 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1254 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1255 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1256 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1257 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1258 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1259 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1260 1261 /** @brief BRR division operation to set BRR register with LPUART. 1262 * @param __PCLK__ LPUART clock. 1263 * @param __BAUD__ Baud rate set by the user. 1264 * @param __CLOCKPRESCALER__ UART prescaler value. 1265 * @retval Division result 1266 */ 1267 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1268 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1269 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1270 ) 1271 1272 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1273 * @param __PCLK__ UART clock. 1274 * @param __BAUD__ Baud rate set by the user. 1275 * @param __CLOCKPRESCALER__ UART prescaler value. 1276 * @retval Division result 1277 */ 1278 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1279 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1280 1281 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1282 * @param __PCLK__ UART clock. 1283 * @param __BAUD__ Baud rate set by the user. 1284 * @param __CLOCKPRESCALER__ UART prescaler value. 1285 * @retval Division result 1286 */ 1287 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1288 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1289 1290 /** @brief Check whether or not UART instance is Low Power UART. 1291 * @param __HANDLE__ specifies the UART Handle. 1292 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1293 */ 1294 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1295 1296 /** @brief Check UART Baud rate. 1297 * @param __BAUDRATE__ Baudrate specified by the user. 1298 * The maximum Baud Rate is derived from the maximum clock on H5 (i.e. 250 MHz) 1299 * divided by the smallest oversampling used on the USART (i.e. 8) 1300 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1301 */ 1302 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 20000000U) 1303 1304 /** @brief Check UART assertion time. 1305 * @param __TIME__ 5-bit value assertion time. 1306 * @retval Test result (TRUE or FALSE). 1307 */ 1308 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1309 1310 /** @brief Check UART deassertion time. 1311 * @param __TIME__ 5-bit value deassertion time. 1312 * @retval Test result (TRUE or FALSE). 1313 */ 1314 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1315 1316 /** 1317 * @brief Ensure that UART frame number of stop bits is valid. 1318 * @param __STOPBITS__ UART frame number of stop bits. 1319 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1320 */ 1321 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1322 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1323 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1324 ((__STOPBITS__) == UART_STOPBITS_2)) 1325 1326 /** 1327 * @brief Ensure that LPUART frame number of stop bits is valid. 1328 * @param __STOPBITS__ LPUART frame number of stop bits. 1329 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1330 */ 1331 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1332 ((__STOPBITS__) == UART_STOPBITS_2)) 1333 1334 /** 1335 * @brief Ensure that UART frame parity is valid. 1336 * @param __PARITY__ UART frame parity. 1337 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1338 */ 1339 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1340 ((__PARITY__) == UART_PARITY_EVEN) || \ 1341 ((__PARITY__) == UART_PARITY_ODD)) 1342 1343 /** 1344 * @brief Ensure that UART hardware flow control is valid. 1345 * @param __CONTROL__ UART hardware flow control. 1346 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1347 */ 1348 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1349 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1350 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1351 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1352 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1353 1354 /** 1355 * @brief Ensure that UART communication mode is valid. 1356 * @param __MODE__ UART communication mode. 1357 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1358 */ 1359 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1360 1361 /** 1362 * @brief Ensure that UART state is valid. 1363 * @param __STATE__ UART state. 1364 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1365 */ 1366 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1367 ((__STATE__) == UART_STATE_ENABLE)) 1368 1369 /** 1370 * @brief Ensure that UART oversampling is valid. 1371 * @param __SAMPLING__ UART oversampling. 1372 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1373 */ 1374 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1375 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1376 1377 /** 1378 * @brief Ensure that UART frame sampling is valid. 1379 * @param __ONEBIT__ UART frame sampling. 1380 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1381 */ 1382 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1383 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1384 1385 /** 1386 * @brief Ensure that UART auto Baud rate detection mode is valid. 1387 * @param __MODE__ UART auto Baud rate detection mode. 1388 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1389 */ 1390 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1391 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1392 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1393 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1394 1395 /** 1396 * @brief Ensure that UART receiver timeout setting is valid. 1397 * @param __TIMEOUT__ UART receiver timeout setting. 1398 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1399 */ 1400 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1401 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1402 1403 /** @brief Check the receiver timeout value. 1404 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1405 * @param __TIMEOUTVALUE__ receiver timeout value. 1406 * @retval Test result (TRUE or FALSE) 1407 */ 1408 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1409 1410 /** 1411 * @brief Ensure that UART LIN state is valid. 1412 * @param __LIN__ UART LIN state. 1413 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1414 */ 1415 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1416 ((__LIN__) == UART_LIN_ENABLE)) 1417 1418 /** 1419 * @brief Ensure that UART LIN break detection length is valid. 1420 * @param __LENGTH__ UART LIN break detection length. 1421 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1422 */ 1423 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1424 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1425 1426 #ifdef HAL_DMA_MODULE_ENABLED 1427 /** 1428 * @brief Ensure that UART DMA TX state is valid. 1429 * @param __DMATX__ UART DMA TX state. 1430 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1431 */ 1432 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1433 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1434 1435 /** 1436 * @brief Ensure that UART DMA RX state is valid. 1437 * @param __DMARX__ UART DMA RX state. 1438 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1439 */ 1440 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1441 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1442 1443 #endif /* HAL_DMA_MODULE_ENABLED */ 1444 1445 /** 1446 * @brief Ensure that UART half-duplex state is valid. 1447 * @param __HDSEL__ UART half-duplex state. 1448 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1449 */ 1450 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1451 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1452 1453 /** 1454 * @brief Ensure that UART wake-up method is valid. 1455 * @param __WAKEUP__ UART wake-up method . 1456 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1457 */ 1458 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1459 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1460 1461 /** 1462 * @brief Ensure that UART request parameter is valid. 1463 * @param __PARAM__ UART request parameter. 1464 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1465 */ 1466 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1467 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1468 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1469 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1470 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1471 1472 /** 1473 * @brief Ensure that UART advanced features initialization is valid. 1474 * @param __INIT__ UART advanced features initialization. 1475 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1476 */ 1477 #ifdef HAL_DMA_MODULE_ENABLED 1478 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1479 UART_ADVFEATURE_TXINVERT_INIT | \ 1480 UART_ADVFEATURE_RXINVERT_INIT | \ 1481 UART_ADVFEATURE_DATAINVERT_INIT | \ 1482 UART_ADVFEATURE_SWAP_INIT | \ 1483 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1484 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1485 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1486 UART_ADVFEATURE_MSBFIRST_INIT)) 1487 #else 1488 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1489 UART_ADVFEATURE_TXINVERT_INIT | \ 1490 UART_ADVFEATURE_RXINVERT_INIT | \ 1491 UART_ADVFEATURE_DATAINVERT_INIT | \ 1492 UART_ADVFEATURE_SWAP_INIT | \ 1493 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1494 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1495 UART_ADVFEATURE_MSBFIRST_INIT)) 1496 #endif /* HAL_DMA_MODULE_ENABLED */ 1497 1498 /** 1499 * @brief Ensure that UART frame TX inversion setting is valid. 1500 * @param __TXINV__ UART frame TX inversion setting. 1501 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1502 */ 1503 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1504 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1505 1506 /** 1507 * @brief Ensure that UART frame RX inversion setting is valid. 1508 * @param __RXINV__ UART frame RX inversion setting. 1509 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1510 */ 1511 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1512 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1513 1514 /** 1515 * @brief Ensure that UART frame data inversion setting is valid. 1516 * @param __DATAINV__ UART frame data inversion setting. 1517 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1518 */ 1519 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1520 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1521 1522 /** 1523 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1524 * @param __SWAP__ UART frame RX/TX pins swap setting. 1525 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1526 */ 1527 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1528 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1529 1530 /** 1531 * @brief Ensure that UART frame overrun setting is valid. 1532 * @param __OVERRUN__ UART frame overrun setting. 1533 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1534 */ 1535 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1536 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1537 1538 /** 1539 * @brief Ensure that UART auto Baud rate state is valid. 1540 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1541 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1542 */ 1543 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1544 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1545 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1546 1547 #ifdef HAL_DMA_MODULE_ENABLED 1548 /** 1549 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1550 * @param __DMA__ UART DMA enabling or disabling on error setting. 1551 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1552 */ 1553 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1554 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1555 #endif /* HAL_DMA_MODULE_ENABLED */ 1556 1557 /** 1558 * @brief Ensure that UART frame MSB first setting is valid. 1559 * @param __MSBFIRST__ UART frame MSB first setting. 1560 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1561 */ 1562 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1563 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1564 1565 /** 1566 * @brief Ensure that UART stop mode state is valid. 1567 * @param __STOPMODE__ UART stop mode state. 1568 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1569 */ 1570 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1571 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1572 1573 /** 1574 * @brief Ensure that UART mute mode state is valid. 1575 * @param __MUTE__ UART mute mode state. 1576 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1577 */ 1578 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1579 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1580 1581 /** 1582 * @brief Ensure that UART wake-up selection is valid. 1583 * @param __WAKE__ UART wake-up selection. 1584 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1585 */ 1586 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1587 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1588 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1589 1590 /** 1591 * @brief Ensure that UART driver enable polarity is valid. 1592 * @param __POLARITY__ UART driver enable polarity. 1593 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1594 */ 1595 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1596 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1597 1598 /** 1599 * @brief Ensure that UART Prescaler is valid. 1600 * @param __CLOCKPRESCALER__ UART Prescaler value. 1601 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1602 */ 1603 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1604 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1605 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1606 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1607 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1608 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1609 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1610 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1611 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1612 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1613 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1614 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1615 1616 /** 1617 * @} 1618 */ 1619 1620 /* Include UART HAL Extended module */ 1621 #include "stm32h5xx_hal_uart_ex.h" 1622 1623 /* Exported functions --------------------------------------------------------*/ 1624 /** @addtogroup UART_Exported_Functions UART Exported Functions 1625 * @{ 1626 */ 1627 1628 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1629 * @{ 1630 */ 1631 1632 /* Initialization and de-initialization functions ****************************/ 1633 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1634 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1635 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1636 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1637 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1638 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1639 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1640 1641 /* Callbacks Register/UnRegister functions ***********************************/ 1642 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1643 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1644 pUART_CallbackTypeDef pCallback); 1645 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1646 1647 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1648 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1649 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1650 1651 /** 1652 * @} 1653 */ 1654 1655 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1656 * @{ 1657 */ 1658 1659 /* IO operation functions *****************************************************/ 1660 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1661 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1662 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1663 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1664 #ifdef HAL_DMA_MODULE_ENABLED 1665 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1666 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1667 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1668 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1669 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1670 #endif /* HAL_DMA_MODULE_ENABLED */ 1671 /* Transfer Abort functions */ 1672 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1673 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1674 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1675 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1676 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1677 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1678 1679 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1680 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1681 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1682 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1683 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1684 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1685 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1686 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1687 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1688 1689 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1690 1691 /** 1692 * @} 1693 */ 1694 1695 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1696 * @{ 1697 */ 1698 1699 /* Peripheral Control functions ************************************************/ 1700 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1701 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1702 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1703 1704 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1705 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1706 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1707 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1708 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1709 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1710 1711 /** 1712 * @} 1713 */ 1714 1715 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1716 * @{ 1717 */ 1718 1719 /* Peripheral State and Errors functions **************************************************/ 1720 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1721 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1722 1723 /** 1724 * @} 1725 */ 1726 1727 /** 1728 * @} 1729 */ 1730 1731 /* Private functions -----------------------------------------------------------*/ 1732 /** @addtogroup UART_Private_Functions UART Private Functions 1733 * @{ 1734 */ 1735 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1736 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1737 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1738 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1739 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1740 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1741 uint32_t Tickstart, uint32_t Timeout); 1742 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1743 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1744 #ifdef HAL_DMA_MODULE_ENABLED 1745 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1746 #endif /* HAL_DMA_MODULE_ENABLED */ 1747 1748 /** 1749 * @} 1750 */ 1751 1752 /* Private variables -----------------------------------------------------------*/ 1753 /** @defgroup UART_Private_variables UART Private variables 1754 * @{ 1755 */ 1756 /* Prescaler Table used in BRR computation macros. 1757 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1758 extern const uint16_t UARTPrescTable[12]; 1759 /** 1760 * @} 1761 */ 1762 1763 /** 1764 * @} 1765 */ 1766 1767 /** 1768 * @} 1769 */ 1770 1771 #ifdef __cplusplus 1772 } 1773 #endif 1774 1775 #endif /* STM32H5xx_HAL_UART_H */ 1776
