1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_pwr_ex.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_PWR_EX_H 21 #define STM32H5xx_HAL_PWR_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup PWREx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup PWREx_Exported_Types PWR Extended Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief PWREx AVD configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t AVDLevel; /*!< AVDLevel: Specifies the AVD detection level. This 50 parameter can be a value of @ref 51 PWREx_AVD_detection_level 52 */ 53 54 uint32_t Mode; /*!< Mode: Specifies the EXTI operating mode for the AVD 55 event. This parameter can be a value of @ref 56 PWREx_AVD_Mode. 57 */ 58 } PWREx_AVDTypeDef; 59 60 /** 61 * @brief PWREx Wakeup pin configuration structure definition 62 */ 63 typedef struct 64 { 65 uint32_t WakeUpPin; /*!< WakeUpPin: Specifies the Wake-Up pin to be enabled. 66 This parameter can be a value of @ref 67 PWREx_WakeUp_Pins 68 */ 69 70 uint32_t PinPolarity; /*!< PinPolarity: Specifies the Wake-Up pin polarity. 71 This parameter can be a value of @ref 72 PWREx_PIN_Polarity 73 */ 74 75 uint32_t PinPull; /*!< PinPull: Specifies the Wake-Up pin pull. This 76 parameter can be a value of @ref 77 PWREx_PIN_Pull 78 */ 79 } PWREx_WakeupPinTypeDef; 80 /** 81 * @} 82 */ 83 84 /* Exported constants --------------------------------------------------------*/ 85 86 /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants 87 * @{ 88 */ 89 90 /** @defgroup PWREx_Supply_configuration PWREx Supply configuration 91 * @{ 92 */ 93 #define PWR_EXTERNAL_SOURCE_SUPPLY PWR_SCCR_BYPASS /*!< The SMPS disabled and the LDO Bypass. The Core domains 94 are supplied from an external source */ 95 96 #if defined (SMPS) 97 #define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_SMPSEN | PWR_SCCR_LDOEN | PWR_SCCR_BYPASS) 98 #else 99 #define PWR_SUPPLY_CONFIG_MASK (PWR_SCCR_LDOEN | PWR_SCCR_BYPASS) 100 #endif /* defined (SMPS) */ 101 /** 102 * @} 103 */ 104 105 /** @defgroup PWREx_PIN_Polarity PWREx Pin Polarity configuration 106 * @{ 107 */ 108 #define PWR_PIN_POLARITY_HIGH (0x00000000U) 109 #define PWR_PIN_POLARITY_LOW (0x00000001U) 110 /** 111 * @} 112 */ 113 114 /** @defgroup PWREx_PIN_Pull PWREx Pin Pull configuration 115 * @{ 116 */ 117 #define PWR_PIN_NO_PULL (0x00000000U) 118 #define PWR_PIN_PULL_UP (0x00000001U) 119 #define PWR_PIN_PULL_DOWN (0x00000002U) 120 /** 121 * @} 122 */ 123 124 /** @defgroup PWREx_AVD_detection_level PWREx AVD detection level 125 * @{ 126 */ 127 #define PWR_AVDLEVEL_0 (0x00000000U) /*!< Analog voltage detector level 0 selection : 1V7 */ 128 #define PWR_AVDLEVEL_1 PWR_VMCR_ALS_0 /*!< Analog voltage detector level 1 selection : 2V1 */ 129 #define PWR_AVDLEVEL_2 PWR_VMCR_ALS_1 /*!< Analog voltage detector level 2 selection : 2V5 */ 130 #define PWR_AVDLEVEL_3 PWR_VMCR_ALS /*!< Analog voltage detector level 3 selection : 2V8 */ 131 /** 132 * @} 133 */ 134 135 /** @defgroup PWREx_AVD_Mode PWREx AVD Mode 136 * @{ 137 */ 138 #define PWR_AVD_MODE_NORMAL (0x00000000U)/*!< Basic mode is used */ 139 #define PWR_AVD_MODE_IT_RISING (0x00010001U)/*!< External Interrupt Mode with Rising edge trigger detection*/ 140 #define PWR_AVD_MODE_IT_FALLING (0x00010002U)/*!< External Interrupt Mode with 141 Falling edge trigger detection */ 142 #define PWR_AVD_MODE_IT_RISING_FALLING (0x00010003U)/*!< External Interrupt Mode with 143 Rising/Falling edge trigger detection */ 144 #define PWR_AVD_MODE_EVENT_RISING (0x00020001U)/*!< Event Mode with Rising edge trigger detection */ 145 #define PWR_AVD_MODE_EVENT_FALLING (0x00020002U)/*!< Event Mode with Falling edge trigger detection */ 146 #define PWR_AVD_MODE_EVENT_RISING_FALLING (0x00020003U)/*!< Event Mode with Rising/Falling edge trigger detection */ 147 /** 148 * @} 149 */ 150 151 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale 152 * @{ 153 */ 154 #define PWR_REGULATOR_VOLTAGE_SCALE0 PWR_VOSCR_VOS /*!< Voltage scaling range 0 */ 155 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_VOSCR_VOS_1 /*!< Voltage scaling range 1 */ 156 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_VOSCR_VOS_0 /*!< Voltage scaling range 2 */ 157 #define PWR_REGULATOR_VOLTAGE_SCALE3 (0U) /*!< Voltage scaling range 3 */ 158 /** 159 * @} 160 */ 161 162 /** @defgroup PWREx_System_Stop_Mode_Voltage_Scale PWREx System Stop Mode Voltage Scale 163 * @{ 164 */ 165 #define PWR_REGULATOR_SVOS_SCALE5 (PWR_PMCR_SVOS_0) 166 #define PWR_REGULATOR_SVOS_SCALE4 (PWR_PMCR_SVOS_1) 167 #define PWR_REGULATOR_SVOS_SCALE3 (PWR_PMCR_SVOS_0 | PWR_PMCR_SVOS_1) 168 /** 169 * @} 170 */ 171 172 /** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR Extended Battery Charging Resistor Selection 173 * @{ 174 */ 175 #define PWR_BATTERY_CHARGING_RESISTOR_5 (0U) /*!< VBAT charging through a 5 kOhms resistor */ 176 #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_BDCR_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */ 177 /** 178 * @} 179 */ 180 181 /** @defgroup PWREx_Memory_Shut_Off Memory shut-off block selection 182 * @{ 183 */ 184 #if defined (PWR_PMCR_SRAM2_16SO) 185 #define PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO /*!< Ethernet shut-off control in Stop mode */ 186 #define PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO /*!< RAM3 shut-off control in Stop mode */ 187 #define PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO /*!< RAM2 16k byte shut-off control in Stop mode */ 188 #define PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO /*!< RAM2 48k byte shut-off control in Stop mode */ 189 #else 190 #define PWR_RAM2_MEMORY_BLOCK PWR_PMCR_SRAM2SO /*!< RAM2 48k byte shut-off control in Stop mode */ 191 #endif /* PWR_PMCR_SRAM2_16SO */ 192 #define PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO /*!< RAM1 shut-off control in Stop mode */ 193 194 /** 195 * @} 196 */ 197 198 /** @defgroup PWREx_AVD_EXTI_Line PWREx AVD EXTI Line 16 199 * @{ 200 */ 201 #define PWR_EXTI_LINE_AVD EXTI_IMR1_IM16 /*!< External interrupt line 16 202 Connected to the AVD EXTI Line */ 203 /** 204 * @} 205 */ 206 207 /** 208 * @} 209 */ 210 211 /* Exported macros -----------------------------------------------------------*/ 212 213 /** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros 214 * @{ 215 */ 216 217 /** 218 * @brief Enable the AVD EXTI Line 16. 219 * @retval None. 220 */ 221 #define __HAL_PWR_AVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD) 222 223 /** 224 * @brief Disable the AVD EXTI Line 16 225 * @retval None. 226 */ 227 #define __HAL_PWR_AVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_AVD) 228 229 /** 230 * @brief Enable event on AVD EXTI Line 16. 231 * @retval None. 232 */ 233 #define __HAL_PWR_AVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD) 234 235 /** 236 * @brief Disable event on AVD EXTI Line 16. 237 * @retval None. 238 */ 239 #define __HAL_PWR_AVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_AVD) 240 241 /** 242 * @brief Enable the AVD Extended Interrupt Rising Trigger. 243 * @retval None. 244 */ 245 #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD) 246 247 /** 248 * @brief Disable the AVD Extended Interrupt Rising Trigger. 249 * @retval None. 250 */ 251 #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_AVD) 252 253 /** 254 * @brief Enable the AVD Extended Interrupt Falling Trigger. 255 * @retval None. 256 */ 257 #define __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD) 258 259 /** 260 * @brief Disable the AVD Extended Interrupt Falling Trigger. 261 * @retval None. 262 */ 263 #define __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_AVD) 264 265 /** 266 * @brief Enable the AVD Extended Interrupt Rising and Falling Trigger. 267 * @retval None. 268 */ 269 #define __HAL_PWR_AVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 270 do { \ 271 __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE(); \ 272 __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE(); \ 273 } while(0); 274 275 /** 276 * @brief Disable the AVD Extended Interrupt Rising & Falling Trigger. 277 * @retval None. 278 */ 279 #define __HAL_PWR_AVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 280 do { \ 281 __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE(); \ 282 __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE(); \ 283 } while(0); 284 285 /** 286 * @brief Check whether the specified AVD EXTI Rising interrupt flag is set or not. 287 * @retval EXTI AVD Line Status. 288 */ 289 290 #define __HAL_PWR_PVD_AVD_EXTI_GET_RISING_FLAG() ((READ_BIT(EXTI->RPR1, PWR_EXTI_LINE_AVD)\ 291 == PWR_EXTI_LINE_AVD) ? 1UL : 0UL) 292 293 /** 294 * @brief Check whether the specified AVD EXTI Falling interrupt flag is set or not. 295 * @retval EXTI AVD Line Status. 296 */ 297 298 #define __HAL_PWR_PVD_AVD_EXTI_GET_FALLING_FLAG() ((READ_BIT(EXTI->FPR1, PWR_EXTI_LINE_AVD)\ 299 == PWR_EXTI_LINE_AVD) ? 1UL : 0UL) 300 301 /** 302 * @brief Clear the AVD EXTI flag. 303 * @retval None. 304 */ 305 #define __HAL_PWR_PVD_AVD_EXTI_CLEAR_FLAG() \ 306 do \ 307 { \ 308 WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_AVD); \ 309 WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_AVD); \ 310 } while(0) 311 312 /** 313 * @brief Generates a Software interrupt on AVD EXTI line. 314 * @retval None. 315 */ 316 #define __HAL_PWR_AVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_AVD) 317 318 /** 319 * @brief Configure the main internal regulator output voltage. 320 * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but 321 * doesn't check whether or not VOSREADY flag is set. User may resort 322 * to __HAL_PWR_GET_FLAG() macro to check VOSF bit state. 323 * @param __REGULATOR__ : Specifies the regulator output voltage to achieve a 324 * tradeoff between performance and power consumption. 325 * This parameter can be one of the following values : 326 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage output scale 1. 327 * Provides a typical output voltage at 1.2 V. 328 * Used when system clock frequency is up to 160 MHz. 329 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 : Regulator voltage output scale 2. 330 * Provides a typical output voltage at 1.1 V. 331 * Used when system clock frequency is up to 100 MHz. 332 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output scale 3. 333 * Provides a typical output voltage at 1.0 V. 334 * Used when system clock frequency is up to 50 MHz. 335 * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE4 : Regulator voltage output scale 4. 336 * Provides a typical output voltage at 0.9 V. 337 * Used when system clock frequency is up to 24 MHz. 338 * @retval None. 339 */ 340 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) \ 341 do \ 342 { \ 343 __IO uint32_t tmpreg; \ 344 MODIFY_REG(PWR->VOSCR, PWR_VOSCR_VOS, (__REGULATOR__)); \ 345 /* Delay after an RCC peripheral clock enabling */ \ 346 tmpreg = READ_BIT(PWR->VOSCR, PWR_VOSCR_VOS); \ 347 UNUSED(tmpreg); \ 348 } while(0) 349 /** 350 * @} 351 */ 352 353 /* Private constants ---------------------------------------------------------*/ 354 355 /** @defgroup PWREx_Private_Constants PWR Extended Private Constants 356 * @{ 357 */ 358 359 /** @defgroup PWREx_AVD_Mode_Mask PWR Extended AVD Mode Mask 360 * @{ 361 */ 362 #define AVD_MODE_IT (0x00010000U) 363 #define AVD_MODE_EVT (0x00020000U) 364 #define AVD_RISING_EDGE (0x00000001U) 365 #define AVD_FALLING_EDGE (0x00000002U) 366 #define AVD_RISING_FALLING_EDGE (0x00000003U) 367 /** 368 * @} 369 */ 370 371 /** 372 * @} 373 */ 374 375 /* Private macros --------------------------------------------------------*/ 376 377 /** @defgroup PWREx_Private_Macros PWR Extended Private Macros 378 * @{ 379 */ 380 /* Check PWR regulator configuration parameter */ 381 #define IS_PWR_SUPPLY(PWR_SOURCE) ((PWR_SOURCE) == PWR_EXTERNAL_SOURCE_SUPPLY) 382 383 /* Check wake up pin polarity parameter */ 384 #define IS_PWR_WAKEUP_PIN_POLARITY(POLARITY) (((POLARITY) == PWR_PIN_POLARITY_HIGH) ||\ 385 ((POLARITY) == PWR_PIN_POLARITY_LOW)) 386 387 /* Check wake up pin pull configuration parameter */ 388 #define IS_PWR_WAKEUP_PIN_PULL(PULL) (((PULL) == PWR_PIN_NO_PULL) ||\ 389 ((PULL) == PWR_PIN_PULL_UP) ||\ 390 ((PULL) == PWR_PIN_PULL_DOWN)) 391 392 /* Check wake up flag parameter */ 393 #define IS_PWR_WAKEUP_FLAG(FLAG) (((FLAG) == PWR_WAKEUP_FLAG1) ||\ 394 ((FLAG) == PWR_WAKEUP_FLAG2) ||\ 395 ((FLAG) == PWR_WAKEUP_FLAG3) ||\ 396 ((FLAG) == PWR_WAKEUP_FLAG4) ||\ 397 ((FLAG) == PWR_WAKEUP_FLAG5) ||\ 398 ((FLAG) == PWR_WAKEUP_FLAG6) ||\ 399 ((FLAG) == PWR_WAKEUP_FLAG_ALL)) 400 401 /* Voltage scaling range check macro */ 402 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE0) ||\ 403 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) ||\ 404 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) ||\ 405 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) 406 407 /* Check PWR regulator configuration in STOP mode parameter */ 408 #define IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE3) ||\ 409 ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE4) ||\ 410 ((VOLTAGE) == PWR_REGULATOR_SVOS_SCALE5)) 411 412 /* Battery charging resistor selection check macro */ 413 #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\ 414 ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5)) 415 416 #if defined (PWR_PMCR_SRAM2_16SO) 417 /* Check memory block parameter */ 418 #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_ETHERNET_MEMORY_BLOCK) || \ 419 ((BLOCK) == PWR_RAM3_MEMORY_BLOCK) || \ 420 ((BLOCK) == PWR_RAM2_16_MEMORY_BLOCK) || \ 421 ((BLOCK) == PWR_RAM2_48_MEMORY_BLOCK) || \ 422 ((BLOCK) == PWR_RAM1_MEMORY_BLOCK)) 423 #else 424 #define IS_PWR_MEMORY_BLOCK(BLOCK) (((BLOCK) == PWR_RAM2_MEMORY_BLOCK) || \ 425 ((BLOCK) == PWR_RAM1_MEMORY_BLOCK)) 426 #endif /* PWR_PMCR_SRAM2_16SO */ 427 428 /* Check wake up flag parameter */ 429 #define IS_PWR_AVD_LEVEL(LEVEL) (((LEVEL) == PWR_AVDLEVEL_0) ||\ 430 ((LEVEL) == PWR_AVDLEVEL_1) ||\ 431 ((LEVEL) == PWR_AVDLEVEL_2) ||\ 432 ((LEVEL) == PWR_AVDLEVEL_3)) 433 434 /* Check AVD mode parameter */ 435 #define IS_PWR_AVD_MODE(MODE) (((MODE) == PWR_AVD_MODE_IT_RISING) ||\ 436 ((MODE) == PWR_AVD_MODE_IT_FALLING) ||\ 437 ((MODE) == PWR_AVD_MODE_IT_RISING_FALLING) ||\ 438 ((MODE) == PWR_AVD_MODE_EVENT_RISING) ||\ 439 ((MODE) == PWR_AVD_MODE_EVENT_FALLING) ||\ 440 ((MODE) == PWR_AVD_MODE_NORMAL) ||\ 441 ((MODE) == PWR_AVD_MODE_EVENT_RISING_FALLING)) 442 /** 443 * @} 444 */ 445 446 /** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions 447 * @{ 448 */ 449 450 /** @addtogroup PWREx_Exported_Functions_Group1 Power Supply Control Functions 451 * @{ 452 */ 453 HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource); 454 uint32_t HAL_PWREx_GetSupplyConfig(void); 455 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); 456 uint32_t HAL_PWREx_GetVoltageRange(void); 457 HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling); 458 uint32_t HAL_PWREx_GetStopModeVoltageRange(void); 459 460 /** 461 * @} 462 */ 463 464 /** @addtogroup PWREx_Exported_Functions_Group2 Voltage Monitoring Functions 465 * @{ 466 */ 467 void HAL_PWREx_ConfigAVD(const PWREx_AVDTypeDef *sConfigAVD); 468 void HAL_PWREx_EnableAVD(void); 469 void HAL_PWREx_DisableAVD(void); 470 #if defined (PWR_USBSCR_USB33DEN) 471 void HAL_PWREx_EnableUSBVoltageDetector(void); 472 void HAL_PWREx_DisableUSBVoltageDetector(void); 473 void HAL_PWREx_EnableVddUSB(void); 474 void HAL_PWREx_DisableVddUSB(void); 475 #endif /* PWR_USBSCR_USB33DEN */ 476 void HAL_PWREx_EnableMonitoring(void); 477 void HAL_PWREx_DisableMonitoring(void); 478 void HAL_PWREx_EnableUCPDStandbyMode(void); 479 void HAL_PWREx_DisableUCPDStandbyMode(void); 480 void HAL_PWREx_EnableUCPDDeadBattery(void); 481 void HAL_PWREx_DisableUCPDDeadBattery(void); 482 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue); 483 void HAL_PWREx_DisableBatteryCharging(void); 484 void HAL_PWREx_EnableAnalogBooster(void); 485 void HAL_PWREx_DisableAnalogBooster(void); 486 void HAL_PWREx_PVD_AVD_IRQHandler(void); 487 void HAL_PWREx_PVD_AVD_Rising_Callback(void); 488 void HAL_PWREx_PVD_AVD_Falling_Callback(void); 489 490 /** 491 * @} 492 */ 493 494 /** @addtogroup PWREx_Exported_Functions_Group3 Wakeup Pins configuration functions 495 * @{ 496 */ 497 498 void HAL_PWREx_EnableWakeUpPin(const PWREx_WakeupPinTypeDef *sPinParams); 499 void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPinx); 500 501 /** 502 * @} 503 */ 504 505 /** @addtogroup PWREx_Exported_Functions_Group4 Memories Retention Functions 506 * @{ 507 */ 508 void HAL_PWREx_EnableFlashPowerDown(void); 509 void HAL_PWREx_DisableFlashPowerDown(void); 510 void HAL_PWREx_EnableMemoryShutOff(uint32_t MemoryBlock); 511 void HAL_PWREx_DisableMemoryShutOff(uint32_t MemoryBlock); 512 HAL_StatusTypeDef HAL_PWREx_EnableBkupRAMRetention(void); 513 void HAL_PWREx_DisableBkupRAMRetention(void); 514 515 /** 516 * @} 517 */ 518 519 /** @addtogroup PWREx_Exported_Functions_Group5 IO/JTAG Retention Functions 520 * @{ 521 */ 522 void HAL_PWREx_EnableStandbyIORetention(void); 523 void HAL_PWREx_DisableStandbyIORetention(void); 524 void HAL_PWREx_EnableStandbyJTAGIORetention(void); 525 void HAL_PWREx_DisableStandbyJTAGIORetention(void); 526 527 /** 528 * @} 529 */ 530 531 /** 532 * @} 533 */ 534 535 /** 536 * @} 537 */ 538 539 /** 540 * @} 541 */ 542 543 #ifdef __cplusplus 544 } 545 #endif /* __cplusplus */ 546 547 548 #endif /* STM32H5xx_HAL_PWR_EX_H */ 549
