1 /**
2 ******************************************************************************
3 * @file stm32h5xx_hal_pcd.h
4 * @author MCD Application Team
5 * @brief Header file of PCD HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2022 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32H5xx_HAL_PCD_H
21 #define STM32H5xx_HAL_PCD_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32h5xx_ll_usb.h"
29
30 #if defined (USB_DRD_FS)
31
32 /** @addtogroup STM32H5xx_HAL_Driver
33 * @{
34 */
35
36 /** @addtogroup PCD
37 * @{
38 */
39
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup PCD_Exported_Types PCD Exported Types
42 * @{
43 */
44
45 /**
46 * @brief PCD State structure definition
47 */
48 typedef enum
49 {
50 HAL_PCD_STATE_RESET = 0x00,
51 HAL_PCD_STATE_READY = 0x01,
52 HAL_PCD_STATE_ERROR = 0x02,
53 HAL_PCD_STATE_BUSY = 0x03,
54 HAL_PCD_STATE_TIMEOUT = 0x04
55 } PCD_StateTypeDef;
56
57 /* Device LPM suspend state */
58 typedef enum
59 {
60 LPM_L0 = 0x00, /* on */
61 LPM_L1 = 0x01, /* LPM L1 sleep */
62 LPM_L2 = 0x02, /* suspend */
63 LPM_L3 = 0x03, /* off */
64 } PCD_LPM_StateTypeDef;
65
66 typedef enum
67 {
68 PCD_LPM_L0_ACTIVE = 0x00, /* on */
69 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70 } PCD_LPM_MsgTypeDef;
71
72 typedef enum
73 {
74 PCD_BCD_ERROR = 0xFF,
75 PCD_BCD_CONTACT_DETECTION = 0xFE,
76 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
77 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
78 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
79 PCD_BCD_DISCOVERY_COMPLETED = 0x00,
80
81 } PCD_BCD_MsgTypeDef;
82
83 typedef USB_DRD_TypeDef PCD_TypeDef;
84 typedef USB_DRD_CfgTypeDef PCD_InitTypeDef;
85 typedef USB_DRD_EPTypeDef PCD_EPTypeDef;
86
87 /**
88 * @brief PCD Handle Structure definition
89 */
90 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
91 typedef struct __PCD_HandleTypeDef
92 #else
93 typedef struct
94 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
95 {
96 PCD_TypeDef *Instance; /*!< Register base address */
97 PCD_InitTypeDef Init; /*!< PCD required parameters */
98 __IO uint8_t USB_Address; /*!< USB Address */
99 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
100 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
101 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
102 __IO PCD_StateTypeDef State; /*!< PCD communication state */
103 __IO uint32_t ErrorCode; /*!< PCD Error code */
104 uint32_t Setup[12]; /*!< Setup packet buffer */
105 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
106 uint32_t BESL;
107
108
109 uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
110 This parameter can be set to ENABLE or DISABLE */
111
112 uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
113 This parameter can be set to ENABLE or DISABLE */
114 void *pData; /*!< Pointer to upper stack Handler */
115
116 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
117 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
118 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
119 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
120 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
121 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
122 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
123 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
124
125 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
126 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
127 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
128 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
129 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
130 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
131
132 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
133 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
134 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
135 } PCD_HandleTypeDef;
136
137 /**
138 * @}
139 */
140
141 /* Include PCD HAL Extended module */
142 #include "stm32h5xx_hal_pcd_ex.h"
143
144 /* Exported constants --------------------------------------------------------*/
145 /** @defgroup PCD_Exported_Constants PCD Exported Constants
146 * @{
147 */
148
149 /** @defgroup PCD_Speed PCD Speed
150 * @{
151 */
152 #define PCD_SPEED_FULL USBD_FS_SPEED
153 /**
154 * @}
155 */
156
157 /** @defgroup PCD_PHY_Module PCD PHY Module
158 * @{
159 */
160 #define PCD_PHY_ULPI 1U
161 #define PCD_PHY_EMBEDDED 2U
162 #define PCD_PHY_UTMI 3U
163 /**
164 * @}
165 */
166
167 /** @defgroup PCD_Error_Code_definition PCD Error Code definition
168 * @brief PCD Error Code definition
169 * @{
170 */
171 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
172 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
173 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
174
175 /**
176 * @}
177 */
178
179 /**
180 * @}
181 */
182
183 /* Exported macros -----------------------------------------------------------*/
184 /** @defgroup PCD_Exported_Macros PCD Exported Macros
185 * @brief macros to handle interrupts and specific clock configurations
186 * @{
187 */
188 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
189 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
190
191 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
192 ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
193
194
195 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\
196 &= (uint16_t)(~(__INTERRUPT__)))
197
198 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR2 |= USB_WAKEUP_EXTI_LINE
199 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR2 &= ~(USB_WAKEUP_EXTI_LINE)
200
201
202 /**
203 * @}
204 */
205
206 /* Exported functions --------------------------------------------------------*/
207 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
208 * @{
209 */
210
211 /* Initialization/de-initialization functions ********************************/
212 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
213 * @{
214 */
215 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
216 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
217 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
218 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
219
220 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
221 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
222 * @brief HAL USB OTG PCD Callback ID enumeration definition
223 * @{
224 */
225 typedef enum
226 {
227 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
228 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
229 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
230 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
231 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
232 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
233 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
234
235 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
236 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
237
238 } HAL_PCD_CallbackIDTypeDef;
239 /**
240 * @}
241 */
242
243 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
244 * @brief HAL USB OTG PCD Callback pointer definition
245 * @{
246 */
247
248 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
249 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
250 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
251 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
252 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
253 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
254 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
255
256 /**
257 * @}
258 */
259
260 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
261 pPCD_CallbackTypeDef pCallback);
262
263 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
264
265 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
266 pPCD_DataOutStageCallbackTypeDef pCallback);
267
268 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
269
270 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
271 pPCD_DataInStageCallbackTypeDef pCallback);
272
273 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
274
275 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
276 pPCD_IsoOutIncpltCallbackTypeDef pCallback);
277
278 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
279
280 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
281 pPCD_IsoInIncpltCallbackTypeDef pCallback);
282
283 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
284
285 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
286 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
287
288 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
289 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
290 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
291 /**
292 * @}
293 */
294
295 /* I/O operation functions ***************************************************/
296 /* Non-Blocking mode: Interrupt */
297 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
298 * @{
299 */
300 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
301 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
302 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
303
304 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
305 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
306 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
307 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
308 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
309 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
310 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
311
312 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
313 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
314 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
315 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
316 /**
317 * @}
318 */
319
320 /* Peripheral Control functions **********************************************/
321 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
322 * @{
323 */
324 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
325 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
326 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
327 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
328 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
329 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
330 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
331 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
332 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
333 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
334 HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
335 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
336 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
337 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
338 /**
339 * @}
340 */
341
342 /* Peripheral State functions ************************************************/
343 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
344 * @{
345 */
346 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
347 /**
348 * @}
349 */
350
351 /**
352 * @}
353 */
354
355 /* Private constants ---------------------------------------------------------*/
356 /** @defgroup PCD_Private_Constants PCD Private Constants
357 * @{
358 */
359 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
360 * @{
361 */
362
363
364 #define USB_WAKEUP_EXTI_LINE (0x1U << 15) /*!< USB FS EXTI Line WakeUp Interrupt */
365
366
367 /**
368 * @}
369 */
370
371 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
372 * @{
373 */
374 #define PCD_EP0MPS_64 EP_MPS_64
375 #define PCD_EP0MPS_32 EP_MPS_32
376 #define PCD_EP0MPS_16 EP_MPS_16
377 #define PCD_EP0MPS_08 EP_MPS_8
378 /**
379 * @}
380 */
381
382 /** @defgroup PCD_ENDP PCD ENDP
383 * @{
384 */
385 #define PCD_ENDP0 0U
386 #define PCD_ENDP1 1U
387 #define PCD_ENDP2 2U
388 #define PCD_ENDP3 3U
389 #define PCD_ENDP4 4U
390 #define PCD_ENDP5 5U
391 #define PCD_ENDP6 6U
392 #define PCD_ENDP7 7U
393 /**
394 * @}
395 */
396
397 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
398 * @{
399 */
400 #define PCD_SNG_BUF 0U
401 #define PCD_DBL_BUF 1U
402 /**
403 * @}
404 */
405
406 /**
407 * @}
408 */
409
410 /* Private macros ------------------------------------------------------------*/
411 /** @defgroup PCD_Private_Macros PCD Private Macros
412 * @{
413 */
414
415 /* PMA RX counter */
416 #ifndef PCD_RX_PMA_CNT
417 #define PCD_RX_PMA_CNT 10U
418 #endif /* PCD_RX_PMA_CNT */
419
420 /* SetENDPOINT */
421 #define PCD_SET_ENDPOINT USB_DRD_SET_CHEP
422
423 /* GetENDPOINT Register value*/
424 #define PCD_GET_ENDPOINT USB_DRD_GET_CHEP
425
426
427 /**
428 * @brief free buffer used from the application realizing it to the line
429 * toggles bit SW_BUF in the double buffered endpoint register
430 * @param USBx USB device.
431 * @param bEpNum, bDir
432 * @retval None
433 */
434 #define PCD_FREE_USER_BUFFER USB_DRD_FREE_USER_BUFFER
435
436 /**
437 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
438 * @param USBx USB peripheral instance register address.
439 * @param bEpNum Endpoint Number.
440 * @param wState new state
441 * @retval None
442 */
443 #define PCD_SET_EP_TX_STATUS USB_DRD_SET_CHEP_TX_STATUS
444
445 /**
446 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
447 * @param USBx USB peripheral instance register address.
448 * @param bEpNum Endpoint Number.
449 * @param wState new state
450 * @retval None
451 */
452 #define PCD_SET_EP_RX_STATUS USB_DRD_SET_CHEP_RX_STATUS
453
454 /**
455 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
456 * @param USBx USB peripheral instance register address.
457 * @param bEpNum Endpoint Number.
458 * @retval None
459 */
460 #define PCD_SET_EP_KIND USB_DRD_SET_CHEP_KIND
461 #define PCD_CLEAR_EP_KIND USB_DRD_CLEAR_CHEP_KIND
462 #define PCD_SET_BULK_EP_DBUF PCD_SET_EP_KIND
463 #define PCD_CLEAR_BULK_EP_DBUF PCD_CLEAR_EP_KIND
464
465
466 /**
467 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
468 * @param USBx USB peripheral instance register address.
469 * @param bEpNum Endpoint Number.
470 * @retval None
471 */
472 #define PCD_CLEAR_RX_EP_CTR USB_DRD_CLEAR_RX_CHEP_CTR
473 #define PCD_CLEAR_TX_EP_CTR USB_DRD_CLEAR_TX_CHEP_CTR
474 /**
475 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
476 * @param USBx USB peripheral instance register address.
477 * @param bEpNum Endpoint Number.
478 * @retval None
479 */
480 #define PCD_RX_DTOG USB_DRD_RX_DTOG
481 #define PCD_TX_DTOG USB_DRD_TX_DTOG
482 /**
483 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
484 * @param USBx USB peripheral instance register address.
485 * @param bEpNum Endpoint Number.
486 * @retval None
487 */
488 #define PCD_CLEAR_RX_DTOG USB_DRD_CLEAR_RX_DTOG
489 #define PCD_CLEAR_TX_DTOG USB_DRD_CLEAR_TX_DTOG
490
491 /**
492 * @brief Sets address in an endpoint register.
493 * @param USBx USB peripheral instance register address.
494 * @param bEpNum Endpoint Number.
495 * @param bAddr Address.
496 * @retval None
497 */
498 #define PCD_SET_EP_ADDRESS USB_DRD_SET_CHEP_ADDRESS
499
500 /**
501 * @brief sets address of the tx/rx buffer.
502 * @param USBx USB peripheral instance register address.
503 * @param bEpNum Endpoint Number.
504 * @param wAddr address to be set (must be word aligned).
505 * @retval None
506 */
507 #define PCD_SET_EP_TX_ADDRESS USB_DRD_SET_CHEP_TX_ADDRESS
508 #define PCD_SET_EP_RX_ADDRESS USB_DRD_SET_CHEP_RX_ADDRESS
509
510 /**
511 * @brief sets counter for the tx/rx buffer.
512 * @param USBx USB peripheral instance register address.
513 * @param bEpNum Endpoint Number.
514 * @param wCount Counter value.
515 * @retval None
516 */
517 #define PCD_SET_EP_TX_CNT USB_DRD_SET_CHEP_TX_CNT
518 #define PCD_SET_EP_RX_CNT USB_DRD_SET_CHEP_RX_CNT
519
520 /**
521 * @brief gets counter of the tx buffer.
522 * @param USBx USB peripheral instance register address.
523 * @param bEpNum Endpoint Number.
524 * @retval Counter value
525 */
526 #define PCD_GET_EP_TX_CNT USB_DRD_GET_CHEP_TX_CNT
527
528 /**
529 * @brief gets counter of the rx buffer.
530 * @param Instance USB peripheral instance register address.
531 * @param bEpNum channel Number.
532 * @retval Counter value
533 */
PCD_GET_EP_RX_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)534 __STATIC_INLINE uint16_t PCD_GET_EP_RX_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
535 {
536 UNUSED(Instance);
537 __IO uint32_t count = PCD_RX_PMA_CNT;
538
539 /* WA: few cycles for RX PMA descriptor to update */
540 while (count > 0U)
541 {
542 count--;
543 }
544
545 return (uint16_t)USB_DRD_GET_CHEP_RX_CNT((Instance), (bEpNum));
546 }
547
548 /**
549 * @brief Sets addresses in a double buffer endpoint.
550 * @param USBx USB peripheral instance register address.
551 * @param bEpNum Endpoint Number.
552 * @param wBuf0Addr: buffer 0 address.
553 * @param wBuf1Addr = buffer 1 address.
554 * @retval None
555 */
556 #define PCD_SET_EP_DBUF_ADDR USB_DRD_SET_CHEP_DBUF_ADDR
557
558 /**
559 * @brief Gets buffer 0/1 address of a double buffer endpoint.
560 * @param USBx USB peripheral instance register address.
561 * @param bEpNum Endpoint Number.
562 * @param bDir endpoint dir EP_DBUF_OUT = OUT
563 * EP_DBUF_IN = IN
564 * @param wCount: Counter value
565 * @retval None
566 */
567 #define PCD_SET_EP_DBUF0_CNT USB_DRD_SET_CHEP_DBUF0_CNT
568 #define PCD_SET_EP_DBUF1_CNT USB_DRD_SET_CHEP_DBUF1_CNT
569 #define PCD_SET_EP_DBUF_CNT USB_DRD_SET_CHEP_DBUF_CNT
570
571 /**
572 * @brief gets counter of the rx buffer0.
573 * @param Instance USB peripheral instance register address.
574 * @param bEpNum channel Number.
575 * @retval Counter value
576 */
PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)577 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
578 {
579 UNUSED(Instance);
580 __IO uint32_t count = PCD_RX_PMA_CNT;
581
582 /* WA: few cycles for RX PMA descriptor to update */
583 while (count > 0U)
584 {
585 count--;
586 }
587
588 return (uint16_t)USB_DRD_GET_CHEP_DBUF0_CNT((Instance), (bEpNum));
589 }
590
591 /**
592 * @brief gets counter of the rx buffer1.
593 * @param Instance USB peripheral instance register address.
594 * @param bEpNum channel Number.
595 * @retval Counter value
596 */
PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)597 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
598 {
599 UNUSED(Instance);
600 __IO uint32_t count = PCD_RX_PMA_CNT;
601
602 /* WA: few cycles for RX PMA descriptor to update */
603 while (count > 0U)
604 {
605 count--;
606 }
607
608 return (uint16_t)USB_DRD_GET_CHEP_DBUF1_CNT((Instance), (bEpNum));
609 }
610
611
612 /**
613 * @}
614 */
615
616 /**
617 * @}
618 */
619
620 /**
621 * @}
622 */
623 #endif /* defined (USB_DRD_FS) */
624
625 #ifdef __cplusplus
626 }
627 #endif
628
629 #endif /* STM32H5xx_HAL_PCD_H */
630
