1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_mmc.h 4 * @author MCD Application Team 5 * @brief Header file of MMC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_MMC_H 21 #define STM32H5xx_HAL_MMC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_ll_sdmmc.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 #if defined (SDMMC1) || defined (SDMMC2) 34 35 /** @addtogroup MMC 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup MMC_Exported_Types MMC Exported Types 41 * @{ 42 */ 43 44 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 45 * @{ 46 */ 47 typedef enum 48 { 49 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 50 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 51 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 52 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 53 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 54 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 55 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */ 56 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 57 } HAL_MMC_StateTypeDef; 58 /** 59 * @} 60 */ 61 62 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 63 * @{ 64 */ 65 typedef uint32_t HAL_MMC_CardStateTypeDef; 66 67 #define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */ 68 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready (can't be checked by CMD13) */ 69 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */ 70 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 71 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 72 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 73 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 74 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 75 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 76 #define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */ 77 #define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */ 78 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */ 79 /** 80 * @} 81 */ 82 83 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 84 * @{ 85 */ 86 #define MMC_InitTypeDef SDMMC_InitTypeDef 87 #define MMC_TypeDef SDMMC_TypeDef 88 89 /** 90 * @brief MMC Card Information Structure definition 91 */ 92 typedef struct 93 { 94 uint32_t CardType; /*!< Specifies the card Type */ 95 96 uint32_t Class; /*!< Specifies the class of the card class */ 97 98 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 99 100 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 101 102 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 103 104 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 105 106 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 107 108 } HAL_MMC_CardInfoTypeDef; 109 110 /** 111 * @brief MMC handle Structure definition 112 */ 113 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 114 typedef struct __MMC_HandleTypeDef 115 #else 116 typedef struct 117 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 118 { 119 MMC_TypeDef *Instance; /*!< MMC registers base address */ 120 121 MMC_InitTypeDef Init; /*!< MMC required parameters */ 122 123 HAL_LockTypeDef Lock; /*!< MMC locking object */ 124 125 const uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 126 127 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 128 129 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 130 131 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 132 133 __IO uint32_t Context; /*!< MMC transfer context */ 134 135 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 136 137 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 138 139 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 140 141 uint32_t CSD[4U]; /*!< MMC card specific data table */ 142 143 uint32_t CID[4U]; /*!< MMC card identification number table */ 144 145 uint32_t Ext_CSD[128]; 146 147 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 148 void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 149 void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 150 void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc); 151 void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 152 void (* Read_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 153 void (* Write_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 154 155 void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc); 156 void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc); 157 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 158 } MMC_HandleTypeDef; 159 160 161 /** 162 * @} 163 */ 164 165 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 166 * @{ 167 */ 168 typedef struct 169 { 170 __IO uint8_t CSDStruct; /*!< CSD structure */ 171 __IO uint8_t SysSpecVersion; /*!< System specification version */ 172 __IO uint8_t Reserved1; /*!< Reserved */ 173 __IO uint8_t TAAC; /*!< Data read access time 1 */ 174 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 175 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 176 __IO uint16_t CardComdClasses; /*!< Card command classes */ 177 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 178 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 179 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 180 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 181 __IO uint8_t DSRImpl; /*!< DSR implemented */ 182 __IO uint8_t Reserved2; /*!< Reserved */ 183 __IO uint32_t DeviceSize; /*!< Device Size */ 184 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 185 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 186 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 187 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 188 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 189 __IO uint8_t EraseGrSize; /*!< Erase group size */ 190 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 191 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 192 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 193 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 194 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 195 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 196 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 197 __IO uint8_t Reserved3; /*!< Reserved */ 198 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 199 __IO uint8_t FileFormatGroup; /*!< File format group */ 200 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 201 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 202 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 203 __IO uint8_t FileFormat; /*!< File format */ 204 __IO uint8_t ECC; /*!< ECC code */ 205 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 206 __IO uint8_t Reserved4; /*!< Always 1 */ 207 208 } HAL_MMC_CardCSDTypeDef; 209 /** 210 * @} 211 */ 212 213 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 214 * @{ 215 */ 216 typedef struct 217 { 218 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 219 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 220 __IO uint32_t ProdName1; /*!< Product Name part1 */ 221 __IO uint8_t ProdName2; /*!< Product Name part2 */ 222 __IO uint8_t ProdRev; /*!< Product Revision */ 223 __IO uint32_t ProdSN; /*!< Product Serial Number */ 224 __IO uint8_t Reserved1; /*!< Reserved1 */ 225 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 226 __IO uint8_t CID_CRC; /*!< CID CRC */ 227 __IO uint8_t Reserved2; /*!< Always 1 */ 228 229 } HAL_MMC_CardCIDTypeDef; 230 /** 231 * @} 232 */ 233 234 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 235 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 236 * @{ 237 */ 238 typedef enum 239 { 240 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 241 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 242 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 243 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 244 HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID = 0x04U, /*!< MMC DMA Rx Linked List Node buffer Callback ID */ 245 HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID = 0x05U, /*!< MMC DMA Tx Linked List Node buffer Callback ID */ 246 247 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 248 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 249 } HAL_MMC_CallbackIDTypeDef; 250 /** 251 * @} 252 */ 253 254 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 255 * @{ 256 */ 257 typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc); 258 /** 259 * @} 260 */ 261 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 262 /** 263 * @} 264 */ 265 266 /* Exported constants --------------------------------------------------------*/ 267 /** @defgroup MMC_Exported_Constants Exported Constants 268 * @{ 269 */ 270 271 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 272 273 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 274 * @{ 275 */ 276 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 277 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 278 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 279 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 280 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 281 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 282 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 283 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 284 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ 285 /*!< number of transferred bytes does not match the block length */ 286 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 287 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 288 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 289 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ 290 /*!< command or if there was an attempt to access a locked card */ 291 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 292 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 293 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 294 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 295 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 296 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 297 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 298 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 299 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 300 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 301 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ 302 /*!< of erase sequence command was received */ 303 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 304 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 305 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 306 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 307 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 308 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 309 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 310 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 311 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 312 313 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 314 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 315 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 316 /** 317 * @} 318 */ 319 320 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 321 * @{ 322 */ 323 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 324 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 325 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 326 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 327 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 328 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 329 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 330 331 /** 332 * @} 333 */ 334 335 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 336 * @{ 337 */ 338 /** 339 * @brief 340 */ 341 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 342 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 343 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 344 #define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 345 #define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 346 #define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 347 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 348 /** 349 * @} 350 */ 351 352 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 353 * @{ 354 */ 355 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 356 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 357 358 /** 359 * @} 360 */ 361 362 /** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type 363 * @{ 364 */ 365 #define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ 366 #define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ 367 #define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ 368 #define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ 369 #define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ 370 #define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ 371 372 #define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ 373 ((TYPE) == HAL_MMC_TRIM) || \ 374 ((TYPE) == HAL_MMC_DISCARD) || \ 375 ((TYPE) == HAL_MMC_SECURE_ERASE) || \ 376 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ 377 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) 378 /** 379 * @} 380 */ 381 382 /** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type 383 * @{ 384 */ 385 #define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ 386 #define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ 387 #define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ 388 #define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ 389 390 391 #define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ 392 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ 393 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ 394 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) 395 /** 396 * @} 397 */ 398 399 /** 400 * @} 401 */ 402 403 /* Exported macro ------------------------------------------------------------*/ 404 /** @defgroup MMC_Exported_macros MMC Exported Macros 405 * @brief macros to handle interrupts and specific clock configurations 406 * @{ 407 */ 408 /** @brief Reset MMC handle state. 409 * @param __HANDLE__ MMC Handle. 410 * @retval None 411 */ 412 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 413 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 414 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 415 (__HANDLE__)->MspInitCallback = NULL; \ 416 (__HANDLE__)->MspDeInitCallback = NULL; \ 417 } while(0) 418 #else 419 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 420 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 421 422 /** 423 * @brief Enable the MMC device interrupt. 424 * @param __HANDLE__ MMC Handle. 425 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 426 * This parameter can be one or a combination of the following values: 427 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 428 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 429 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 430 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 431 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 432 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 433 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 434 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 435 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 436 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 437 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 438 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 439 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 440 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 441 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 442 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 443 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 444 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 445 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 446 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 447 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 448 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 449 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 450 * @retval None 451 */ 452 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 453 454 /** 455 * @brief Disable the MMC device interrupt. 456 * @param __HANDLE__ MMC Handle. 457 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 458 * This parameter can be one or a combination of the following values: 459 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 460 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 461 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 462 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 463 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 464 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 465 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 466 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 467 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 468 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 469 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 470 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 471 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 472 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 473 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 474 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 475 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 476 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 477 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 478 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 479 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 480 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 481 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 482 * @retval None 483 */ 484 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 485 486 /** 487 * @brief Check whether the specified MMC flag is set or not. 488 * @param __HANDLE__ MMC Handle. 489 * @param __FLAG__ specifies the flag to check. 490 * This parameter can be one of the following values: 491 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 492 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 493 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 494 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 495 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 496 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 497 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 498 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 499 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 500 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 501 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 502 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 503 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 504 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 505 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 506 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 507 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 508 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 509 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 510 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 511 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 512 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 513 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 514 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 515 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 516 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 517 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 518 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 519 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 520 * @retval The new state of MMC FLAG (SET or RESET). 521 */ 522 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 523 524 /** 525 * @brief Clear the MMC's pending flags. 526 * @param __HANDLE__ MMC Handle. 527 * @param __FLAG__ specifies the flag to clear. 528 * This parameter can be one or a combination of the following values: 529 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 530 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 531 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 532 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 533 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 534 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 535 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 536 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 537 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 538 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 539 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 540 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 541 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 542 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 543 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 544 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 545 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 546 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 547 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 548 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 549 * @retval None 550 */ 551 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 552 553 /** 554 * @brief Check whether the specified MMC interrupt has occurred or not. 555 * @param __HANDLE__ MMC Handle. 556 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 557 * This parameter can be one of the following values: 558 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 559 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 560 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 561 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 562 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 563 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 564 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 565 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 566 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 567 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 568 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 569 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 570 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 571 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 572 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 573 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 574 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 575 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 576 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 577 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 578 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 579 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 580 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 581 * @retval The new state of MMC IT (SET or RESET). 582 */ 583 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 584 585 /** 586 * @brief Clear the MMC's interrupt pending bits. 587 * @param __HANDLE__ MMC Handle. 588 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 589 * This parameter can be one or a combination of the following values: 590 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 591 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 592 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 593 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 594 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 595 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 596 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 597 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 598 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 599 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 600 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 601 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 602 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 603 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 604 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 605 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 606 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 607 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 608 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 609 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 610 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 611 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 612 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 613 * @retval None 614 */ 615 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 616 617 /** 618 * @} 619 */ 620 621 /* Include MMC HAL Extension module */ 622 #include "stm32h5xx_hal_mmc_ex.h" 623 624 /* Exported functions --------------------------------------------------------*/ 625 /** @defgroup MMC_Exported_Functions MMC Exported Functions 626 * @{ 627 */ 628 629 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions 630 * @{ 631 */ 632 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 633 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 634 HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc); 635 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 636 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 637 638 /** 639 * @} 640 */ 641 642 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 643 * @{ 644 */ 645 /* Blocking mode: Polling */ 646 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 647 uint32_t NumberOfBlocks, 648 uint32_t Timeout); 649 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 650 uint32_t NumberOfBlocks, uint32_t Timeout); 651 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 652 /* Non-Blocking mode: IT */ 653 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 654 uint32_t NumberOfBlocks); 655 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 656 uint32_t NumberOfBlocks); 657 /* Non-Blocking mode: DMA */ 658 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 659 uint32_t NumberOfBlocks); 660 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd, 661 uint32_t NumberOfBlocks); 662 663 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 664 665 /* Callback in non blocking modes (DMA) */ 666 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 667 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 668 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 669 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 670 671 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 672 /* MMC callback registering/unregistering */ 673 HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, 674 pMMC_CallbackTypeDef pCallback); 675 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 676 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 677 /** 678 * @} 679 */ 680 681 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 682 * @{ 683 */ 684 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 685 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 686 /** 687 * @} 688 */ 689 690 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 691 * @{ 692 */ 693 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 694 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 695 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 696 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 697 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 698 /** 699 * @} 700 */ 701 702 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 703 * @{ 704 */ 705 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 706 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 707 /** 708 * @} 709 */ 710 711 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 712 * @{ 713 */ 714 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 715 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 716 /** 717 * @} 718 */ 719 720 /** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management 721 * @{ 722 */ 723 HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, 724 uint32_t BlockEndAdd); 725 HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); 726 HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); 727 HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); 728 /** 729 * @} 730 */ 731 732 /** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management 733 * @{ 734 */ 735 HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc); 736 HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc); 737 /** 738 * @} 739 */ 740 /* Private types -------------------------------------------------------------*/ 741 /** @defgroup MMC_Private_Types MMC Private Types 742 * @{ 743 */ 744 745 /** 746 * @} 747 */ 748 749 /* Private defines -----------------------------------------------------------*/ 750 /** @defgroup MMC_Private_Defines MMC Private Defines 751 * @{ 752 */ 753 #define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61 754 #define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8 755 /** 756 * @} 757 */ 758 759 /* Private variables ---------------------------------------------------------*/ 760 /** @defgroup MMC_Private_Variables MMC Private Variables 761 * @{ 762 */ 763 764 /** 765 * @} 766 */ 767 768 /* Private constants ---------------------------------------------------------*/ 769 /** @defgroup MMC_Private_Constants MMC Private Constants 770 * @{ 771 */ 772 773 /** 774 * @} 775 */ 776 777 /* Private macros ------------------------------------------------------------*/ 778 /** @defgroup MMC_Private_Macros MMC Private Macros 779 * @{ 780 */ 781 782 /** 783 * @} 784 */ 785 786 /* Private functions prototypes ----------------------------------------------*/ 787 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 788 * @{ 789 */ 790 791 /** 792 * @} 793 */ 794 795 /* Private functions ---------------------------------------------------------*/ 796 /** @defgroup MMC_Private_Functions MMC Private Functions 797 * @{ 798 */ 799 800 /** 801 * @} 802 */ 803 804 805 /** 806 * @} 807 */ 808 809 /** 810 * @} 811 */ 812 #endif /* SDMMC1 || SDMMC2 */ 813 814 /** 815 * @} 816 */ 817 818 #ifdef __cplusplus 819 } 820 #endif 821 822 823 #endif /* STM32H5xx_HAL_MMC_H */ 824
