1 /** 2 ****************************************************************************** 3 * @file stm32h5xx_hal_i2c.h 4 * @author MCD Application Team 5 * @brief Header file of I2C HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H5xx_HAL_I2C_H 21 #define STM32H5xx_HAL_I2C_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h5xx_hal_def.h" 29 30 /** @addtogroup STM32H5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup I2C 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup I2C_Exported_Types I2C Exported Types 40 * @{ 41 */ 42 43 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 44 * @brief I2C Configuration Structure definition 45 * @{ 46 */ 47 typedef struct 48 { 49 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. 50 This parameter calculated by referring to I2C initialization section 51 in Reference manual */ 52 53 uint32_t OwnAddress1; /*!< Specifies the first device own address. 54 This parameter can be a 7-bit or 10-bit address. */ 55 56 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 57 This parameter can be a value of @ref I2C_ADDRESSING_MODE */ 58 59 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 60 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ 61 62 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 63 This parameter can be a 7-bit address. */ 64 65 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing 66 mode is selected. 67 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ 68 69 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 70 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ 71 72 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 73 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ 74 75 } I2C_InitTypeDef; 76 77 /** 78 * @} 79 */ 80 81 /** @defgroup HAL_state_structure_definition HAL state structure definition 82 * @brief HAL State structure definition 83 * @note HAL I2C State value coding follow below described bitmap :\n 84 * b7-b6 Error information\n 85 * 00 : No Error\n 86 * 01 : Abort (Abort user request on going)\n 87 * 10 : Timeout\n 88 * 11 : Error\n 89 * b5 Peripheral initialization status\n 90 * 0 : Reset (peripheral not initialized)\n 91 * 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n 92 * b4 (not used)\n 93 * x : Should be set to 0\n 94 * b3\n 95 * 0 : Ready or Busy (No Listen mode ongoing)\n 96 * 1 : Listen (peripheral in Address Listen Mode)\n 97 * b2 Intrinsic process state\n 98 * 0 : Ready\n 99 * 1 : Busy (peripheral busy with some configuration or internal operations)\n 100 * b1 Rx state\n 101 * 0 : Ready (no Rx operation ongoing)\n 102 * 1 : Busy (Rx operation ongoing)\n 103 * b0 Tx state\n 104 * 0 : Ready (no Tx operation ongoing)\n 105 * 1 : Busy (Tx operation ongoing) 106 * @{ 107 */ 108 typedef enum 109 { 110 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 111 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 112 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 113 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 114 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 115 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 116 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 117 process is ongoing */ 118 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 119 process is ongoing */ 120 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 121 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ 122 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ 123 124 } HAL_I2C_StateTypeDef; 125 126 /** 127 * @} 128 */ 129 130 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 131 * @brief HAL Mode structure definition 132 * @note HAL I2C Mode value coding follow below described bitmap :\n 133 * b7 (not used)\n 134 * x : Should be set to 0\n 135 * b6\n 136 * 0 : None\n 137 * 1 : Memory (HAL I2C communication is in Memory Mode)\n 138 * b5\n 139 * 0 : None\n 140 * 1 : Slave (HAL I2C communication is in Slave Mode)\n 141 * b4\n 142 * 0 : None\n 143 * 1 : Master (HAL I2C communication is in Master Mode)\n 144 * b3-b2-b1-b0 (not used)\n 145 * xxxx : Should be set to 0000 146 * @{ 147 */ 148 typedef enum 149 { 150 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 151 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 152 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 153 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 154 155 } HAL_I2C_ModeTypeDef; 156 157 /** 158 * @} 159 */ 160 161 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 162 * @brief I2C Error Code definition 163 * @{ 164 */ 165 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ 166 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 167 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 168 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 169 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 170 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 171 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 172 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 173 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 174 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 175 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 176 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 177 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ 178 /** 179 * @} 180 */ 181 182 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 183 * @brief I2C handle Structure definition 184 * @{ 185 */ 186 typedef struct __I2C_HandleTypeDef 187 { 188 I2C_TypeDef *Instance; /*!< I2C registers base address */ 189 190 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 191 192 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 193 194 uint16_t XferSize; /*!< I2C transfer size */ 195 196 __IO uint16_t XferCount; /*!< I2C transfer counter */ 197 198 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can 199 be a value of @ref I2C_XFEROPTIONS */ 200 201 __IO uint32_t PreviousState; /*!< I2C communication Previous state */ 202 203 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); 204 /*!< I2C transfer IRQ handler function pointer */ 205 206 #if defined(HAL_DMA_MODULE_ENABLED) 207 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 208 209 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 210 211 #endif /*HAL_DMA_MODULE_ENABLED*/ 212 213 HAL_LockTypeDef Lock; /*!< I2C locking object */ 214 215 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 216 217 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 218 219 __IO uint32_t ErrorCode; /*!< I2C Error code */ 220 221 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ 222 223 __IO uint32_t Devaddress; /*!< I2C Target device address */ 224 225 __IO uint32_t Memaddress; /*!< I2C Target memory address */ 226 227 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 228 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 229 /*!< I2C Master Tx Transfer completed callback */ 230 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 231 /*!< I2C Master Rx Transfer completed callback */ 232 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 233 /*!< I2C Slave Tx Transfer completed callback */ 234 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 235 /*!< I2C Slave Rx Transfer completed callback */ 236 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 237 /*!< I2C Listen Complete callback */ 238 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 239 /*!< I2C Memory Tx Transfer completed callback */ 240 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 241 /*!< I2C Memory Rx Transfer completed callback */ 242 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); 243 /*!< I2C Error callback */ 244 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 245 /*!< I2C Abort callback */ 246 247 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 248 /*!< I2C Slave Address Match callback */ 249 250 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); 251 /*!< I2C Msp Init callback */ 252 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); 253 /*!< I2C Msp DeInit callback */ 254 255 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 256 } I2C_HandleTypeDef; 257 258 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 259 /** 260 * @brief HAL I2C Callback ID enumeration definition 261 */ 262 typedef enum 263 { 264 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ 265 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ 266 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ 267 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ 268 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ 269 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ 270 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ 271 HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ 272 HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ 273 274 HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ 275 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ 276 277 } HAL_I2C_CallbackIDTypeDef; 278 279 /** 280 * @brief HAL I2C Callback pointer definition 281 */ 282 typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); 283 /*!< pointer to an I2C callback function */ 284 typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, 285 uint16_t AddrMatchCode); 286 /*!< pointer to an I2C Address Match callback function */ 287 288 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 289 /** 290 * @} 291 */ 292 293 /** 294 * @} 295 */ 296 /* Exported constants --------------------------------------------------------*/ 297 298 /** @defgroup I2C_Exported_Constants I2C Exported Constants 299 * @{ 300 */ 301 302 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options 303 * @{ 304 */ 305 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 306 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 307 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 308 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 309 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 310 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) 311 312 /* List of XferOptions in usage of : 313 * 1- Restart condition in all use cases (direction change or not) 314 */ 315 #define I2C_OTHER_FRAME (0x000000AAU) 316 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 317 /** 318 * @} 319 */ 320 321 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode 322 * @{ 323 */ 324 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 325 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 326 /** 327 * @} 328 */ 329 330 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode 331 * @{ 332 */ 333 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 334 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 335 /** 336 * @} 337 */ 338 339 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks 340 * @{ 341 */ 342 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 343 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 344 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 345 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 346 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 347 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 348 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 349 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 350 /** 351 * @} 352 */ 353 354 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode 355 * @{ 356 */ 357 #define I2C_GENERALCALL_DISABLE (0x00000000U) 358 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 359 /** 360 * @} 361 */ 362 363 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode 364 * @{ 365 */ 366 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 367 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 368 /** 369 * @} 370 */ 371 372 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size 373 * @{ 374 */ 375 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 376 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 377 /** 378 * @} 379 */ 380 381 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View 382 * @{ 383 */ 384 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 385 #define I2C_DIRECTION_RECEIVE (0x00000001U) 386 /** 387 * @} 388 */ 389 390 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode 391 * @{ 392 */ 393 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 394 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 395 #define I2C_SOFTEND_MODE (0x00000000U) 396 /** 397 * @} 398 */ 399 400 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode 401 * @{ 402 */ 403 #define I2C_NO_STARTSTOP (0x00000000U) 404 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) 405 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) 406 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) 407 /** 408 * @} 409 */ 410 411 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 412 * @brief I2C Interrupt definition 413 * Elements values convention: 0xXXXXXXXX 414 * - XXXXXXXX : Interrupt control mask 415 * @{ 416 */ 417 #define I2C_IT_ERRI I2C_CR1_ERRIE 418 #define I2C_IT_TCI I2C_CR1_TCIE 419 #define I2C_IT_STOPI I2C_CR1_STOPIE 420 #define I2C_IT_NACKI I2C_CR1_NACKIE 421 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 422 #define I2C_IT_RXI I2C_CR1_RXIE 423 #define I2C_IT_TXI I2C_CR1_TXIE 424 /** 425 * @} 426 */ 427 428 /** @defgroup I2C_Flag_definition I2C Flag definition 429 * @{ 430 */ 431 #define I2C_FLAG_TXE I2C_ISR_TXE 432 #define I2C_FLAG_TXIS I2C_ISR_TXIS 433 #define I2C_FLAG_RXNE I2C_ISR_RXNE 434 #define I2C_FLAG_ADDR I2C_ISR_ADDR 435 #define I2C_FLAG_AF I2C_ISR_NACKF 436 #define I2C_FLAG_STOPF I2C_ISR_STOPF 437 #define I2C_FLAG_TC I2C_ISR_TC 438 #define I2C_FLAG_TCR I2C_ISR_TCR 439 #define I2C_FLAG_BERR I2C_ISR_BERR 440 #define I2C_FLAG_ARLO I2C_ISR_ARLO 441 #define I2C_FLAG_OVR I2C_ISR_OVR 442 #define I2C_FLAG_PECERR I2C_ISR_PECERR 443 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 444 #define I2C_FLAG_ALERT I2C_ISR_ALERT 445 #define I2C_FLAG_BUSY I2C_ISR_BUSY 446 #define I2C_FLAG_DIR I2C_ISR_DIR 447 /** 448 * @} 449 */ 450 451 /** 452 * @} 453 */ 454 455 /* Exported macros -----------------------------------------------------------*/ 456 457 /** @defgroup I2C_Exported_Macros I2C Exported Macros 458 * @{ 459 */ 460 461 /** @brief Reset I2C handle state. 462 * @param __HANDLE__ specifies the I2C Handle. 463 * @retval None 464 */ 465 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 466 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 467 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ 468 (__HANDLE__)->MspInitCallback = NULL; \ 469 (__HANDLE__)->MspDeInitCallback = NULL; \ 470 } while(0) 471 #else 472 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 473 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 474 475 /** @brief Enable the specified I2C interrupt. 476 * @param __HANDLE__ specifies the I2C Handle. 477 * @param __INTERRUPT__ specifies the interrupt source to enable. 478 * This parameter can be one of the following values: 479 * @arg @ref I2C_IT_ERRI Errors interrupt enable 480 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 481 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 482 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 483 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 484 * @arg @ref I2C_IT_RXI RX interrupt enable 485 * @arg @ref I2C_IT_TXI TX interrupt enable 486 * 487 * @retval None 488 */ 489 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 490 491 /** @brief Disable the specified I2C interrupt. 492 * @param __HANDLE__ specifies the I2C Handle. 493 * @param __INTERRUPT__ specifies the interrupt source to disable. 494 * This parameter can be one of the following values: 495 * @arg @ref I2C_IT_ERRI Errors interrupt enable 496 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 497 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 498 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 499 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 500 * @arg @ref I2C_IT_RXI RX interrupt enable 501 * @arg @ref I2C_IT_TXI TX interrupt enable 502 * 503 * @retval None 504 */ 505 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 506 507 /** @brief Check whether the specified I2C interrupt source is enabled or not. 508 * @param __HANDLE__ specifies the I2C Handle. 509 * @param __INTERRUPT__ specifies the I2C interrupt source to check. 510 * This parameter can be one of the following values: 511 * @arg @ref I2C_IT_ERRI Errors interrupt enable 512 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 513 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 514 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 515 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 516 * @arg @ref I2C_IT_RXI RX interrupt enable 517 * @arg @ref I2C_IT_TXI TX interrupt enable 518 * 519 * @retval The new state of __INTERRUPT__ (SET or RESET). 520 */ 521 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \ 522 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 523 524 /** @brief Check whether the specified I2C flag is set or not. 525 * @param __HANDLE__ specifies the I2C Handle. 526 * @param __FLAG__ specifies the flag to check. 527 * This parameter can be one of the following values: 528 * @arg @ref I2C_FLAG_TXE Transmit data register empty 529 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status 530 * @arg @ref I2C_FLAG_RXNE Receive data register not empty 531 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 532 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 533 * @arg @ref I2C_FLAG_STOPF STOP detection flag 534 * @arg @ref I2C_FLAG_TC Transfer complete (master mode) 535 * @arg @ref I2C_FLAG_TCR Transfer complete reload 536 * @arg @ref I2C_FLAG_BERR Bus error 537 * @arg @ref I2C_FLAG_ARLO Arbitration lost 538 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 539 * @arg @ref I2C_FLAG_PECERR PEC error in reception 540 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 541 * @arg @ref I2C_FLAG_ALERT SMBus alert 542 * @arg @ref I2C_FLAG_BUSY Bus busy 543 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) 544 * 545 * @retval The new state of __FLAG__ (SET or RESET). 546 */ 547 #define I2C_FLAG_MASK (0x0001FFFFU) 548 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \ 549 (__FLAG__)) == (__FLAG__)) ? SET : RESET) 550 551 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. 552 * @param __HANDLE__ specifies the I2C Handle. 553 * @param __FLAG__ specifies the flag to clear. 554 * This parameter can be any combination of the following values: 555 * @arg @ref I2C_FLAG_TXE Transmit data register empty 556 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 557 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 558 * @arg @ref I2C_FLAG_STOPF STOP detection flag 559 * @arg @ref I2C_FLAG_BERR Bus error 560 * @arg @ref I2C_FLAG_ARLO Arbitration lost 561 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 562 * @arg @ref I2C_FLAG_PECERR PEC error in reception 563 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 564 * @arg @ref I2C_FLAG_ALERT SMBus alert 565 * 566 * @retval None 567 */ 568 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \ 569 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \ 570 ((__HANDLE__)->Instance->ICR = (__FLAG__))) 571 572 /** @brief Enable the specified I2C peripheral. 573 * @param __HANDLE__ specifies the I2C Handle. 574 * @retval None 575 */ 576 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 577 578 /** @brief Disable the specified I2C peripheral. 579 * @param __HANDLE__ specifies the I2C Handle. 580 * @retval None 581 */ 582 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 583 584 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. 585 * @param __HANDLE__ specifies the I2C Handle. 586 * @retval None 587 */ 588 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 589 /** 590 * @} 591 */ 592 593 /* Include I2C HAL Extended module */ 594 #include "stm32h5xx_hal_i2c_ex.h" 595 596 /* Exported functions --------------------------------------------------------*/ 597 /** @addtogroup I2C_Exported_Functions 598 * @{ 599 */ 600 601 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 602 * @{ 603 */ 604 /* Initialization and de-initialization functions******************************/ 605 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 606 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); 607 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 608 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 609 610 /* Callbacks Register/UnRegister functions ***********************************/ 611 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 612 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, 613 pI2C_CallbackTypeDef pCallback); 614 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); 615 616 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); 617 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); 618 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 619 /** 620 * @} 621 */ 622 623 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions 624 * @{ 625 */ 626 /* IO operation functions ****************************************************/ 627 /******* Blocking mode: Polling */ 628 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 629 uint16_t Size, uint32_t Timeout); 630 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 631 uint16_t Size, uint32_t Timeout); 632 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 633 uint32_t Timeout); 634 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 635 uint32_t Timeout); 636 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 637 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 638 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 639 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 640 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, 641 uint32_t Timeout); 642 643 /******* Non-Blocking mode: Interrupt */ 644 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 645 uint16_t Size); 646 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 647 uint16_t Size); 648 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 649 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 650 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 651 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 652 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 653 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 654 655 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 656 uint16_t Size, uint32_t XferOptions); 657 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 658 uint16_t Size, uint32_t XferOptions); 659 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 660 uint32_t XferOptions); 661 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 662 uint32_t XferOptions); 663 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 664 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 665 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 666 667 #if defined(HAL_DMA_MODULE_ENABLED) 668 /******* Non-Blocking mode: DMA */ 669 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 670 uint16_t Size); 671 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 672 uint16_t Size); 673 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 674 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 675 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 676 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 677 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 678 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 679 680 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 681 uint16_t Size, uint32_t XferOptions); 682 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 683 uint16_t Size, uint32_t XferOptions); 684 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 685 uint32_t XferOptions); 686 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 687 uint32_t XferOptions); 688 #endif /*HAL_DMA_MODULE_ENABLED*/ 689 /** 690 * @} 691 */ 692 693 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 694 * @{ 695 */ 696 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 697 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 698 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 699 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 700 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 701 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 702 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 703 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 704 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 705 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 706 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 707 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 708 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 709 /** 710 * @} 711 */ 712 713 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 714 * @{ 715 */ 716 /* Peripheral State, Mode and Error functions *********************************/ 717 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); 718 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); 719 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); 720 721 /** 722 * @} 723 */ 724 725 /** 726 * @} 727 */ 728 729 /* Private constants ---------------------------------------------------------*/ 730 /** @defgroup I2C_Private_Constants I2C Private Constants 731 * @{ 732 */ 733 734 /** 735 * @} 736 */ 737 738 /* Private macros ------------------------------------------------------------*/ 739 /** @defgroup I2C_Private_Macro I2C Private Macros 740 * @{ 741 */ 742 743 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 744 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 745 746 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 747 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 748 749 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 750 ((MASK) == I2C_OA2_MASK01) || \ 751 ((MASK) == I2C_OA2_MASK02) || \ 752 ((MASK) == I2C_OA2_MASK03) || \ 753 ((MASK) == I2C_OA2_MASK04) || \ 754 ((MASK) == I2C_OA2_MASK05) || \ 755 ((MASK) == I2C_OA2_MASK06) || \ 756 ((MASK) == I2C_OA2_MASK07)) 757 758 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 759 ((CALL) == I2C_GENERALCALL_ENABLE)) 760 761 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 762 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 763 764 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 765 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 766 767 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 768 ((MODE) == I2C_AUTOEND_MODE) || \ 769 ((MODE) == I2C_SOFTEND_MODE)) 770 771 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 772 ((REQUEST) == I2C_GENERATE_START_READ) || \ 773 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 774 ((REQUEST) == I2C_NO_STARTSTOP)) 775 776 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 777 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ 778 ((REQUEST) == I2C_NEXT_FRAME) || \ 779 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 780 ((REQUEST) == I2C_LAST_FRAME) || \ 781 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ 782 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 783 784 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ 785 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) 786 787 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ 788 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \ 789 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \ 790 I2C_CR2_RD_WRN))) 791 792 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \ 793 >> 16U)) 794 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \ 795 >> 16U)) 796 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 797 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) 798 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) 799 800 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 801 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 802 803 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \ 804 (uint16_t)(0xFF00U))) >> 8U))) 805 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 806 807 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \ 808 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 809 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \ 810 (~I2C_CR2_RD_WRN)) : \ 811 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 812 (I2C_CR2_ADD10) | (I2C_CR2_START) | \ 813 (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN))) 814 815 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \ 816 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) 817 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) 818 /** 819 * @} 820 */ 821 822 /* Private Functions ---------------------------------------------------------*/ 823 /** @defgroup I2C_Private_Functions I2C Private Functions 824 * @{ 825 */ 826 /* Private functions are defined in stm32h5xx_hal_i2c.c file */ 827 /** 828 * @} 829 */ 830 831 /** 832 * @} 833 */ 834 835 /** 836 * @} 837 */ 838 839 #ifdef __cplusplus 840 } 841 #endif 842 843 844 #endif /* STM32H5xx_HAL_I2C_H */ 845
