1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18 #if defined(USE_FULL_LL_DRIVER)
19
20 /* Includes ------------------------------------------------------------------*/
21 #include "stm32g4xx_ll_usart.h"
22 #include "stm32g4xx_ll_rcc.h"
23 #include "stm32g4xx_ll_bus.h"
24 #ifdef USE_FULL_ASSERT
25 #include "stm32_assert.h"
26 #else
27 #define assert_param(expr) ((void)0U)
28 #endif /* USE_FULL_ASSERT */
29
30 /** @addtogroup STM32G4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
35
36 /** @addtogroup USART_LL
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private macros ------------------------------------------------------------*/
44 /** @addtogroup USART_LL_Private_Macros
45 * @{
46 */
47
48 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
49 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
50 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
51 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
52 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
53 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
54 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
55 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
56 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
57 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
58 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
59 || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
60
61 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
62 * divided by the smallest oversampling used on the USART (i.e. 8) */
63 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 18750000U)
64
65 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
66 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
67
68 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
69 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
70 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
71 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
72
73 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
74 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
75 || ((__VALUE__) == LL_USART_PARITY_ODD))
76
77 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
78 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
79 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
80
81 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
82 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
83
84 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
85 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
86
87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
88 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
89
90 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
91 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
92
93 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
94 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
95
96 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
97 || ((__VALUE__) == LL_USART_STOPBITS_1) \
98 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
99 || ((__VALUE__) == LL_USART_STOPBITS_2))
100
101 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
102 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
103 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
104 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
105
106 /**
107 * @}
108 */
109
110 /* Private function prototypes -----------------------------------------------*/
111
112 /* Exported functions --------------------------------------------------------*/
113 /** @addtogroup USART_LL_Exported_Functions
114 * @{
115 */
116
117 /** @addtogroup USART_LL_EF_Init
118 * @{
119 */
120
121 /**
122 * @brief De-initialize USART registers (Registers restored to their default values).
123 * @param USARTx USART Instance
124 * @retval An ErrorStatus enumeration value:
125 * - SUCCESS: USART registers are de-initialized
126 * - ERROR: USART registers are not de-initialized
127 */
LL_USART_DeInit(USART_TypeDef * USARTx)128 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
129 {
130 ErrorStatus status = SUCCESS;
131
132 /* Check the parameters */
133 assert_param(IS_UART_INSTANCE(USARTx));
134
135 if (USARTx == USART1)
136 {
137 /* Force reset of USART clock */
138 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
139
140 /* Release reset of USART clock */
141 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
142 }
143 else if (USARTx == USART2)
144 {
145 /* Force reset of USART clock */
146 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
147
148 /* Release reset of USART clock */
149 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
150 }
151 else if (USARTx == USART3)
152 {
153 /* Force reset of USART clock */
154 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
155
156 /* Release reset of USART clock */
157 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
158 }
159 #if defined(UART4)
160 else if (USARTx == UART4)
161 {
162 /* Force reset of UART clock */
163 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
164
165 /* Release reset of UART clock */
166 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
167 }
168 #endif /* UART4 */
169 #if defined(UART5)
170 else if (USARTx == UART5)
171 {
172 /* Force reset of UART clock */
173 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
174
175 /* Release reset of UART clock */
176 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
177 }
178 #endif /* UART5 */
179 else
180 {
181 status = ERROR;
182 }
183
184 return (status);
185 }
186
187 /**
188 * @brief Initialize USART registers according to the specified
189 * parameters in USART_InitStruct.
190 * @note As some bits in USART configuration registers can only be written when
191 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
192 * this function. Otherwise, ERROR result will be returned.
193 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
194 * @param USARTx USART Instance
195 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
196 * that contains the configuration information for the specified USART peripheral.
197 * @retval An ErrorStatus enumeration value:
198 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
199 * - ERROR: Problem occurred during USART Registers initialization
200 */
LL_USART_Init(USART_TypeDef * USARTx,LL_USART_InitTypeDef * USART_InitStruct)201 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
202 {
203 ErrorStatus status = ERROR;
204 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
205
206 /* Check the parameters */
207 assert_param(IS_UART_INSTANCE(USARTx));
208 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
209 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
210 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
211 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
212 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
213 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
214 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
215 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
216
217 /* USART needs to be in disabled state, in order to be able to configure some bits in
218 CRx registers */
219 if (LL_USART_IsEnabled(USARTx) == 0U)
220 {
221 /*---------------------------- USART CR1 Configuration ---------------------
222 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
223 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
224 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
225 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
226 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
227 */
228 MODIFY_REG(USARTx->CR1,
229 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
230 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
231 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
232 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
233
234 /*---------------------------- USART CR2 Configuration ---------------------
235 * Configure USARTx CR2 (Stop bits) with parameters:
236 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
237 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
238 */
239 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
240
241 /*---------------------------- USART CR3 Configuration ---------------------
242 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
243 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
244 * USART_InitStruct->HardwareFlowControl value.
245 */
246 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
247
248 /*---------------------------- USART BRR Configuration ---------------------
249 * Retrieve Clock frequency used for USART Peripheral
250 */
251 if (USARTx == USART1)
252 {
253 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
254 }
255 else if (USARTx == USART2)
256 {
257 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
258 }
259 else if (USARTx == USART3)
260 {
261 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
262 }
263 #if defined(UART4)
264 else if (USARTx == UART4)
265 {
266 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
267 }
268 #endif /* UART4 */
269 #if defined(UART5)
270 else if (USARTx == UART5)
271 {
272 periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
273 }
274 #endif /* UART5 */
275 else
276 {
277 /* Nothing to do, as error code is already assigned to ERROR value */
278 }
279
280 /* Configure the USART Baud Rate :
281 - prescaler value is required
282 - valid baud rate value (different from 0) is required
283 - Peripheral clock as returned by RCC service, should be valid (different from 0).
284 */
285 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
286 && (USART_InitStruct->BaudRate != 0U))
287 {
288 status = SUCCESS;
289 LL_USART_SetBaudRate(USARTx,
290 periphclk,
291 USART_InitStruct->PrescalerValue,
292 USART_InitStruct->OverSampling,
293 USART_InitStruct->BaudRate);
294
295 /* Check BRR is greater than or equal to 16d */
296 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
297 }
298
299 /*---------------------------- USART PRESC Configuration -----------------------
300 * Configure USARTx PRESC (Prescaler) with parameters:
301 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
302 */
303 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
304 }
305 /* Endif (=> USART not in Disabled state => return ERROR) */
306
307 return (status);
308 }
309
310 /**
311 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
312 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
313 * whose fields will be set to default values.
314 * @retval None
315 */
316
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)317 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
318 {
319 /* Set USART_InitStruct fields to default values */
320 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1;
321 USART_InitStruct->BaudRate = 9600U;
322 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
323 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
324 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
325 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
326 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
327 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
328 }
329
330 /**
331 * @brief Initialize USART Clock related settings according to the
332 * specified parameters in the USART_ClockInitStruct.
333 * @note As some bits in USART configuration registers can only be written when
334 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling
335 * this function. Otherwise, ERROR result will be returned.
336 * @param USARTx USART Instance
337 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
338 * that contains the Clock configuration information for the specified USART peripheral.
339 * @retval An ErrorStatus enumeration value:
340 * - SUCCESS: USART registers related to Clock settings are initialized according
341 * to USART_ClockInitStruct content
342 * - ERROR: Problem occurred during USART Registers initialization
343 */
LL_USART_ClockInit(USART_TypeDef * USARTx,LL_USART_ClockInitTypeDef * USART_ClockInitStruct)344 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
345 {
346 ErrorStatus status = SUCCESS;
347
348 /* Check USART Instance and Clock signal output parameters */
349 assert_param(IS_UART_INSTANCE(USARTx));
350 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
351
352 /* USART needs to be in disabled state, in order to be able to configure some bits in
353 CRx registers */
354 if (LL_USART_IsEnabled(USARTx) == 0U)
355 {
356 /* Ensure USART instance is USART capable */
357 assert_param(IS_USART_INSTANCE(USARTx));
358
359 /* Check clock related parameters */
360 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
361 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
362 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
363
364 /*---------------------------- USART CR2 Configuration -----------------------
365 * Configure USARTx CR2 (Clock signal related bits) with parameters:
366 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value
367 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
368 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
369 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
370 */
371 MODIFY_REG(USARTx->CR2,
372 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
373 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity |
374 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
375 }
376 /* Else (USART not in Disabled state => return ERROR */
377 else
378 {
379 status = ERROR;
380 }
381
382 return (status);
383 }
384
385 /**
386 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
387 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
388 * whose fields will be set to default values.
389 * @retval None
390 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)391 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
392 {
393 /* Set LL_USART_ClockInitStruct fields with default values */
394 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
395 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput =
396 LL_USART_CLOCK_DISABLE */
397 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput =
398 LL_USART_CLOCK_DISABLE */
399 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput =
400 LL_USART_CLOCK_DISABLE */
401 }
402
403 /**
404 * @}
405 */
406
407 /**
408 * @}
409 */
410
411 /**
412 * @}
413 */
414
415 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
416
417 /**
418 * @}
419 */
420
421 #endif /* USE_FULL_LL_DRIVER */
422
423
424
