1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_dac_ex.c
4 * @author MCD Application Team
5 * @brief Extended DAC HAL module driver.
6 * This file provides firmware functions to manage the extended
7 * functionalities of the DAC peripheral.
8 *
9 *
10 ******************************************************************************
11 * @attention
12 *
13 * Copyright (c) 2019 STMicroelectronics.
14 * All rights reserved.
15 *
16 * This software is licensed under terms that can be found in the LICENSE file
17 * in the root directory of this software component.
18 * If no LICENSE file comes with this software, it is provided AS-IS.
19 *
20 ******************************************************************************
21 @verbatim
22 ==============================================================================
23 ##### How to use this driver #####
24 ==============================================================================
25 [..]
26
27 *** Dual mode IO operation ***
28 ==============================
29 [..]
30 (+) Use HAL_DACEx_DualStart() to enable both channel and start conversion
31 for dual mode operation.
32 If software trigger is selected, using HAL_DACEx_DualStart() will start
33 the conversion of the value previously set by HAL_DACEx_DualSetValue().
34 (+) Use HAL_DACEx_DualStop() to disable both channel and stop conversion
35 for dual mode operation.
36 (+) Use HAL_DACEx_DualStart_DMA() to enable both channel and start conversion
37 for dual mode operation using DMA to feed DAC converters.
38 First issued trigger will start the conversion of the value previously
39 set by HAL_DACEx_DualSetValue().
40 The same callbacks that are used in single mode are called in dual mode to notify
41 transfer completion (half complete or complete), errors or underrun.
42 (+) Use HAL_DACEx_DualStop_DMA() to disable both channel and stop conversion
43 for dual mode operation using DMA to feed DAC converters.
44 (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
45 Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
46 HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
47 Channel 1 and Channel 2.
48
49 *** Signal generation operation ***
50 ===================================
51 [..]
52 (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
53 (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
54
55 (+) Use HAL_DACEx_SawtoothWaveGenerate() to generate sawtooth signal.
56 (+) Use HAL_DACEx_SawtoothWaveDataReset() to reset sawtooth wave.
57 (+) Use HAL_DACEx_SawtoothWaveDataStep() to step sawtooth wave.
58
59 (+) HAL_DACEx_SelfCalibrate to calibrate one DAC channel.
60 (+) HAL_DACEx_SetUserTrimming to set user trimming value.
61 (+) HAL_DACEx_GetTrimOffset to retrieve trimming value (factory setting
62 after reset, user setting if HAL_DACEx_SetUserTrimming have been used
63 at least one time after reset).
64
65 @endverbatim
66 ******************************************************************************
67 */
68
69
70 /* Includes ------------------------------------------------------------------*/
71 #include "stm32g4xx_hal.h"
72
73 /** @addtogroup STM32G4xx_HAL_Driver
74 * @{
75 */
76
77 #ifdef HAL_DAC_MODULE_ENABLED
78
79 #if defined(DAC1) || defined(DAC2) || defined(DAC3) ||defined (DAC4)
80
81 /** @defgroup DACEx DACEx
82 * @brief DAC Extended HAL module driver
83 * @{
84 */
85
86 /* Private typedef -----------------------------------------------------------*/
87 /* Private define ------------------------------------------------------------*/
88 /* Private macro -------------------------------------------------------------*/
89 /* Private variables ---------------------------------------------------------*/
90 /* Private function prototypes -----------------------------------------------*/
91 /* Exported functions --------------------------------------------------------*/
92
93 /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
94 * @{
95 */
96
97 /** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
98 * @brief Extended IO operation functions
99 *
100 @verbatim
101 ==============================================================================
102 ##### Extended features functions #####
103 ==============================================================================
104 [..] This section provides functions allowing to:
105 (+) Start conversion.
106 (+) Stop conversion.
107 (+) Start conversion and enable DMA transfer.
108 (+) Stop conversion and disable DMA transfer.
109 (+) Get result of conversion.
110 (+) Get result of dual mode conversion.
111
112 @endverbatim
113 * @{
114 */
115
116
117 /**
118 * @brief Enables DAC and starts conversion of both channels.
119 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
120 * the configuration information for the specified DAC.
121 * @retval HAL status
122 */
HAL_DACEx_DualStart(DAC_HandleTypeDef * hdac)123 HAL_StatusTypeDef HAL_DACEx_DualStart(DAC_HandleTypeDef *hdac)
124 {
125 uint32_t tmp_swtrig = 0UL;
126
127 /* Check the parameters */
128 assert_param(IS_DAC_CHANNEL(hdac->Instance, DAC_CHANNEL_2));
129
130 /* Process locked */
131 __HAL_LOCK(hdac);
132
133 /* Change DAC state */
134 hdac->State = HAL_DAC_STATE_BUSY;
135
136 /* Enable the Peripheral */
137 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
138 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
139 /* Ensure minimum wait before using peripheral after enabling it */
140 HAL_Delay(1);
141
142 /* Check if software trigger enabled */
143 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE)
144 {
145 tmp_swtrig |= DAC_SWTRIGR_SWTRIG1;
146 }
147 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (DAC_CHANNEL_2 & 0x10UL)))
148 {
149 tmp_swtrig |= DAC_SWTRIGR_SWTRIG2;
150 }
151 /* Enable the selected DAC software conversion*/
152 SET_BIT(hdac->Instance->SWTRIGR, tmp_swtrig);
153
154 /* Change DAC state */
155 hdac->State = HAL_DAC_STATE_READY;
156
157 /* Process unlocked */
158 __HAL_UNLOCK(hdac);
159
160 /* Return function status */
161 return HAL_OK;
162 }
163
164 /**
165 * @brief Disables DAC and stop conversion of both channels.
166 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
167 * the configuration information for the specified DAC.
168 * @retval HAL status
169 */
HAL_DACEx_DualStop(DAC_HandleTypeDef * hdac)170 HAL_StatusTypeDef HAL_DACEx_DualStop(DAC_HandleTypeDef *hdac)
171 {
172 /* Check the parameters */
173 assert_param(IS_DAC_CHANNEL(hdac->Instance, DAC_CHANNEL_2));
174
175 /* Disable the Peripheral */
176 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
177 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
178 /* Ensure minimum wait before enabling peripheral after disabling it */
179 HAL_Delay(1);
180
181 /* Change DAC state */
182 hdac->State = HAL_DAC_STATE_READY;
183
184 /* Return function status */
185 return HAL_OK;
186 }
187
188 /**
189 * @brief Enables DAC and starts conversion of both channel 1 and 2 of the same DAC.
190 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
191 * the configuration information for the specified DAC.
192 * @param Channel The DAC channel that will request data from DMA.
193 * This parameter can be one of the following values:
194 * @arg DAC_CHANNEL_1: DAC Channel1 selected
195 * @arg DAC_CHANNEL_2: DAC Channel2 selected
196 * @param pData The destination peripheral Buffer address.
197 * @param Length The length of data to be transferred from memory to DAC peripheral
198 * @param Alignment Specifies the data alignment for DAC channel.
199 * This parameter can be one of the following values:
200 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
201 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
202 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
203 * @retval HAL status
204 */
HAL_DACEx_DualStart_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t * pData,uint32_t Length,uint32_t Alignment)205 HAL_StatusTypeDef HAL_DACEx_DualStart_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
206 uint32_t Alignment)
207 {
208 HAL_StatusTypeDef status;
209 uint32_t tmpreg = 0UL;
210
211 /* Check the parameters */
212 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
213 /* Ensure Channel 2 exists for this particular DAC instance */
214 assert_param(IS_DAC_CHANNEL(hdac->Instance, DAC_CHANNEL_2));
215 assert_param(IS_DAC_ALIGN(Alignment));
216
217 /* Process locked */
218 __HAL_LOCK(hdac);
219
220 /* Change DAC state */
221 hdac->State = HAL_DAC_STATE_BUSY;
222
223 if (Channel == DAC_CHANNEL_1)
224 {
225 /* Set the DMA transfer complete callback for channel1 */
226 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
227
228 /* Set the DMA half transfer complete callback for channel1 */
229 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
230
231 /* Set the DMA error callback for channel1 */
232 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
233
234 /* Enable the selected DAC channel1 DMA request */
235 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
236 }
237 else
238 {
239 /* Set the DMA transfer complete callback for channel2 */
240 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
241
242 /* Set the DMA half transfer complete callback for channel2 */
243 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
244
245 /* Set the DMA error callback for channel2 */
246 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
247
248 /* Enable the selected DAC channel2 DMA request */
249 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
250 }
251
252 switch (Alignment)
253 {
254 case DAC_ALIGN_12B_R:
255 /* Get DHR12R1 address */
256 tmpreg = (uint32_t)&hdac->Instance->DHR12RD;
257 break;
258 case DAC_ALIGN_12B_L:
259 /* Get DHR12L1 address */
260 tmpreg = (uint32_t)&hdac->Instance->DHR12LD;
261 break;
262 case DAC_ALIGN_8B_R:
263 /* Get DHR8R1 address */
264 tmpreg = (uint32_t)&hdac->Instance->DHR8RD;
265 break;
266 default:
267 break;
268 }
269
270 /* Enable the DMA channel */
271 if (Channel == DAC_CHANNEL_1)
272 {
273 /* Enable the DAC DMA underrun interrupt */
274 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
275
276 /* Enable the DMA channel */
277 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
278 }
279 else
280 {
281 /* Enable the DAC DMA underrun interrupt */
282 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
283
284 /* Enable the DMA channel */
285 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
286 }
287
288 /* Process Unlocked */
289 __HAL_UNLOCK(hdac);
290
291 if (status == HAL_OK)
292 {
293 /* Enable the Peripheral */
294 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_1);
295 __HAL_DAC_ENABLE(hdac, DAC_CHANNEL_2);
296 /* Ensure minimum wait before using peripheral after enabling it */
297 HAL_Delay(1);
298 }
299 else
300 {
301 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
302 }
303
304 /* Return function status */
305 return status;
306 }
307
308 /**
309 * @brief Disables DAC and stop conversion both channel.
310 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
311 * the configuration information for the specified DAC.
312 * @param Channel The DAC channel that requests data from DMA.
313 * This parameter can be one of the following values:
314 * @arg DAC_CHANNEL_1: DAC Channel1 selected
315 * @arg DAC_CHANNEL_2: DAC Channel2 selected
316 * @retval HAL status
317 */
HAL_DACEx_DualStop_DMA(DAC_HandleTypeDef * hdac,uint32_t Channel)318 HAL_StatusTypeDef HAL_DACEx_DualStop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
319 {
320 HAL_StatusTypeDef status;
321
322 /* Ensure Channel 2 exists for this particular DAC instance */
323 assert_param(IS_DAC_CHANNEL(hdac->Instance, DAC_CHANNEL_2));
324
325 /* Disable the selected DAC channel DMA request */
326 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2 | DAC_CR_DMAEN1);
327
328 /* Disable the Peripheral */
329 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_1);
330 __HAL_DAC_DISABLE(hdac, DAC_CHANNEL_2);
331 /* Ensure minimum wait before enabling peripheral after disabling it */
332 HAL_Delay(1);
333
334 /* Disable the DMA channel */
335
336 /* Channel1 is used */
337 if (Channel == DAC_CHANNEL_1)
338 {
339 /* Disable the DMA channel */
340 status = HAL_DMA_Abort(hdac->DMA_Handle1);
341
342 /* Disable the DAC DMA underrun interrupt */
343 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
344 }
345 else
346 {
347 /* Disable the DMA channel */
348 status = HAL_DMA_Abort(hdac->DMA_Handle2);
349
350 /* Disable the DAC DMA underrun interrupt */
351 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
352 }
353
354 /* Check if DMA Channel effectively disabled */
355 if (status != HAL_OK)
356 {
357 /* Update DAC state machine to error */
358 hdac->State = HAL_DAC_STATE_ERROR;
359 }
360 else
361 {
362 /* Change DAC state */
363 hdac->State = HAL_DAC_STATE_READY;
364 }
365
366 /* Return function status */
367 return status;
368 }
369
370
371 /**
372 * @brief Enable or disable the selected DAC channel wave generation.
373 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
374 * the configuration information for the specified DAC.
375 * @param Channel The selected DAC channel.
376 * This parameter can be one of the following values:
377 * @arg DAC_CHANNEL_1: DAC Channel1 selected
378 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
379 *
380 * (1) On this STM32 series, parameter not available on all instances.
381 * Refer to device datasheet for channels availability.
382 * @param Amplitude Select max triangle amplitude.
383 * This parameter can be one of the following values:
384 * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
385 * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
386 * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
387 * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
388 * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
389 * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
390 * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
391 * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
392 * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
393 * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
394 * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
395 * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
396 * @retval HAL status
397 */
HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Amplitude)398 HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
399 {
400 /* Check the parameters */
401 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
402 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
403
404 /* Process locked */
405 __HAL_LOCK(hdac);
406
407 /* Change DAC state */
408 hdac->State = HAL_DAC_STATE_BUSY;
409
410 /* Enable the triangle wave generation for the selected DAC channel */
411 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
412 (DAC_CR_WAVE1_1 | Amplitude) << (Channel & 0x10UL));
413
414 /* Change DAC state */
415 hdac->State = HAL_DAC_STATE_READY;
416
417 /* Process unlocked */
418 __HAL_UNLOCK(hdac);
419
420 /* Return function status */
421 return HAL_OK;
422 }
423
424 /**
425 * @brief Enable or disable the selected DAC channel wave generation.
426 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
427 * the configuration information for the specified DAC.
428 * @param Channel The selected DAC channel.
429 * This parameter can be one of the following values:
430 * @arg DAC_CHANNEL_1: DAC Channel1 selected
431 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
432 *
433 * (1) On this STM32 series, parameter not available on all instances.
434 * Refer to device datasheet for channels availability.
435 * @param Amplitude Unmask DAC channel LFSR for noise wave generation.
436 * This parameter can be one of the following values:
437 * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
438 * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
439 * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
440 * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
441 * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
442 * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
443 * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
444 * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
445 * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
446 * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
447 * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
448 * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
449 * @retval HAL status
450 */
HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Amplitude)451 HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
452 {
453 /* Check the parameters */
454 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
455 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
456
457 /* Process locked */
458 __HAL_LOCK(hdac);
459
460 /* Change DAC state */
461 hdac->State = HAL_DAC_STATE_BUSY;
462
463 /* Enable the noise wave generation for the selected DAC channel */
464 MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
465 (DAC_CR_WAVE1_0 | Amplitude) << (Channel & 0x10UL));
466
467 /* Change DAC state */
468 hdac->State = HAL_DAC_STATE_READY;
469
470 /* Process unlocked */
471 __HAL_UNLOCK(hdac);
472
473 /* Return function status */
474 return HAL_OK;
475 }
476
477 /**
478 * @brief Enable or disable the selected DAC channel sawtooth wave generation.
479 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
480 * the configuration information for the specified DAC.
481 * @param Channel The selected DAC channel.
482 * This parameter can be one of the following values:
483 * @arg DAC_CHANNEL_1: DAC Channel1 selected
484 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
485 *
486 * (1) On this STM32 series, parameter not available on all instances.
487 * Refer to device datasheet for channels availability.
488 * @param Polarity polarity to be used for wave generation.
489 * This parameter can be one of the following values:
490 * @arg DAC_SAWTOOTH_POLARITY_DECREMENT
491 * @arg DAC_SAWTOOTH_POLARITY_INCREMENT
492 * @param ResetData Sawtooth wave reset value.
493 * Range is from 0 to DAC full range 4095 (0xFFF)
494 * @param StepData Sawtooth wave step value.
495 * 12.4 bit format, unsigned: 12 bits exponent / 4 bits mantissa
496 * Step value step is 1/16 = 0.0625
497 * Step value range is 0.0000 to 4095.9375 (0xFFF.F)
498 * @note Sawtooth reset and step triggers are configured by calling @ref HAL_DAC_ConfigChannel
499 * @retval HAL status
500 */
HAL_DACEx_SawtoothWaveGenerate(DAC_HandleTypeDef * hdac,uint32_t Channel,uint32_t Polarity,uint32_t ResetData,uint32_t StepData)501 HAL_StatusTypeDef HAL_DACEx_SawtoothWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Polarity,
502 uint32_t ResetData, uint32_t StepData)
503 {
504 /* Check the parameters */
505 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
506 assert_param(IS_DAC_SAWTOOTH_POLARITY(Polarity));
507 assert_param(IS_DAC_RESET_DATA(ResetData));
508 assert_param(IS_DAC_STEP_DATA(StepData));
509
510 /* Process locked */
511 __HAL_LOCK(hdac);
512
513 /* Change DAC state */
514 hdac->State = HAL_DAC_STATE_BUSY;
515
516 if (Channel == DAC_CHANNEL_1)
517 {
518 /* Configure the sawtooth wave generation data parameters */
519 MODIFY_REG(hdac->Instance->STR1,
520 DAC_STR1_STINCDATA1 | DAC_STR1_STDIR1 | DAC_STR1_STRSTDATA1,
521 (StepData << DAC_STR1_STINCDATA1_Pos)
522 | Polarity
523 | (ResetData << DAC_STR1_STRSTDATA1_Pos));
524 }
525 else
526 {
527 /* Configure the sawtooth wave generation data parameters */
528 MODIFY_REG(hdac->Instance->STR2,
529 DAC_STR2_STINCDATA2 | DAC_STR2_STDIR2 | DAC_STR2_STRSTDATA2,
530 (StepData << DAC_STR2_STINCDATA2_Pos)
531 | Polarity
532 | (ResetData << DAC_STR2_STRSTDATA2_Pos));
533 }
534
535 /* Enable the sawtooth wave generation for the selected DAC channel */
536 MODIFY_REG(hdac->Instance->CR, (DAC_CR_WAVE1) << (Channel & 0x10UL), (uint32_t)(DAC_CR_WAVE1_1 | DAC_CR_WAVE1_0) << (Channel & 0x10UL));
537
538 /* Change DAC state */
539 hdac->State = HAL_DAC_STATE_READY;
540
541 /* Process unlocked */
542 __HAL_UNLOCK(hdac);
543
544 /* Return function status */
545 return HAL_OK;
546 }
547
548 /**
549 * @brief Trig sawtooth wave reset
550 * @note This function allows to reset sawtooth wave in case of SW trigger
551 * has been configured for this usage.
552 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
553 * the configuration information for the specified DAC.
554 * @param Channel The selected DAC channel.
555 * This parameter can be one of the following values:
556 * @arg DAC_CHANNEL_1: DAC Channel1 selected
557 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
558 *
559 * (1) On this STM32 series, parameter not available on all instances.
560 * Refer to device datasheet for channels availability.
561 * @retval HAL status
562 */
HAL_DACEx_SawtoothWaveDataReset(DAC_HandleTypeDef * hdac,uint32_t Channel)563 HAL_StatusTypeDef HAL_DACEx_SawtoothWaveDataReset(DAC_HandleTypeDef *hdac, uint32_t Channel)
564 {
565 HAL_StatusTypeDef status = HAL_OK;
566
567 /* Check the parameters */
568 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
569
570 /* Process locked */
571 __HAL_LOCK(hdac);
572
573 if (((hdac->Instance->STMODR >> (Channel & 0x10UL)) & DAC_STMODR_STRSTTRIGSEL1) == 0UL /* SW TRIGGER */)
574 {
575 /* Change DAC state */
576 hdac->State = HAL_DAC_STATE_BUSY;
577
578 if (Channel == DAC_CHANNEL_1)
579 {
580 /* Enable the selected DAC software conversion */
581 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
582 }
583 else
584 {
585 /* Enable the selected DAC software conversion */
586 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
587 }
588
589 /* Change DAC state */
590 hdac->State = HAL_DAC_STATE_READY;
591 }
592 else
593 {
594 status = HAL_ERROR;
595 }
596
597 /* Process unlocked */
598 __HAL_UNLOCK(hdac);
599
600 /* Return function status */
601 return status;
602 }
603
604 /**
605 * @brief Trig sawtooth wave step
606 * @note This function allows to generate step in sawtooth wave in case of
607 * SW trigger has been configured for this usage.
608 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
609 * the configuration information for the specified DAC.
610 * @param Channel The selected DAC channel.
611 * This parameter can be one of the following values:
612 * @arg DAC_CHANNEL_1: DAC Channel1 selected
613 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
614 *
615 * (1) On this STM32 series, parameter not available on all instances.
616 * Refer to device datasheet for channels availability.
617 * @retval HAL status
618 */
HAL_DACEx_SawtoothWaveDataStep(DAC_HandleTypeDef * hdac,uint32_t Channel)619 HAL_StatusTypeDef HAL_DACEx_SawtoothWaveDataStep(DAC_HandleTypeDef *hdac, uint32_t Channel)
620 {
621 HAL_StatusTypeDef status = HAL_OK;
622
623 /* Check the parameters */
624 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
625
626 /* Process locked */
627 __HAL_LOCK(hdac);
628
629 if (((hdac->Instance->STMODR >> (Channel & 0x10UL)) & DAC_STMODR_STINCTRIGSEL1) == 0UL /* SW TRIGGER */)
630 {
631 /* Change DAC state */
632 hdac->State = HAL_DAC_STATE_BUSY;
633
634 if (Channel == DAC_CHANNEL_1)
635 {
636 /* Enable the selected DAC software conversion */
637 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIGB1);
638 }
639 else
640 {
641 /* Enable the selected DAC software conversion */
642 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIGB2);
643 }
644
645 /* Change DAC state */
646 hdac->State = HAL_DAC_STATE_READY;
647 }
648 else
649 {
650 status = HAL_ERROR;
651 }
652
653 /* Process unlocked */
654 __HAL_UNLOCK(hdac);
655
656 /* Return function status */
657 return status;
658 }
659
660
661 /**
662 * @brief Set the specified data holding register value for dual DAC channel.
663 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
664 * the configuration information for the specified DAC.
665 * @param Alignment Specifies the data alignment for dual channel DAC.
666 * This parameter can be one of the following values:
667 * DAC_ALIGN_8B_R: 8bit right data alignment selected
668 * DAC_ALIGN_12B_L: 12bit left data alignment selected
669 * DAC_ALIGN_12B_R: 12bit right data alignment selected
670 * @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
671 * @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.
672 * @note In dual mode, a unique register access is required to write in both
673 * DAC channels at the same time.
674 * @retval HAL status
675 */
HAL_DACEx_DualSetValue(DAC_HandleTypeDef * hdac,uint32_t Alignment,uint32_t Data1,uint32_t Data2)676 HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
677 {
678 uint32_t data;
679 uint32_t tmp;
680
681 /* Check the parameters */
682 assert_param(IS_DAC_ALIGN(Alignment));
683 assert_param(IS_DAC_DATA(Data1));
684 assert_param(IS_DAC_DATA(Data2));
685
686 /* Calculate and set dual DAC data holding register value */
687 if (Alignment == DAC_ALIGN_8B_R)
688 {
689 data = ((uint32_t)Data2 << 8U) | Data1;
690 }
691 else
692 {
693 data = ((uint32_t)Data2 << 16U) | Data1;
694 }
695
696 tmp = (uint32_t)hdac->Instance;
697 tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
698
699 /* Set the dual DAC selected data holding register */
700 *(__IO uint32_t *)tmp = data;
701
702 /* Return function status */
703 return HAL_OK;
704 }
705
706 /**
707 * @brief Conversion complete callback in non-blocking mode for Channel2.
708 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
709 * the configuration information for the specified DAC.
710 * @retval None
711 */
HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef * hdac)712 __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac)
713 {
714 /* Prevent unused argument(s) compilation warning */
715 UNUSED(hdac);
716
717 /* NOTE : This function should not be modified, when the callback is needed,
718 the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
719 */
720 }
721
722 /**
723 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel2.
724 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
725 * the configuration information for the specified DAC.
726 * @retval None
727 */
HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef * hdac)728 __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac)
729 {
730 /* Prevent unused argument(s) compilation warning */
731 UNUSED(hdac);
732
733 /* NOTE : This function should not be modified, when the callback is needed,
734 the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
735 */
736 }
737
738 /**
739 * @brief Error DAC callback for Channel2.
740 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
741 * the configuration information for the specified DAC.
742 * @retval None
743 */
HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef * hdac)744 __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
745 {
746 /* Prevent unused argument(s) compilation warning */
747 UNUSED(hdac);
748
749 /* NOTE : This function should not be modified, when the callback is needed,
750 the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
751 */
752 }
753
754 /**
755 * @brief DMA underrun DAC callback for Channel2.
756 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
757 * the configuration information for the specified DAC.
758 * @retval None
759 */
HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef * hdac)760 __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
761 {
762 /* Prevent unused argument(s) compilation warning */
763 UNUSED(hdac);
764
765 /* NOTE : This function should not be modified, when the callback is needed,
766 the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
767 */
768 }
769
770
771 /**
772 * @brief Run the self calibration of one DAC channel.
773 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
774 * the configuration information for the specified DAC.
775 * @param sConfig DAC channel configuration structure.
776 * @param Channel The selected DAC channel.
777 * This parameter can be one of the following values:
778 * @arg DAC_CHANNEL_1: DAC Channel1 selected
779 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
780 *
781 * (1) On this STM32 series, parameter not available on all instances.
782 * Refer to device datasheet for channels availability.
783 * @retval Updates DAC_TrimmingValue. , DAC_UserTrimming set to DAC_UserTrimming
784 * @retval HAL status
785 * @note Calibration runs about 7 ms.
786 */
HAL_DACEx_SelfCalibrate(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel)787 HAL_StatusTypeDef HAL_DACEx_SelfCalibrate(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
788 {
789 HAL_StatusTypeDef status = HAL_OK;
790
791 __IO uint32_t tmp;
792 uint32_t trimmingvalue;
793 uint32_t delta;
794
795 /* store/restore channel configuration structure purpose */
796 uint32_t oldmodeconfiguration;
797
798 /* Check the parameters */
799 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
800
801 /* Check the DAC handle allocation */
802 /* Check if DAC running */
803 if (hdac == NULL)
804 {
805 status = HAL_ERROR;
806 }
807 else if (hdac->State == HAL_DAC_STATE_BUSY)
808 {
809 status = HAL_ERROR;
810 }
811 else
812 {
813 /* Process locked */
814 __HAL_LOCK(hdac);
815
816 /* Store configuration */
817 oldmodeconfiguration = (hdac->Instance->MCR & (DAC_MCR_MODE1 << (Channel & 0x10UL)));
818
819 /* Disable the selected DAC channel */
820 CLEAR_BIT((hdac->Instance->CR), (DAC_CR_EN1 << (Channel & 0x10UL)));
821 /* Wait for ready bit to be de-asserted */
822 HAL_Delay(1);
823
824 /* Set mode in MCR for calibration */
825 MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), 0U);
826
827 /* Set DAC Channel1 DHR register to the middle value */
828 tmp = (uint32_t)hdac->Instance;
829
830 if (Channel == DAC_CHANNEL_1)
831 {
832 tmp += DAC_DHR12R1_ALIGNMENT(DAC_ALIGN_12B_R);
833 }
834 else
835 {
836 tmp += DAC_DHR12R2_ALIGNMENT(DAC_ALIGN_12B_R);
837 }
838
839 *(__IO uint32_t *) tmp = 0x0800UL;
840
841 /* Enable the selected DAC channel calibration */
842 /* i.e. set DAC_CR_CENx bit */
843 SET_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
844
845 /* Init trimming counter */
846 /* Medium value */
847 trimmingvalue = 16UL;
848 delta = 8UL;
849 while (delta != 0UL)
850 {
851 /* Set candidate trimming */
852 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
853
854 /* tOFFTRIMmax delay x ms as per datasheet (electrical characteristics */
855 /* i.e. minimum time needed between two calibration steps */
856 HAL_Delay(1);
857
858 if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL)))
859 {
860 /* DAC_SR_CAL_FLAGx is HIGH try higher trimming */
861 trimmingvalue -= delta;
862 }
863 else
864 {
865 /* DAC_SR_CAL_FLAGx is LOW try lower trimming */
866 trimmingvalue += delta;
867 }
868 delta >>= 1UL;
869 }
870
871 /* Still need to check if right calibration is current value or one step below */
872 /* Indeed the first value that causes the DAC_SR_CAL_FLAGx bit to change from 0 to 1 */
873 /* Set candidate trimming */
874 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
875
876 /* tOFFTRIMmax delay x ms as per datasheet (electrical characteristics */
877 /* i.e. minimum time needed between two calibration steps */
878 HAL_Delay(1U);
879
880 if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == 0UL)
881 {
882 /* Trimming is actually one value more */
883 trimmingvalue++;
884 /* Set right trimming */
885 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
886 }
887
888 /* Disable the selected DAC channel calibration */
889 /* i.e. clear DAC_CR_CENx bit */
890 CLEAR_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
891
892 sConfig->DAC_TrimmingValue = trimmingvalue;
893 sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
894
895 /* Restore configuration */
896 MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), oldmodeconfiguration);
897
898 /* Process unlocked */
899 __HAL_UNLOCK(hdac);
900 }
901
902 return status;
903 }
904
905 /**
906 * @brief Set the trimming mode and trimming value (user trimming mode applied).
907 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
908 * the configuration information for the specified DAC.
909 * @param sConfig DAC configuration structure updated with new DAC trimming value.
910 * @param Channel The selected DAC channel.
911 * This parameter can be one of the following values:
912 * @arg DAC_CHANNEL_1: DAC Channel1 selected
913 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
914 *
915 * (1) On this STM32 series, parameter not available on all instances.
916 * Refer to device datasheet for channels availability.
917 * @param NewTrimmingValue DAC new trimming value
918 * @retval HAL status
919 */
HAL_DACEx_SetUserTrimming(DAC_HandleTypeDef * hdac,DAC_ChannelConfTypeDef * sConfig,uint32_t Channel,uint32_t NewTrimmingValue)920 HAL_StatusTypeDef HAL_DACEx_SetUserTrimming(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel,
921 uint32_t NewTrimmingValue)
922 {
923 HAL_StatusTypeDef status = HAL_OK;
924
925 /* Check the parameters */
926 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
927 assert_param(IS_DAC_NEWTRIMMINGVALUE(NewTrimmingValue));
928
929 /* Check the DAC handle allocation */
930 if (hdac == NULL)
931 {
932 status = HAL_ERROR;
933 }
934 else
935 {
936 /* Process locked */
937 __HAL_LOCK(hdac);
938
939 /* Set new trimming */
940 MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (NewTrimmingValue << (Channel & 0x10UL)));
941
942 /* Update trimming mode */
943 sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
944 sConfig->DAC_TrimmingValue = NewTrimmingValue;
945
946 /* Process unlocked */
947 __HAL_UNLOCK(hdac);
948 }
949 return status;
950 }
951
952 /**
953 * @brief Return the DAC trimming value.
954 * @param hdac DAC handle
955 * @param Channel The selected DAC channel.
956 * This parameter can be one of the following values:
957 * @arg DAC_CHANNEL_1: DAC Channel1 selected
958 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
959 *
960 * (1) On this STM32 series, parameter not available on all instances.
961 * Refer to device datasheet for channels availability.
962 * @retval Trimming value : range: 0->31
963 *
964 */
HAL_DACEx_GetTrimOffset(DAC_HandleTypeDef * hdac,uint32_t Channel)965 uint32_t HAL_DACEx_GetTrimOffset(DAC_HandleTypeDef *hdac, uint32_t Channel)
966 {
967 /* Check the parameter */
968 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
969
970 /* Retrieve trimming */
971 return ((hdac->Instance->CCR & (DAC_CCR_OTRIM1 << (Channel & 0x10UL))) >> (Channel & 0x10UL));
972 }
973
974 /**
975 * @}
976 */
977
978 /** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions
979 * @brief Extended Peripheral Control functions
980 *
981 @verbatim
982 ==============================================================================
983 ##### Peripheral Control functions #####
984 ==============================================================================
985 [..] This section provides functions allowing to:
986 (+) Set the specified data holding register value for DAC channel.
987
988 @endverbatim
989 * @{
990 */
991
992
993 /**
994 * @brief Return the last data output value of the selected DAC channel.
995 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
996 * the configuration information for the specified DAC.
997 * @retval The selected DAC channel data output value.
998 */
HAL_DACEx_DualGetValue(DAC_HandleTypeDef * hdac)999 uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac)
1000 {
1001 uint32_t tmp = 0UL;
1002
1003 tmp |= hdac->Instance->DOR1;
1004
1005 tmp |= hdac->Instance->DOR2 << 16UL;
1006
1007 /* Returns the DAC channel data output register value */
1008 return tmp;
1009 }
1010
1011
1012 /**
1013 * @}
1014 */
1015 /**
1016 * @}
1017 */
1018
1019 /* Private functions ---------------------------------------------------------*/
1020 /** @defgroup DACEx_Private_Functions DACEx private functions
1021 * @brief Extended private functions
1022 * @{
1023 */
1024
1025
1026 /**
1027 * @brief DMA conversion complete callback.
1028 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1029 * the configuration information for the specified DMA module.
1030 * @retval None
1031 */
DAC_DMAConvCpltCh2(DMA_HandleTypeDef * hdma)1032 void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
1033 {
1034 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1035
1036 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1037 hdac->ConvCpltCallbackCh2(hdac);
1038 #else
1039 HAL_DACEx_ConvCpltCallbackCh2(hdac);
1040 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1041
1042 hdac->State = HAL_DAC_STATE_READY;
1043 }
1044
1045 /**
1046 * @brief DMA half transfer complete callback.
1047 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1048 * the configuration information for the specified DMA module.
1049 * @retval None
1050 */
DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef * hdma)1051 void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
1052 {
1053 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1054 /* Conversion complete callback */
1055 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1056 hdac->ConvHalfCpltCallbackCh2(hdac);
1057 #else
1058 HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
1059 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1060 }
1061
1062 /**
1063 * @brief DMA error callback.
1064 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1065 * the configuration information for the specified DMA module.
1066 * @retval None
1067 */
DAC_DMAErrorCh2(DMA_HandleTypeDef * hdma)1068 void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
1069 {
1070 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1071
1072 /* Set DAC error code to DMA error */
1073 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1074
1075 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1076 hdac->ErrorCallbackCh2(hdac);
1077 #else
1078 HAL_DACEx_ErrorCallbackCh2(hdac);
1079 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1080
1081 hdac->State = HAL_DAC_STATE_READY;
1082 }
1083
1084
1085 /**
1086 * @}
1087 */
1088
1089 /**
1090 * @}
1091 */
1092
1093 #endif /* DAC1 || DAC2 || DAC3 || DAC4 */
1094
1095 #endif /* HAL_DAC_MODULE_ENABLED */
1096
1097 /**
1098 * @}
1099 */
1100
1101
